MC12026A 1.1 GHz Dual Modulus Prescaler The MC12026 is a high frequency, low voltage dual modulus prescaler used in phase–locked loop (PLL) applications. The MC12026A can be used with CMOS synthesizers requiring positive edges to trigger internal counters in a PLL to provide tuning signals up to 1.1 GHz in programmable frequency steps. A Divide Ratio Control (SW) permits selection of an 8/9 or 16/17 divide ratio as desired. The Modulus Control (MC) selects the proper divide number after SW has been biased to select the desired divide ratio. Features • • • • • • • 1.1 GHz Toggle Frequency Supply Voltage 4.5 to 5.5 V Low Power 4.0 mA Typical Operating Temperature Range of –40 to 85°C The MC12026 is Pin Compatible with the MC12022 Short Setup Time (tset ) 6.0 ns Typical @ 1.1 GHz Modulus Control Input Level is Compatible with Standard CMOS and TTL http://onsemi.com 1 PIN CONNECTIONS IN VCC SW OUT SW MC Divide Ratio H H 8 H L 9 L H 16 L L 17 1 8 2 7 3 6 4 5 IN NC MC Gnd (Top View) ORDERING INFORMATION Device FUNCTIONAL TABLE SO–8 D SUFFIX CASE 751 8 Package Shipping MC12026AD SO–8 98 Units/Rail MC12026ADR2 SO–8 2500 Tape & Reel DEVICE MARKING INFORMATION See general marking information in the device marking section on page 6 of this data sheet. 1. SW: H = VCC, L = Open. A logic L can also be applied by grounding this pin, but this is not recommended due to increased power consumption. 2. MC: H = 2.0 V to VCC, L = GND to 0.8 V. MAXIMUM RATINGS Characteristics Symbol Value Unit VCC –0.5 to 7.0 Vdc TA –40 to 85 °C Storage Temperature Range Tstg –65 to 150 °C Modulus Control Input, Pin 6 MC –0.5 to 6.5 Vdc Maximum Output Current, Pin 4 IO 10.0 mA Power Supply Voltage, Pin 2 Operating Temperature Range NOTE: ESD data available upon request. Semiconductor Components Industries, LLC, 2001 November, 2001 – Rev. 7 1 Publication Order Number: MC12026A/D MC12026A ELECTRICAL CHARACTERISTICS (VCC = 4.5 to 5.5; TA = –40 to 85°C, unless otherwise noted.) Characteristic Symbol Min Typ Max Unit ft 0.1 1.4 1.1 GHz Supply Current Output Unloaded (Pin 2) ICC – 4.0 5.3 mA Modulus Control Input High (MC) VIH1 2.0 – VCC V Modulus Control Input Low (MC) VIL1 GND – 0.8 V Divide Ratio Control Input High (SW) VIH2 VCC – 0.5 V VCC VCC + 0.5 V V Divide Ratio Control Input Low (SW) VIL2 OPEN OPEN OPEN – Output Voltage Swing (RL = 560 Ω; IO = 5.5 mA) (Note 1) (RL = 1.1 kΩ; IO = 2.9 mA) (Note 2) Vout 1.0 1.6 – Vpp Modulus Setup Time MC to Out (Note 3) tSET – 6.0 9.0 ns 400 100 – – 1000 1000 Toggle Frequency (Sin Wave) Input Voltage Sensitivity 100–250 MHz 250–1100 MHz Vin mVpp 1. Divide Ratio of ÷8/9 at 1.1 GHz, CL = 8.0 pF. 2. Divide Ratio of ÷16/17 at 1.1 GHz, CL = 8.0 pF. 3. Assuming RL = 560 Ω at 1.1 GHz. In In D Q D Q C QB C QB D Q QB C M MC 1 0 SW D QB D QB C Q C Q Out Figure 1. Logic Diagram (MC12026A) Prop. Delay In Out MC Setup MC Release Modulus setup time MC to out is the MC setup or MC release plus the prop delay. Figure 2. Modulus Setup Time http://onsemi.com 2 MC MC12026A VCC = 4.5 to 5.5V C3 SINE WAVE GENERATOR C1 VCC SW IN 50 Ω OUT C2 RL IN MC CL GND EXTERNAL COMPONENTS C1 = C2 = 1000 pF C3 = 0.1µF CL = 8pF (Including Scope and Jig Capacitance) RL = 560Ω (for ÷8/9 at 1.1GHz) MC INPUT Figure 3. AC Test Circuit +15.0 +1257.40 +10.0 +707.11 ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ ÉÉÉÉÉÉÉÉÉÉÉÉÉÉÉ 0 +223.61 OPERATING WINDOW -5.0 -10.0 -15.0 -20.0 +125.74 +70.71 +39.76 +22.36 -25.0 +12.57 -30.0 +7.07 -35.0 +3.98 -40.0 +2.24 -45.0 +1.26 -50.0 0 200 400 600 800 1000 1200 1400 1600 +0.71 1800 FREQUENCY (MHz) Divide Ratio = 8; VCC = 5.0 V; TA = 25°C Figure 4. Input Signal Amplitude versus Input Frequency 2000 1600 1200 800 400 0 200 400 600 800 1000 1200 1400 FREQUENCY (MHz) Figure 5. Output Amplitude versus Input Frequency http://onsemi.com 3 1600 0 1800 mVpp AMPLITUDE (dBm) +397.64 mVrms +5.0 MC12026A 5.88V 880mV 36.6ns 86.6ns (÷8, 1.1 GHz Input Frequency, VCC = 5.0, TA = 25°C, Output Loaded With 8.0pF) Figure 6. Typical Output Waveform http://onsemi.com 4 MC12026A 200 150 R 100 MHz 50 0 –50 OHMS –100 –150 –200 –250 –300 –350 –400 –450 jX –500 –550 –600 –650 100 200 300 400 500 600 700 800 900 1000 1100 Figure 7. Typical Input Impedance versus Input Frequency http://onsemi.com 5 1200 MC12026A MARKING DIAGRAMS SO–8 D SUFFIX CASE 751 8 8 026A ALYW 026B ALYW 1 1 A WL, L YY, Y WW, W = Assembly Location = Wafer Lot = Year = Work Week http://onsemi.com 6 MC12026A PACKAGE DIMENSIONS SO–8 D SUFFIX CASE 751–07 ISSUE W –X– NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. A 8 5 0.25 (0.010) S B 1 M Y M 4 K –Y– G C N X 45 SEATING PLANE –Z– 0.10 (0.004) H M D 0.25 (0.010) M Z Y S X S http://onsemi.com 7 J DIM A B C D G H J K M N S MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0 8 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 8 0.010 0.020 0.228 0.244 MC12026A ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303–675–2175 or 800–344–3860 Toll Free USA/Canada Fax: 303–675–2176 or 800–344–3867 Toll Free USA/Canada Email: [email protected] JAPAN: ON Semiconductor, Japan Customer Focus Center 4–32–1 Nishi–Gotanda, Shinagawa–ku, Tokyo, Japan 141–0031 Phone: 81–3–5740–2700 Email: [email protected] ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. N. American Technical Support: 800–282–9855 Toll Free USA/Canada http://onsemi.com 8 MC12026A/D