LINER LT3761-1 60vin led controller with internal pwm generator Datasheet

LT3761/LT3761-1
60VIN LED Controller with
Internal PWM Generator
Features
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Description
3000:1 True Color PWM™ Dimming for LEDs
Wide VIN Range: 4.5V to 60V
Rail-to-Rail Current Sense Range: 0V to 80V
Programmable PWM Dimming Signal Generator
Constant Current (±3%) and Constant-Voltage
(±2%) Regulation
Analog Dimming
Drives LEDs in Boost, SEPIC, Inverting, Buck Mode,
Buck-Boost Mode, or Flyback Configuration
Output Short-Circuit Protected Boost
Open LED Protection
Adjustable Switching Frequency: 100kHz to 1MHz
Programmable VIN UVLO with Hysteresis
C/10 Indication for Battery Chargers
Low Shutdown Current: <1µA
Thermally Enhanced 16-Lead MSOP Package
Open LED Status Pin (LT3761)
Frequency Synchronization (LT3761-1)
The LT®3761/LT3761-1 is a DC/DC controller designed to
operate as a constant-current source and constant-voltage
regulator. It features a programmable internal PWM dimming signal. The LT3761/LT3761-1 is ideally suited for
driving high current LEDs, but also has features to make
it suitable for charging batteries and supercapacitors.
The fixed frequency, current mode architecture results in
stable operation over a wide range of supply and output
voltages. A voltage feedback pin serves as the input for
several LED protection features, and also makes it possible
for the converter to operate as a constant-voltage source.
A frequency adjust pin allows the user to program the
frequency from 100kHz to 1MHz to optimize efficiency,
performance or external component size. The LT3761-1
can be synchronized to an external clock.
The LT3761/LT3761-1 senses output current at the high
side or at the low side of the load. The PWM input can be
configured to self-oscillate at fixed frequency with duty
ratio programmable from 4% to 96%. When driven by
an external signal, the PWM input provides LED dimming
ratios of up to 3000:1. The CTRL input provides additional
analog dimming capability.
Applications
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High Voltage LED Strings >100V with Ground
Referred Current Sense
Grounded Anode LEDs
Accurate Current Limited Voltage Regulators
L, LT, LTC, LTM, Linear Technology and the Linear logo are registered trademarks and
True Color PWM is a trademark of Analog Devices, Inc. All other trademarks are the property of
their respective owners. Protected by U.S. Patents including 7199560, 7321203.
Typical Application
94% Efficient Boost LED Driver for Automotive
Headlamp with 25:1 Internal PWM Dimming
VIN
8V TO
60V
2.2µF
×2
499k
90.9k
EN/UVLO
VREF
1M
VIN
INTVCC
140k
100k
2.2µF
×4
GATE
SENSE
LT3761
CTRL
DIM
PWM Dimming Waveforms at
Various DIM Voltage Settings
10µH
10mΩ
0.01µF
47nF
300Hz
0.25Ω
VDIM = 7.7V
DCPWM = 96%
1A
VDIM = 4V
DCPWM = 50%
ILED
1A/DIV
16.9k
VDIM = 1.5V
DCPWM = 10%
GND
VDIM = 0.4V
DCPWM = 4.3%
FB
60W
LED
STRING
ISP
OPENLED
ISN
DIM/SS
PWM
PWMOUT
VC
RT INTVCC
124k
1M
5.1k
4.7nF
28.7k
350kHz
0.5ms/DIV
37611 TA01b
INTVCC
1µF
37611 TA01a
37611fb
For more information www.linear.com/LT3761
1
LT3761/LT3761-1
Absolute Maximum Ratings
Pin Configuration
(Note 1)
VIN, EN/UVLO.............................................................60V
ISP, ISN......................................................................80V
INTVCC....................................................VIN + 0.3V, 9.6V
GATE, PWMOUT................................................. (Note 2)
CTRL, OPENLED.........................................................15V
FB, PWM, SYNC........................................................9.6V
VC, VREF.......................................................................3V
RT, DIM/SS...............................................................1.5V
SENSE.......................................................................0.5V
Operating Ambient Temperature Range (Notes 3, 4)
LT3761E/LT3761E-1................................ –40 to 125°C
LT3761I/LT3761I-1.................................. –40 to 125°C
LT3761H................................................. –40 to 150°C
Storage Temperature Range................... –65°C to 150°C
Order Information
TOP VIEW
PWMOUT
FB
ISN
ISP
VC
CTRL
VREF
PWM
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
17
GND
GATE
SENSE
VIN
INTVCC
EN/UVLO
RT
DIM/SS
OPENLED OR SYNC
MSE PACKAGE
16-LEAD PLASTIC MSOP
TJMAX = 125°C (E-, I-GRADES), TJMAX = 150°C (H-GRADE),
θJA = 43°C/W, θJC = 4°C/W
EXPOSED PAD (PIN 17) IS GND, MUST BE SOLDERED TO PCB
http://www.linear.com/product/LT3761#orderinfo
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LT3761EMSE#PBF
LT3761EMSE#TRPBF
3761
16-Lead Plastic MSOP
–40°C to 125°C
LT3761IMSE#PBF
LT3761IMSE#TRPBF
3761
16-Lead Plastic MSOP
–40°C to 125°C
LT3761HMSE#PBF
LT3761HMSE#TRPBF
3761
16-Lead Plastic MSOP
–40°C to 150°C
LT3761EMSE-1#PBF
LT3761EMSE-1#TRPBF
37611
16-Lead Plastic MSOP
–40°C to 125°C
LT3761IMSE-1#PBF
LT3761IMSE-1#TRPBF
37611
16-Lead Plastic MSOP
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/ Some packages are available in 500 unit reels through
designated sales channels with #TRMPBF suffix.
Electrical Characteristics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 24V, EN/UVLO = 24V, CTRL = 2V, PWM = 5V, unless otherwise noted.
PARAMETER
CONDITIONS
VIN Minimum Operating Voltage
VIN Tied to INTVCC
VIN Shutdown IQ
EN/UVLO = 0V, PWM = 0V
EN/UVLO = 1.15V, PWM = 0V
VIN Operating IQ (Not Switching)
PWM = 0V
VREF Voltage
–100µA ≤ IVREF ≤ 0µA
VREF Line Regulation
4.5V ≤ VIN ≤ 60V
VREF Pull-Up Current
VREF = 0V
SENSE Current Limit Threshold
SENSE Input Bias Current
Current Out of Pin, SENSE = 0V
DIM/SS Pull-Up Current
Current Out of Pin, DIM/SS = 0V
DIM/SS Voltage Clamp
IDIM/SS = 0µA
MIN
TYP
MAX
UNITS
4.5
V
0.1
1
6
µA
µA
1.8
2.2
mA
2.02
2.05
V
l
l
1.955
l
150
185
210
µA
l
98
105
118
mV
0.001
%/V
40
l
10
12
1.2
µA
14
µA
V
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For more information www.linear.com/LT3761
LT3761/LT3761-1
Electrical Characteristics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 24V, EN/UVLO = 24V, CTRL = 2V, PWM = 5V, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
Error Amplifier
Full-Scale ISP/ISN Current Sense Threshold
(VISP-ISN)
CTRL ≥ 1.2V, ISP = 48V
CTRL ≥ 1.2V, ISN = 0V
l
l
242
243
250
257
258
268
mV
mV
1/10th Scale ISP/ISN Current Sense Threshold
(VISP-ISN)
CTRL = 0.2V, ISP = 48V
CTRL = 0.2V, ISN = 0V
l
l
21
17
25
28
30
39
mV
mV
Mid-Scale ISP/ISN Current Sense Threshold
(VISP-ISN)
CTRL = 0.5V, ISP = 48V
CTRL = 0.5V, ISN = 0V
l
l
96
95
100
105
104
115
mV
mV
ISP/ISN Overcurrent Threshold
600
0
ISP/ISN Current Sense Amplifier Input Common Mode
Range (VISN)
ISP/ISN Input Bias Current High Side Sensing (Combined)
mV
80
V
PWM = 5V (Active), ISP = ISN = 48V
PWM = 0V (Standby), ISP = ISN = 48V
100
0.1
µA
µA
ISP/ISN Input Bias Current Low Side Sensing (Combined)
PWM = 5V, ISP = ISN = 0V
–230
µA
ISP/ISN Current Sense Amplifier gm (High Side Sensing)
VISP-ISN = 250mV, ISP = 48V
120
µS
ISP/ISN Current Sense Amplifier gm (Low Side Sensing)
VISP-ISN = 250mV, ISN = 0V
70
µS
CTRL Pin Range for Linear Current Sense Threshold
Adjustment
l
0
1.0
V
100
nA
CTRL Input Bias Current
Current Out of Pin
50
VC Output Impedance
0.9V ≤ VC ≤ 1.5V
15
VC Standby Input Bias Current
PWM = 0V
FB Regulation Voltage (VFB)
ISP = ISN = 48V, 0V
FB Amplifier gm
FB = VFB, ISP = ISN = 48V
500
FB Pin Input Bias Current
Current Out of Pin, FB = VFB
40
100
nA
FB Open LED Threshold
OPENLED Falling, ISP Tied to ISN
(LT3761 Only)
VFB –
65mV
VFB –
50mV
VFB –
40mV
V
C/10 Inhibit for OPENLED Assertion (VISP-ISN)
FB = VFB, ISN = 48V, 0V (LT3761 Only)
14
25
39
FB Overvoltage Threshold
PWMOUT Falling
VFB +
50mV
VFB +
60mV
VFB +
75mV
–20
l
l
1.225
MΩ
20
1.255
1.275
V
µS
4
VC Current Mode Gain (∆VVC /∆VSENSE)
nA
mV
V
V/V
Oscillator
Switching Frequency
RT = 95.3kΩ
RT = 8.87kΩ
GATE Minimum Off-Time
CGATE = 2200pF
160
GATE Minimum On-Time
CGATE = 2200pF
180
ns
SYNC Pin Resistance to GND
3761-1 Only
30
kΩ
SYNC Input High
3761-1 Only
SYNC Input Low
3761-1 Only
l
85
925
100
1000
115
1050
kHz
kHz
ns
1.5
V
0.4
V
Linear Regulator
INTVCC Regulation Voltage
10V ≤ VIN ≤ 60V
INTVCC Maximum Operating Voltage
l
7.6
7.85
4.5
IINTVCC = –10mA, VIN = 7V
V
V
INTVCC Minimum Operating Voltage
Dropout (VIN – INTVCC)
8.05
8.1
390
V
mV
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For more information www.linear.com/LT3761
3
LT3761/LT3761-1
Electrical Characteristics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 24V, EN/UVLO = 24V, CTRL = 2V, PWM = 5V, unless otherwise noted.
PARAMETER
CONDITIONS
INTVCC Undervoltage Lockout
EN/UVLO = 2V
INTVCC Current Limit
INTVCC = 6V, 8V ≤ VIN ≤ 60V
INTVCC Current in Shutdown
EN/UVLO = 0V, INTVCC = 8V
l
MIN
TYP
MAX
3.9
4.1
4.4
UNITS
V
30
36
42
mA
8
13
µA
1.220
1.26
Logic Inputs/Outputs
EN/UVLO Threshold Voltage Falling
l
1.18
EN/UVLO Rising Hysteresis
20
EN/UVLO Input Low Voltage
IVIN Drops Below 1µA
EN/UVLO Pin Bias Current Low
EN/UVLO = 1.15V
EN/UVLO Pin Bias Current High
EN/UVLO = 1.33V
OPENLED Output Low
IOPENLED = 1mA (LT3761 Only)
l
1.7
V
mV
0.4
V
2.3
2.7
µA
10
100
nA
200
mV
PWM Pin Signal Generator
PWM Falling Threshold
l
0.78
0.83
0.88
V
0.35
0.4
0.6
V
7.5
9
µA
88
110
PWM Threshold Hysteresis (VPWMHYS)
IDIM/SS = 0µA
PWM Pull-Up Current (IPWMUP)
PWM = 0.7V, IDIM/SS = 0µA
6
68
PWM Pull-Down Current (IPWMDN)
PWM = 1.5V, IDIM/SS = 0µA
PWM Fault Mode Pull-Down Current
INTVCC = 3.8V
PWMOUT Duty Ratio for PWM Signal Generator (Note 5)
IDIM/SS = –6.5µA
IDIM/SS = 0µA
IDIM/SS = 21.5µA
IDIM/SS = 52µA
3.1
6.8
40
95
4.1
7.9
47.8
96.5
5.2
9.2
56
98
%
%
%
%
PWMOUT Signal Generator Frequency
PWM = 47nF to GND, IDIM/SS = 0µA
215
300
435
Hz
1.5
µA
mA
PWMOUT, Gate Pin Drivers
PWMOUT Driver Output Rise Time (tr)
CL = 560pF
35
PWMOUT Driver Output Fall Time (tf)
CL = 560pF
35
PWMOUT Output Low (VOL)
PWM = 0V
ns
ns
0.05
PWMOUT Output High (VOH)
V
INTVCC –
0.05
V
GATE Output Rise Time (tr)
CL = 3300pF
25
ns
GATE Output Fall Time (tf)
CL = 3300pF
25
ns
GATE Output Low (VOL)
0.1
GATE Output High (VOH)
V
INTVCC –
0.05
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Do not apply a positive or negative voltage or current source to
GATE or PWMOUT pins, otherwise permanent damage may occur.
Note 3: The LT3761E/LT3761E-1 is guaranteed to meet performance
specifications from the 0°C to 125°C junction temperature. Specifications
over the –40°C to 125°C operating junction temperature range are
assured by design, characterization and correlation with statistical process
controls. The LT3761I/LT3761I-1 is guaranteed over the full –40°C to
V
125°C operating junction temperature range. The LT3761H is guaranteed
over the full –40°C to 150°C operating junction temperature range.
Operating lifetime is derated at junction temperatures greater than 125°C.
Note 4: The LT3761/LT3761-1 includes overtemperature protection that
is intended to protect the device during momentary overload conditions.
Junction temperature will exceed the maximum operating junction
temperature when overtemperature protection is active. Continuous
operation above the specified maximum junction temperature may impair
device reliability.
Note 5: PWMOUT Duty Ratio is calculated:
Duty = IPWMUP/(IPWMUP + IPWMDN)
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For more information www.linear.com/LT3761
LT3761/LT3761-1
Typical Performance Characteristics
VISP-ISN Threshold
vs CTRL Voltage
300
TA = 25°C, unless otherwise noted.
VISP-ISN Threshold
vs ISP Voltage
260
FB < 1.2V
Full-Scale VISP-ISN Threshold
vs Temperature
260
FB < 1.2V
200
150
100
50
255
256
VISP -ISN (mV)
VISP-ISN THRESHOLD (mV)
VISP -ISN THRESHOLD (mV)
250
250
245
0.5
1
1.5
CTRL VOLTAGE (V)
240
2
0
20
37611 G01
250
ISP = 48V
1.260
200
VISP-ISN (mV)
250
1.245
0
37611 G03
200
CTRL = 2V
150
CTRL = 0.5V
100
0
1.20
25 50 75 100 125 150
TEMPERATURE (°C)
37611 G04
VREF Voltage vs Temperature
1.21
1.22 1.23 1.24
FB VOLTAGE (V)
1.25
190
180
170
160
150
–50 –25
1.26
2.05
900
415
800
410
2.01
2.00
1.99
1.98
–50 –25
700
FREQUENCY (kHz)
SWITCHING FREQUENCY (kHz)
420
2.02
600
500
400
25 50 75 100 125 150
TEMPERATURE (°C)
37611 G07
100
RT = 25.5k
405
400
395
390
300
385
200
0
25 50 75 100 125 150
TEMPERATURE (°C)
37611 G06
Switching Frequency
vs Temperature
Switching Frequency vs RT
1000
2.03
0
37611 G05
2.06
2.04
25 50 75 100 125 150
TEMPERATURE (°C)
VREF Source Current
vs Temperature
50
1.240
–50 –25
0
37611 G02
300
1.265
1.250
244
–50 –25
80
VISP-ISN Threshold vs FB Voltage
CTRL > 0.1V
1.255
40
60
ISP VOLTAGE (V)
VREF SOURCE CURRENT (µA)
0
1.270
VFB (V)
252
246
FB Regulation Voltage (VFB)
vs Temperature
VREF (V)
ISN = 0
254
248
0
–50
CTRL = 2V
258
10
100
RT (kΩ)
37611 G08
380
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
37611 G09
37611fb
For more information www.linear.com/LT3761
5
LT3761/LT3761-1
Typical Performance Characteristics
SENSE Current Limit Threshold
vs Temperature
EN/UVLO Hysteresis Current
vs Temperature
EN/UVLO Threshold
vs Temperature
2.8
110
1.27
100
95
90
–50 –25
0
EN/UVLO THRESHOLD (V)
2.6
105
EN/UVLO CURRENT (µA)
SENSE THRESHOLD (mV)
TA = 25°C, unless otherwise noted.
2.4
2.2
2.0
1.8
–50 –25
25 50 75 100 125 150
TEMPERATURE (°C)
0
25 50 75 100 125 150
TEMPERATURE (°C)
37611 G11
1.25
RISING
1.23
FALLING
1.21
1.19
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
37611 G10
37611 G12
INTVCC Current Limit vs
vs Temperature
INTVCC Dropout Voltage
vs Current, Temperature
40
VISP-ISN C/10 Threshold
vs Temperature
35
0
–0.2
34
–0.6
TA = 25°C
–0.8
–1.0
–1.2
0
–1.8
25 50 75 100 125 150
TEMPERATURE (°C)
VIN = 7V
0
5
10
15
20
LDO CURRENT (mA)
25
PWM Signal Generator Duty Ratio
vs DIM/SS Current
PWMOUT FREQUENCY (Hz)
PWMOUT DUTY RATIO (%)
340
40
20
0
–10
30
10
–50 –25
PWM Signal Generator Frequency
vs Duty Ratio
100
60
ISN = 0V
20
37611 G14
37611 G13
80
25
15
–1.6
30
–50 –25
ISP = 24V
TA = 130°C
–1.4
32
VISP-ISN (mV)
36
30
TA = –45°C
–0.4
LDO DROPOUT (V)
INTVCC CURRENT LIMIT (mA)
38
0
25 50 75 100 125 150
TEMPERATURE (°C)
37611 G15
PWMOUT Waveform
CPWMOUT = 2.2nF
CPWM = 47nF
PWM
INPUT
5V/DIV
320
PWMOUT
5V/DIV
300
280
200ns/DIV
0
10
20
30
DIM/SS CURRENT (µA)
40
50
37611 G16
260
0
20
40
60
DUTY RATIO (%)
80
37611 G18
100
37611 G17
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6
For more information www.linear.com/LT3761
LT3761/LT3761-1
Typical Performance Characteristics
DIM/SS Voltage
vs Current, Temperature
ISP/ISN Input Bias Current
vs CTRL Voltage, ISP = 48V
1.30
0
INPUT BIAS CURRENT (µA)
DIM/SS VOLTAGE (V)
1.25
TA = –45°C, 25°C
1.20
TA = 130°C
1.15
1.10
–10
0
10
20
30
DIM/SS CURRENT (µA)
40
80
60
40
0
50
ISN
0
0.5
37611 G19
PWMOUT Duty Ratio
vs Temperature, IDIM/SS = 0µA
1
CTRL (V)
1.5
55
9.0
ISN
–80
–120
ISP
–160
–200
2
8.0
7.5
25 50 75 100 125 150
TEMPERATURE (°C)
37611 G22
1.5
2
37611 G21
700
51
49
45
–50 –25
1
CTRL (V)
800
CPWM = 47nF
600
ISP = 24V
500
ISN = 0V
400
47
7.0
0.5
VISP-ISN Overcurrent Threshold
vs Temperature
VISP-ISN (mV)
DUTY RATIO (%)
8.5
0
37611 G20
53
0
–40
PWMOUT Duty Ratio
vs Temperature, IDIM/SS = 21.5µA
CPWM = 47nF
6.5
–50 –25
INPUT BIAS CURRENT (µA)
ISP
20
DUTY RATIO (%)
ISP/ISN Input Bias Current
vs CTRL Voltage, ISN = 0V
120
100
9.5
TA = 25°C, unless otherwise noted.
0
25 50 75 100 125 150
TEMPERATURE (°C)
37611 G23
300
–50 –25
0
25 50 75 100 125 150
TEMPERATURE (°C)
37611 G24
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For more information www.linear.com/LT3761
7
LT3761/LT3761-1
Pin Functions
PWMOUT (Pin 1): Buffered Version of PWM Signal for
Driving LED Load Disconnect NMOS or Level Shift. This
pin also serves in a protection function for the FB overvoltage condition—will toggle if the FB input is greater
than the FB regulation voltage (VFB) plus 60mV (typical).
The PWMOUT pin is driven from INTVCC. Use of a FET
with gate cut-off voltage higher than 1V is recommended.
FB (Pin 2): Voltage Loop Feedback Pin. FB is intended for
constant-voltage regulation or for LED protection and open
LED detection. The internal transconductance amplifier with
output VC will regulate FB to 1.25V (nominal) through the
DC/DC converter. If the FB input exceeds the regulation
voltage, VFB, minus 50mV and the voltage between ISP
and ISN has dropped below the C/10 threshold of 25mV
(typical), the OPENLED pull-down is asserted. This action
may signal an open LED fault. If FB is driven above the FB
overvoltage threshold, the PWMOUT and GATE pins will be
driven low to protect the LEDs from an overcurrent event.
Do not leave the FB pin open. If not used, connect to GND.
ISN (Pin 3): Connection Point for the Negative Terminal
of the Current Feedback Resistor. The constant output
current regulation can be programmed by ILED = 250mV/
RLED when CTRL > 1.2V or ILED = (CTRL – 100mV)/(4 •
RLED). If ISN is greater than INTVCC, input bias current
is typically 20μA flowing into the pin. Below INTVCC,
ISN bias current decreases until it flows out of the pin.
ISP (Pin 4): Connection Point for the Positive Terminal of
the Current Feedback Resistor. Input bias current depends
upon CTRL pin voltage. When it is greater than INTVCC
it flows into the pin. Below INTVCC, ISP bias current
decreases until it flows out of the pin. If the difference
between ISP and ISN exceeds 600mV (typical), then an
overcurrent event is detected. In response to this event,
the GATE and PWMOUT pins are driven low to protect the
switching regulator, a 1.5mA pull-down on PWM and a
9mA pull-down on the DIM/SS pin are activated for 4µs.
VC (Pin 5): Transconductance Error Amplifier Output Pin
Used to Stabilize the Switching Regulator Control Loop
with an RC Network. The VC pin is high impedance when
PWM is low. This feature allows the VC pin to store the
demand current state variable for the next PWM high
transition. Connect a capacitor between this pin and GND;
a resistor in series with the capacitor is recommended for
fast transient response.
CTRL (Pin 6): Current Sense Threshold Adjustment Pin.
Constant current regulation point VISP-ISN is one-fourth
VCTRL plus an offset for 0V ≤ CTRL ≤ 1V. For CTRL >
1.2V the VISP-ISN current regulation point is constant at
the full-scale value of 250mV. For 1V ≤ CTRL ≤ 1.2V, the
dependence of VISP-ISN upon CTRL voltage transitions
from a linear function to a constant value, reaching 98% of
full-scale value by CTRL = 1.1V. Do not leave this pin open.
VREF (Pin 7): Voltage Reference Output Pin, Typically 2V.
This pin drives a resistor divider for the CTRL pin, either
for analog dimming or for temperature limit/compensation
of LED load. It can be bypassed with 10nF or greater, or
less than 50pF. Can supply up to 185µA (typical).
PWM (Pin 8): A signal low turns off switcher, idles the
oscillator and disconnects the VC pin from all internal
loads. PWMOUT pin follows the PWM pin, except in fault
conditions. The PWM pin can be driven with a digital
signal to cause pulse width modulation (PWM) dimming
of an LED load. The digital signal should be capable of
sourcing or sinking 200μA at the high and low thresholds.
During start-up when DIM/SS is below 1V, the first rising
edge of PWM enables switching which continues until
VISP-ISN ≥ 25mV or SS ≥ 1V. Connecting a capacitor from
PWM pin to GND invokes a self-driving oscillator where
internal pull-up and pull-down currents set a duty ratio
for the PWMOUT pin for dimming LEDs. The magnitude
of the pull-up/down currents is set by the current in the
DIM/SS pin. The capacitor on PWM sets the frequency of
the dimming signal. For hiccup mode response to output
short-circuit faults, connect this pin as shown in the application titled Boost LED Driver with Output Short-Circuit
Protection. If not used, connect the PWM pin to INTVCC.
OPENLED (Pin 9, LT3761 Only): An open-drain pull-down
on this pin asserts if the FB input is greater than the FB
regulation voltage (VFB) minus 50mV (typical) AND the
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For more information www.linear.com/LT3761
LT3761/LT3761-1
Pin Functions
difference between current sense inputs ISP and ISN is
less than 25mV. To function, the pin requires an external
pull-up resistor, usually to INTVCC. When the PWM input
is low and the DC/DC converter is idle, the OPENLED
condition is latched to the last valid state when the PWM
input was high. When PWM input goes high again, the
OPENLED pin will be updated. This pin may be used to
report transition from constant current regulation to constant voltage regulation modes, for instance in a charger
or current limited voltage supply.
SYNC (Pin 9, LT3761-1 Only): The SYNC pin is used to
synchronize the internal oscillator to an external logic level
signal. The RT resistor should be chosen to program an
internal switching frequency 20% slower than the SYNC
pulse frequency. Gate turn-on occurs a fixed delay after
the rising edge of SYNC. For best PWM performance, the
PWM rising edge should occur at least 200ns before the
SYNC rising edge. Use a 50% duty cycle waveform to drive
this pin. This pin replaces OPENLED on LT3761-1 option
parts. If not used, tie this pin to PWMOUT.
DIM/SS (Pin 10): Soft-Start and PWMOUT Dimming Signal
Generator Programming Pin. This pin modulates switching
regulator frequency and compensation pin voltage (VC)
clamp when it is below 1V. The soft-start interval is set
with an external capacitor and the DIM/SS pin charging
current. The pin has an internal 12μA (typical) pull-up
current source. The soft-start pin is reset to GND by an
undervoltage condition (detected at the EN/UVLO pin),
INTVCC undervoltage, overcurrent event sensed at ISP/
ISN, or thermal limit. After initial start-up with EN/UVLO,
DIM/SS is forced low until the first PWM rising edge. When
DIM/SS reaches the steady-state voltage (~1.17V), the
charging current (sum of internal and external currents) is
sensed and used to set the PWM pin charging and discharge
currents and threshold hysteresis. In this manner, the SS
charging current sets the duty cycle of the PWMOUT signal
generator associated with the PWM pin. This pin should
always have a capacitor to GND, minimum 560pF value,
when used with the PWMOUT signal generator function.
Place the PWM pin capacitor close to the IC.
RT (Pin 11): Switching Frequency Adjustment Pin. Set the
frequency using a resistor to GND (for resistor values, see
the Typical Performance curve or Table 2). Do not leave
the RT pin open. Place the resistor close to the IC.
EN/UVLO (Pin 12): Enable and Undervoltage Detect Pin.
An accurate 1.22V falling threshold with externally programmable hysteresis causes the switching regulator to
shut down when power is insufficient to maintain output
regulation. Above the 1.24V (typical) rising enable threshold
(but below 2.5V), EN/UVLO input bias current is sub-μA.
Below the 1.22V (typical) falling threshold, an accurate
2.3μA (typical) pull-down current is enabled so the user
can define the rising hysteresis with the external resistor
selection. An undervoltage condition causes the GATE
and PWMOUT pins to transition low and resets soft-start.
Tie to 0.4V, or less, to disable the device and reduce VIN
quiescent current below 1μA.
INTVCC (Pin 13): Current limited, low dropout linear regulator regulates to 7.85V (typical) from VIN. Supplies internal
loads, GATE and PWMOUT drivers. Must be bypassed with
a 1µF ceramic capacitor placed close to the pin and to the
exposed pad GND of the IC.
VIN (Pin 14): Power Supply for Internal Loads and INTVCC
Regulator. Must be locally bypassed with a 0.22µF (or
larger) low ESR capacitor placed close to the pin.
SENSE (Pin 15): The Current Sense Input for the Switch
Control Loop. Kelvin connect the SENSE pin to the positive
terminal of the switch current sense resistor in the source
of the external power NFET. The negative terminal of the
switch current sense resistor should be Kelvin connected
to the exposed pad (GND) of the LT3761/LT3761-1.
GATE (Pin 16): N-channel FET Gate Driver Output. Switches
between INTVCC and GND. Driven to GND during shutdown,
fault or idle states.
GND (Exposed Pad Pin 17): Ground. This pin also serves
as current sense input for the control loop, sensing the
negative terminal of the current sense resistor. Solder the
exposed pad directly to the ground plane.
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For more information www.linear.com/LT3761
9
LT3761/LT3761-1
Block Diagram
185µA
VREF
1.3V
–
+A7
2.02V
0.8V + F3(IDIM/SS)
F1(IDIM/SS)
PWM
0.8V
F2(IDIM/SS)
100mV
+
–
CTRL
1V
CLAMP
ILED
RLED
×1/4
–
+
S
R
PWMINT
Q
PWM LATCH
+
A2
–
R
Q
S
A1
–
gm
+
CURRENT MODE
COMPARATOR
10µA AT
A1+ = A1–
ISENSE
A5
+
gm
–
1.25V
10µA AT
FB = 1.25V
CV EAMP
VC
IDIM_SS
DETECT
100kHz TO 1MHz
OSCILLATOR
A6
SHDN
+
+
–
PWMINT
BANDGAP
REFERENCE
ISP > ISN + 0.6V
T > 165°C
GND
ISN
ISP
12µA
1.2V
FAULT
LOGIC
FB
DIM/SS
ISWITCH
RSNS
OPENLED
LOGIC
25mV
FREQ
PROG
FAULT
2.3µA
+
–
SENSE
OPENLED
+
–
1.22V
105mV
RAMP
GENERATOR
1V
–
+
+
–
A4
CC EAMP
EN/UVLO
GATE
DRIVER
A3
ISN
FB
7.85V INTVCC
–
+
10µA
FAULT
– LDO
+A8
1.25V
OVFB
COMPARATOR
1.5mA
+
–
ISP
CTRL
BUFFER
VIN
PWMOUT
–
+
FB
RT
SYNC
+
–
–
+
+
–
OPTION FOR
LT3761
OPTION FOR
LT3761-1
37611 BD
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For more information www.linear.com/LT3761
LT3761/LT3761-1
Operation
The LT3761/LT3761-1 is a constant-frequency, current
mode controller with a low side NMOS gate driver. The
GATE pin and PWMOUT pin drivers and other chip loads
are powered from INTVCC, which is an internally regulated
supply. In the discussion that follows it will be helpful to
refer to the Block Diagram of the IC. In normal operation
with the PWM pin low, the GATE and PWMOUT pins are
driven to GND, the VC pin is high impedance to store the
previous switching state on the external compensation
capacitor, and the ISP and ISN pin bias currents are reduced
to leakage levels. When the PWM pin transitions high, the
PWMOUT pin transitions high after a short delay. At the
same time, the internal oscillator wakes up and generates a pulse to set the PWM latch, turning on the external
power MOSFET switch (GATE goes high). A voltage input
proportional to the switch current, sensed by an external
current sense resistor between the SENSE and GND input
pins, is added to a stabilizing slope compensation ramp
and the resulting switch current sense signal is fed into
the negative terminal of the PWM comparator. The current
in the external inductor increases steadily during the time
the switch is on. When the switch current sense voltage
exceeds the output of the error amplifier, labeled VC, the
latch is reset and the switch is turned off. During the
switch-off phase, the inductor current decreases. At the
completion of each oscillator cycle, internal signals such
as slope compensation return to their starting points and
a new cycle begins with the set pulse from the oscillator.
Through this repetitive action, the PWM control algorithm
establishes a switch duty cycle to regulate a current or
voltage in the load. The VC signal is integrated over many
switching cycles and is an amplified version of the difference between the LED current sense voltage, measured
between ISP and ISN, and the target difference voltage set
by the CTRL pin. In this manner, the error amplifier sets
the correct peak switch current level to keep the LED current in regulation. If the error amplifier output increases,
more current is demanded in the switch; if it decreases,
less current is demanded. The switch current is monitored
during the on-phase and the voltage across the SENSE
pin is not allowed to exceed the current limit threshold of
105mV (typical). If the SENSE pin exceeds the current limit
threshold, the SR latch is reset regardless of the output
state of the PWM comparator. The difference between
ISP and ISN is monitored to determine if the output is in
a short-circuit condition. If the difference between ISP
and ISN is greater than 600mV (typical), the SR latch will
be reset regardless of the PWM comparator. The DIM/SS
pin will be pulled down and the PWMOUT and GATE pins
forced low for at least 4µs. These functions are intended
to protect the power switch as well as various external
components in the power path of the DC/DC converter.
In voltage feedback mode, the operation is similar to that
described above, except the voltage at the VC pin is set by
the amplified difference of the internal reference of 1.25V
and the FB pin. If FB is lower than the reference voltage,
the switch current will increase; if FB is higher than the
reference voltage, the switch demand current will decrease.
The LED current sense feedback interacts with the FB
voltage feedback so that FB will not exceed the internal
reference and the voltage between ISP and ISN will not
exceed the threshold set by the CTRL pin. For accurate
current or voltage regulation, it is necessary to be sure that
under normal operating conditions the appropriate loop is
dominant. To deactivate the voltage loop entirely, FB can
be connected to GND. To deactivate the LED current loop
entirely, the ISP and ISN should be tied together and the
CTRL input tied to VREF.
Two LED specific functions featured on the LT3761/LT3761-1
are controlled by the voltage feedback pin. First, when the
FB pin exceeds a voltage 50mV lower (–4%) than the FB
regulation voltage, and the difference voltage between ISP
and ISN is below 25mV (typical), the pull-down driver on
the OPENLED pin is activated (LT3761 only). This function
provides a status indicator that the load may be disconnected and the constant-voltage feedback loop is taking
control of the switching regulator. The OPENLED pin deasserts only when PWM is high and FB drops below the
voltage threshold. FB overvoltage is the second protective function. When the FB pin exceeds the FB regulation
voltage by 60mV (plus 5% typical), the PWMOUT pin is
driven low, ignoring the state of the PWM input. In the
case where the PWMOUT pin drives a disconnect NFET,
this action isolates the LED load from GND, preventing
excessive current from damaging the LEDs.
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11
LT3761/LT3761-1
Applications Information
INTVCC Regulator Bypassing and Operation
The INTVCC pin requires a capacitor for stable operation
and to store the charge for the large GATE switching currents. Choose a 10V rated low ESR, X7R ceramic capacitor
for best performance. A 1μF capacitor will be adequate
for many applications. Place the capacitor close to the IC
to minimize the trace length to the INTVCC pin and also
to the IC ground.
allow the user to program the rising hysteresis. The following equations should be used to determine the value
of the resistors:
R1+R2
R2
= 2.3µA •R1 + VIN,FALLING
VIN,FALLING = 1.22 •
VIN,RISING
VIN
An internal current limit on the INTVCC output protects
the LT3761/LT3761-1 from excessive on-chip power dissipation. The minimum value of this current should be
considered when choosing the switching NMOS and the
operating frequency.
IINTVCC can be calculated from the following equation:
IINTVCC = QG • fOSC
Careful choice of a lower QG FET will allow higher switching
frequencies, leading to smaller magnetics. The INTVCC pin
has its own undervoltage disable set to 4.1V (typical) to
protect the external FETs from excessive power dissipation caused by not being fully enhanced. If the INTVCC pin
drops below the UVLO threshold, the GATE and PWMOUT
pins will be forced to 0V and the soft-start pin will be reset.
If the input voltage, VIN, will not exceed 8V, then the INTVCC
pin could be connected to the input supply. Be aware that
a small current (less than 13μA) will load the INTVCC in
shutdown. This action allows the LT3761/LT3761-1 to operate from VIN as low as 4.5V. If VIN is normally above, but
occasionally drops below the INTVCC regulation voltage,
then the minimum operating VIN will be close to 5V. This
value is determined by the dropout voltage of the linear
regulator and the INTVCC undervoltage lockout threshold
mentioned above.
Programming the Turn-On and Turn-Off Thresholds
with the EN/UVLO Pin
The power supply undervoltage lockout (UVLO) value can
be accurately set by the resistor divider to the EN/UVLO pin.
A small 2.3μA pull-down current is active when EN/UVLO
is below the threshold. The purpose of this current is to
LT3761
R1
EN/UVLO
R2
37611 F01
Figure 1. Resistor Connection to Set
VIN Undervoltage Shutdown Threshold
LED Current Programming
The LED current is programmed by placing an appropriate
value current sense resistor, RLED, in series with the LED
string. The voltage drop across RLED is (Kelvin) sensed
by the ISP and ISN pins. A half watt resistor is usually
a good choice. To give the best accuracy, sensing of the
current should be done at the top of the LED string. If this
option is not available then the current may be sensed
at the bottom of the string, or in the source of the PWM
disconnect NFET driven by the PWMOUT signal. A unique
case of GND sensing is the inverting converter shown in
the applications where the LED current is sensed in the
cathode of the power Schottky rectifier. This configuration
allows the LED anode to be grounded for heat sinking. In
this case, it is important to lowpass filter the discontinuous current signal. Input bias currents for the ISP and ISN
inputs are shown in the typical performance characteristics
and should be considered when placing a resistor in series
with the ISP or ISN pins.
The CTRL pin should be tied to a voltage higher than 1.2V
to get the full-scale 250mV (typical) threshold across the
sense resistor. The CTRL pin can also be used to dim the
LED current to zero, although relative accuracy decreases
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For more information www.linear.com/LT3761
LT3761/LT3761-1
Applications Information
with the decreasing voltage sense threshold. When the
CTRL pin voltage is less than 1V, the LED current is:
ILED =
VCTRL − 100mV
RLED • 4
When the CTRL pin voltage is between 1V and 1.2V the LED
current varies with CTRL, but departs from the previous
equation by an increasing amount as the CTRL voltage
increases. Ultimately, the LED current no longer varies for
CTRL ≥ 1.2V. At CTRL = 1.1V, the value of ILED is ~98% of
the equation’s estimate. Some values are listed in Table 1.
Programming Output Voltage (Constant Voltage
Regulation) or Open LED/Overvoltage Threshold
For a boost or SEPIC application, the output voltage can
be set by selecting the values of R3 and R4 (see Figure 2)
according to the following equation:
VOUT = 1.25 •
R3 + R4
R4
VOUT
Table 1. (ISP-ISN) Threshold vs CTRL
FB
VCRTL (V)
(ISP-ISN) Threshold (mV)
1.0
225
1.05
236
1.1
244.5
1.15
248.5
1.2
250
When CTRL is higher than 1.2V, the LED current is regulated to:
ILED =
R3
LT3761
250mV
RLED
The CTRL pin should not be left open (tie to VREF if not
used). The CTRL pin can also be used in conjunction with
a thermistor to provide overtemperature protection for
the LED load, or with a resistor divider to VIN to reduce
output power and switching current when VIN is low.
The presence of a time varying differential voltage signal
(ripple) across ISP and ISN at the switching frequency
is expected. The amplitude of this signal is increased by
high LED load current, low switching frequency and/or a
smaller value output filter capacitor. Some level of ripple
signal is acceptable: the compensation capacitor on the
VC pin filters the signal so the average difference between
ISP and ISN is regulated to the user-programmed value.
Ripple voltage amplitude (peak-to-peak) in excess of
50mV should not cause mis-operation, but may lead to
noticeable offset between the current regulation and the
user-programmed value.
R4
37611 F02
Figure 2. Feedback Resistor Connection for
Boost or SEPIC LED Driver
For a boost type LED driver, set the resistor from the output
to the FB pin such that the expected voltage level during
normal operation will not exceed 1.17V. For an LED driver
of buck mode or a buck-boost mode configuration, the
output voltage is typically level-shifted to a signal with
respect to GND as illustrated in Figure 3. The output can
be expressed as:
VOUT = VBE + 1.25 •
R3
R4
R3
+
RSEN(EXT)
VOUT
–
LT3761
100k
LED
ARRAY
COUT
37611 F03
FB
R4
Figure 3. Feedback Resistor Connection for
Buck Mode or Buck-Boost Mode LED Driver
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13
LT3761/LT3761-1
Applications Information
ISP/ISN Short-Circuit Protection Feature
The ISP/ISN pins have a protection feature independent
of their LED current sense feature. The purpose of this
feature is to prevent the development of excessive currents that could damage the power components or the
load. The action threshold (VISP-ISN > 600mV, typical) is
above the default LED current sense threshold, so that
no interference will occur with current regulation. This
feature acts in the same manner as switch current limit:
it prevents switch turn-on until the ISP/ISN difference
falls below the threshold. Exceeding the threshold also
activates a pull-down on the SS and PWM pins and causes
the GATE and PWMOUT pins to be driven low for at least
4µs. If an overcurrent condition is sensed at ISP/ISN and
the PWM pin is configured either to make an internal
dimming signal, or for always-on operation as shown in
the application titled Boost LED Driver with Output Short
Protection, then the LT3761/LT3761-1 will enter a hiccup
mode of operation. In this mode, after the initial response
to the fault, the PWMOUT pin re-enables the output switch
at an interval set by the capacitor on the PWM pin. If the
fault is still present, the PWMOUT pin will go low after a
short delay (typically 7µs) and turn off the output switch.
This fault-retry sequence continues until the fault is no
longer present in the output.
PWM Dimming Control
There are two methods to control the current source for
dimming using the LT3761/LT3761-1. One method uses
the CTRL pin to adjust the current regulated in the LEDs.
A second method uses the PWM pin to modulate the
current source between zero and full current to achieve
a precisely programmed average current. To make PWM
dimming more accurate, the switch demand current is
stored on the VC node during the quiescent phase when
PWM is low. This feature minimizes recovery time when
the PWM signal goes high. To further improve the recovery
time, a disconnect switch may be used in the LED current
path to prevent the ISP node from discharging during the
PWM signal low phase.
The minimum PWM on or off time is affected by choice of
operating frequency and external component selection. The
data sheet application titled “Boost LED Driver for 30kHz
PWM Dimming” demonstrates regulated current pulses
as short as 3μs are achievable. The best overall combination of PWM and analog dimming capability is available if
the minimum PWM pulse is at least six switching cycles.
A low duty cycle PWM signal can cause excessive start-up
times if it were allowed to interrupt the soft-start sequence.
Therefore, once start-up is initiated by PWM > 1.3V, it will
ignore a logical disable by the external PWM input signal.
The device will continue to soft-start with switching and
PWMOUT enabled until either the voltage at SS reaches
the 1V level, or the output current reaches one-tenth of
the full-scale current. At this point the device will begin
following the dimming control as designated by PWM.
Disconnect Switch Selection
An NMOS in series with the LED string at the cathode
is recommended in most LT3761/LT3761-1 applications
to improve the PWM dimming. The NMOS BVDSS rating
should be as high as the open LED regulation voltage set
by the FB pin, which is typically the same rating as the
power switch of the converter. The maximum continuous
drain current ID(MAX) rating should be higher than the
maximum LED current.
A PMOS high side disconnect is needed for buck mode,
buck-boost mode or an output short circuit protected
boost. A level shift to drive the PMOS switch is shown
in the application schematic Boost LED Driver with Output Short Circuit Protection. In the case of a high side
disconnect follow the same guidelines as for the NMOS
regarding voltage and current ratings. It is important to
include a bypass diode to GND at the drain of the PMOS
switch to ensure that the voltage rating of this switch is
not exceeded during transient fault events.
PWM Dimming Signal Generator
The LT3761/LT3761-1 features a PWM dimming signal
generator with programmable duty cycle. The frequency
of the square wave signal at PWMOUT is set by a capacitor
CPWM from the PWM pin to GND according to the equation:
fPWM = 14kHz • nF/CPWM
The duty cycle of the signal at PWMOUT is set by a µA
scale current into the DIM/SS pin (see Figure 4 and the
Typical Performance Characteristics).
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LT3761/LT3761-1
Applications Information
PWMOUT DUTY RATIO (%)
100
Internal PWM Oscillator Operation
CPWM = 47nF
The PWM oscillator operation is similar to a 555 timer
(astable multi-vibrator). However, the currents that charge
and discharge the capacitor are not directly proportional
to the controlling current.
80
60
40
IPULL-UP = F1(IDIM/SS) = 7.2μA•exp(0.056•IDIM/SS)
20
0
IPULL-DOWN = F2(IDIM/SS) = 84μA•exp(–0.056•IDIM/SS)
0
2
4
6
DIM VOLTAGE (V)
The negative sign in the exponential makes IPULL-DOWN
decrease when IDIM/SS increases.
8
37611 F04
Figure 4. PWMOUT Duty Ratio vs DIM Voltage for RDIM = 124k
Internally generated pull-up and pull-down currents on
the PWM pin are used to charge and discharge its capacitor between the high and low thresholds to generate the
duty cycle signal. These current signals on the PWM pin
are small enough so they can be easily overdriven by a
digital signal from a microcontroller to obtain very high
dimming performance. The practical minimum duty cycle
using the internal signal generator is about 4% if the DIM/
SS pin is used to adjust the dimming ratio. Consult the
factory for techniques for and limitations of generating a
duty ratio less than 4% using the internal generator. For
always on operation, the PWM pin should be connected
as shown in the application Boost LED Driver with Output
Short Protection.
Voltage on the external cap ramps up at dV/dt = IPULL-UP
/CPWM. When the PWM pin reaches the high threshold
(0.8V + F3(IDIM/SS)), the flip flop SETs and IPULL-UP goes
to zero and current IPULL-DOWN goes to F2(IDIM/SS).
T1
T1+ T2
dV
T1=
 IPULL−DOWN 


 CPWM 
dV
T2 =
 IPULL−UP 


 CPWM 
Duty Cycle =
0.8V + F3 (IDIM/SS)
F1 (IDIM/SS)
PWM
CPWM
0.8V
F2 (IDIM/SS)
FAULT
–
+
–
+
R
S
Q
PWMINT
1.5mA
VTH1 = 0.8 + F3 (IDIM/SS)
VPWM
dV = F3 (IDIM/SS)
VTH2 = 0.8V
t1
t2
dV/dt = IPULL-UP/ CPWM
dV/dt = IPULL-DOWN / CPWM
VPWMINT
37611 F05
Figure 5. Internal PWM Oscillator Logic and Waveform
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15
LT3761/LT3761-1
Applications Information
After simplification, one can obtain the formula for duty
cycle of PWMOUT as a function of IDIM/SS:
Duty Cycle =
1
1+ 11.6 • exp(−0.112 •IDIM/SS )
To calculate the duty cycle of the internal PWM generator
given a voltage of the DIM signal, determine first the current
into the DIM/SS pin by the equation (referring to Figure 6):
IDIM/SS =
VDIM − 1.17V
in µA
RDIM + 2.5kΩ
Knowing the IDIM/SS in μA , the duty cycle of the PWMOUT
pin can be calculated for the range –10μA < IDIM/SS < 55μA:
Duty (in%) =
100%
1+ 11.6 • exp(−0.112 •IDIM/SS )
These equations can be worked in reverse starting with a
desired duty cycle using 20%, for example, and solving for
a resistor value, RDIM, placed between VREF and DIM/SS:

Duty 
IDIM/SS = 8.93 • ln 11.6 •

(1−Duty ) 


0.2 
= 8.93 • ln 11.6 •
 = 9.51µA

0.8 
VREF − 1.17
RDIM = −2.5kΩ +
IDIM/SS
= −2.5kΩ +
For some applications, a duty cycle lower than 3% is
desired. It is possible to achieve a discrete value of duty
cycle that is lower than range attainable using DIM/SS
current. A resistor, RPD, and switch driven by PWMOUT
can be added as shown in Figure 7.
The addition of this resistor increases the pull-down
current on PWM, thus decreasing the duration of the onphase of the switching regulator. Since PWM frequency
at low duty cycle is primarily determined by the pull-up
current, the additional pull-down current from RPD has
little effect on the PWM period, so frequency calculation
remains the same.
An example solving for RPD given a 1% duty cycle is provided below. For this example, the IDIM/SS current flowing
in RDIM is assumed zero, which normally provides an
~8% duty cycle. The average voltage on the PWM pin is
approximately 1.05V at this IDIM/SS setting.
Duty =
=
IPULL−UP
IPULL−UP +IPULL−DOWN +IRPD
7.2
= 0.01
7.2+ 84+IRPD
IRPD = 629µA =
1.05V
RPD
Therefore, RPD ~ 1.65kΩ
2.015 − 1.17
= 86.4kΩ
0.00951
LT3761
PWMOUT
DIM/SS
PWM
GND
LT3761
DIM
RDIM
10nF
RPD
47nF
300Hz
PWMOUT
DIM/SS
PWM
37611 F07
GND
10nF
47nF
300Hz
Figure 7. Configuration for Sub 4% PWM Dimming
37611 F06
Figure 6. Configuration of Dimming Resistor, RDIM
37611fb
16
For more information www.linear.com/LT3761
LT3761/LT3761-1
Applications Information
Programming the Switching Frequency
300
Table 2. Switching Frequency (fSW) vs RT Value
fSW (kHz)
RT (kΩ)
100
95.3
200
48.7
300
33.2
400
25.5
500
20.5
600
16.9
700
14.3
800
12.1
900
10.7
1000
8.87
250
MINIMUM ON-TIME
200
TIME (ns)
The RT frequency adjust pin allows the user to program
the switching frequency (fSW) from 100kHz to 1MHz to
optimize efficiency/performance or external component
size. Higher frequency operation yields smaller component size but increases switching losses and gate driving
current, and may not allow sufficiently high or low duty
cycle operation. Lower frequency operation gives better
performance at the cost of larger external component
size. For an appropriate RT resistor value see Table 2. An
external resistor from the RT pin to GND is required—do
not leave this pin open.
CGATE = 3300pF
MINIMUM OFF-TIME
150
100
50
0
–50 –25
Min Duty Cycle = 220ns • fSW
Max Duty Cycle = 1 – 170ns • fSW
25 50 75 100 125 150
TEMPERATURE (°C)
37611 F08
Figure 8. Typical Minimum On and Off
GATE Pulse Width vs Temperature
Besides the limitation by the minimum off-time, it is
also recommended to choose the maximum duty cycle
below 95%.
DBOOST =
VLED − VIN
VLED
DBUCK _ MODE =
VLED
VIN
DSEPIC , DCUK =
VLED
VLED + VIN
Duty Cycle Considerations
Switching duty cycle is a key variable defining converter
operation, therefore, its limits must be considered when
programming the switching frequency for a particular application. The minimum duty cycle of the switch is limited
by the fixed minimum on-time and the switching frequency
(fSW). The maximum duty cycle of the switch is limited
by the fixed minimum off-time and fSW. The following
equations express the minimum/maximum duty cycle:
0
Thermal Considerations
The LT3761/LT3761-1 is rated to a maximum input voltage of 60V. Careful attention must be paid to the internal
power dissipation of the IC at higher input voltages to
ensure that a junction temperature of 125°C (150°C for
H-grade) is not exceeded. This junction limit is especially
important when operating at high ambient temperatures.
If LT3761/LT3761-1 junction temperature reaches 165°C,
the GATE and PWMOUT pins will be driven to GND and the
soft-start (DIM/SS) and PWM pins will be discharged to
GND. Switching will be enabled after device temperature
is reduced 10°C. This function is intended to protect the
device during momentary thermal overload conditions.
37611fb
For more information www.linear.com/LT3761
17
LT3761/LT3761-1
Applications Information
The majority of the power dissipation in the IC comes from
the supply current needed to drive the gate capacitance of
the external power MOSFET. This gate drive current can
be calculated as:
IGATE = fSW • QG
A low QG power MOSFET should always be used when
operating at high input voltages, and the switching frequency should also be chosen carefully to ensure that
the IC does not exceed a safe junction temperature. The
internal junction temperature of the IC can be estimated by:
where TA is the ambient temperature, IQ is the quiescent
current of the part (maximum 2mA) and θJA is the package
thermal impedance (43°C/W for the MSE package). For
example, an application has TA(MAX) = 85°C, VIN(MAX) =
40V, fSW = 400kHz, and having a FET with QG = 20nC, the
maximum IC junction temperature will be approximately:
TJ = 85°C + [40V • (2mA + 400kHz • 20nC) • 43°C/W] =
102°C
The exposed pad on the bottom of the package must be
soldered to a ground plane. This ground should then be
connected to an internal copper ground plane with thermal
vias placed directly under the package to spread out the
heat dissipated by the IC.
Open LED Reporting – Constant Voltage Regulation
Status Pin (LT3761 Only)
The LT3761 provides an open-drain status pin, OPENLED,
that pulls low when the FB pin is within 50mV of its 1.25V
regulated voltage AND output current sensed by VISP-ISN
has reduced to 25mV, or 10% of the full-scale value. The
10% output current qualification (C/10) is unique for an LED
driver but fully compatible with open LED indication – the
qualification is always satisfied since for an open load, zero
current flows in the load. The C/10 feature is particularly
useful in the case where OPENLED is used to indicate the
end of a battery charging cycle and terminate charging or
transition to a float charge mode.
ILED
ISP
RLED
ISN
OPTION FOR
LT3761
C10
COMPARATOR
–
OPENLED
25mV
+
–
TJ = TA + [VIN (IQ + fSW • QG) • θJA]
For monitoring the LED string voltage, if the open LED
clamp voltage is programmed correctly using the FB
resistor divider then the FB pin should not exceed 1.18V
when LEDs are connected. If the OPENLED pull-down is
asserted and the PWM pin transitions low, the pull-down
will continue to be asserted until the next rising edge of
PWM even if FB falls below the OPENLED threshold.
+
S
Q
1mA
R
1.2V
FB
–
+
OPEN LED
COMPARATOR
PWM
1. OPENLED ASSERTS WHEN VISP-ISN < 25mV AND FB > 1.2V, AND IS LATCHED
2. OPENLED DE-ASSERTS WHEN FB < 1.19V, AND PWM LOGIC 1 = 1V
3. ANY FAULT CONDITION RESETS THE LATCH, SO LT3761 STARTS UP
WITH OPENLED DE-ASSERTED
37611 F09
Figure 9. OPENLED Logic Block Diagram
Input Capacitor Selection
The input capacitor supplies the transient input current for
the power inductor of the converter and must be placed
and sized according to the transient current requirements.
The switching frequency, output current and tolerable input
voltage ripple are key inputs to estimating the capacitor
value. An X7R type ceramic capacitor is usually the best
choice since it has the least variation with temperature and
DC bias. Typically, boost and SEPIC converters require a
lower value capacitor than a buck mode converter. Assuming that a 100mV input voltage ripple is acceptable,
the required capacitor value for a boost converter can be
estimated as follows:
CIN (µF) = ILED (A) •
 µF 
VOUT
• t SW (µs) • 
 A • µs 
VIN
37611fb
18
For more information www.linear.com/LT3761
LT3761/LT3761-1
Applications Information
Therefore, a 10μF capacitor is an appropriate selection
for a 400kHz boost regulator with 12V input, 48V output
and 1A load.
With the same VIN voltage ripple of 100mV, the input capacitor for a buck converter can be estimated as follows:
 µF 
CIN (µF) = ILED (A) • t SW (µs) • 4.7 • 
 A • µs 
A 10μF input capacitor is an appropriate selection for a
400kHz buck mode converter with a 1A load.
In the buck mode configuration, the input capacitor has
large pulsed currents due to the current returned through
the Schottky diode when the switch is off. In this buck
converter case it is important to place the capacitor as close
as possible to the Schottky diode and to the GND return
of the switch (i.e., the sense resistor). It is also important
to consider the ripple current rating of the capacitor. For
best reliability, this capacitor should have low ESR and
ESL and have an adequate ripple current rating.
Table 3. Recommended Ceramic Capacitor Manufacturers
MANUFACTURER
WEB
TDK
www.tdk.com
Kemet
www.kemet.com
Murata
www.murata.com
Taiyo Yuden
www.t-yuden.com
Output Capacitor Selection
The selection of the output capacitor depends on the load
and converter configuration, i.e., step-up or step-down
and the operating frequency. For LED applications, the
equivalent resistance of the LED is typically low and the
output filter capacitor should be sized to attenuate the
current ripple. Use of X7R type ceramic capacitors is
recommended.
To achieve the same LED ripple current, the required filter
capacitor is larger in the boost and buck-boost mode applications than that in the buck mode applications. Lower
operating frequencies will require proportionately higher
capacitor values.
Soft-Start Capacitor Selection
For many applications, it is important to minimize the
inrush current at start-up. The built-in soft-start circuit
significantly reduces the start-up current spike and output
voltage overshoot. Connect a capacitor from the DIM/SS
pin to GND to use this feature. The soft-start interval is
set by the soft-start capacitor selection according to the
equation:
TSS = CSS •
1.2V
100µs
= CSS •
12µA
nF
provided there is no additional current supplied to the
DIM/SS pin for programming the duty cycle of the PWM
dimming signal generator. A typical value for the soft-start
capacitor is 10nF which gives a 1ms start-up interval. The
soft-start pin reduces the oscillator frequency and the
maximum current in the switch.
The soft-start capacitor discharges if one of the following events occurs: the EN/UVLO falls below its threshold;
output overcurrent is detected at the ISP/ISN pins; IC
overtemperature; or INTVCC undervoltage. During startup with EN/UVLO, charging of the soft-start capacitor is
enabled after the first PWM high period. In the start-up
sequence, after switching is enabled by PWM the switching continues until VISP-ISN > 25mV or DIM/SS > 1V. PWM
pin negative edges during this start-up interval are not
processed until one of these two conditions are met so
that the regulator can reach steady state operation shortly
after PWM dimming commences.
Power MOSFET Selection
The selection criteria for the power MOSFET includes
the drain-source breakdown voltage (VDS), the threshold
voltage (VGS(TH)), the on-resistance (RDS(ON)), the gate
to source and gate to drain charges (QGS and QGD), the
maximum drain current (ID(MAX)) and the MOSFET’s thermal
resistances (RθJC, RθJA).
For applications operating at high input or output voltages,
the power switch is typically chosen for drain voltage VDS
rating and low gate charge QG. Consideration of switch
on-resistance, RDS(ON), is usually secondary because
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19
LT3761/LT3761-1
Applications Information
switching losses dominate power loss. The INTVCC regulator on the LT3761/LT3761-1 has a fixed current limit to
protect the IC from excessive power dissipation at high
VIN, so the FET should be chosen so that the product of
QG at 7.85V and switching frequency does not exceed the
INTVCC current limit. For driving LEDs be careful to choose
a switch with a VDS rating that exceeds the threshold set
by the FB pin in case of an open-load fault. The required
power MOSFET VDS rating of different topologies can
be estimated using the following equations plus a diode
forward voltage, and any additional ringing across its
drain-to-source during its off-time.
Boost: VDS > VLED
Buck Mode: VDS > VIN(MAX)
feature for dimming, it may be important to consider diode
leakage, which increases with the temperature, from the
output during the PWM low interval. Therefore, choose
the Schottky diode with sufficiently low leakage current.
Table 5 has some recommended component vendors. The
diode current and VF should be considered when selecting the diode to be sure that power dissipation does not
exceed the rating of the diode. The power dissipated by
the diode in a converter is:
PD = ID • VF • (1-DMAX)
It is prudent to measure the diode temperature in steady
state to ensure that its absolute maximum ratings are not
exceeded.
Table 5. Schottky Rectifier Manufacturers
SEPIC, Inverting: VDS > VIN(MAX) + VLED
MANUFACTURER
WEB
Since the LT3761/LT3761-1 gate driver is powered from
the 7.85V INTVCC, the 6V rated MOSFET works well for
all the LT3761 applications.
Vishay
www.vishay.com
Central Semiconductor
www.centralsemi.com
Diodes, Inc.
www.diodes.com
It is prudent to measure the MOSFET temperature in
steady state to ensure that absolute maximum ratings
are not exceeded.
Sense Resistor Selection
Several MOSFET vendors are listed in Table 4. The MOSFETs
used in the application circuits in this data sheet have been
found to work well with the LT3761/LT3761-1. Consult
factory applications for other recommended MOSFETs.
Table 4. Recommended Power MOSFET Manufacturers
MANUFACTURER
WEB
Vishay Siliconix
www.vishay.com
Infineon
www.infineon.com
Renesas
www.renesas.com
The resistor, RSENSE, between the source of the external
NMOS FET and GND should be selected to provide adequate
switch current to drive the application without exceeding
the 105mV (typical) current limit threshold on the SENSE
pin of LT3761/LT3761-1. For a boost converter, select a
resistor value according to:
RSENSE,BOOST ≤
VIN • 0.07V
VLED • ILED
For buck-boost mode and SEPIC, select a resistor according to:
RSENSE,BUCK-BOOST ≤
Schottky Rectifier Selection
The power Schottky diode conducts current during the
interval when the switch is turned off. Select a diode
rated for the maximum SW voltage as described in the
section on power MOSFET selection. If using the PWM
VIN • 0.07V
( VIN + VLED )ILED
For buck mode, select a resistor according to:
RSENSE,BUCK ≤
0.07V
ILED
37611fb
20
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LT3761/LT3761-1
Applications Information
These equations provide an estimate of the sense resistor
value based on reasonable assumptions about inductor current ripple during steady state switching. Lower
values of sense resistor may be required in applications
where inductor ripple current is higher. Examples include
applications with current limited operation at high duty
cycle, and those with discontinuous conduction mode
(DCM) switching. It is always prudent to verify the peak
inductor current in the application to ensure the sense
resistor selection provides margin to the SENSE current
limit threshold.
The placement of RSENSE should be close to the source
of the NMOS FET and GND of the LT3761/LT3761-1. The
SENSE input to LT3761/LT3761-1 should be a Kelvin
connection to the positive terminal of RSENSE. Verify the
power on the resistor to ensure that it does not exceed
the rated maximum.
Inductor Selection
The inductor used with the LT3761/LT3761-1 should have
a saturation current rating appropriate to the maximum
switch current selected with the RSENSE resistor. Choose
an inductor value based on operating frequency, input
and output voltage to provide a current mode ramp on
SENSE during the switch on-time of approximately 20mV
magnitude. The following equations are useful to estimate
the inductor value for continuous conduction mode operation (use the minimum value for VIN and maximum
value for VLED):
LBUCK =
RSENSE • VLED ( VIN – VLED )
VIN • 0.02V • fOSC
LBUCK-BOOST =
LBOOST =
RSENSE • VLED • VIN
( VLED + VIN ) • 0.02V • fOSC
RSENSE • VIN ( VLED – VIN )
VLED • 0.02V • fOSC
Use the equation for Buck-Boost when choosing an inductor value for SEPIC – if the SEPIC inductor is coupled,
then the equation’s result can be used as is. If the SEPIC
uses two uncoupled inductors, then each should have a
inductance double the result of the equation.
Table 6 provides some recommended inductor vendors.
Table 6. Recommended Inductor Manufacturers
MANUFACTURER
WEB
Coilcraft
www.coilcraft.com
Cooper-Coiltronics
www.cooperet.com
Würth-Midcom
www.we-online.com
Vishay
www.vishay.com
Loop Compensation
The LT3761/LT3761-1 uses an internal transconductance
error amplifier whose VC output compensates the control loop. The external inductor, output capacitor and the
compensation resistor and capacitor determine the loop
stability. The inductor and output capacitor are chosen
based on performance, size and cost. The compensation
resistor and capacitor at VC are selected to optimize control
loop response and stability. For typical LED applications,
a 4.7nF compensation capacitor at VC is adequate, and
a series resistor should always be used to increase the
slew rate on the VC pin to maintain tighter regulation of
LED current during fast transients on the input supply to
the converter.
The DC-Coupling Capacitor Selection for SEPIC
LED Driver
The DC voltage rating of the DC-coupling capacitor CDC
connected between the primary and secondary inductors of
a SEPIC should be larger than the maximum input voltage:
VCDC > VIN(MAX)
CDC has nearly a rectangular current waveform. During
the switch off-time, the current through CDC is IVIN, while
approximately –ILED flows during the on-time. The CDC
voltage ripple causes current distortions on the primary
and secondary inductors. The CDC should be sized to limit
its voltage ripple. The power loss on the CDC ESR reduces
the LED driver efficiency. Therefore, the sufficient low ESR
ceramic capacitors should be selected. The X5R or X7R
ceramic capacitor is recommended for CDC.
37611fb
For more information www.linear.com/LT3761
21
LT3761/LT3761-1
Applications Information
Short-Circuit Protection for a Boosted Output
The LT3761/LT3761-1 has two features that provide
protection from a shorted circuit load on a boost. The
first of these is the ISP/ISN based overcurrent response.
The second is the FB overvoltage response. The primary mode of action for both features is to drive the
PWMOUT pin low, which turns off the switch connecting the output to the load. The ISP/ISN short-circuit
protection also drives the PWM and DIM/SS pins low
for a brief period of time. For best protection, a PMOS
disconnect switch M1 is placed as shown in Figure 10.
During an overcurrent event caused by a short across
the LED string, the current in Rs increases until PNP Q1
turns on and pulls up the gate of M1, throttling back the
current. In approximately 1µs, the ISP/ISN overcurrent
response will cause the PWMOUT pin to drive low, which
will turn off M1 altogether. If an external PWM signal is
used, then the circuit including Q3, the 1N4148 diode and
two resistors must be used to ensure the switch remains
off while the output is in a faulted state. This sub-circuit
drives the FB pin into the overvoltage state.
If the PWM pin is configured (with a capacitor load) as
shown in the application titled Boost LED Driver with
Output Short Protection, then the small circuit driving
FB may be omitted. In this case, the boost converter will
demonstrate a hiccup mode response, turning on M1 at an
interval determined by the PWM capacitor, then turning off
after ~1µs due to excessive current, until the fault clears.
RS
0.5Ω
D1
COUT
PGND
LT3761
1k
Q1
2k
ISP
M1
ISN
0.15nF
1M
PWMOUT
20k
Q2
FB
Q3
24.9k
GND
INTVCC
INTVCC
1µF
2.2k
27k
1N4148
1k
D2
37611 F10
Figure 10. Protection Circuit for Fault to Ground on LED Load. Includes Fast Level Shift for PWM Switch M1
37611fb
22
For more information www.linear.com/LT3761
LT3761/LT3761-1
Applications Information
Board Layout
The high speed operation of the LT3761/LT3761-1 demands
careful attention to board layout and component placement.
The best overall results can be obtained using a 4-layer
board and design files for a proven board design specifically for this product can be downloaded from demo.linear.
com. Figure 11 provides a simplified 2-layer layout for the
boost converter. The exposed pad of the package is the only
GND terminal of the IC and is also important for its thermal
management. It is crucial to achieve a good electrical and
thermal contact between the exposed pad and the ground
plane of the board. To reduce electromagnetic interference
(EMI), it is important to minimize the area of the high dV/
dt switching node between the inductor, switch drain and
anode of the anode of the Schottky rectifier. Use a ground
plane under the switching node to eliminate interplane
coupling to sensitive signals.
Proper layout of the power paths with high di/dt is essential to robust converter operation. The following high
di/dt loops of different topologies should be kept as tight
as possible to reduce inductive ringing:
1. In boost configuration, the high di/dt loop of each channel contains the output capacitor, the sensing resistor,
the power NMOS and the Schottky diode.
2. In buck mode configuration, the high di/dt loop of each
channel contains the input capacitor, the sensing resistor,
the power NMOS and the Schottky diode.
3. In buck-boost mode configuration, the high di/dt loop of
each channel contains the capacitor connecting between
VOUT and GND, the sensing resistor, the power NMOS
and the Schottky diode.
4. In SEPIC configuration, the high di/dt loop contains the
power NMOS, sense resistor, output capacitor, Schottky
diode and the DC-coupling capacitor.
The ground terminal of the switch current sense resistor
should Kelvin connect to the GND of the LT3761/LT3761-1.
Likewise, the ground terminal of the bypass capacitor for
the INTVCC regulator should be placed near the GND of
the switching path. Typically this requirement will result in
the external switch being closest to the IC, along with the
INTVCC bypass capacitor. The ground for the compensation
network (VC) and other DC control signals (e.g., FB, PWM,
DIM/SS, CTRL) should be star connected to the underside
of the IC. Do not extensively route high impedance signals
such as FB and VC, as they may pick up switching noise.
In particular, avoid routing FB and PWMOUT in parallel
for more than a few millimeters on the board. Minimize
resistance in series with the SENSE input to avoid changes
(most likely reduction) to the switch current limit threshold.
37611fb
For more information www.linear.com/LT3761
23
LT3761/LT3761-1
Applications Information
PGND AGND
DIM
RDIM
VREF CTRL
OPENLED
CPWM
CSS
RT
R2
R1
L1
LAYER 2
GROUND
PLANE
SPLIT
CVCC
VIAS TO GROUND PLANES
8
7
6
5
4
3
2
1
9
10
11
12
13
14
15
16
SENSE VIA x
CC
RC
x VOUT VIA
R3
x
R4
x
AGND
PGND
5
4
6
3
1
M2
M1
7
2
8
1
3
LED–
2
RSENSE
COUT
COUT
D1
CIN
RLED
VIN
GND
COMPONENT DESIGNATIONS REFER TO BOOST LED DRIVER FOR AUTOMOTIVE HEADLAMP SCHEMATIC
LED+
37611 F11
Figure 11. Suggested Layout of the Boost LED Driver for Automotive Headlamp in the Typical Applications Section
37611fb
24
For more information www.linear.com/LT3761
LT3761/LT3761-1
Typical Applications
94% Efficient Boost LED Driver for Automotive Headlamp with 25:1 PWM Dimming
L1
10µH
CIN
2.2µF
×2
100V
100
R1
499k
EN/UVLO
VREF
1M
VIN
SENSE
RSENSE
10mΩ
LT3761
RLED
0.25Ω
CPWM
47nF
300Hz
96
R4
16.9k
FB
60W
LED
STRING
1.2
88
1.0
OUTPUT CURRENT
84
INTVCC
CVCC
1µF
1.4
EFFICIENCY
92
80
RT
28.7k
350kHz
RC
5.1k
CC
4.7nF
1.6
PWM TIED TO INTVCC
1A
ISP
OPENLED
ISN
DIM/SS
PWM
PWMOUT
VC
RT INTVCC
RDIM
124k
CSS
0.01µF
R3
1M
GND
140k
100k
DIM
M1
GATE
CTRL
INTVCC
COUT
2.2µF
×4
OUTPUT CURRENT (A)
R2
90.9k
Boost Efficiency and Output Current vs VIN
D1
EFFICIENCY (%)
VIN
8V TO
60V
0.8
0
10
20
30
VIN (V)
40
50
0.6
60
37611 TA02b
M2
37611 TA02a
M1: INFINEON BSC123N08NS3-G
D1: DIODES INC PDS5100
L1: COILTRONICS HC9-100-R
M2: VISHAY SILICONIX Si2328DS
COUT, CIN: MURATA GRM42-2X7R225K100R
(CURRENT DERATED FOR VIN < 10V)
SEE SUGGESTED LAYOUT FIGURE 11
Boost LED Driver with Output Short-Circuit Protection with Externally Driven PWM
VIN
8V TO
60V
L1
10µH
2.2µF
×2
100V
499k
90.9k
INTVCC
EN/UVLO
VREF
1M
VIN
GATE
CTRL
100k
10mΩ
1k
Q1
2.4k
ISP
ISN
OPENLED
M2
150pF
1M
PWM
1A
PWMOUT
DIM/SS
FB
RT
5.1k
2.2µF
×4
100V
M1
GND
140k
10nF
0.25Ω
SENSE
LT3761
VC
D1
INTVCC
27k
INTVCC
16.9k
D2
60W
LED
STRING
1k
Q3
28.7k
350kHz
Q2
27k
4.7nF
1µF
2.2k
1N4148
37611 TA03
M1: INFINEON BSC123NO8NS3-G
D1: DIODES INC PDS5100
L1: COILTRONICS HC9-100-R
M2: VISHAY SILICONIX Si7113DN
D2: VISHAY 10BQ100
Q1, Q3: CENTRAL CMPT3906
Q2: ZETEX FMMT493
37611fb
For more information www.linear.com/LT3761
25
LT3761/LT3761-1
Typical Applications
Boost LED Driver with Output Short-Circuit Protection with Internally Generated PWM
L1
10µH
VIN
8V TO
60V
2.2µF
×2
100V
499k
90.9k
INTVCC
OPTION FOR
INTERNALLY GENERATED
PWM DIMMING
DIM
EN/UVLO
VREF
1M
VIN
GATE
D1
M1
0.25Ω
2.2µF
×4
100V
SENSE
LT3761
CTRL
10mΩ
1k
140k
100k
2.4k
ISP
ISN
OPENLED
M2
1M
124k
DIM/SS
10nF
LED+
PWMOUT
RT INTVCC
28.7k
350kHz
5.1k
4.7nF
ILED
1A
150pF
FB
PWM
VC
22nF
640Hz
Q1
GND
16.9k
D2
20k
60W
LED
STRING
Q2
INTVCC
1µF
1k
37611 TA04a
CURRENT DERATED
FOR VIN < 10V
M1: INFINEON BSC123NO8NS3-G
D1: DIODES INC PDS5100
L1: COILTRONICS HC9-100-R
M2: VISHAY SILICONIX Si7113DN
D2: VISHAY 10BQ100
Q1: CENTRAL CMPT3906
Q2: ZETEX FMMT493
1N4148 28k
OPTIONAL CIRCUIT
FOR ALWAYS-ON
OPERATION
High Side Disconnect Internally Generated
PWM Dimming Waveform
Output Short-Circuit Waveform Showing Hiccup
Mode Operation with Internally Generated PWM
PWMOUT
DIM = 8V
10V/DIV
VIN = 24V, VLED = 60V, DIM = 0V
PWMOUT
10V/DIV
ILED+
2A/DIV
52V
ILED
0.5A/DIV
VLED+
10µs/DIV
37611 TA04b
LED+ SHORT TO GND
0V
1ms/DIV
37611 TA04c
37611fb
26
For more information www.linear.com/LT3761
LT3761/LT3761-1
Typical Applications
10W Grounded Anode Inverting LED Driver
3
100k
EN/UVLO
VIN
GATE
•
4.7µF
25V
•
VIN
5V TO
18V
2.2µF
×2
35V
L1
4.7µH
1:1
1
10Ω
2
4
D1
M1
4.7µF
10V
SENSE
34k
LT3761
OPENLED
ISN
FB
ISP
10Ω
M2
0.47µF
DIM/SS
VREF
INTVCC
CTRL
VC
1µF
–10V
CLAMP
GND
PWM
0.01µF
91mΩ
10mΩ
RT
10nF
IN4148
LED–
2k
2.5A
10W
LED
PWMOUT
2k
28.7k
350kHz
0.1µF
59k
Q1
20k
M1: VISHAY SILICONIX Si4162DY (30V)
D1: DIODES PDS1040 CTL
L1: WÜRTH 744870004
M2: VISHAY SILICONIX Si2312BDS (20V)
LED: CREE XLAMP XM-L
Q1: ZETEX FMMT593
37611 TA05a
PWM Dimming Waveform
PWM
10V/DIV VIN = 12V, VLED = –3.6V
ILED
1A/DIV
VLED–
2V/DIV
10µs/DIV
37611 TA05b
37611fb
For more information www.linear.com/LT3761
27
LT3761/LT3761-1
Typical Applications
40W SEPIC LED Driver
C1
2.2µF
×2
50V
•
VIN
8V TO
40V
C2
2.2µF
×2
50V
L1
10µH
1:1
3
499k
90.9k
EN/UVLO
VREF
1M
VIN
GATE
•2
C3
10µF
4 ×5
35V
M1
SENSE
LT3761
CTRL
INTVCC
1
D1
1M
8mΩ
100k
1.67A
49.9k
GND
133k
0.15Ω
FB
ISP
OPENLED
ISN
PWM
DIM/SS
PWMOUT
VC
RT INTVCC
10nF
10k
28.7k
350kHz
40W
LED
STRING
INTVCC
1µF
4.7nF
M2
37611 TA06a
M1: INFINEON BSC123NO8
D1: DIODES INC PDS5100
L1: COILCRAFT MSD1278-103
M2: VISHAY SILICONIX Si2306BDS
LED: CREE XLAMP XM-L (×7)
C1, C2: KEMET C1210C225K5
C3: TAIYO YUDEN UMK325BJ106M
SEPIC Efficiency,
Output Current vs VIN
2.1
100
1.5
92
EFFICIENCY
88
PWM
5V/DIV
1.8
OUTPUT CURRENT
1.2
OUTPUT CURRENT (A)
EFFICIENCY (%)
96
ILED
0.5A/DIV
100µs/DIV
37611 TA06c
0.9
84
80
PWM Dimming Waveform
0
10
20
VIN (V)
30
0.6
40
37611 TA06b
37611fb
28
For more information www.linear.com/LT3761
LT3761/LT3761-1
Typical Applications
Boost LED Driver for 30kHz PWM Dimming
L1
0.82µH
VIN
8V TO
20V
C1
10µF
25V
187k
VIN
SENSE
VREF
LT3761
CTRL
6mΩ
PWM
0.25Ω
Boost PWM Dimming Waveform
1A
VIN = 16V, VLED = 30V
PWM
5V/DIV
17.8k
FB
100k
ILED
0.5A/DIV
ISP
ISN
OPENLED
DIM/SS
VC
0.1µF
499k
GND
INTVCC
1µF
C2
10µF
×2
35V
M1
GATE
EN/UVLO
39.2k
D1
PWMOUT
5µs/DIV
RT
20.5k
500kHz
3k
4.7nF
L1: VISHAY IHLP2525CZ
D1: DIODES PDS1040CTL
M1: INFINEON BSC059N04
M2: VISHAY Si2318CDS
37611 TA07b
M2
37611 TA07a
Buck Mode 5A LED Driver for 40kHz PWM Dimming
VIN
44V TO 60V
340k
10k
ISP
VIN
EN/UVLO
LT3761
50mΩ
2W
5A
UP TO
8 LEDS
4V TO 40V
ISN
VREF
0.22µF
CTRL
PWMOUT
M2
PWM
D2
6.2V
1M
C1
4.7µF
×4
50V
INTVCC
1µF
100k
2.2nF
GATE
OPENLED
FB
DIM/SS
VC
0.1µF
22k
200k
GND SENSE
RT
158k
PWM
10V/DIV
VIN = 48V, VLED = 38V
ILED
2A/DIV
200k
Q1
10k
M1
16.9k
600kHz
4.7nF
L1
1µH
Buck Mode PWM Dimming Waveform
VISHAY
5mΩ
0.5W
D1
5µs/DIV
37611 TA08b
C2
2.2µF
×2
100V
37611 TA08a
L1: WÜRTH 744331010
M1: INFINEON BSC123NO8NS3
M2: INFINEON BSC093NO4LS
D1: DIODES PDS5100
D2: CENTRAL SEMI CMSSH-3S
C1: TDK C4532X7R1H475
C2: TDK C3225X7R2A225
LED: CREE XLAMP XM-L (×7)
Q1: ZETEX FMMT593
37611fb
For more information www.linear.com/LT3761
29
LT3761/LT3761-1
Package Description
Please refer to http://www.linear.com/product/LT3761#packaging for the most recent package drawings.
MSE Package
16-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1667 Rev F)
BOTTOM VIEW OF
EXPOSED PAD OPTION
2.845 ±0.102
(.112 ±.004)
5.10
(.201)
MIN
2.845 ±0.102
(.112 ±.004)
0.889 ±0.127
(.035 ±.005)
8
1
1.651 ±0.102
(.065 ±.004)
1.651 ±0.102 3.20 – 3.45
(.065 ±.004) (.126 – .136)
0.305 ±0.038
(.0120 ±.0015)
TYP
16
0.50
(.0197)
BSC
4.039 ±0.102
(.159 ±.004)
(NOTE 3)
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
0.35
REF
0.12 REF
DETAIL “B”
CORNER TAIL IS PART OF
DETAIL “B” THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
9
NO MEASUREMENT PURPOSE
0.280 ±0.076
(.011 ±.003)
REF
16151413121110 9
DETAIL “A”
0° – 6° TYP
3.00 ±0.102
(.118 ±.004)
(NOTE 4)
4.90 ±0.152
(.193 ±.006)
GAUGE PLANE
0.53 ±0.152
(.021 ±.006)
DETAIL “A”
1.10
(.043)
MAX
0.18
(.007)
SEATING
PLANE
0.17 – 0.27
(.007 – .011)
TYP
1234567 8
0.50
(.0197)
BSC
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6. EXPOSED PAD DIMENSION DOES INCLUDE MOLD FLASH. MOLD FLASH ON E-PAD SHALL
NOT EXCEED 0.254mm (.010") PER SIDE.
0.86
(.034)
REF
0.1016 ±0.0508
(.004 ±.002)
MSOP (MSE16) 0213 REV F
37611fb
30
For more information www.linear.com/LT3761
LT3761/LT3761-1
Revision History
REV
DATE
DESCRIPTION
PAGE NUMBER
A
06/16
Adding LT3761-1 version
Modified EN/UVLO conditions
Added Internal PWM Oscillator Operation section
Added Short-Circuit Protection section
Added Board Layout section
B
05/17
Clarified 1/10 Scale ISP/ISN Current Sense Threshold
Clarified FB Overvoltage Threshold
1 to 30
4
15, 16
22
23, 24
3
3
37611fb
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representaFor more
information
www.linear.com/LT3761
tion that the interconnection
of its circuits
as described
herein will not infringe on existing patent rights.
31
LT3761/LT3761-1
Typical Application
HV Boost Efficiency and
LED Current vs VIN
80W High Voltage Boost LED Driver with 25:1 Internally Generated PWM Dimming
187k
EN/UVLO
VREF
590k
VIN
LT3761
GND
20k
10nF
1.4kHz
2k
4.7nF
0.8
96
EFFICIENCY
1M
0805
80W
LED
STRING
135V MAX
8.66k
FB
PWM
VC
1.0
PWM TIED TO INTVCC
0.6
92
LED CURRENT
88
0.4
84
0.2
PWMOUT
OPENLED
DIM/SS
0.1µF
COUT
0.22µF
×8
250V
12mΩ
100k
124k
M1
SENSE
CTRL
INTVCC
GATE
D1
LED CURRENT (A)
2.2µF
×2
100V
21k
DIM
0V TO
8V
100
L1
22µH
EFFICIENCY (%)
VIN
12V TO
60V
RT
ISP
ISN
INTVCC
39.2k
250kHz
80
10
20
40
30
VIN (V)
50
M2
0.6
60
37611 TA09b
INTVCC
1µF
M1, M2: INFINEON BSC520N15
D1: DIODES PDS4150
L1: COILTRONICS HC9-220-R
COUT: TDK C3225X7R2E224K
0.39Ω
Dimming Waveform
650mA
CURRENT DERATED
FOR VIN < 35V
37611 TA09a
PWM
(1V/DIV) DIM = 4V
VIN = 36V
VLED = 134V
ILED
(0.2A/DIV)
200µs/DIV
37611 TA09c
Related Parts
PART NUMBER
DESCRIPTION
COMMENTS
LT3755/LT3755-1/ High Side 40V, 1MHz LED Controller with True Color 3000:1
LT3755-2
PWM Dimming
VIN: 4.5V to 40V, VOUT(MAX) = 75V, 3000:1 True Color PWM Dimming
ISD < 1μA, 3mm × 3mm QFN-16 and MSOP-16E Packages
LT3756/LT3756-1/ High Side 100V, 1MHz LED Controller with True Color 3000:1
LT3756-2
PWM Dimming
VIN: 6V to 100V, VOUT(MAX) = 100V, 3000:1 True Color PWM Dimming
ISD < 1μA, 3mm × 3mm QFN-16 and MSOP-16E Packages
LT3796
High Side 100V, 1MHz LED Controller with True Color 3000:1
PWM Dimming, PMOS Disconnect FET Driver, Input Current
Limit and Input/Output Current Reporting
VIN: 6V to 100V, VOUT(MAX) = 100V, 3000:1 True Color PWM Dimming
ISD < 1μA, TSSOP-28E Packages
LT3956
High Side 80V, 3.5A, 1MHz LED Driver with True Color 3,000:1 VIN: 6V to 80V, VOUT(MAX) = 80V, True Color PWM Dimming = 3000:1,
ISD < 1μA, 5mm × 6mm QFN-36 Package
PWM Dimming
LT3754
60V, 1MHz Boost 16-Channel 40mA LED Driver with True
Color 3000:1 PWM Dimming and 2% Current Matching
VIN: 4.5V to 40V, VOUT(MAX) = 60V, True Color PWM Dimming = 3000:1,
ISD < 1μA, 5mm × 5mm QFN-32 Package
LT3518
2.3A, 2.5MHz High Current LED Driver with 3000:1 Dimming
with PMOS Disconnect FET Driver
VIN: 3V to 30V, VOUT(MAX) = 45V, 3000:1 True Color PWM Dimming,
ISD < 1μA, 4mm × 4mm QFN-16 and TSSOP-16E Packages
LT3478/LT3478-1 4.5A, 2MHz High Current LED Driver with 3000:1 Dimming
VIN: 2.8V to 36V, VOUT(MAX) = 40V, 3000:1 True Color PWM Dimming,
ISD < 1μA, TSSOP-16E Package
LT3791/LT3791-1 60V, Synchronous Buck-Boost 700kHz LED Controller
VIN: 4.7V to 60V, VOUT Range: 0V to 60V, True Color PWM,
Analog = 100:1, ISD < 1µA, TSSOP-38E Package
37611fb
32
LT 0517 REV B • PRINTED IN USA
For more information www.linear.com/LT3761
www.linear.com/LT3761
 LINEAR TECHNOLOGY CORPORATION 2012