POSEICO AZT800 High current phase control Datasheet

POSEICO SPA
Via Pillea 42-44, 16153 Genova - ITALY
Tel. + 39 010 8599400 - Fax + 39 010 8682006
Sales Office:
Tel. + 39 010 8599400 - [email protected]
HIGH CURRENT PHASE CONTROL
THYRISTOR INSULATED MODULE
AZT800
Repetitive voltage up to
Mean forward current
Surge current
800 V
808 A
30 kA
FINAL SPECIFICATION
May 17 - Issue: 3
Symbol
Characteristic
Conditions
Tj
[°C]
Value
Unit
BLOCKING
V
RRM
Repetitive peak reverse voltage
125
800
V
V
RSM
Non-repetitive peak reverse voltage
125
900
V
V
DRM
Repetitive peak off-state voltage
125
800
V
I
RRM
Repetitive peak reverse current
125
70
mA
I
DRM
Repetitive peak off-state current
125
70
mA
I
T (AV)
Mean forward current
180° sin, 50 Hz, Tc=55°C, double side cooled
I
T (AV)
Mean forward current
180° sin, 50 Hz, Tc=85°C, double side cooled
I
TSM
Surge forward current
CONDUCTING
1223
125
A
808
A
30
kA
I² t
I² t
Sine wave, 10 ms
without reverse voltage
V
T
On-state voltage
On-state current =
V
T(TO)
Threshold voltage
125
0,82
V
r
T
On-state slope resistance
125
0,180
mohm
3
4500 x 10
1800 A
25
1,34
A²s
V
SWITCHING
di/dt
Critical rate of rise of on-state current, min.
From 75% VDRM up to 1050 A; gate 10V, 5W
125
200
A/µs
dv/dt
Critical rate of rise of off-state voltage, min.
Linear ramp up to 70% of VDRM
125
500
V/µs
t d
Gate controlled delay time, typical
VD=100V; gate source 25V, 10W , tr=.5 µs
25
t q
Circuit commutated turn-off time, typical
dv/dt = 20 V/µs linear up to 75% VDRM
Q rr
Reverse recovery charge
di/dt = -20 A/µs, I= 700 A
I rr
Peak reverse recovery current
VR= 50 V
I
H
Holding current, typical
VD=5V, gate open circuit
25
300
mA
I
L
Latching current, typical
VD=5V, tp=30µs
25
700
mA
V
GT
Gate trigger voltage
VD=5V
25
3,50
V
I
GT
Gate trigger current
VD=5V
25
300
mA
V
GD
Non-trigger gate voltage, min.
VD=VDRM
125
0,25
V
V
FGM
Peak gate voltage (forward)
30
V
I
FGM
Peak gate current
10
A
V
RGM
Peak gate voltage (reverse)
5
V
P
GM
Peak gate power dissipation
150
W
P
G
Average gate power dissipation
2
W
R
th(j-h)
Thermal impedance, DC
Junction to heatsink, double side cooled
R
th(c-h)
Thermal impedance
Case to heatsink, double side cooled
T
j
Operating junction temperature
3
250
125
µs
µs
µC
A
GATE
Pulse width 100 µs
MOUNTING
F
42,0
°C/kW
10
°C/kW
-30 / 125
°C
Mounting force
04,0 / 06,0
kN
Mass
2800
ORDERING INFORMATION : AZT800 S 08
standard specification
VRRM/100
g
AZT800 HIGH CURRENT PHASE CONTROL
FINAL SPECIFICATION
May 17 - Issue: 3
DISSIPATION CHARACTERISTICS
SQUARE WAVE
Th [°C]
130
120
110
100
90
80
70
60
50
30°
60°
90°
120°
180°
DC
40
0
200
400
600
800
1000
1200
1400
1600
IT(AV) [A]
PF(AV) [W]
1800
DC
180°
1600
120°
1400
60°
1200
90°
30°
1000
800
600
400
200
0
0
200
400
600
800
IT(AV) [A]
1000
1200
1400
1600
AZT800 HIGH CURRENT PHASE CONTROL
FINAL SPECIFICATION
May 17 - Issue: 3
DISSIPATION CHARACTERISTICS
SINE WAVE
Th [°C]
130
120
110
100
90
80
70
60
50
30°
60°
90°
120°
180°
40
0
200
400
600
800
1000
1200
1400
IT(AV) [A]
PF(AV) [W]
1800
120°
1600
180°
90°
60°
30°
1400
1200
1000
800
600
400
200
0
0
200
400
600
IT(AV) [A]
800
1000
1200
1400
AZT800 HIGH CURRENT PHASE CONTROL
FINAL SPECIFICATION
May 17 - Issue: 3
FORWARD CHARACTERISTIC
Tj = 125 °C
SURGE CHARACTERISTIC
Tj = 125 °C
4000
35
3500
30
25
2500
ITSM [kA]
Forward Current [A]
3000
2000
1500
20
15
10
1000
5
500
0
0
0
0,5
1
1,5
2
1
10
Forward Voltage [V]
100
n° cycles
177
79.5
90
4
TRANSIENT THERMAL IMPEDANCE
DOUBLE SIDE COOLED
G-K Terminali A 2.8x0.8
45
40
104
70
35
Ø6
.5
46
30
58
Zth j-h [°C/kW]
1
2
70
3
Ø1
30
25
V5
80
20
92
15
10
K
5
0
0,001
2
0,01
0,1
1
10
G
100
t[s]
Distributed by
All the characteristics given in this data sheet are guaranteed only with uniform clamping force,
cleaned and lubricated heatsink, surfaces with flatness < .03 mm and roughness < 2 µm.
In the interest of product improvement POSEICO SpA reserves the right to change any data
given in this data sheet at any time without previous notice.
If not stated otherwise the maximum value of ratings (simbols over shaded background) and
characteristics is reported.
1
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