Integrated, Dual RF Transceiver with Observation Path AD9371 Data Sheet FEATURES FUNCTIONAL BLOCK DIAGRAM The AD9371 is a highly integrated, wideband RF transceiver offering dual channel transmitters and receivers, integrated synthesizers, and digital signal processing functions. The IC delivers a versatile combination of high performance and low power consumption required by 3G/4G micro and macro BTS equipment in both FDD and TDD applications. The AD9371 operates from 300 MHz to 6000 MHz, covering most of the licensed and unlicensed cellular bands. The IC supports receiver bandwidths up to 100 MHz. It also supports observation receiver and transmit synthesis bandwidths up to 250 MHz to accommodate digital correction algorithms. The transceiver consists of wideband direct conversion signal paths with state-of-the-art noise figure and linearity. Each complete receiver and transmitter subsystem includes dc offset correction, quadrature error correction (QEC), and programmable digital filters, eliminating the need for these functions in the digital baseband. Several auxiliary functions such as an auxiliary analogto-digital converter (ADC), auxiliary digital-to-analog converters (DACs), and general-purpose input/outputs (GPIOs) are integrated to provide additional monitoring and control capability. An observation receiver channel with two inputs is included to monitor each transmitter output and implement interference mitigation and calibration applications. This channel also connects to three sniffer receiver inputs that can monitor radio activity in different bands. Rev. A ADC RX2– LPF ADC MICROCONTROLLER RX_EXTLO+ TX1– RF SYNTHESIZER EXTERNAL OPTION SPI PORT TX1 LPF TX2 DAC TX2+ TX2– pFIR, QEC, INTERPOLATION LPF DAC TX_EXTLO+ TX_EXTLO– LO GENERATOR RF SYNTHESIZER GPIO AUXADC AUXDAC EXTERNAL OPTION LO GENERATOR RF SYNTHESIZER ORX1+ ORX1– SPI TX1+ LO GENERATOR CLOCK GENERATOR OBSERVATION Rx JESD204B RX_EXTLO– JESD204B LPF RX2 RX2+ ORX2+ ORX2– SNRXA+ SNRXA– SNRXB+ SNRXB– SNRXC+ SNRXC– SNIFFER Rx LPF ADC LPF ADC DECIMATION, pFIR, AGC, DC OFFSET, QEC, TUNING, RSSI, OVERLOAD NOTES 1. FOR JESD204B PINS, SEE FIGURE 4. 14651-001 GENERAL DESCRIPTION DECIMATION, pFIR, DC OFFSET QEC, TUNING, RSSI, OVERLOAD CTRL I/F 3G/4G micro and macro base stations (BTS) 3G/4G multicarrier picocells FDD and TDD active antenna systems Microwave, nonline of sight (NLOS) backhaul systems RX1– RX1 DEV_CLK_IN+, DEV_CLK_IN– APPLICATIONS AD9371 RX1+ JESD204B Dual differential transmitters (Tx) Dual differential receivers (Rx) Observation receiver (ORx) with 2 inputs Sniffer receiver (SnRx) with 3 inputs Tunable range: 300 MHz to 6000 MHz Tx synthesis bandwidth (BW) to 250 MHz Rx BW: 8 MHz to 100 MHz Supports frequency division duplex (FDD) and time division duplex (TDD) operation Fully integrated independent fractional-N radio frequency (RF) synthesizers for Tx, Rx, ORx, and clock generation JESD204B digital interface Figure 1. The high speed JESD204B interface supports lane rates up to 6144 Mbps. Four lanes are dedicated to the transmitters and four lanes are dedicated to the receiver and observation receiver channels. The fully integrated phase-locked loops (PLLs) provide high performance, low power fractional-N frequency synthesis for the transmitter, the receiver, the observation receiver, and the clock sections. Careful design and layout techniques provide the isolation demanded in high performance base station applications. All voltage controlled oscillator (VCO) and loop filter components are integrated to minimize the external component count. A 1.3 V supply is required to power the core of the AD9371, and a standard 4-wire serial port controls it. Other voltage supplies provide proper digital interface levels and optimize transmitter and auxiliary converter performance. The AD9371 is packaged in a 12 mm × 12 mm, 196-ball chip scale ball grid array (CSP_BGA). Document Feedback Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 ©2016 Analog Devices, Inc. All rights reserved. Technical Support www.analog.com AD9371 Data Sheet TABLE OF CONTENTS Features .............................................................................................. 1 5.5 GHz Band .............................................................................. 47 Applications ....................................................................................... 1 Theory of Operation ...................................................................... 57 General Description ......................................................................... 1 Transmitter (Tx) ......................................................................... 57 Functional Block Diagram .............................................................. 1 Receiver (Rx) ............................................................................... 57 Revision History ............................................................................... 2 Observation Receiver (ORx)..................................................... 57 Specifications..................................................................................... 3 Sniffer Receiver (SnRx) ............................................................. 57 Current and Power Consumption Specifications..................... 9 Clock Input.................................................................................. 57 Timing Specifications ................................................................ 11 Synthesizers ................................................................................. 58 Absolute Maximum Ratings.......................................................... 13 Serial Peripheral Interface (SPI) Interface .............................. 58 Reflow Profile .............................................................................. 13 GPIO_x AND GPIO_3P3_x Pins ............................................ 58 Thermal Resistance .................................................................... 13 Auxiliary Converters .................................................................. 58 ESD Caution ................................................................................ 13 JESD204B Data Interface .......................................................... 58 Pin Configuration and Function Descriptions ........................... 14 Power Supply Sequence ............................................................. 59 Typical Performance Characteristics ........................................... 17 JTAG Boundary Scan ................................................................. 59 700 MHz Band ............................................................................ 17 Outline Dimensions ....................................................................... 60 2.6 GHz Band .............................................................................. 27 Ordering Guide .......................................................................... 60 3.5 GHz Band .............................................................................. 37 REVISION HISTORY 11/2016—Rev. 0 to Rev. A Changes to Table 1 ............................................................................ 6 Changes to Table 2 ............................................................................ 9 Changes to L3, L4 Description Column, Table 6; M3, M4 Description Column, Table 6; and M13, M14 Description Column, Table 6 .............................................................................. 16 Changes to Figure 46 Caption....................................................... 23 Changes to Figure 48 Caption....................................................... 24 Changes to Figure 56 Caption and Figure 57 Caption .............. 25 Changes to Figure 82 Caption....................................................... 30 Changes to Figure 105 Caption .................................................... 33 Changes to Figure 107 Caption .................................................... 34 Changes to Figure 115 Caption and Figure 116 Caption .......... 35 Changes to Figure 141 Caption .................................................... 40 Changes to Figure 164 Caption .................................................... 43 Changes to Figure 166 Caption .................................................... 44 Changes to Figure 174 Caption and Figure 175 ......................... 45 Changes to Figure 194 and Figure 199 Caption ......................... 49 Changes to Figure 222 Caption .................................................... 53 Changes to Figure 224 Caption .................................................... 54 Added Figure 230 to Figure 235; Renumbered Sequentially .... 55 Added Figure 236 to Figure 239 ................................................... 56 Added External LO Inputs Section .............................................. 58 7/2016—Revision 0: Initial Version Rev. A | Page 2 of 60 Data Sheet AD9371 SPECIFICATIONS Electrical characteristics at ambient temperature range, VDDA_SER = 1.3 V, VDDA_DES = 1.3 V, JESD_VTT_DES = 1.3 V, VDDA_1P3 1 = 1.3 V, VDIG = 1.3 V, VDDA_1P8 = 1.8 V, VDD_IF = 2.5 V, and VDDA_3P3 = 3.3 V; all RF specifications based on measurements that include printed circuit board (PCB) and matching circuit losses, unless otherwise noted. Table 1. Parameter TRANSMITTERS (Tx) Center Frequency Tx Large Signal Bandwidth (BW) Tx Synthesis BW 2 Symbol Min Typ 300 BW Flatness Deviation from Linear Phase Power Control Range Unit 6000 100 250 MHz MHz MHz ±0.5 dB ±0.15 dB 10 0 42 Power Control Resolution ACLR 5 (Four Universal Mobile Telecommunications System (UMTS) Carriers) 700 MHz Local Oscillator (LO) 2600 MHz LO 3500 MHz LO 5500 MHz LO In-Band Noise Tx to Tx Isolation 700 MHz LO 2600 MHz LO 3500 MHz LO 5500 MHz LO Image Rejection 0.05 700 MHz LO 2600 MHz LO 3500 MHz LO 5500 MHz LO Maximum Output Power 65 65 65 50 700 MHz LO 2600 MHz LO 3500 MHz LO 5500 MHz LO Output Third-Order Intercept Point 7 7 6 4 700 MHz LO 2600 MHz LO 3500 MHz LO 5500 MHz LO Max Degrees dB Test Conditions/Comments Wider bandwidth for use in digital processing algorithms 250 MHz BW, compensated by programmable finite infinite response (FIR) filter Any 20 MHz BW span, compensated by programmable FIR filter 250 MHz BW Increased calibration time, reduced QEC 3, LOL 4 performance beyond 20 dB dB −11.2 dBFS rms, 0 dB RF attenuation −64 −64 −63 −61 −155 dB dB dB dB dBFS 6/Hz 70 65 65 65 dB dB dB dB Up to 20 dB RF attenuation, within large signal BW, QEC3 active dB dB dB dB 0 dBFS, 1 MHz signal input, 50 Ω load, 0 dB RF attenuation dBm dBm dBm dBm OIP3 −5 dBFS rms, 0 dB RF attenuation 27 27 25 25 Rev. A | Page 3 of 60 dBm dBm dBm dBm AD9371 Parameter Carrier Leakage 700 MHz LO 2600 MHz LO 3500 MHz LO 5500 MHz LO Error Vector Magnitude (3GPP Test Signals) Data Sheet Symbol Min dBFS6 dBFS6 dBFS6 dBFS6 −45 −39 −38.5 −37.5 50 300 0 Rx Alias Band Rejection Maximum Recommended Input Power 8 75 700 MHz LO 2600 MHz LO 3500 MHz LO 5500 MHz LO Test Conditions/Comments After calibration, LOL correction active, CW 7 input signal, 3 dB RF and 3 dB digital attenuation, 40 kHz measurement BW Long-term evolution (LTE) 20 MHz downlink, 5 dB RF attenuation 8 700 MHz LO 2600 MHz LO 3500 MHz LO 5500 MHz LO Input Second-Order Intercept Point Unit EVM Rx Bandwidth 700 MHz LO 2600 MHz LO 3500 MHz LO 5500 MHz LO Input Third-Order Intercept Point Max −81 −81 −81 −75 700 MHz LO 2600 MHz LO 3500 MHz LO 5500 MHz LO Output Impedance RECEIVERS (Rx) Center Frequency Gain Range Analog Gain Step BW Ripple Noise Figure Typ dB dB dB dB Ω 6000 30 0.5 ±0.5 MHz dB dB dB ±0.2 dB 100 MHz −14 dB dBm 12 13.5 14 18 dB dB dB dB NF IIP3 Differential 100 MHz BW, compensated by programmable FIR filter Any 20 MHz span, compensated by programmable FIR filter Analog low-pass filter (LPF) BW is 20 MHz minimum, programmable FIR BW configurable over the entire range Due to digital filters Input is a CW7 signal at a 0 dB attenuation setting; this level increases decibel for decibel with attenuation Maximum Rx gain, at Rx port, matching losses de-embedded Maximum Rx gain, thirdorder intermodulation (IM3) 1 MHz offset from LO 22 22 20 20 dBm dBm dBm dBm IIP2 Maximum Rx gain, secondorder intermodulation (IM2) 1 MHz offset from LO 65 65 65 57 Rev. A | Page 4 of 60 dBm dBm dBm dBm Data Sheet Parameter Image Rejection 700 MHz LO 2600 MHz LO 3500 MHz LO 5500 MHz LO Input Impedance Tx1 to Rx1 Signal Isolation and Tx2 to Rx2 Signal Isolation 700 MHz LO 2600 MHz LO 3500 MHz LO 5500 MHz LO Tx1 to Rx2 Signal Isolation and Tx2 to Rx1 Signal Isolation 700 MHz LO 2600 MHz LO 3500 MHz LO 5500 MHz LO Rx1 to Rx2 Signal Isolation 700 MHz LO 2600 MHz LO 3500 MHz LO 5500 MHz LO Rx Band Spurs Referenced to RF Input at Maximum Gain AD9371 Symbol Min Typ Max Unit 75 75 75 75 200 dB dB dB dB Ω 68 68 62 60 dB dB dB dB 70 70 62 60 dB dB dB dB 60 60 60 60 −95 dB dB dB dB dBm −65 −65 −62 −62 dBm dBm dBm dBm Rx LO Leakage at Rx Input at Maximum Gain 700 MHz LO 2600 MHz LO 3500 MHz LO 5500 MHz LO OBSERVATION RECEIVER (ORx) Center Frequency Gain Range Analog Gain Step BW Ripple 300 0 1 ±0.5 Deviation from Linear Phase ORx Bandwidth ORx Alias Band Rejection Maximum Recommended Input Power8 Signal-to-Noise Ratio 9 700 MHz LO 2600 MHz LO 3500 MHz LO 5500 MHz LO 6000 18 10 MHz dB dB dB −13 Degrees MHz dB dBm 60 60 60 59 dB dB dB dB 250 60 SNR Rev. A | Page 5 of 60 Test Conditions/Comments QEC3 active, within Rx BW Differential No more than one spur at this level per 10 MHz of Rx BW; excludes harmonics of the reference clock Leakage decreases decibel for decibel with attenuation for first 12 dB 250 MHz RF BW, compensated by programmable FIR filter 250 MHz RF BW Due to digital filters Input is a CW7 signal at 0 dB attenuation setting; this level increases decibel for decibel with attenuation Maximum gain at ORx port 200 MHz BW, 245.76 MSPS AD9371 Parameter Input Third-Order Intercept Point 700 MHz LO 2600 MHz LO 3500 MHz LO 5500 MHz LO Input Second-Order Intercept Point 700 MHz LO 2600 MHz LO 3500 MHz LO 5500 MHz LO Image Rejection 700 MHz LO 2600 MHz LO 3500 MHz LO 5500 MHz LO Input Impedance Tx1 to ORx1 Signal and Tx2 to ORx2 Signal Isolation 700 MHz LO 2600 MHz LO 3500 MHz LO 5500 MHz LO Tx1 to ORx2 Signal and Tx2 to ORx1 Signal Isolation 700 MHz LO 2600 MHz LO 3500 MHz LO 5500 MHz LO SNIFFER RECEIVER (SnRx) Center Frequency Gain Range Analog Gain Step BW Ripple Rx Bandwidth Rx Alias Band Rejection Maximum Recommended Input Power8 Noise Figure 700 MHz LO 2600 MHz LO 3500 MHz LO 5500 MHz LO Input Third-Order Intercept Point 700 MHz LO 2600 MHz LO 3500 MHz LO 5500 MHz LO Data Sheet Symbol IIP3 Min Typ Max 22 22 18 18 Unit Test Conditions/Comments Maximum ORx gain, IM3 1 MHz offset from LO dBm dBm dBm dBm IIP2 Maximum ORx gain, IM2 1 MHz offset from LO 65 65 65 60 dBm dBm dBm dBm 65 65 65 65 200 dB dB dB dB Ω 70 70 70 70 dB dB dB dB 70 70 70 70 dB dB dB dB After online tone calibration 300 0 6000 52 1 ±0.5 20 MHz dB dB dB −26 MHz dB dBm 5 5 7 12 dB dB dB dB 60 NF IIP3 Differential 20 MHz RF BW, compensated by programmable FIR filter Due to digital filters Input is a CW7 signal at 0 dB attenuation setting Maximum gain at SnRx port, matching losses de-embedded, gain control limited to the first 20 steps Maximum gain, IM3 1 MHz offset from LO, gain control limited to the first 20 steps 1 1 1 3 Rev. A | Page 6 of 60 dBm dBm dBm dBm Data Sheet Parameter Input Second-Order Intercept Point AD9371 Symbol IIP2 Min 700 MHz LO 2600 MHz LO 3500 MHz LO 5500 MHz LO Image Rejection 700 MHz LO 2600 MHz LO 3500 MHz LO 5500 MHz LO Input Impedance Tx1 to SnRx Signal and Tx2 to SnRx Signal Isolation 700 MHz LO 2600 MHz LO 3500 MHz LO 5500 MHz LO LO SYNTHESIZER LO Frequency Step Spot Phase Noise 700 MHz LO 10 kHz 100 kHz 1 MHz 2600 MHz LO 10 kHz 100 kHz 1 MHz 3500 MHz LO 10 kHz 100 kHz 1 MHz 5500 MHz LO 10 kHz 100 kHz 1 MHz Integrated Phase Noise Input Signal Power Max Unit 45 45 45 45 dBm dBm dBm dBm 75 75 75 75 400 dB dB dB dB Ω 60 60 60 60 dB dB dB dB 2.3 Hz −80 dBc −104 −107 −133 dBc dBc dBc −93 −97 −123 dBc dBc dBc −91 −97 −123 dBc dBc dBc −98 −100 −110 dBc dBc dBc Test Conditions/Comments Maximum gain, IM2 1 MHz offset from LO, gain control limited to the first 20 steps After online tone calibration LO Spectral Purity 700 MHz LO 2600 MHz LO 3500 MHz LO 5500 MHz LO EXTERNAL LO INPUT Input Frequency Typ Differential Applies to each SnRx input 1.5 GHz to 3 GHz, 76.8 MHz phase frequency detector (PFD) frequency Excludes integer boundary spurs 1 kHz to 100 MHz Integrated from 1 kHz to 100 MHz 0.20 0.49 0.55 0.75 fEXTLO 600 0 3 Rev. A | Page 7 of 60 °rms °rms °rms °rms 8000 MHz 6 dBm Input frequency must be 2× the desired LO frequency 50 Ω matching at the source AD9371 Parameter REFERENCE CLOCK (DEV_CLK_IN SIGNAL) Frequency Range Signal Level AUXILIARY CONVERTERS ADC ADC Resolution Input Voltage Minimum Maximum DAC DAC Resolution Output Voltage Minimum Maximum Drive Capability DIGITAL SPECIFICATIONS (CMOS), GPIO_x, RX1_ENABLE, RX2_ENABLE, TX1_ENABLE, TX2 ENABLE, SYNCINBx+, SYNCOUTB0+, GP_INTERRUPT, SDIO, SDO, SCLK, CSB, RESET Logic Inputs Input Voltage High Level Low Level Input Current High Level Low Level Logic Outputs Output Voltage High Level Data Sheet Symbol Min Typ 10 0.3 Input Differential Voltage Threshold Receiver Differential Input Impedance Unit 320 2.0 MHz V p-p Test Conditions/Comments AC-coupled, common-mode voltage (VCM) = 618 mV; for best spurious performance, use a <1 V p-p input clock 12 Bits 0.25 3.05 V V 10 Bits Includes four offset levels 0.5 3.0 10 V V mA Reference voltage (VREF) = 1 V VREF = 2.5 V VDD_IF × 0.8 0 VDD_IF V VDD_IF × 0.2 V −10 −10 +10 +10 µA µA VDD_IF × 0.8 V Low Level Drive Capability DIGITAL SPECIFICATIONS (LVDS), SYSREF_INx, SYNCOUTB0±, SYNCINBx PAIRS Logic Inputs Input Voltage Range Max VDD_IF × 0.2 3 V mA 825 1675 mV −100 +100 mV 100 Rev. A | Page 8 of 60 Ω Each differential input in the pair Internal termination enabled Data Sheet Parameter Logic Outputs Output Voltage High Low Differential Offset DIGITAL SPECIFICATIONS (CMOS), GPIO_3P3_x SIGNALS Logic Inputs Input Voltage High Level AD9371 Symbol Min Typ Max Unit 1375 mV mV mV mV VDDA_3P3 × 0.8 0 VDDA_3P3 V VDDA_3P3 × 0.2 V −10 −10 +10 +10 µA µA 1025 225 1200 Low Level Input Current High Level Low Level Logic Outputs Output Voltage High Level VDDA_3P3 × 0.8 V Low Level VDDA_3P3 × 0.2 Drive Capability Test Conditions/Comments 4 V mA VDDA_1P3 refers to all analog 1.3 V supplies including the following: VDDA_BB, VDDA_CLKSYNTH, VDDA_TXLO, VDDA_RXRF, VDDA_RXSYNTH, VDDA_RXVCO, VDDA_RXTX, VDDA_TXSYNTH, VDDA_TXVCO, VDDA_CALPLL, VDDA_SNRXSYNTH, VDDA_SNRXVCO, VDDA_CLK, and VDDA_RXLO. 2 Synthesis bandwidth (BW) is the extended bandwidth used by digital correction algorithms to measure conditions and generate compensation. 3 Quadrature error correction (QEC) is the system for minimizing quadrature images of a desired signal. 4 Local oscillator leakage (LOL) is a measure of the amount of the LO signal that is passed from a mixer with the desired signal. 5 Adjacent channel level reduction (ACLR) is a measure of the amount of power from the desired signal leaking into an adjacent channel. 6 dBFS represents the ratio of the actual output signal to the maximum possible output level for a continuous wave output signal at the given RF attenuation setting. 7 Continuous wave (CW) is a single frequency signal. 8 Note that the input signal power limit does not correspond to 0 dBFS at the digital output because of the nature of the continuous time Σ-Δ ADCs. Unlike the hard clipping characteristic of pipeline ADCs, these converters exhibit a soft overload behavior when the input approaches the maximum level. 9 Signal-to-noise ratio is limited by the baseband quantization noise. 1 CURRENT AND POWER CONSUMPTION SPECIFICATIONS Table 2. Parameter SUPPLY CHARACTERISTICS VDDA_1P3 Analog Supplies 1 VDIG Supply VDDA_1P8 Supply VDD_IF Supply VDDA_3P3 Supply VDDA_SER, VDDA_DES, JESD_VTT_DES Supplies POSITIVE SUPPLY CURRENT (Rx MODE) Min Typ Max Unit 1.267 1.267 1.71 1.71 3.135 1.14 1.3 1.3 1.8 1.8 3.3 1.3 1.33 1.33 1.89 2.625 3.465 1.365 V V V V V V Test Conditions / Comments CMOS and LVDS supply, 1.8 V to 2.5 V nominal range Two Rx channels enabled, Tx upconverter disabled, 100 MHz Rx BW, 122.88 MSPS data rate VDDA_1P3 Analog Supplies1 VDIG Supply VDD_IF Supply (CMOS and LVDS) VDDA_3P3 Supply 1055 625 8 1 mA mA mA mA VDDA_SER, VDDA_DES, JESD_VTT_DES Supplies 375 mA Rx QEC 2 enabled, QEC2 engine active No auxiliary DACs or auxiliary ADCs enabled; if enabled, the auxiliary ADC adds 2.7 mA, and each auxiliary ADC adds 1.5 mA Rev. A | Page 9 of 60 AD9371 Parameter Total Power Dissipation POSITIVE SUPPLY CURRENT (Tx MODE) VDDA_1P3 Analog Supplies1 VDIG Supply VDDA_1P8 Supply VDD_IF Supply VDDA_3P3 Supply VDDA_SER, VDDA_DES, JESD_VTT_DES Supplies Total Power Dissipation POSITIVE SUPPLY CURRENT (FDD MODE), 2× Rx, 2× Tx, ORx ACTIVE VDDA_1P3 Analog Supplies1 VDIG Supply VDDA_1P8 Supply VDD_IF Supply VDDA_3P3 Supply VDDA_SER, VDDA_DES, JESD_VTT_DES Supplies Total Power Dissipation MAXIMUM OPERATING JUNCTION TEMPERATURE Data Sheet Min Typ 2.70 Max Unit W Test Conditions / Comments Two Tx channels enabled, Rx downconverter disabled, 200 MHz Tx BW, 245.76 MSPS data rate (ORx disabled) 1000 410 mA mA 405 80 8 1 mA mA mA mA 375 mA 3.70 3.11 W W 1700 1080 mA mA 405 80 8 2 mA mA mA mA 375 mA 4.86 4.27 W W °C 110 Tx QEC2 active Full-scale CW 3 Tx RF attenuation = 0 dB, Tx RF attenuation = 15 dB No auxiliary DACs or auxiliary ADCs enabled; if enabled, the auxiliary ADC adds 2.7 mA, and each auxiliary ADC adds 1.5 mA Typical supply voltages, Tx QEC2 active Tx RF attenuation = 0 dB Tx RF attenuation = 15 dB 100 MHz Rx BW, 122.88 MSPS data rate; 200 MHz Tx BW, 245.76 MSPS data rate; 200 MHz ORx BW, 245.76 MSPS data rate Tx QEC2 active Full-scale CW3 Tx RF attenuation = 0 dB Tx RF attenuation = 15 dB No auxiliary DACs or auxiliary ADCs enabled; if enabled, the auxiliary ADC adds 2.7 mA, and each auxiliary ADC adds 1.5 mA Typical supply voltages, Tx QEC2 active Tx RF attenuation = 0 dB Tx RF attenuation = 15 dB Device designed for 10-year lifetime when operating at maximum junction temperature VDDA_1P3 refers to all analog 1.3 V supplies including the following: VDDA_BB, VDDA_CLKSYNTH, VDDA_TXLO, VDDA_RXRF, VDDA_RXSYNTH, VDDA_RXVCO, VDDA_RXTX, VDDA_TXSYNTH, VDDA_TXVCO, VDDA_CALPLL, VDDA_SNRXSYNTH, VDDA_SNRXVCO, VDDA_CLK, and VDDA_RXLO. QEC is the system for minimizing quadrature images of a desired signal. 3 Continuous wave (CW) is a single frequency signal. 1 2 Rev. A | Page 10 of 60 Data Sheet AD9371 TIMING SPECIFICATIONS Table 3. Parameter SERIAL PERIPHERAL INTERFACE (SPI) TIMING SCLK Period SCLK Pulse Width CSB Setup to First SCLK Rising Edge Last SCLK Falling Edge to CSB Hold SDIO Data Input Setup to SCLK SDIO Data Input Hold to SCLK SCLK Falling Edge to Output Data Delay (3- or 4-Wire Mode) Bus Turnaround Time After Baseband Processor (BBP) Drives Last Address Bit Bus Turnaround Time After AD9371 Drives Last Address Bit DIGITAL TIMING TXx_ENABLE Pulse Width RXx_ENABLE Pulse Width JESD204B DATA OUTPUT TIMING Unit Interval Data Rate per Channel (Nonreturn to Zero (NRZ)) Rise Time Fall Time Output Common-Mode Voltage Termination Voltage (VTT) = 1.2 V Differential Output Voltage Short-Circuit Current Differential Termination Impedance Total Jitter Uncorrelated Bounded High Probability Jitter Duty-Cycle Distortion SYSREF_IN Signal Setup Time to DEV_CLK_IN Signal SYSREF_IN Signal Hold Time to DEV_CLK_IN Signal JESD204B DATA INPUT TIMING Unit Interval Data Rate per Channel (NRZ) Input Common-Mode Voltage VTT = 1.2 V Differential Input Voltage VTT Source Impedance Differential Termination Impedance VTT AC-Coupled DC-Coupled Symbol Min tCP tMP tSC tHC tS tH tCO tHZM tHZS Typ Max Unit 20 10 3 0 2 0 3 tH 8 tCO ns ns ns ns ns ns ns ns 0 tCO ns 10 10 UI tR tF VCM VDIFF IDSHORT ZRDIFF UBHPJ DCD tS tH UI VCM VDIFF ZTT ZRDIFF 162.76 614.4 24 24 0 735 360 −100 80 µs µs 1627.6 6144 35 35 466 100 17 1.2 3 1.8 1135 770 +100 120 48.8 24.4 8.1 2.5 −1.5 162.76 614.4 0.05 720 125 80 1.27 1.14 Rev. A | Page 11 of 60 Test Conditions/Comments 1.2 106 ps Mbps ps ps V mV mV mA Ω ps ps ps ns ns 1627.6 6144 1.85 1200 750 30 120 ps Mbps V mV mV Ω Ω 1.33 1.26 V V 20% to 80% in 100 Ω load 20% to 80% in 100 Ω load AC-coupled DC-coupled Bit error rate (BER) = 10−15 See Figure 2 and Figure 3 See Figure 2 and Figure 3 AC-coupled DC-coupled AD9371 Data Sheet Timing Diagrams DEV_CLK_IN DELAY IN REFERENCE TO SYSREF AT DEVICE PINS tS tS tH AT DIGITAL CORE t'S tH t'H t'H tH = –1.5ns tS = +2.5ns 14651-002 DEV_CLK_IN t'H = +0.5ns t'S = +0.5ns CLK DELAY = 2ns Figure 2. SYSREF_IN Signal Setup and Hold Timing tS tS tH tS tH tS tH tH DEV_CLK_IN VALID SYSREF_IN INVALID SYSREF_IN tH = –1.5ns tS = +2.5ns Figure 3. SYSREF_IN Signal Setup and Hold Timing Examples Relative to DEV_CLK_IN Signal Rev. A | Page 12 of 60 14651-003 SYSREF_IN Data Sheet AD9371 ABSOLUTE MAXIMUM RATINGS REFLOW PROFILE Table 4. Parameter VDDA_1P31 to VSSA VDDA_SER, VDDA_DES, and JESD_VTT_DES to VSSA VDIG to VSSD VDDA_1P8 to VSSA VDD_IF to VSSA VDDA_3P3 to VSSA Logic Inputs and Outputs to VSSD JESD204B Logic Outputs to VSSA JESD204B Logic Inputs to VSSA Input Current to Any Pin Except Supplies Maximum Input Power into RF Ports (Excluding Sniffer Receiver Inputs) Maximum Input Power into SNRXA±, SNRXB±, and SNRXC± Maximum Junction Temperature (TJ MAX) Operating Temperature Range Storage Temperature Range 1 The AD9371 reflow profile is in accordance with the JEDEC JESD20 criteria for Pb-free devices. The maximum reflow temperature is 260°C. Rating −0.3 V to +1.4 V −0.3 V to +1.4 V THERMAL RESISTANCE −0.3 V to +1.4 V −0.3 V to +2.0 V −0.3 V to +3.0 V −0.3 V to +3.9 V −0.3 V to VDD_IF + 0.3 V −0.3 V to VDDA_SER −0.3 V to VDDA_DES ±10 mA Thermal performance is directly linked to PCB design and operating environment. Careful attention to PCB thermal design is required. Table 5. Thermal Resistance Package BC-196-12 JEDEC5 23 dBm (peak) 2 dBm (peak) 10-Layer PCB 110°C −40°C to +85°C −65°C to +150°C Airflow Velocity1 (m/sec) θJA2, 3 (°C/W) θJC2, 4 (°C/W) 0.0 1.0 2.5 0.0 1.0 2.5 20.5 18.5 17.2 14.1 12.4 11.6 0.05 N/A6 N/A6 0.05 N/A6 N/A6 1 Power dissipation is 3.0 W for all test cases. Per JEDEC JESD51-7 for JEDEC JESD51-5 2S2P test board. 3 Per JEDEC JESD51-2 (still air) or JEDEC JESD51-6 (moving air). 4 Per MIL-STD 883, Method 1012.1. 5 JEDEC entries refer to the JEDEC JESD51-9 (high K thermal test board). 6 N/A means not applicable. 2 VDDA_1P3 refers to all analog 1.3 V supplies: VDDA_BB, VDDA_CLKSYNTH, VDDA_TXLO, VDDA_RXSYNTH, VDDA_RXVCO, VDDA_RXTX, VDDA_RXRF, VDDA_TXSYNTH, VDDA_TXVCO, VDDA_CALPLL, VDDA_SNRXSYNTH, VDDA_SNRXVCO, VDDA_CLK, and VDDA_RXLO. Stresses at or above those listed under Absolute Maximum Ratings may cause permanent damage to the product. This is a stress rating only; functional operation of the product at these or any other conditions above those indicated in the operational section of this specification is not implied. Operation beyond the maximum operating conditions for extended periods may affect product reliability. ESD CAUTION Rev. A | Page 13 of 60 AD9371 Data Sheet PIN CONFIGURATION AND FUNCTION DESCRIPTIONS AD9371 TOP VIEW (Not to Scale) 2 3 4 5 6 7 8 9 10 11 12 13 14 A VSSA ORX2+ ORX2– VSSA RX2+ RX2– VSSA VSSA RX1+ RX1– VSSA ORX1+ ORX1– VSSA B VDDA_RXRF VSSA VSSA VSSA VSSA VSSA RX_EXTLO– RX_EXTLO+ VSSA VSSA VSSA VSSA VSSA VDDA_3P3 C GPIO_3P3_0 GPIO_3P3_1 VSNRX_ VCO_LDO VDDA_ SNRXVCO VSSA VDDA_RXLO VDDA_ RXVCO VRX_ VCO_LDO VSSA VSSA AUXADC_1 AUXADC_2 GPIO_3P3_9 RBIAS D GPIO_3P3_3 SNRXC– SNRXB– SNRXA– GPIO_3P3_5 VSSA VSSA VSSA VSSA VDDA_1P8 AUXADC_3 GPIO_3P3_7 GPIO_3P3_8 GPIO_3P3_10 E GPIO_3P3_4 SNRXC+ SNRXB+ SNRXA+ VDDA_BB VSSA DEV_ CLK_IN+ DEV_ CLK_IN– VSSA VSSA TX_EXTLO– TX_EXTLO+ AUXADC_0 GPIO_3P3_6 F GPIO_3P3_2 VDDA_RXTX VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VDDA_ TXVCO VDDA_TXLO VTX_ VCO_LDO GPIO_3P3_11 G VSSA VSSA VSSA VDDA_ CALPLL VSSA VDDA_ CLKSYNTH VDDA_ SNRXSYNTH VDDA_ TXSYNTH VDDA_ RXSYNTH VSSA VSSA VSSA VSSA VSSA H TX2– VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA VSSA GPIO_12 GPIO_11 VSSA TX1+ J TX2+ VSSA GPIO_18 RESET GP_ INTERRUPT TEST GPIO_2 GPIO_1 SDIO SDO GPIO_13 GPIO_10 VSSA TX1– K VSSA VSSA SYSREF_IN+ SYSREF_IN– GPIO_5 GPIO_4 GPIO_3 GPIO_0 SCLK CSB GPIO_14 GPIO_9 VSSA VSSA L VSSA VSSA SYNCINB1– SYNCINB1+ GPIO_6 GPIO_7 VSSD VDIG VDIG VSSD GPIO_15 GPIO_8 VSSA VSSA VCLK_ VCO_LDO VSSA SYNCINB0– SYNCINB0+ RX1_ ENABLE TX1_ ENABLE RX2_ ENABLE TX2_ ENABLE VSSA GPIO_17 GPIO_16 VDD_IF N VDDA_CLK VSSA SERDOUT3– SERDOUT3+ SERDOUT2– SERDOUT2+ VSSA VDDA_SER VDDA_DES SERDIN2– SERDIN2+ SERDIN3– SERDIN3+ VSSA P VSSA VSSA VSSA SERDOUT1– SERDOUT1+ SERDOUT0– SERDOUT0+ VDDA_SER JESD_VTT_ DES VSSA SERDIN0– SERDIN0+ SERDIN1– SERDIN1+ M ANALOG INPUT/OUTPUT DIGITAL INPUT/OUTPUT DC POWER GROUND SYNCOUTB0+ SYNCOUTB0– 14651-004 1 Figure 4. Pin Configuration Table 6. Pin Function Descriptions Pin No. A1, A4, A7, A8, A11, A14, B2 to B6, B9 to B13, C5, C9, C10, D6 to D9, E6, E9, E10, F3 to F10, G1 to G3, G5, G10 to G14, H2 to H10, H13, J2, J13, K1, K2, K13, K14, L1, L2, L13, L14, M2, M9, N2, N7, N14, P1, P2, P3, P10 A2, A3 Type1 I Mnemonic VSSA Description Analog ground. I ORX2+, ORX2− A5, A6 I RX2+, RX2− A9, A10 I RX1+, RX1− Differential Input for Observation Receiver 2. Do not connect if these pins are unused. Differential Input for Receiver 2. Do not connect if these pins are unused. Differential Input for Receiver 1. Do not connect if these pins are unused. Rev. A | Page 14 of 60 Data Sheet AD9371 Pin No. A12, A13 Type 1 I Mnemonic ORX1+, ORX1− B1 B7, B8 I I/O VDDA_RXRF RX_EXTLO−, RX_EXTLO+ B14 C1, C2, C13, D1, D5, D12 to D14, E1, E14, F1, F14 I I/O VDDA_3P3 GPIO_3P3_0 to GPIO_3P3_11 C3 O VSNRX_VCO_LDO C4 I VDDA_SNRXVCO C6 I VDDA_RXLO C7 C8 I O VDDA_RXVCO VRX_VCO_LDO C11 C12 C14 I I N/A AUXADC_1 AUXADC_2 RBIAS D2, E2 I SNRXC−, SNRXC+ D3, E3 I SNRXB−, SNRXB+ D4, E4 I SNRXA−, SNRXA+ D10 D11 E5 E7, E8 E11, E12 I I I I I/O VDDA_1P8 AUXADC_3 VDDA_BB DEV_CLK_IN+, DEV_CLK_IN− TX_EXTLO−, TX_EXTLO+ E13 F2 I I AUXADC_0 VDDA_RXTX F11 F12 I I VDDA_TXVCO VDDA_TXLO F13 O VTX_VCO_LDO G4 I VDDA_CALPLL G6 I VDDA_CLKSYNTH G7 I VDDA_SNRXSYNTH G8 I VDDA_TXSYNTH G9 I VDDA_RXSYNTH Rev. A | Page 15 of 60 Description Differential Input for Observation Receiver 1. Do not connect if these pins are unused. 1.3 V Supply Input. Differential Rx External LO Input/Output. If used for external LO, the input frequency must be 2× the desired carrier frequency. Do not connect if these pins are unused. Supply Voltage for GPIO_3P3_x. General-Purpose Inputs and Outputs Referenced to 3.3 V Supply. See Figure 4 to match the ball location to the GPIO_3P3_x signal name. Some GPIO_3P3_x pins can also function as auxiliary DAC outputs. Sniffer VCO LDO 1.1 V Output. Bypass this pin with a 1 µF capacitor. 1.3 V Supply Input for Sniffer VCO Low Dropout (LDO) Regulator. 1.3 V Supply for the Rx Synthesizer LO Generator. This pin is sensitive to aggressors. 1.3 V Supply Input for Receiver VCO LDO Regulator. Receiver VCO LDO 1.1 V Output. Bypass this pin with a 1 µF capacitor. Auxiliary ADC 1 Input Pin. Auxiliary ADC 2 Input Pin. Bias Resistor Connection. This pin generates an internal current based on an external 1% resistor. Connect a 14.3 kΩ resistor between this pin and ground (VSSA). Differential Input for Sniffer Receiver Input C. If these pins are unused, connect to VSSA with a short or with a 1 kΩ resistor. Differential Input for Sniffer Receiver Input B. If these pins are unused, connect to VSSA with a short or with a 1 kΩ resistor. Differential Input for Sniffer Receiver Input A. If these pins are unused, connect to VSSA with a short or with a 1 kΩ resistor. 1.8 V Tx Supply. Auxiliary ADC 3 Input Pin. 1.3 V Supply Input for ADCs, DACs, and Auxiliary ADCs. Device Clock Differential Input. Differential Tx External LO Input/Output. If these pins are used for the external LO, the input frequency must be 2× the desired carrier frequency. Do not connect if these pins are unused. Auxiliary ADC 0 Input Pin. 1.3 V Supply Input for Tx/Rx Baseband Circuits, Transimpedance Amplifier (TIA), Tx Transconductance (Gm), Baseband Filters, and Auxiliary DACs. 1.3 V Supply Input for Transmitter VCO LDO Regulator. 1.3 V Supply for the Tx Synthesizer LO Generator. This pin is sensitive to aggressors. Transmitter VCO LDO 1.1 V Output. Bypass this pin with a 1 µF capacitor. 1.3 V Supply Input for Calibration PLL Circuits. Use a separate trace on the PCB back to a common supply point. 1.3 V Clock Synthesizer Supply Input. This pin is sensitive to aggressors. 1.3 V Sniffer Rx Synthesizer Supply Input. This pin is sensitive to aggressors. 1.3 V Tx Synthesizer Supply Input. This pin is sensitive to aggressors. 1.3 V Rx Synthesizer Supply Input. This pin is sensitive to aggressors. AD9371 Data Sheet Pin No. H1, J1 H11, H12, J3, J7, J8, J11, J12, K5 to K8, K11, K12, L5, L6, L11, L12, M10, M11 Type 1 O I/O Mnemonic TX2−, TX2+ GPIO_0 to GPIO_18 H14, J14 J4 J5 J6 O I O I TX1+, TX1− RESET GP_INTERRUPT TEST J9 I/O SDIO J10 K3, K4 K9 K10 L3, L4 O I I I I SDO SYSREF_IN+, SYSREF_IN− SCLK CSB SYNCINB1−, SYNCINB1+ L7, L10 L8, L9 I I VSSD VDIG M1 O VCLK_VCO_LDO M3, M4 I SYNCINB0−, SYNCINB0+ M5 M6 M7 M8 M12 M13, M14 I I I I I O RX1_ENABLE TX1_ENABLE RX2_ENABLE TX2_ENABLE VDD_IF SYNCOUTB0+, SYNCOUTB0− N1 N3, N4 I O VDDA_CLK SERDOUT3−, SERDOUT3+ N5, N6 O SERDOUT2−, SERDOUT2+ N8, P8 N9 N10, N11 N12, N13 P4, P5 I I I I O VDDA_SER VDDA_DES SERDIN2−, SERDIN2+ SERDIN3−, SERDIN3+ SERDOUT1−, SERDOUT1+ P6, P7 O SERDOUT0−, SERDOUT0+ P9 P11, P12 P13, P14 I I I JESD_VTT_DES SERDIN0−, SERDIN0+ SERDIN1−, SERDIN1+ 1 I is input, O is output, I/O is input/output, and N/A is not applicable. Rev. A | Page 16 of 60 Description Differential Output for Transmitter 2. General-Purpose Inputs and Outputs Referenced to VDD_IF. See Figure 4 to match the ball location to the GPIO_x signal name. Differential Output for Transmitter 1. Active Low Chip Reset. General-Purpose Interrupt Signal. Test Pin Used for JTAG Boundary Scan. Ground this pin if unused. Serial Data Input in 4-Wire Mode or Input/Output in 3-Wire Mode. Serial Data Output. LVDS SYSREF Clock Inputs for the JESD204B Interface. Serial Data Bus Clock. Serial Data Bus Chip Select. Active low. LVDS Sync Signal Associated with ORx/Sniffer Channel Data on the JESD204B Interface. Alternatively, these pins can be set to a CMOS input using SYNCINB1+ as the input and connecting SYNCINB1− with a 1 kΩ resistor to GND. Digital Ground. 1.3 V Digital Core Supply. Use a separate trace on the PCB back to a common supply point. Clock VCO LDO 1.1 V Output. Bypass this pin with a 1 µF capacitor. LVDS Sync Signal Associated with Rx Channel Data on the JESD204B Interface. Alternatively, these pins can be set to a CMOS input using SYNCINB0+ as the input and connecting SYNCINB0− with a 1 kΩ resistor to GND. Enables Rx Channel 1 Signal Path. Enables Tx Channel 1 Signal Path. Enables Rx Channel 2 Signal Path. Enables Tx Channel 2 Signal Path. CMOS/LVDS Interface Supply. LVDS Sync Signal Associated with Transmitter Channel Data on the JESD Interface. Alternatively, these pins can be set to a CMOS output using SYNCOUTB0+ as the output while leaving SYNCOUTB0− floating. 1.3 V Clock Supply Input. RF Current Mode Logic (CML) Differential Output 3. This JESD204B lane can be used by the receiver data or by the sniffer/observation receiver data. RF CML Differential Output 2. This JESD204B lane can be used by the receiver data or by the sniffer/observation receiver data. JESD204B 1.3 V Serializer Supply Input. JESD204B 1.3 V Deserializer Supply Input. RF CML Differential Input 2. RF CML Differential Input 3. RF CML Differential Output 1. This JESD204B lane can be used by receiver data or by sniffer/observation receiver data. RF CML Differential Output 0. This JESD204B lane can be used by receiver data or by sniffer/observation receiver data. JESD204B Deserializer Termination Supply Input. RF CML Differential Input 0. RF CML Differential Input 1. Data Sheet AD9371 TYPICAL PERFORMANCE CHARACTERISTICS 700 MHz BAND Temperature settings refer to the die temperature. The die temperature is 40°C for single trace plots. 100 –30 90 +110°C +40°C –40°C –50 80 RECEIVER IIP2 (dBm) –60 –70 –80 –90 50 40 30 +110°C +40°C –40°C 500 600 700 800 900 1000 RECEIVER LO FREQUENCY (MHz) 0 14651-305 400 Figure 5. Receiver Local Oscillator (LO) Leakage vs. Receiver LO Frequency, 0 dB Receiver Attenuation, 20 MHz RF Bandwidth, 30.72 MSPS Sample Rate 0 3 6 9 12 15 f1 OFFSET FREQUENCY (MHz) 14651-308 10 –110 300 Figure 8. Receiver IIP2 vs. f1 Offset Frequency, 900 MHz LO, 0 dB Attenuation, 20 MHz RF Bandwidth, f2 = f1 + 1 MHz, 30.72 MSPS Sample Rate 100 45 90 40 +110°C +40°C –40°C 80 30 25 20 15 70 60 50 30 10 20 5 10 0 0 3 6 9 12 15 RECEIVER ATTENUATION (dB) f2 – f1, +110°C f2 – f1, +40°C f2 – f1, –40°C f2 + f1, +110°C f2 + f1, +40°C f2 + f1, –40°C 40 0 4 6 10 12 Figure 9. Receiver IIP2 vs. Intermodulation Frequency, 900 MHz LO, 0 dB Attenuation, 20 MHz RF Bandwidth, 30.72 MSPS Sample Rate Figure 6. Receiver Noise Figure vs. Receiver Attenuation, 700 MHz LO, 20 MHz Bandwidth, 30.72 MSPS Sample Rate, 20 MHz Integration Bandwidth (Includes 1 dB Matching Circuit Loss) 40 30 35 +110°C +40°C –40°C 30 RECEIVER IIP3 (dBm) 25 20 15 10 25 20 15 +110°C +40°C –40°C 10 5 5 0 400 500 600 700 800 RECEIVER LO FREQUENCY (MHz) 900 1000 14651-307 0 300 8 INTERMODULATION FREQUENCY (MHz) 14651-309 RECEIVER IIP2 (dBm) 35 14651-306 RECEIVER NOISE FIGURE (dB) 60 20 –100 RECEIVER NOISE FIGURE (dB) 70 Figure 7. Receiver Noise Figure vs. Receiver LO Frequency, 0 dB Receiver Attenuation, 20 MHz RF Bandwidth, 30.72 MSPS Sample Rate, 20 MHz Integration Bandwidth (Includes 1 dB Matching Circuit Loss) Rev. A | Page 17 of 60 0 3 6 9 12 15 f1 OFFSET FREQUENCY (MHz) Figure 10. Receiver IIP3 vs. F1 Offset Frequency, 900 MHz LO, 0 dB Attenuation, 20 MHz RF Bandwidth, f2 = 2f1 + 1 MHz, 30.72 MSPS Sample Rate 14651-310 RECEIVER LO LEAKAGE (dBm) –40 AD9371 Data Sheet –40 35 –50 RECEIVER DC OFFSET (dBFS) 40 25 20 f2 – 2f1, +110°C f2 – 2f1, +40°C f2 – 2f1, –40°C f2 + 2f1, +110°C f2 + 2f1, +40°C f2 + 2f1, –40°C 10 5 6 8 10 12 INTERMODULATION FREQUENCY (MHz) –80 –90 –110 0 5 10 15 20 25 30 RECEIVER ATTENUATION (dB) Figure 11. Receiver IIP3 vs. Intermodulation Frequency, 900 MHz LO, 0 dB Attenuation, 20 MHz RF Bandwidth, 30.72 MSPS Sample Rate Figure 14. Receiver DC Offset vs. Receiver Attenuation, 800 MHz LO, 20 MHz RF Bandwidth, 30.72 MSPS Sample Rate 0 –40 –10 +110°C +40°C –40°C –20 +110°C +40°C –40°C –50 –30 RECEIVER HD2 (dBc) RECEIVER IMAGE (dBc) –70 –100 0 4 –60 14651-314 15 14651-311 RECEIVER IIP3 (dBm) 30 +110°C +40°C –40°C –40 –50 –60 –70 –80 –90 –60 –70 –80 –90 –100 0 5 10 15 20 25 30 RECEIVER ATTENUATION (dB) –110 14651-312 –110 Figure 12. Receiver Image vs. Receiver Attenuation, 800 MHz LO, Continuous Wave (CW) Signal 3 MHz Offset, 20 MHz RF Bandwidth, Background Tracking Calibration (BTC) Active, 30.72 MSPS Sample Rate 0 10 15 20 25 30 RECEIVER ATTENUATION (dB) Figure 15. Receiver HD2 vs. Receiver Attenuation, 800 MHz LO, CW Signal 3 MHz Offset, −20 dBm at 0 dB Attenuation, Input Power Increasing Decibel for Decibel with Attenuation, 20 MHz RF Bandwidth, 30.72 MSPS Sample Rate 25 –40 +110°C +40°C –40°C 20 +110°C +40°C –40°C –50 RECEIVER HD3 (dBc) 15 10 5 0 –5 –60 –70 –80 –90 –100 –10 0 5 10 15 20 RECEIVER ATTENUATION (dB) 25 30 –110 14651-313 –15 Figure 13. Receiver Gain vs. Receiver Attenuation, 800 MHz LO, CW Signal 3 MHz Offset, 20 MHz RF Bandwidth, 30.72 MSPS Sample Rate 0 5 10 15 20 RECEIVER ATTENUATION (dB) 25 30 14651-316 RECEIVER GAIN (dB) 5 14651-315 –100 Figure 16. Receiver HD3 vs. Receiver Attenuation, 800 MHz LO, CW Signal 3 MHz Offset, −20 dBm at 0 dB Attenuation, Input Power Increasing Decibel for Decibel with Attenuation, 20 MHz RF Bandwidth, 30.72 MSPS Sample Rate Rev. A | Page 18 of 60 Data Sheet AD9371 30 0 –20 –30 –40 15 10 0 RECEIVER INPUT POWER (dBm) 0 –35 Figure 17. Receiver Error Vector Magnitude (EVM) vs. Receiver Input Power, 900 MHz LO, 20 MHz RF Bandwidth, LTE 20 MHz Uplink Centered at DC, BTC Active, 30.72 MSPS Sample Rate –10 –40 –20 TRANSMITTER IMAGE (dBc) –30 –70 –80 –90 –100 –20 –15 –10 –5 0 –110 10 +110°C +40°C –40°C –30 –40 –50 –60 –70 –80 –90 500 600 700 800 900 1000 –100 14651-318 400 RECEIVER LO FREQUENCY (MHz) Figure 18. Rx2 to Rx1 Crosstalk vs. Receiver LO Frequency, 100 MHz RF Bandwidth, CW Tone 3 MHz Offset from LO 0 5 10 15 30 RF ATTENUATION (dB) Figure 21. Transmitter Image vs. RF Attenuation, 20 MHz RF Bandwidth, 900 MHz LO, Transmitter Quadrature Error Correction (QEC) Tracking Run with Two 20 MHz LTE Downlink Carriers, Then Image Measured with CW 10 MHz Offset from LO, 3 dB Digital Backoff, 122.88 MSPS Sample Rate 30 0 –10 +110°C +40°C –40°C 25 TRANSMITTER IMAGE (dBc) RECEIVER NOISE FIGURE (dB) 5 Figure 20. Receiver Noise Figure vs. Out-of-Band Interferer Signal Power, 703 MHz LO, 901 MHz CW Interferer, NF Integrated Over 7 MHz to 10 MHz, 20 MHz RF Bandwidth 0 –60 –25 OUT-OF-BAND INTERFERER SIGNAL POWER (dBm) –20 –50 –30 14651-320 –5 14651-317 –60 –60 –55 –50 –45 –40 –35 –30 –25 –20 –15 –10 Rx2 TO Rx1 CROSSTALK (dB) 20 5 –50 –120 300 +110°C +40°C –40°C 25 14651-321 RECEIVER EVM (dB) RECEIVER NOISE FIGURE (dB) +110°C +40°C –40°C –10 20 15 10 5 +110°C +40°C –40°C –20 –30 –40 –50 –60 –70 –80 –45 –40 –35 –30 –25 CLOSE-IN INTERFERER SIGNAL POWER (dBm) –20 –100 –10 14651-319 0 –50 Figure 19. Receiver Noise Figure vs. Close-In Interferer Signal Power, 703 MHz LO, 709 MHz CW Interferer, NF Integrated over 7 MHz to 10 MHz, 20 MHz RF Bandwidth –5 0 5 DESIRED OFFSET FREQUENCY (MHz) 10 14651-322 –90 Figure 22. Transmitter Image vs. Desired Offset Frequency, 20 MHz RF Bandwidth, 900 MHz LO, 0 dB RF Attenuation, Transmitter QEC Tracking Run with Two 20 MHz LTE Downlink Carriers, Then Image Measured with CW Signal, 3 dB Digital Backoff, 122.88 MSPS Sample Rate Rev. A | Page 19 of 60 Data Sheet 10 –20 8 –30 6 –40 Tx1 TO Rx1 CROSSTALK (dB) 4 2 0 –2 –4 +110°C +40°C –40°C –6 500 600 700 800 900 1000 –80 –90 –100 –120 300 14651-323 400 FREQUENCY (MHz) 400 500 600 700 800 900 1000 RECEIVER LO FREQUENCY (MHz) Figure 23. Tx Output Power, Transmitter QEC, and External LO Leakage Tracking Active, 10 MHz CW Offset Signal, 1 MHz Resolution Bandwidth, 122.88 MSPS Sample Rate Figure 26. Tx1 to Rx1 Crosstalk vs. Receiver LO Frequency, 20 MHz Receiver RF Bandwidth, 20 MHz Transmitter RF Bandwidth, CW Signal 3 MHz Offset from LO –20 –60 –30 –70 Tx2 TO Rx2 CROSSTALK (dB) +110°C +40°C –40°C –65 –75 –80 –85 –90 –95 –40 –50 –60 –70 –80 –90 –100 –100 0 5 10 15 20 RF ATTENUATION (dB) –120 300 Figure 24. Transmitter LO Leakage vs. RF Attenuation, 900 MHz LO, Transmitter QEC and External LO Leakage Tracking Active, CW Signal 5 MHz Offset from LO, 6 dB Digital Backoff, 1 MHz Measurement Bandwidth (If Input Power to ORx Channel Is Not Held Constant, Performance Degrades As Shown in This Plot) 500 600 700 800 900 1000 RECEIVER LO FREQUENCY (MHz) Figure 27. Tx2 to Rx2 Crosstalk vs. Receiver LO Frequency, 20 MHz Receiver RF Bandwidth, 20 MHz Transmitter RF Bandwidth, CW Signal 3 MHz Offset from LO –20 –60 –70 –75 +110°C +40°C –40°C +110°C +40°C –40°C +110°C +40°C –40°C –30 Tx2 TO Tx1 CROSSTALK (dB) 900MHz, 900MHz, 900MHz, 600MHz, 600MHz, 600MHz, 300MHz, 300MHz, 300MHz, –65 –80 –85 –90 –95 –40 –50 –60 –70 –80 –90 –100 –110 –5 0 5 OFFSET FREQUENCY (MHz) 10 14651-325 –100 –10 400 14651-327 –110 14651-324 TRANSMITTER LO LEAKAGE (dBFS) –70 –110 –10 300 TRANSMITTER LO LEAKAGE (dBFS) –60 14651-326 –8 –50 Figure 25. Transmitter LO Leakage vs. Offset Frequency, Transmitter QEC and External LO Leakage Tracking Active, 5 dB Digital Backoff, 1 MHz Measurement Bandwidth –120 300 400 500 600 700 800 900 1000 TRANSMITTER LO FREQUENCY (MHz) Figure 28. Tx2 to Tx1 Crosstalk vs. Transmitter LO Frequency, 20 MHz RF Bandwidth, CW Signal 3 MHz Offset from LO Rev. A | Page 20 of 60 14651-328 Tx OUTPUT (dBm) AD9371 Data Sheet AD9371 –60 –80 +110°C +40°C –40°C –100 –70 –80 LO PHASE NOISE (dBc) –110 –120 –130 –140 –150 –90 –100 –110 –120 –130 –160 0 5 10 15 20 RF ATTENUATION (dB) –150 100 14651-329 –180 100k 1M 10M Figure 32. LO Phase Noise vs. Offset Frequency, 3 dB Digital Backoff, 710 MHz LO 1.0 –45 –50 Tx INTEGRATED PHASE NOISE (Degrees) +110°C LOWER +40°C LOWER –40°C LOWER +110°C UPPER +40°C UPPER –40°C UPPER –55 –60 –65 –70 –75 –80 0 4 8 12 16 20 RF ATTENUATION (dB) Figure 30. Tx Adjacent Channel Leakage Ratio vs. RF Attenuation, 900 MHz LO, 20 MHz RF Bandwidth, Four-Carrier W-CDMA Desired Signal, Transmitter QEC and LO Leakage Tracking Active 0.9 +110°C +40°C –40°C 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 300 400 500 600 700 800 900 14651-333 –40 14651-330 Tx ADJACENT CHANNEL LEAKAGE RATIO (dBc) 10k OFFSET FREQUENCY (Hz) Figure 29. Transmitter Noise vs. RF Attenuation, 800 MHz LO, 20 MHz Offset Frequency 1000 TRANSMITTER LO FREQUENCY (MHz) Figure 33. Tx Integrated Phase Noise vs. Transmitter LO Frequency, 20 MHz RF Bandwidth, CW 20 MHz Offset from LO, 3 dB Digital Backoff –40 35 +110°C LOWER +40°C LOWER –40°C LOWER +110°C UPPER +40°C UPPER –40°C UPPER –50 30 TRANSMITTER OIP3 (dBm) –45 –55 –60 –65 –70 25 20 15 +110°C +40°C –40°C 10 5 –75 –80 0 4 8 12 RF ATTENUATION (dB) 16 20 0 14651-331 Tx ALTERNATE CHANNEL LEAKAGE RATIO (dBc) 1k 14651-332 –140 –170 Figure 31. Tx Alternate Channel Leakage Ratio vs. RF Attenuation, 900 MHz LO, 20 MHz RF Bandwidth, Four-Carrier W-CDMA Desired Signal, 2 dB Digital Backoff, Transmitter QEC and LO Leakage Tracking Active 0 2 4 6 8 10 12 14 RF ATTENUATION (dB) 16 18 20 14651-334 TRANSMITTER NOISE (dBm/Hz) –90 Figure 34. Transmitter OIP3 vs. RF Attenuation, 800 MHz LO, 20 MHz RF Bandwidth, f1 = 10 MHz, f2 = 11 MHz, 3 dB Digital Backoff, 122.88 MSPS Sample Rate Rev. A | Page 21 of 60 Data Sheet 0 0 –10 –10 –20 –20 TRANSMITTER HD2 (dBc) –30 –40 –50 –60 –70 –80 +110°C +40°C –40°C –30 –40 –50 –60 –70 –80 –90 –90 725 750 775 800 825 850 875 900 FREQUENCY (MHz) –100 14651-335 –100 700 0 5 10 15 20 25 Figure 35. Tx Output Power Spectrum, 2 dB Digital and 3 dB RF Backoff, 20 MHz RF Bandwidth, Transmitter QEC, and Internal LO Leakage Active, LTE 10 MHz Signal, 800 MHz LO, 1 MHz Resolution Bandwidth, 122.88 MSPS Sample Rate, Test Equipment Noise Floor De-Embedded Figure 38. Transmitter HD2 vs. RF Attenuation, 800 MHz LO, 810 MHz CW Desired Signal, 20 MHz RF Bandwidth, 122.88 MSPS Sample Rate 0 0 –10 –10 +110°C +40°C –40°C TRANSMITTER HD3 (dBc) –20 Tx OUTPUT (dBm) 30 RF ATTENUATION (dB) 14651-338 Tx OUTPUT (dBm) AD9371 –30 –40 –50 –60 –70 –20 –30 –40 –50 –60 –80 400 500 600 700 800 900 1000 1100 1200 1300 FREQUENCY (MHz) –80 14651-336 –100 300 0 10 15 20 RF ATTENUATION (dB) Figure 36. Tx Output Power Spectrum, 2 dB Digital and 3 dB RF Backoff, 20 MHz RF Bandwidth, Transmitter QEC, and Internal LO Leakage Active, LTE 10 MHz Signal, 800 MHz LO, 1 MHz Resolution Bandwidth, 122.88 MSPS Sample Rate, Test Equipment Noise Floor De-Embedded Figure 39. Transmitter HD3 vs. RF Attenuation, 800 MHz LO, 810 MHz CW Desired Signal, 20 MHz RF Bandwidth, 122.88 MSPS Sample Rate –20 +110°C +40°C –40°C –30 –35 –40 –50 0 4 8 12 RF ATTENUATION (dB) 16 20 Figure 37. Transmitter EVM vs. RF Attenuation, 900 MHz LO, Transmitter LO Leakage and Transmitter QEC Tracking Active, 20 MHz RF Bandwidth, LTE 20 MHz Downlink Signal, 122.88 MSPS Sample Rate 0 –5 –10 –15 –20 14651-337 –45 +110°C +40°C –40°C 5 0 5 10 RF ATTENUATION (dB) 15 20 14651-340 TRANSMITTER OUTPUT POWER (dBm) 10 –25 TRANSMITTER EVM (dB) 5 14651-339 –70 –90 Figure 40. Transmitter Output Power vs. RF Attenuation, 800 MHz LO, 810 MHz CW Desired Signal, 20 MHz RF Bandwidth, 122.88 MSPS Sample Rate Rev. A | Page 22 of 60 Data Sheet AD9371 0.10 0.06 0.04 0.02 0 –0.02 –0.04 –0.06 –0.10 0 5 10 15 20 25 30 RF ATTENUATION (dB) Figure 41. Tx Attenuation Step Error vs. RF Attenuation, 800 MHz LO, 810 MHz CW Desired Signal, 20 MHz RF Bandwidth, 122.88 MSPS Sample Rate 15 10 5 400 500 600 700 800 900 1000 OBSERVATION RECEIVER LO FREQUENCY (MHz) Figure 44. Observation Receiver Noise Figure vs. Observation Receiver LO Frequency, 0 dB Receiver Attenuation, 100 MHz RF Bandwidth, 122.88 MSPS Sample Rate, 100 MHz Integration Bandwidth 80 0.5 OBSERVATION RECEIVER IIP2 (dBm) 0.4 DEVIATION FROM FLATNESS (dB) 20 0 300 14651-341 –0.08 +110°C +40°C –40°C 25 14651-344 +110°C +40°C –40°C 0.08 Tx ATTENUATION STEP ERROR (dB) OBSERVATION RECEIVER NOISE FIGURE (dB) 30 0.3 0.2 0.1 0 –0.1 –0.2 –0.3 70 60 50 40 30 +110°C +40°C –40°C 20 10 –40 –30 –20 –10 0 10 20 30 40 50 FREQUENCY OFFSET FROM LO (MHz) Figure 42. Transmitter Frequency Response Deviation from Flatness vs. Frequency Offset from LO, 800 MHz LO, 20 MHz RF Bandwidth, 6 dB Digital Backoff, 122.88 MSPS Sample Rate 0 20 30 40 50 60 70 80 90 100 110 Figure 45. Observation Receiver IIP2 vs. f1 Offset Frequency, 900 MHz LO, 0 dB Attenuation, 100 MHz RF Bandwidth, f2 = f1 + 1 MHz, 122.88 MSPS Sample Rate 80 +110°C +40°C –40°C –50 –60 –70 –80 –90 400 500 600 700 800 900 OBSERVATION RECEIVER LO FREQUENCY (MHz) 1000 Figure 43. Observation Receiver LO Leakage vs. Observation Receiver LO Frequency, 0 dB Receiver Attenuation, 100 MHz RF Bandwidth, 122.88 MSPS Sample Rate 70 60 50 40 30 +110°C +40°C –40°C 20 10 0 0 10 15 20 25 30 35 40 45 50 INTERMODULATION FREQUENCY (MHz) 55 60 14651-346 OBSERVATION RECEIVER IIP2 (dBm) –40 –100 300 10 f1 OFFSET FREQUENCY (MHz) 14651-343 OBSERVATION RECEIVER LO LEAKAGE (dBm) 0 14651-342 –0.5 –50 14651-345 –0.4 Figure 46. Observation Receiver IIP2 vs. Intermodulation Frequency (f2 − f1), 900 MHz LO, 0 dB Attenuation, 100 MHz RF Bandwidth, 122.88 MSPS Sample Rate Rev. A | Page 23 of 60 Data Sheet 25 35 20 30 25 20 15 +110°C +40°C –40°C 10 5 0 0 10 20 30 40 50 60 70 80 90 100 110 f1 OFFSET FREQUENCY (MHz) Figure 47. Observation Receiver IIP3 vs. f1 Offset Frequency, 900 MHz LO, 0 dB Attenuation, 100 MHz RF Bandwidth, f2 = 2f1 + 1 MHz, 122.88 MSPS Sample Rate 5 0 +110°C +40°C –40°C –5 –10 0 3 6 9 12 15 18 OBSERVATION RECEIVER ATTENUATION (dB) Figure 50. Observation Receiver Gain vs. Observation Receiver Attenuation, 800 MHz LO, CW Signal 16 MHz Offset, 100 MHz RF Bandwidth, 122.88 MSPS Sample Rate 35 30 25 20 15 +110°C +40°C –40°C 10 5 0 5 10 15 20 25 30 35 40 45 50 55 60 INTERMODULATION FREQUENCY (MHz) –50 +110°C +40°C –40°C –60 –70 –80 –90 –100 –110 –120 0 3 6 9 12 15 18 OBSERVATION RECEIVER ATTENUATION (dB) Figure 48. Observation Receiver IIP3 vs. Intermodulation Frequency (2f2 − f1), 900 MHz LO, 0 dB Attenuation, 100 MHz RF Bandwidth, 122.88 MSPS Sample Rate 14651-351 OBSERVATION RECEIVER DC OFFSET (dBFS) –40 14651-348 Figure 51. Observation Receiver DC Offset vs. Observation Receiver Attenuation, 800 MHz LO, 100 MHz RF Bandwidth, 122.88 MSPS Sample Rate 0 0 OBSERVATION RECEIVER HD2 (dBc) +110°C +40°C –40°C –20 –40 –60 –80 –120 0 3 6 9 12 15 OBSERVATION RECEIVER ATTENUATION (dB) 18 Figure 49. Observation Receiver Image vs. Observation Receiver Attenuation, 800 MHz LO, CW Signal 16 MHz Offset, 100 MHz RF Bandwidth, BTC Active, 122.88 MSPS Sample Rate –40 –60 –80 –100 –120 14651-349 –100 +110°C +40°C –40°C –20 0 3 6 9 12 15 OBSERVATION RECEIVER ATTENUATION (dB) 18 14651-352 OBSERVATION RECEIVER IIP3 (dBm) 10 –15 40 OBSERVATION RECEIVER IMAGE (dBc) 15 14651-350 OBSERVATION RECEIVER GAIN (dB) 40 14651-347 OBSERVATION RECEIVER IIP3 (dBm) AD9371 Figure 52. Observation Receiver HD2 vs. Observation Receiver Attenuation, 800 MHz LO, CW Signal 16 MHz Offset, −20 dBm at 0 dB Attenuation, Input Power Increasing Decibel for Decibel with Attenuation, 100 MHz RF Bandwidth, 122.88 MSPS Sample Rate Rev. A | Page 24 of 60 Data Sheet AD9371 90 0 +110°C +40°C –40°C –20 80 SNIFFER RECEIVER IIP2 (dBm) –30 –40 –50 –60 –70 –80 50 40 30 +110°C +40°C –40°C 20 3 6 9 12 15 18 OBSERVATION RECEIVER ATTENUATION (dB) 0 Figure 53. Observation Receiver HD3 vs. Observation Receiver Attenuation, 800 MHz LO, CW Signal 16 MHz Offset, −20 dBm at 0 dB Attenuation, Input Power Increasing Decibel for Decibel with Attenuation, 100 MHz RF Bandwidth, 122.88 MSPS Sample Rate 3 6 9 12 15 INTERMODULATION FREQUENCY (MHz) 14651-356 0 14651-353 –100 Figure 56. Sniffer Receiver IIP2 vs. Intermodulation Frequency (f2 − f1), 600 MHz LO, 0 dB Attenuation, 20 MHz RF Bandwidth, 30.72 MSPS Sample Rate 20 –50 –60 –70 SNIFFER RECEIVER IIP3 (dBm) +110°C +40°C –40°C –80 –90 –100 –110 15 10 5 0 +110°C +40°C –40°C –5 –130 300 400 500 600 700 SNIFFER RECEIVER LO FREQUENCY (MHz) –10 Figure 54. Sniffer Receiver LO Leakage vs. Sniffer Receiver LO Frequency, 0 dB Receiver Attenuation, 20 MHz RF Bandwidth, 30.72 MSPS Sample Rate 3 9 12 15 Figure 57. Sniffer Receiver IIP3 vs. Intermodulation Frequency (f2 − 2f1), 600 MHz LO, 0 dB Attenuation, 20 MHz RF Bandwidth, 30.72 MSPS Sample Rate 0 30 –10 +110°C +40°C –40°C SNIFFER RECEIVER IMAGE (dBc) 25 6 INTERMODULATION FREQUENCY (MHz) 14651-357 –120 14651-354 SNIFFER RECEIVER LO LEAKAGE (dBm) 60 10 –90 20 15 10 5 +110°C +40°C –40°C –20 –30 –40 –50 –60 –70 –80 –90 0 300 400 500 600 SNIFFER RECEIVER LO FREQUENCY (MHz) 700 14651-355 SNIFFER RECEIVER NOISE FIGURE (dB) 70 Figure 55. Sniffer Receiver Noise Figure vs. Sniffer Receiver LO Frequency, 0 dB Receiver Attenuation, 20 MHz RF Bandwidth, 30.72 MSPS Sample Rate, 20 MHz Integration Bandwidth Rev. A | Page 25 of 60 –100 0 5 10 15 20 SNIFFER RECEIVER ATTENUATION (dB) Figure 58. Sniffer Receiver Image vs. Sniffer Receiver Attenuation, 600 MHz LO, CW Signal 3 MHz Offset, 20 MHz RF Bandwidth, 30.72 MSPS Sample Rate 14651-358 OBSERVATION RECEIVER HD3 (dBc) –10 AD9371 Data Sheet 0 +110°C +40°C –40°C –60 –70 –80 –90 –30 –40 5 10 15 20 SNIFFER RECEIVER ATTENUATION (dB) –60 –70 Figure 59. Sniffer Receiver DC Offset vs. Sniffer Receiver Attenuation, 600 MHz LO, CS Signal 3 MHz Offset, −35 dBm at 0 dB Attenuation, Input Power Increasing Decibel for Decibel with Attenuation, 20 MHz RF Bandwidth, 30.72 MSPS Sample Rate –65 –60 –55 –50 –45 –40 –35 –30 –25 SNIFFER RECEIVER INPUT POWER (dBm) 14651-362 0 Figure 62. Sniffer Receiver EVM vs. Sniffer Receiver Input Power, 600 MHz LO, 20 MHz RF Bandwidth, LTE 20 MHz Uplink Centered at DC, BTC Active, 30.72 MSPS Sample Rate 0 40 –10 +110°C +40°C –40°C –20 30 SNIFFER RECEIVER GAIN (dB) –30 –40 –50 –60 –70 –80 +110°C +40°C –40°C 20 10 0 –10 –20 –30 –100 0 5 10 15 20 SNIFFER RECEIVER ATTENUATION (dB) 14651-360 –90 Figure 60. Sniffer Receiver HD2 vs. Sniffer Receiver Attenuation, 600 MHz LO, CW Signal 3 MHz Offset, −35 dBm at 0 dB Attenuation, Input Power Increasing Decibel for Decibel with Attenuation, 20 MHz RF Bandwidth, 30.72 MSPS Sample Rate 0 –10 +110°C +40°C –40°C –20 –30 –40 –50 –60 –70 –80 0 5 10 15 SNIFFER RECEIVER ATTENUATION (dB) 20 14651-361 –90 –100 Figure 61. Sniffer Receiver HD3 vs. Sniffer Receiver Attenuation, 600 MHz LO, CW Signal 3 MHz Offset, −35 dBm at 0 dB Attenuation, Input Power Increasing Decibel for Decibel with Attenuation, 20 MHz RF Bandwidth, 30.72 MSPS Sample Rate Rev. A | Page 26 of 60 –40 0 4 8 12 16 20 24 28 32 36 40 44 48 52 SNIFFER RECEIVER ATTENUATION (dB) Figure 63. Sniffer Receiver Gain vs. Sniffer Receiver Attenuation, 600 MHz LO, CW Signal 3 MHz Offset, 20 MHz RF Bandwidth, 30.72 MSPS Sample Rate 14651-363 SNIFFER RECEIVER HD2 (dBc) –20 –50 –100 –110 SNIFFER RECEIVER HD3 (dBc) +110°C +40°C –40°C –10 SNIFFER RECEIVER EVM (dB) –50 14651-359 SNIFFER RECEIVER DC OFFSET (dBFS) –40 Data Sheet AD9371 2.6 GHz BAND 100 –30 90 80 RECEIVER IIP2 (dBm) –50 –60 –70 –80 +110°C +40°C –40°C –90 60 50 40 30 20 5 10 15 20 25 30 f1 OFFSET FREQUENCY (MHz) 14651-008 2900 RECEIVER LO FREQUENCY (MHz) +110°C +40°C –40°C 0 14651-005 2800 2700 2600 2500 2400 2300 2200 2100 0 2000 –110 1900 10 Figure 67. Receiver IIP2 vs. f1 Offset Frequency, 2600 MHz LO, 0 dB Attenuation, 40 MHz RF Bandwidth, f2 = f1 + 1 MHz, 122.88 MSPS Sample Rate Figure 64. Receiver Local Oscillator (LO) Leakage vs. Receiver LO Frequency, 0 dB Receiver Attenuation, 40 MHz RF Bandwidth, 122.88 MSPS Sample Rate 100 45 90 40 80 30 25 20 15 10 70 60 50 40 30 f2 – f1, +110°C f2 – f1, +40°C f2 – f1, –40°C f2 + f1, +110°C f2 + f1, +40°C f2 + f1, –40°C 20 +110°C +40°C –40°C 5 10 0 0 3 6 9 12 15 RECEIVER ATTENUATION (dB) 0 Figure 65. Receiver Noise Figure vs. Receiver Attenuation, 2600 MHz LO, 40 MHz Bandwidth, 122.88 MSPS Sample Rate, 20 MHz Integration Bandwidth (Includes 1.4 dB Matching Circuit Loss) 5 10 15 20 25 30 INTERMODULATION FREQUENCY (MHz) 14651-009 RECEIVER IIP2 (dBm) 35 14651-006 RECEIVER NOISE FIGURE (dB) 70 –100 1800 RECEIVER LO LEAKAGE (dBm) –40 Figure 68. Receiver IIP2 vs. Intermodulation Frequency, 2600 MHz LO, 0 dB Attenuation, 40 MHz RF Bandwidth, 122.88 MSPS Sample Rate 40 30 30 RECEIVER IIP3 (dBm) 20 15 +110°C +40°C –40°C 10 20 15 10 5 +110°C +40°C –40°C 5 2900 2800 0 14651-007 RECEIVER LO FREQUENCY (MHz) 2700 2600 2500 2400 2300 2200 2100 2000 1900 0 1800 0 25 Figure 66. Receiver Noise Figure vs. Receiver LO Frequency, 0 dB Receiver Attenuation, 40 MHz RF Bandwidth, 122.88 MSPS Sample Rate, 20 MHz Integration Bandwidth (Includes 1.4 dB Matching Circuit Loss) Rev. A | Page 27 of 60 5 10 15 20 25 30 f1 OFFSET FREQUENCY (MHz) Figure 69. Receiver IIP3 vs. f1 Offset Frequency, 2600 MHz LO, 0 dB Attenuation, 40 MHz RF Bandwidth, f2 = 2 f1 + 2 MHz, 122.88 MSPS Sample Rate 14651-010 RECEIVER NOISE FIGURE (dB) 35 25 AD9371 Data Sheet –40 35 –50 RECEIVER DC OFFSET (dBFS) 40 25 20 15 f2 – 2f1, +110°C f2 – 2f1, +40°C f2 – 2f1, –40°C f2 + 2f1, +110°C f2 + 2f1, +40°C f2 + 2f1, –40°C 5 10 15 20 25 30 INTERMODULATION FREQUENCY (MHz) Figure 70. Receiver IIP3 vs. Intermodulation Frequency, 2600 MHz LO, 0 dB Attenuation, 40 MHz RF Bandwidth, 122.88 MSPS Sample Rate –90 –100 0 5 10 15 20 25 30 RECEIVER ATTENUATION (dB) Figure 73. Receiver DC Offset vs. Receiver Attenuation, 2550 MHz LO, 40 MHz RF Bandwidth, 122.88 MSPS Sample Rate –40 +110°C +40°C –40°C +110°C +40°C –40°C –50 RECEIVER HD2 (dBc) –50 –60 –70 –80 –90 –60 –70 –80 –90 0 5 10 15 20 25 30 RECEIVER ATTENUATION (dB) –110 14651-012 –100 Figure 71. Receiver Image vs. Receiver Attenuation, 2600 MHz LO, Continuous Wave (CW) Signal 5 MHz Offset, 40 MHz RF Bandwidth, Background Tracking Calibration (BTC) Active, 122.88 MSPS Sample Rate 0 5 10 15 20 25 30 RECEIVER ATTENUATION (dB) 14651-015 –100 Figure 74. Receiver HD2 vs. Receiver Attenuation, 2600 MHz LO, CW Signal 5 MHz Offset, −20 dBm at 0 dB Attenuation, Input Power Increasing Decibel for Decibel with Attenuation, 40 MHz RF Bandwidth, 122.88 MSPS Sample Rate 25 –40 +110°C +40°C –40°C 20 +110°C +40°C –40°C –50 RECEIVER HD3 (dBc) 15 10 5 0 –5 –60 –70 –80 –90 –100 –10 0 5 10 15 20 RECEIVER ATTENUATION (dB) 25 30 –110 14651-013 –15 Figure 72. Receiver Gain vs. Receiver Attenuation, 2600 MHz LO, CW Signal 5 MHz Offset, 40 MHz RF Bandwidth, 122.88 MSPS Sample Rate 0 5 10 15 20 RECEIVER ATTENUATION (dB) 25 30 14651-016 RECEIVER IMAGE (dBc) –80 –120 –40 RECEIVER GAIN (dB) –70 –110 0 5 –60 14651-014 10 14651-011 RECEIVER IIP3 (dBm) 30 +110°C +40°C –40°C Figure 75. Receiver HD3 vs. Receiver Attenuation, 2600 MHz LO, CW Signal 5 MHz Offset, −20 dBm at 0 dB Attenuation, Input Power Increasing Decibel for Decibel with Attenuation, 40 MHz RF Bandwidth, 122.88 MSPS Sample Rate Rev. A | Page 28 of 60 Data Sheet AD9371 30 0 +110°C +40°C –40°C +110°C +40°C –40°C RECEIVER NOISE FIGURE (dB) –5 RECEIVER EVM (dB) –10 –15 –20 –25 –30 –35 25 20 15 10 5 0 RECEIVER INPUT POWER (dBm) Figure 76. Receiver Error Vector Magnitude (EVM) vs. Receiver Input Power, 2600 MHz LO, 40 MHz RF Bandwidth, LTE 20 MHz Uplink Centered at DC, BTC Active, 122.88 MSPS Sample Rate –10 –20 –20 TRANSMITTER IMAGE (dBc) –10 –40 –50 –60 –70 2900 5 10 15 20 RF ATTENUATION (dB) Figure 80. Transmitter Image vs. RF Attenuation, 40 MHz RF Bandwidth, 2600 MHz LO, Transmitter Quadrature Error Correction (QEC) Tracking Run with Two 20 MHz LTE Downlink Carriers, Then Image Measured with CW 10 MHz Offset from LO, 3 dB Digital Backoff, 245.76 MSPS Sample Rate Figure 77. Rx2 to Rx1 Crosstalk vs. Receiver LO Frequency, 40 MHz RF Bandwidth, CW Tone 3 MHz Offset from LO 0 30 +110°C +40°C –40°C –10 TRANSMITTER IMAGE (dBc) 25 20 15 10 +110°C +40°C –40°C –45 –40 –35 –30 –25 CLOSE-IN INTERFERER SIGNAL POWER (dBm) –20 –20 –30 –40 –50 –60 –70 –80 –90 –100 –20 Figure 78. Receiver Noise Figure vs. Close-In Interferer Signal Power, 2614 MHz LO, 2625 MHz CW Interferer, Noise Figure Integrated over 7 MHz to 10 MHz, 40 MHz RF Bandwidth –15 –10 –5 0 5 10 DESIRED OFFSET FREQUENCY (MHz) 15 20 14651-022 5 14651-019 RECEIVER NOISE FIGURE (dB) 0 +110°C +40°C –40°C 0 14651-018 2800 2700 2600 2500 2400 2300 –100 0 –50 –5 –70 –100 2200 –10 –60 –90 2100 –15 –50 –90 2000 –20 –40 –80 1900 –25 –30 –80 RECEIVER LO FREQUENCY (MHz) –30 Figure 79. Receiver Noise Figure vs. Out-of-Band Interferer Signal Power, 2614 MHz LO, 2435 MHz CW Interferer, Noise Figure Integrated over 7 MHz to 10 MHz 0 –30 –35 OUT-OF-BAND INTERFERER SIGNAL POWER (dBm) 0 1800 Rx2 TO Rx1 CROSSTALK (dB) 0 –40 14651-021 –5 14651-017 –45 –60 –55 –50 –45 –40 –35 –30 –25 –20 –15 –10 14651-020 –40 Figure 81. Transmitter Image vs. Desired Offset Frequency, 40 MHz RF Bandwidth, 2300 MHz LO, 0 dB RF Attenuation, Transmitter QEC Tracking Run with Two 20 MHz LTE Downlink Carriers, Then Image Measured with CW Signal, 3 dB Digital Backoff, 245.76 MSPS Sample Rate Rev. A | Page 29 of 60 Data Sheet 10 0 8 –10 6 –20 Tx1 TO Rx1 CROSSTALK (dB) 4 2 0 –2 –4 –6 –70 –80 2900 0 +110°C +40°C –40°C Tx2 TO Rx2 CROSSTALK (dB) –10 –70 –75 –80 –85 –90 –95 –20 –30 –40 –50 –60 –70 –80 2900 RECEIVER LO FREQUENCY (MHz) Figure 86. Tx2 to Rx2 Crosstalk vs. Receiver LO Frequency, 40 MHz Receiver RF Bandwidth, 40 MHz Transmitter RF Bandwidth, CW Signal 3 MHz Offset from LO Figure 83. Transmitter LO Leakage vs. RF Attenuation, 2300 MHz LO, External Transmitter QEC and LO Leakage Tracking Active, CW Signal 10 MHz Offset from LO, 6 dB Digital Backoff, 1 MHz Measurement Bandwidth (If Input Power to the ORx Channel Is Not Held Constant, Device Performance Degrades as Shown in This Figure) –60 –10 –80 –85 –90 –95 –30 –40 –50 –60 –70 –80 2900 TRANSMITTER LO FREQUENCY (MHz) Figure 84. Transmitter LO Leakage vs. Offset Frequency, External Transmitter QEC and LO Leakage Tracking Active, 6 dB Digital Backoff, 1 MHz Measurement Bandwidth Rev. A | Page 30 of 60 Figure 87. Tx2 to Tx1 Crosstalk vs. Transmitter LO Frequency, 40 MHz RF Bandwidth, CW Signal 3 MHz Offset from LO 14651-028 2800 2700 2600 30 2500 20 2400 10 2300 0 2200 –10 OFFSET FREQUENCY (MHz) 2100 –20 –100 2000 –90 14651-025 –100 –30 –20 1900 –75 +110°C +40°C –40°C +110°C +40°C –40°C +110°C +40°C –40°C 1800 –70 0 1.8GHz, 1.8GHz, 1.8GHz, 2.3GHz, 2.3GHz, 2.3GHz, 2.8GHz, 2.8GHz, 2.8GHz, Tx2 TO Tx1 CROSSTALK (dB) –65 14651-027 2800 2700 2600 2500 RF ATTENUATION (dB) –100 2400 20 2300 15 2200 10 2100 5 2000 0 1900 –90 –100 TRANSMITTER LO LEAKAGE (dBFS) 14651-026 2800 2700 2600 2500 2400 2300 2200 2100 2000 1900 2900 1800 RECEIVER LO FREQUENCY (MHz) Figure 85. Tx1 to Rx1 Crosstalk vs. Receiver LO Frequency, 40 MHz Receiver RF Bandwidth, 40 MHz Transmitter RF Bandwidth, CW Signal 3 MHz Offset from LO 14651-024 TRANSMITTER LO LEAKAGE (dBFS) –60 –90 FREQUENCY (MHz) –65 –50 –100 Figure 82. Tx Output Power, Transmitter QEC, and External LO Leakage Active, 5 MHz CW Offset Signal, 1 MHz Resolution Bandwidth, 245.76 MSPS Sample Rate –60 –40 14651-023 2700 2600 2500 2400 2300 2200 2100 2000 1900 1800 –8 –10 2800 +110°C +40°C –40°C –30 1800 Tx OUTPUT (dBm) AD9371 Data Sheet AD9371 –60 –80 +110°C +40°C –40°C –70 –100 –80 LO PHASE NOISE (dBc) –110 –120 –130 –140 –150 –90 –100 –110 –120 –130 –160 20 RF ATTENUATION (dB) –150 100 Tx INTEGRATED PHASE NOISE (Degrees) 16 20 RF ATTENUATION (dB) 0.2 +110°C +40°C –40°C 0.1 0 2900 12 0.3 TRANSMITTER LO FREQUENCY (MHz) Figure 92. Tx Integrated Phase Noise vs. Transmitter LO Frequency, 40 MHz RF Bandwidth, Continuous Wave 20 MHz Offset from LO, 3 dB Digital Backoff –40 35 +110°C UPPER +40°C UPPER –40°C UPPER +110°C LOWER +40°C LOWER –40°C LOWER –50 +110°C +40°C –40°C 30 TRANSMITTER OIP3 (dBm) –45 –55 –60 –65 –70 25 20 15 10 –80 0 4 8 12 RF ATTENUATION (dB) 16 20 0 Figure 90. Tx Alternate Channel Leakage Ratio vs. RF Attenuation, 2600 MHz LO, 40 MHz RF Bandwidth, Four-Carrier W-CDMA Desired Signal, 2 dB Digital Backoff, Transmitter QEC and LO Leakage Tracking Active 0 2 4 6 8 10 12 14 RF ATTENUATION (dB) 16 18 20 14651-034 5 –75 14651-031 Tx ALTERNATE CHANNEL LEAKAGE RATIO (dB) Figure 89. Tx Adjacent Channel Leakage Ratio vs. RF Attenuation, 2600 MHz LO, 40 MHz RF Bandwidth, Four-Carrier W-CDMA Desired Signal, Transmitter QEC and LO Leakage Tracking Active 14651-033 8 0.4 2800 –80 0.5 2700 –75 0.6 2600 –70 0.7 2500 –65 0.8 2400 –60 4 10M 0.9 1800 –55 0 1M 1.0 14651-030 Tx ADJACENT CHANNEL LEAKAGE RATIO (dB) –50 100k Figure 91. LO Phase Noise vs. Offset Frequency, 3 dB Digital Backoff, 2600 MHz +110°C UPPER +40°C UPPER –40°C UPPER +110°C LOWER +40°C LOWER –40°C LOWER –45 10k OFFSET FREQUENCY (Hz) Figure 88. Transmitter Noise vs. RF Attenuation, 2600 MHz LO, 10 MHz Offset Frequency –40 1k 2300 15 2200 10 2100 5 2000 0 14651-029 –180 14651-032 –140 –170 1900 TRANSMITTER NOISE (dBm/Hz) –90 Figure 93. Transmitter OIP3 vs. RF Attenuation, 2600 MHz LO, 40 MHz RF Bandwidth, f1 = 20 MHz, f2 = 21 MHz, 3 dB Digital Backoff, 245.76 MSPS Sample Rate Rev. A | Page 31 of 60 Data Sheet 0 0 –10 –10 –20 –20 TRANSMITTER HD2 (dBc) –30 –40 –50 –60 –70 +110°C +40°C –40°C –30 –40 –50 –60 –70 –80 –80 –90 –90 2525 2550 2575 2600 2625 2650 2675 2700 FREQUENCY (MHz) –100 14651-035 –100 2500 0 5 10 15 20 RF ATTENUATION (dB) Figure 94. Tx Output Power Spectrum, 2 dB Digital and 3 dB RF Backoff, 40 MHz RF Bandwidth, Transmitter QEC and Internal LO Leakage Active, LTE 10 MHz Signal, 2600 MHz LO, 1 MHz Resolution Bandwidth, 245.76 MSPS Sample Rate 14651-038 Tx OUTPUT (dBm) AD9371 Figure 97. Transmitter HD2 vs. RF Attenuation, 2600 MHz LO, 2605 MHz CW Desired Signal, 40 MHz RF Bandwidth, 245.76 MSPS Sample Rate 0 0 –10 +110°C +40°C –40°C –10 TRANSMITTER HD3 (dBc) Tx OUTPUT (dBm) –20 –30 –40 –50 –60 –70 –20 –30 –40 –50 –60 –80 –80 –30 –35 –40 8 12 RF ATTENUATION (dB) 16 20 Figure 96. Transmitter EVM vs. RF Attenuation, 2550 MHz LO, Transmitter LO Leakage and Transmitter QEC Tracking Active, 200 MHz RF Bandwidth, LTE 20 MHz Downlink Signal, 245.76 MSPS Sample Rate +110°C +40°C –40°C 5 0 –5 –10 –15 –20 14651-037 –45 4 20 Figure 98. Transmitter HD3 vs. RF Attenuation, 2600 MHz LO, 2605 MHz CW Desired Signal, 40 MHz RF Bandwidth, 245.76 MSPS Sample Rate TRANSMITTER OUTPUT POWER (dBm) TRANSMITTER EVM (dB) –25 0 15 10 +110°C +40°C –40°C –50 10 RF ATTENUATION (dB) Figure 95. Tx Output Power Spectrum, 2 dB Digital and 3 dB RF Backoff, 40 MHz RF Bandwidth, Transmitter QEC and Internal LO Leakage Active, LTE 10 MHz Signal, 2600 MHz LO, 1 MHz Resolution Bandwidth, 245.76 MSPS Sample Rate –20 5 0 5 10 RF ATTENUATION (dB) 15 20 14651-040 3100 FREQUENCY (MHz) 0 14651-036 3000 2900 2800 2750 2600 2500 2400 2300 2200 2100 –100 14651-039 –70 –90 Figure 99. Transmitter Output Power vs. RF Attenuation, 2600 MHz LO, 2605MHz CW Desired Signal, 40 MHz RF Bandwidth, 245.76 MSPS Sample Rate Rev. A | Page 32 of 60 Data Sheet AD9371 0.10 30 8 10 12 14 16 18 20 RF ATTENUATION (dB) 0 2900 6 OBSERVATION RECEIVER LO FREQUENCY (MHz) Figure 100. Tx Attenuation Step Error vs. RF Attenuation, 2600 MHz LO, 2610 MHz CW Desired Signal, 40 MHz RF Bandwidth, 245.76 MSPS Sample Rate Figure 103. Observation Receiver Noise Figure vs. Observation Receiver LO Frequency, 0 dB Receiver Attenuation, 200 MHz RF Bandwidth, 245.76 MSPS Sample Rate, 100 MHz Integration Bandwidth 0.5 80 0.3 0.2 0.1 0 –0.1 –0.2 –0.3 –0.4 –60 –40 –20 0 20 40 60 80 100 FREQUENCY OFFSET FROM LO (MHz) –55 –60 –65 –70 20 +110°C +40°C –40°C 10 10 20 30 40 50 60 70 80 90 100 110 f1 OFFSET FREQUENCY (MHz) Figure 104. Observation Receiver IIP2 vs. f1 Offset Frequency, 2600 MHz LO, 0 dB Attenuation, 200 MHz RF Bandwidth, f2 = f1 + 1 MHz, 245.76 MSPS Sample Rate 2900 70 60 50 40 30 20 +110°C +40°C –40°C 10 0 5 14651-043 2800 2700 2600 2500 2400 2300 2200 2100 2000 –75 1900 30 0 OBSERVATION RECEIVER IIP2 (dBm) –50 OBSERVATION RECEIVER LO FREQUENCY (MHz) 40 80 +110°C +40°C –40°C –45 50 0 –40 1800 OBSERVATION RECEIVER LO LEAKAGE (dBm) Figure 101. Transmitter Frequency Response Deviation from Flatness vs. Frequency Offset from LO, 2600 MHz LO, 100 MHz RF Bandwidth, 6 dB Digital Backoff, 245.76 MSPS Sample Rate 60 Figure 102. Observation Receiver LO Leakage vs. Observation Receiver LO Frequency, 0 dB Receiver Attenuation, 200 MHz RF Bandwidth, 245.76 MSPS Sample Rate 15 25 35 45 55 65 75 85 95 INTERMODULATION FREQUENCY (MHz) 105 115 14651-046 –80 14651-042 –0.5 –100 70 14651-045 OBSERVATION RECEIVER IIP2 (dBm) DEVIATION FROM FLATNESS (dB) 0.4 –80 14651-044 4 2800 2 +110°C +40°C –40°C 2700 0 5 2600 –0.10 14651-041 –0.08 2500 –0.06 10 2400 –0.04 2300 –0.02 15 2200 0 20 2100 0.02 2000 0.04 25 1900 0.06 1800 Tx ATTENUATION STEP ERROR (dB) 0.08 OBSERVATION RECEIVER NOISE FIGURE (dB) +110°C +40°C –40°C Figure 105. Observation Receiver IIP2 vs. Intermodulation Frequency (f2 − f1), 2600 MHz LO, 0 dB Attenuation, 200 MHz RF Bandwidth, 245.76 MSPS Sample Rate Rev. A | Page 33 of 60 AD9371 Data Sheet 25 25 20 15 10 5 0 10 20 30 40 50 60 70 80 90 100 110 f1 OFFSET FREQUENCY (MHz) Figure 106. Observation Receiver IIP3 vs. f1 Offset Frequency, 2600 MHz LO, 0 dB Attenuation, 200 MHz RF Bandwidth, f2 = 2f1 + 1 MHz, 245.76 MSPS Sample Rate 20 15 10 5 0 25 35 45 55 65 75 85 95 105 115 INTERMODULATION FREQUENCY (MHz) Figure 107. Observation Receiver IIP3 vs. Intermodulation Frequency (f2 − 2f1), 2600 MHz LO, 0 dB Attenuation, 200 MHz RF Bandwidth, 245.76 MSPS Sample Rate –60 –80 –100 –120 12 15 OBSERVATION RECEIVER ATTENUATION (dB) 12 15 18 18 +110°C +40°C –40°C –50 –60 –70 –80 –90 0 3 6 9 12 15 18 OBSERVATION RECEIVER ATTENUATION (dB) Figure 110. Observation Receiver DC Offset vs. Observation Receiver Attenuation, 2600 MHz LO, 200 MHz RF Bandwidth, 245.76 MSPS Sample Rate OBSERVATION RECEIVER HD2 (dBc) –40 9 9 –100 Figure 108. Observation Receiver Image vs. Observation Receiver Attenuation, 2600 MHz LO, CW Signal 25 MHz Offset, 200 MHz RF Bandwidth, BTC Active, 245.76 MSPS Sample Rate +110°C +40°C –40°C –20 –40 –60 –80 –100 –120 14651-049 OBSERVATION RECEIVER IMAGE (dBc) –20 6 6 0 +110°C +40°C –40°C 3 3 OBSERVATION RECEIVER ATTENUATION (dB) 0 0 –10 0 OBSERVATION RECEIVER DC OFFSET (dBFS) 25 15 –5 –40 30 5 0 Figure 109. Observation Receiver Gain vs. Observation Receiver Attenuation, 2600 MHz LO, CW Signal 25 MHz Offset, 200 MHz RF Bandwidth, 245.76 MSPS Sample Rate +110°C +40°C –40°C 35 5 –15 14651-048 OBSERVATION RECEIVER IIP3 (dBm) 40 10 14651-051 0 15 14651-050 30 +110°C +40°C –40°C 20 0 3 6 9 12 15 OBSERVATION RECEIVER ATTENUATION (dB) 18 14651-052 35 OBSERVATION RECEIVER GAIN (dB) +110°C +40°C –40°C 14651-047 OBSERVATION RECEIVER IIP3 (dBm) 40 Figure 111. Observation Receiver HD2 vs. Observation Receiver Attenuation, 2600 MHz LO, CW Signal 25 MHz Offset, −20 dBm at 0 dB Attenuation, Input Power Increasing Decibel for Decibel with Attenuation, 200 MHz RF Bandwidth, 245.76 MSPS Sample Rate Rev. A | Page 34 of 60 Data Sheet AD9371 90 +110°C +40°C –40°C SNIFFER RECEIVER IIP2 (dBm) –20 –40 –60 –80 60 50 40 30 20 3 6 9 12 15 18 OBSERVATION RECEIVER ATTENUATION (dB) Figure 112. Observation Receiver HD3 vs. Observation Receiver Attenuation, 2600 MHz LO, CW Signal 25 MHz Offset, −20 dBm at 0 dB Attenuation, Input Power Increasing Decibel for Decibel with Attenuation, 200 MHz RF Bandwidth, 245.76 MSPS Sample Rate –40 0 3 9 12 Figure 115. Sniffer Receiver IIP2 vs. Intermodulation Frequency (f2 − f1), 2600 MHz LO, 0 dB Attenuation, 20 MHz RF Bandwidth, 30.72 MSPS Sample Rate 20 +110°C +40°C –40°C +110°C +40°C –40°C SNIFFER RECEIVER IIP3 (dBm) –50 6 INTERMODULATION FREQUENCY (MHz) 14651-056 10 0 –60 –70 –80 –90 –100 15 10 5 0 –5 –120 2300 2400 2500 2600 2700 2800 SNIFFER RECEIVER LO FREQUENCY (MHz) –10 Figure 113. Sniffer Receiver LO Leakage vs. Sniffer Receiver LO Frequency, 0 dB Receiver Attenuation, 20 MHz RF Bandwidth, 30.72 MSPS Sample Rate 0 2 4 6 8 10 Figure 116. Sniffer Receiver IIP3 vs. Intermodulation Frequency (f2 − 2f1), 2600 MHz LO, 0 dB Attenuation, 20 MHz RF Bandwidth, 30.72 MSPS Sample Rate 0 30 +110°C +40°C –40°C +110°C +40°C –40°C –10 SNIFFER RECEIVER IMAGE (dBc) 25 20 15 10 5 12 INTERMODULATION FREQUENCY (MHz) 14651-057 –110 14651-054 –20 –30 –40 –50 –60 –70 –80 –90 2400 2500 2600 2700 SNIFFER RECEIVER LO FREQUENCY (MHz) 2800 –100 14651-055 0 2300 Figure 114. Sniffer Receiver Noise Figure vs. Sniffer Receiver LO Frequency, 0 dB Receiver Attenuation, 20 MHz RF Bandwidth, 30.72 MSPS Sample Rate, 20 MHz Integration Bandwidth 0 5 10 15 SNIFFER RECEIVER ATTENUATION (dB) 20 14651-058 SNIFFER RECEIVER LO LEAKAGE (dBm) 70 –100 –120 SNIFFER RECEIVER NOISE FIGURE (dB) +110°C +40°C –40°C 80 14651-053 OBSERVATION RECEIVER HD3 (dBc) 0 Figure 117. Sniffer Receiver Image vs. Sniffer Receiver Attenuation, 2600 MHz LO, CW Signal 1 MHz Offset, 20 MHz RF Bandwidth, 30.72 MSPS Sample Rate Rev. A | Page 35 of 60 AD9371 Data Sheet 0 +110°C +40°C –40°C –60 –70 –80 –90 –15 –20 –25 –30 –35 –40 5 10 15 20 SNIFFER RECEIVER ATTENUATION (dB) –50 –70 Figure 118. Sniffer Receiver DC Offset vs. Sniffer Receiver Attenuation, 2600 MHz LO, CW Signal 1 MHz Offset, −35 dBm at 0 dB Attenuation, Input Power Increasing Decibel for Decibel with Attenuation, 20 MHz RF Bandwidth, 30.72 MSPS Sample Rate –65 –60 –55 –50 –45 –40 –35 –30 Figure 121. Sniffer Receiver EVM vs. Sniffer Receiver Input Power, 2600 MHz LO, 20 MHz RF Bandwidth, LTE 20 MHz Uplink Centered at DC, BTC Active, 30.72 MSPS Sample Rate 0 40 +110°C +40°C –40°C –10 +110°C +40°C –40°C 30 SNIFFER RECEIVER GAIN (dB) –20 –30 –40 –50 –60 –70 –80 –25 SNIFFER RECEIVER INPUT POWER (dBm) 14651-062 –45 0 20 10 0 –10 –20 –30 –100 0 5 10 15 20 SNIFFER RECEIVER ATTENUATION (dB) 14651-060 –90 Figure 119. Sniffer Receiver HD2 vs. Sniffer Receiver Attenuation, 2600 MHz LO, CW Signal 1 MHz Offset, −35 dBm at 0 dB Attenuation, Input Power Increasing Decibel for Decibel with Attenuation, 20 MHz RF Bandwidth, 30.72 MSPS Sample Rate 0 +110°C +40°C –40°C –20 –40 –60 –80 –120 0 5 10 15 SNIFFER RECEIVER ATTENUATION (dB) 20 14651-061 –100 Figure 120. Sniffer Receiver HD3 vs. Sniffer Receiver Attenuation, 2600 MHz LO, CW Signal 1 MHz Offset, −35 dBm at 0 dB Attenuation, Input Power Increasing Decibel for Decibel with Attenuation, 20 MHz RF Bandwidth, 30.72 MSPS Sample Rate Rev. A | Page 36 of 60 –40 0 4 8 12 16 20 24 28 32 36 40 44 48 52 SNIFFER RECEIVER ATTENUATION (dB) Figure 122. Sniffer Receiver Gain vs. Sniffer Receiver Attenuation, 2600 MHz LO, CW Signal 1 MHz Offset, 20 MHz RF Bandwidth, 30.72 MSPS Sample Rate 14651-063 SNIFFER RECEIVER HD2 (dBc) –10 –100 –110 SNIFFER RECEIVER HD3 (dBc) +110°C +40°C –40°C –5 SNIFFER RECEIVER EVM (dB) –50 14651-059 SNIFFER RECEIVER DC OFFSET (dBFS) –40 Data Sheet AD9371 3.5 GHz BAND 90 –30 +110°C +40°C –40°C 80 –40 70 RECEIVER IIP2 (dBm) –45 –50 –55 –60 –65 30 3600 3700 3800 RECEIVER LO FREQUENCY (MHz) 0 5 10 15 20 25 30 35 40 100 +110°C +40°C –40°C 80 RECEIVER IIP2 (dBm) 35 25 20 15 60 50 40 30 20 5 10 0 14651-065 RECEIVER ATTENUATION (dB) Figure 124. Receiver Noise Figure vs. Receiver Attenuation, 3500 MHz LO, 100 MHz Bandwidth, 153.6 MSPS Sample Rate, 50 MHz Integration Bandwidth (Includes 1 dB Matching Circuit Loss) 60 70 10 0 55 f2 – f1, +110°C f2 – f1, +40°C f2 – f1, –40°C f2 + f1, +110°C f2 + f1, +40°C f2 + f1, –40°C 90 30 50 Figure 126. Receiver IIP2 vs. f1 Offset Frequency, 3500 MHz LO, 0 dB Attenuation, 100 MHz RF Bandwidth, f2 = f1 + 1 MHz, 153.6 MSPS Sample Rate 45 40 45 f1 OFFSET FREQUENCY (MHz) 14651-067 +110°C +40°C –40°C 5 10 15 20 25 30 35 40 45 50 55 60 INTERMODULATION FREQUENCY (MHz) 14651-068 3500 14651-064 3400 Figure 123. Receiver Local Oscillator (LO) Leakage vs. Receiver LO Frequency, 0 dB Receiver Attenuation, 100 MHz RF Bandwidth, 153.6 MSPS Sample Rate RECEIVER NOISE FIGURE (dB) 40 10 –75 Figure 127. Receiver IIP2 vs. Intermodulation Frequency, 3500 MHz LO, 0 dB Attenuation, 100 MHz RF Bandwidth, 153.6 MSPS Sample Rate 40 30 +110°C +40°C –40°C 25 +110°C +40°C –40°C 35 30 RECEIVER IIP3 (dBm) RECEIVER NOISE FIGURE (dB) 50 20 –70 –80 3300 60 20 15 10 25 20 15 10 5 5 3400 3500 3600 3700 RECEIVER LO FREQUENCY (MHz) 3800 14651-066 0 0 3300 Figure 125. Receiver Noise Figure vs. Receiver LO Frequency, 0 dB Receiver Attenuation, 100 MHz RF Bandwidth, 153.6 MSPS Sample Rate, 50 MHz Integration Bandwidth (Includes 1 dB Matching Circuit Loss) Rev. A | Page 37 of 60 5 10 15 20 25 30 35 40 45 50 55 60 f1 OFFSET FREQUENCY (MHz) Figure 128. Receiver IIP3 vs. f1 Offset Frequency, 3500 MHz LO, 0 dB Attenuation, 100 MHz RF Bandwidth, f2 = 2 f1 + 1 MHz, 153.6 MSPS Sample Rate 14651-069 RECEIVER LO LEAKAGE (dBm) –35 AD9371 Data Sheet 40 –40 f2 – f1, +110°C f2 – f1, +40°C f2 – f1, –40°C f2 + f1, +110°C f2 + f1, +40°C f2 + f1, –40°C 25 20 15 10 –80 –90 –100 15 20 25 30 35 40 45 50 55 INTERMODULATION FREQUENCY (MHz) 60 –120 Figure 129. Receiver IIP3 vs. Intermodulation Frequency, 3500 MHz LO, 0 dB Attenuation, 100 MHz RF Bandwidth, 153.6 MSPS Sample Rate 0 5 10 15 20 25 30 RECEIVER ATTENUATION (dB) 14651-073 10 Figure 132. Receiver DC Offset vs. Receiver Attenuation, 3500 MHz LO, 100 MHz RF Bandwidth, 153.6 MSPS Sample Rate –40 –40 +110°C +40°C –40°C –50 –50 RECEIVER HD2 (dBc) –60 –70 –80 –90 –60 –70 –80 –90 –100 –110 –110 14651-071 –100 RECEIVER ATTENUATION (dB) +110°C +40°C –40°C Figure 130. Receiver Image vs. Receiver Attenuation, 3500 MHz LO, Continuous Wave (CW) Signal 17 MHz Offset, 100 MHz RF Bandwidth, Background Tracking Calibration (BTC) Active, 153.6 MSPS Sample Rate 14651-074 5 14651-070 0 RECEIVER IMAGE (dBc) –70 –110 5 RECEIVER ATTENUATION (dB) Figure 133. Receiver HD2 vs. Receiver Attenuation, 3500 MHz LO, CW Signal 17 MHz Offset, −14 dBm at 0 dB Attenuation, Input Power Increasing Decibel for Decibel with Attenuation, 100 MHz RF Bandwidth, 153.6 MSPS Sample Rate 25 –40 +110°C +40°C –40°C 20 RECEIVER HD3 (dBc) 10 5 0 –5 –60 –70 –80 –90 –100 –15 –110 14651-072 –10 RECEIVER ATTENUATION (dB) +110°C +40°C –40°C –50 15 RECEIVER GAIN (dB) –60 Figure 131. Receiver Gain vs. Receiver Attenuation, 3500 MHz LO, CW Signal 17 MHz Offset, 100 MHz RF Bandwidth, De-Embedded to Receiver Port, 153.6 MSPS Sample Rate RECEIVER ATTENUATION (dB) 14651-075 RECEIVER IIP3 (dBm) 30 +110°C +40°C –40°C –50 RECEIVER DC OFFSET (dBFS) 35 Figure 134. Receiver HD3 vs. Receiver Attenuation, 3500 MHz LO, CW Signal 17 MHz Offset, −14 dBm at 0 dB Attenuation, Input Power Increasing Decibel for Decibel with Attenuation, 100 MHz RF Bandwidth, 153.6 MSPS Sample Rate Rev. A | Page 38 of 60 Data Sheet AD9371 30 0 +110°C +40°C –40°C 25 RECEIVER NOISE FIGURE (dB) –5 RECEIVER EVM (dB) –10 –15 –20 –25 –30 –35 +110°C +40°C –40°C 20 15 10 5 –5 0 RECEIVER INPUT POWER (dBm) 0 –30 14651-076 –45 –60 –55 –50 –45 –40 –35 –30 –25 –20 –15 –10 Figure 135. Receiver Error Vector Magnitude (EVM) vs. Receiver Input Power, 3600 MHz LO, 100 MHz RF Bandwidth, LTE 20 MHz Uplink Centered at DC, BTC Active, 153.6 MSPS Sample Rate –25 –20 –15 –10 –5 0 OUT-OF-BAND INTERFERER SIGNAL POWER (dBm) 14651-079 –40 Figure 138. Receiver Noise Figure vs. Out of Band Interferer Signal Power, 3614 MHz LO, 3665 MHz CW Interferer, Noise Figure Integrated over 7 MHz to 10 MHz 0 +110°C +40°C –40°C –20 TRANSMITTER IMAGE (dBc) Rx2 TO Rx1 CROSSTALK (dB) –10 –30 –40 –50 –60 –70 –80 3500 3600 3700 3800 RECEIVER LO FREQUENCY (MHz) Figure 136. Rx2 to Rx1 Crosstalk vs. Receiver LO Frequency, 100 MHz RF Bandwidth, CW Tone 3 MHz Offset from LO 14651-080 3400 14651-077 –90 –100 3300 RF ATTENUATION (dB) Figure 139. Transmitter Image vs. RF Attenuation, 100 MHz RF Bandwidth, 3550 MHz LO, Transmitter Quadrature Error Correction (QEC) Tracking Run with Two 20 MHz, LTE Downlink Carriers, Then Image Measured with CW 10 MHz Offset from LO, 6 dB Digital Backoff, 307.2 MSPS Sample Rate 30 26 TRANSMITTER IMAGE (dBc) RECEIVER NOISE FIGURE (dB) +110°C +40°C –40°C +110°C +40°C –40°C 28 24 22 20 18 16 14 –45 –40 –35 –30 –25 CLOSE-IN INTERFERER SIGNAL POWER (dBm) –20 Figure 137. Receiver Noise Figure vs. Close-In Interferer Signal Power, 3614 MHz LO, 3625 MHz CW Interferer, Noise Figure Integrated over 7 MHz to 10 MHz, 100 MHz RF Bandwidth –50 –40 –30 –20 –10 0 10 20 30 DESIRED OFFSET FREQUENCY (MHz) 40 50 14651-081 10 –50 14651-078 12 Figure 140. Transmitter Image vs. Desired Offset Frequency, 100 MHz RF Bandwidth, 3550 MHz LO, 0 dB RF Attenuation, Transmitter QEC Tracking Run with Two 20 MHz LTE Downlink Carriers, Then Image Measured with CW Signal, 6 dB Digital Backoff, 307.2 MSPS Sample Rate Rev. A | Page 39 of 60 Data Sheet 10 0 8 –10 6 –20 Tx1 TO Rx1 CROSSTALK (dB) 4 2 0 –2 –4 –6 +110°C +40°C –40°C 3500 3600 3700 –60 –70 –80 –90 3800 FREQUENCY (MHz) Figure 141. Tx Output Power, Transmitter QEC and External LO Leakage Active, 5 MHz CW Offset Signal, 1 MHz Resolution Bandwidth, 307.2 MSPS Sample Rate 3400 3500 3600 3700 3800 RECEIVER LO FREQUENCY (MHz) Figure 144. Tx1 to Rx1 Crosstalk vs. Receiver LO Frequency, 100 MHz Receiver RF Bandwidth, 100 MHz Transmitter RF Bandwidth, CW Signal 3 MHz Offset from LO –60 0 +110°C +40°C –40°C –10 Tx2 TO Rx2 CROSSTALK (dB) –65 –70 –75 –80 –85 –90 –95 –20 –30 –40 –50 –60 –70 –80 –90 –100 0 5 10 15 20 RF ATTENUATION (dB) –100 3300 14651-083 TRANSMITTER LO LEAKAGE (dBFS) –50 14651-085 3400 –40 –100 3300 14651-082 –8 –10 3300 –30 Figure 142. Transmitter LO Leakage vs. RF Attenuation, 3550 MHz LO, Transmitter QEC and External LO Leakage Tracking Active, CW Signal 10 MHz Offset from LO, 6 dB Digital Backoff, 1 MHz Measurement Bandwidth (If Input Power to ORx Channel Is Not Held Constant, Performance Degrades as Shown in This Plot) 3400 3500 3600 3700 3800 RECEIVER LO FREQUENCY (MHz) 14651-086 Tx OUTPUT (dBm) AD9371 Figure 145. Tx2 to Rx2 Crosstalk vs. Receiver LO Frequency, 100 MHz Receiver RF Bandwidth, 100 MHz Transmitter RF Bandwidth, CW Signal 3 MHz Offset from LO 0 –10 Tx2 TO Tx1 CROSSTALK (dB) TRANSMITTER LO LEAKAGE (dBFS) 3.3GHz, +110°C 3.3GHz, +40°C 3.3GHz, –40°C 3.55GHz, +110°C 3.55GHz, +40°C 3.55GHz, –40°C 3.8GHz, +110°C 3.8GHz, +40°C 3.8GHz, –40°C –20 –30 –40 –50 –60 –70 –80 –20 –10 0 10 20 OFFSET FREQUENCY (MHz) 30 Figure 143. Transmitter LO Leakage vs. Offset Frequency, Transmitter QEC and External LO Leakage Tracking Active, 6 dB Digital Backoff, 1 MHz Measurement Bandwidth 3400 3500 3600 3700 3800 TRANSMITTER LO FREQUENCY (MHz) Figure 146. Tx2 to Tx1 Crosstalk vs. Transmitter LO Frequency, 100 MHz RF Bandwidth, CW Signal 3 MHz Offset from LO Rev. A | Page 40 of 60 14651-087 –30 14651-084 –90 –100 3300 Data Sheet AD9371 –80 –90 –70 –100 –80 LO PHASE NOISE (dBc) –110 –120 –130 –140 –150 –110 –120 5 10 15 20 RF ATTENUATION (dB) –150 100 14651-088 0 Figure 147. Transmitter Noise vs. RF Attenuation, 3500 MHz LO, 100 MHz Offset Frequency, Zeros Input Data 1k 10k 100k OFFSET FREQUENCY (Hz) 10M 1M 14651-091 –140 –180 Figure 150. LO Phase Noise vs. Offset Frequency, 3 dB Digital Backoff, 3500 MHz LO –40 1.0 –50 –55 –60 –65 –70 –75 –80 0 5 10 15 20 RF ATTENUATION (dB) Figure 148. Tx Adjacent Channel Leakage Ratio vs. RF Attenuation, 3500 MHz LO, 100 MHz RF Bandwidth, Four-Carrier W-CDMA Desired Signal, 2 dB Digital Backoff, Transmitter QEC and LO Leakage Tracking Active +110°C +40°C –40°C 0.9 0.8 0.7 0.6 0.5 0.4 0.3 0.2 0.1 0 3300 3400 3500 3600 3800 3700 TRANSMITTER LO FREQUENCY (MHz) 14651-092 –45 Tx INTEGRATED PHASE NOISE (Degrees) +110°C UPPER +40°C UPPER –40°C UPPER +110°C LOWER +40°C LOWER –40°C LOWER 14651-089 Tx ADJACENT CHANNEL LEAKAGE RATIO (dB) –100 –130 –160 –170 Figure 151. Tx Integrated Phase Noise vs. Transmitter LO Frequency, 100 MHz RF Bandwidth, CW 20 MHz Offset from LO, 3 dB Digital Backoff –40 35 +110°C UPPER +40°C UPPER –40°C UPPER +110°C LOWER +40°C LOWER –40°C LOWER –50 +110°C +40°C –40°C 30 TRANSMITTER OIP3 (dBm) –45 –55 –60 –65 –70 25 20 15 10 5 –75 –80 0 5 10 RF ATTENUATION (dB) 15 20 0 14651-090 Tx ALTERNATE CHANNEL LEAKAGE RATIO (dB) –90 Figure 149. Tx Alternate Channel Leakage Ratio vs. RF Attenuation, 3500 MHz LO, 100 MHz RF Bandwidth, Four-Carrier W-CDMA Desired Signal, 2 dB Digital Backoff, Transmitter QEC and LO Leakage Tracking Active 0 2 4 6 8 10 12 14 RF ATTENUATION (dB) 16 18 20 14651-093 TRANSMITTER NOISE (dBm/Hz) –60 +110°C +40°C –40°C Figure 152. Transmitter OIP3 vs. RF Attenuation, 3500 MHz LO, 100 MHz RF Bandwidth, f1 = 20 MHz, f2 = 21 MHz, 3 dB Digital Backoff, 307.2 MSPS Sample Rate Rev. A | Page 41 of 60 Data Sheet 0 0 –10 –10 –20 –20 TRANSMITTER HD2 (dBc) –30 –40 –50 –60 –70 –80 +110°C +40°C –40°C –30 –40 –50 –60 –70 –80 –90 –90 3425 3450 3475 3500 3525 3550 3575 3600 FREQUENCY (MHz) –100 14651-094 –100 3400 0 5 10 15 20 RF ATTENUATION (dB) Figure 153. Tx Output Power Spectrum, 2 dB Digital and 3 dB RF Backoff, 100 MHz RF Bandwidth, Transmitter QEC and Internal LO Leakage Active, LTE 10 MHz Signal, 3500 MHz LO, 1 MHz Resolution Bandwidth, 307.2 MSPS Sample Rate 14651-097 Tx OUTPUT (dBm) AD9371 Figure 156. Transmitter HD2 vs. RF Attenuation, 3500 MHz LO, 3505 MHz CW Desired Signal, 100 MHz RF Bandwidth, 307.2 MSPS Sample Rate 0 0 –10 +110°C +40°C –40°C –10 TRANSMITTER HD3 (dBc) Tx OUTPUT (dBm) –20 –30 –40 –50 –60 –70 –20 –30 –40 –50 –60 –80 FREQUENCY (MHz) –80 14651-095 –100 3000 3100 3200 3300 3400 3500 3600 3700 3800 3900 4000 0 10 15 20 RF ATTENUATION (dB) Figure 154. Tx Output Power Spectrum, 2 dB Digital and 3 dB RF Backoff, 100 MHz RF Bandwidth, Transmitter QEC and Internal LO Leakage Active, LTE 10 MHz Signal, 3500 MHz LO, 1 MHz Resolution Bandwidth, 307.2 MSPS Sample Rate (Noise Floor Includes Test Equipment Response) Figure 157. Transmitter HD3 vs. RF Attenuation, 3500 MHz LO, 3505 MHz CW Desired Signal, 100 MHz RF Bandwidth, 307.2 MSPS Sample Rate 10 TRANSMITTER OUTPUT POWER (dBm) +110°C +40°C –40°C –25 –30 –35 –40 –50 0 5 10 RF ATTENUATION (dB) 15 20 Figure 155. Transmitter EVM vs. RF Attenuation, 3500 MHz LO, Transmitter LO Leakage, and Transmitter QEC Tracking Active, 100 MHz RF Bandwidth, LTE 20 MHz Downlink Signal, 307.2 MSPS Sample Rate 0 –5 –10 –15 –20 –25 14651-096 –45 +110°C +40°C –40°C 5 0 5 10 RF ATTENUATION (dB) 15 20 14651-099 –20 TRANSMITTER EVM (dB) 5 14651-098 –70 –90 Figure 158. Transmitter Output Power vs. RF Attenuation, 3500 MHz LO, 3505 MHz CW Desired Signal, 100 MHz RF Bandwidth, 2 dB Digital Backoff, 307.2 MSPS Sample Rate Rev. A | Page 42 of 60 Data Sheet AD9371 0.10 +110°C +40°C –40°C 30 0.04 0.02 0 –0.02 –0.04 –0.06 –0.10 2 4 6 8 10 12 14 16 20 18 RF ATTENUATION (dB) 20 15 10 5 +110°C +40°C –40°C 0 3300 3400 3500 3600 3800 3700 OBSERVATION RECEIVER LO FREQUENCY (MHz) Figure 159. Tx Attenuation Step Error vs. RF Attenuation, 3500 MHz LO, 3510 MHz CW Desired Signal, 100 MHz RF Bandwidth, De-Embedded to Transmitter Port, 307.2 MSPS Sample Rate Figure 162. Observation Receiver Noise Figure vs. Observation Receiver LO Frequency, 0 dB Receiver Attenuation, 240 MHz RF Bandwidth, 307.2 MSPS Sample Rate, 120 MHz Integration Bandwidth 80 OBSERVATION RECEIVER IIP2 (dBm) DEVIATION FROM FLATNESS (dB) 0.8 0.6 0.4 0.2 0 –0.2 –0.4 –0.6 –0.8 –80 –60 –40 –20 0 20 40 60 100 80 FREQUENCY OFFSET FROM LO (MHz) 40 30 20 +110°C +40°C –40°C 10 10 20 30 40 50 60 70 80 90 OBSERVATION RECEIVER IIP2 (dBm) –45 –50 –55 –60 –65 –70 –75 3400 3500 3600 3700 OBSERVATION RECEIVER LO FREQUENCY (MHz) 3800 Figure 161. Observation Receiver LO Leakage vs. Observation Receiver LO Frequency, 0 dB Receiver Attenuation, 240 MHz RF Bandwidth, 307.2 MSPS Sample Rate 110 Figure 163. Observation Receiver IIP2 vs. f1 Offset Frequency, 3600 MHz LO, 0 dB Attenuation, 240 MHz RF Bandwidth, f2 = f1 + 1 MHz, 307.2 MSPS Sample Rate 80 +110°C +40°C –40°C 100 f1 OFFSET FREQUENCY (MHz) –40 –80 3300 50 0 +110°C +40°C –40°C 70 60 50 40 30 20 10 0 14651-102 OBSERVATION RECEIVER LO LEAKAGE (dBm) Figure 160. Transmitter Frequency Response Deviation from Flatness vs. Frequency Offset from LO, 3500 MHz LO, 100 MHz RF Bandwidth, 6 dB Digital Backoff, 307.2 MSPS Sample Rate 60 0 14651-101 –1.0 –100 70 14651-104 1.0 5 15 25 35 45 55 65 75 85 95 INTERMODULATION FREQUENCY (MHz) 105 115 14651-105 0 14651-100 –0.08 25 14651-103 0.06 OBSERVATION RECEIVER NOISE FIGURE (dB) Tx ATTENUATION STEP ERROR (dB) 0.08 Figure 164. Observation Receiver IIP2 vs. Intermodulation Frequency (f2 − f1), 3500 MHz LO, 0 dB Attenuation, 240 MHz RF Bandwidth, 307.2 MSPS Sample Rate Rev. A | Page 43 of 60 AD9371 Data Sheet 25 25 20 15 10 5 0 10 20 30 40 50 60 70 80 90 100 110 f1 OFFSET FREQUENCY (MHz) Figure 165. Observation Receiver IIP3 vs. f1 Offset Frequency, 3600 MHz LO, 0 dB Attenuation, 240 MHz RF Bandwidth, f2 = 2f1 + 1 MHz, 307.2 MSPS Sample Rate 20 15 10 5 0 35 45 55 65 75 85 95 105 115 INTERMODULATION FREQUENCY (MHz) Figure 166. Observation Receiver IIP3 vs. Intermodulation Frequency (f2 − 2f1), 3500 MHz LO, 0 dB Attenuation, 240 MHz RF Bandwidth, 307.2 MSPS Sample Rate –40 –50 –60 –70 –80 –90 –100 9 12 15 OBSERVATION RECEIVER ATTENUATION (dB) 12 15 18 +110°C +40°C –40°C –50 –60 –70 –80 –90 –100 0 3 6 9 12 18 15 OBSERVATION RECEIVER ATTENUATION (dB) Figure 169. Observation Receiver DC Offset vs. Observation Receiver Attenuation, 3500 MHz LO, 240 MHz RF Bandwidth, 307.2 MSPS Sample Rate OBSERVATION RECEIVER HD2 (dBc) –30 6 9 –110 18 Figure 167. Observation Receiver Image vs. Observation Receiver Attenuation, 3500 MHz LO, CW Signal 25 MHz Offset, 240 MHz RF Bandwidth, BTC Active, 307.2 MSPS Sample Rate +110°C +40°C –40°C –20 –40 –60 –80 –100 –120 14651-108 OBSERVATION RECEIVER IMAGE (dBc) –20 3 6 0 +110°C +40°C –40°C 0 3 Figure 168. Observation Receiver Gain vs. Observation Receiver Attenuation, 3500 MHz LO, CW Signal 25 MHz Offset, 240 MHz RF Bandwidth, De-Embedded to Receiver Port, 307.2 MSPS Sample Rate 0 –10 –10 OBSERVATION RECEIVER ATTENUATION (dB) OBSERVATION RECEIVER DC OFFSET (dBFS) 25 25 –5 0 14651-107 OBSERVATION RECEIVER IIP3 (dBm) 30 15 0 –40 +110°C +40°C –40°C 5 5 –15 40 35 10 14651-110 0 15 14651-109 30 +110°C +40°C –40°C 20 0 3 6 9 12 15 OBSERVATION RECEIVER ATTENUATION (dB) 18 14651-111 35 OBSERVATION RECEIVER GAIN (dB) +110°C +40°C –40°C 14651-106 OBSERVATION RECEIVER IIP3 (dBm) 40 Figure 170. Observation Receiver HD2 vs. Observation Receiver Attenuation, 3500 MHz LO, CW Signal 25 MHz Offset, −20 dBm at 0 dB Attenuation, Input Power Increasing Decibel for Decibel with Attenuation, 240 MHz RF Bandwidth, 307.2 MSPS Sample Rate Rev. A | Page 44 of 60 Data Sheet AD9371 0 90 +110°C +40°C –40°C –20 –30 –40 –50 –60 –70 –80 60 50 40 30 20 3 6 9 12 18 15 OBSERVATION RECEIVER ATTENUATION (dB) 0 Figure 171. Observation Receiver HD3 vs. Observation Receiver Attenuation, 3500 MHz LO, CW Signal 25 MHz Offset, −20 dBm at 0 dB Attenuation, Input Power Increasing Decibel for Decibel with Attenuation, 240 MHz RF Bandwidth, 307.2 MSPS Sample Rate 2 6 10 18 14 INTERMODULATION FREQUENCY (MHz) 14651-115 0 14651-112 –100 Figure 174. Sniffer Receiver IIP2 vs. Intermodulation Frequency (f2 − f1), 3500 MHz LO, 0 dB Attenuation, 20 MHz RF Bandwidth, 38.4 MSPS Sample Rate 20 –40 +110°C +40°C –40°C SNIFFER RECEIVER IIP3 (dBm) –50 –60 –70 –80 –90 –100 +110°C +40°C –40°C 15 10 5 0 –5 3400 3500 3600 3700 3800 SNIFFER RECEIVER LO FREQUENCY (MHz) –10 Figure 172. Sniffer Receiver LO Leakage vs. Sniffer Receiver LO Frequency, 0 dB Receiver Attenuation, 20 MHz RF Bandwidth, 38.4 MSPS Sample Rate 0 4 6 8 12 10 INTERMODULATION FREQUENCY (MHz) Figure 175. Sniffer Receiver IIP3 vs. Intermodulation Frequency (f2 − 2f1), 3500 MHz LO, 0 dB Attenuation, 20 MHz RF Bandwidth, 38.4 MSPS Sample Rate 0 20 +110°C +40°C –40°C +110°C +40°C –40°C –10 SNIFFER RECEIVER IMAGE (dBc) 18 16 14 12 10 8 6 4 –20 –30 –40 –50 –60 –70 –80 –90 3400 3500 3600 3700 SNIFFER RECEIVER LO FREQUENCY (MHz) 3800 14651-114 2 0 3300 2 Figure 173. Sniffer Receiver Noise Figure vs. Sniffer Receiver LO Frequency, 0 dB Receiver Attenuation, 20 MHz RF Bandwidth, 38.4 MSPS Sample Rate, 10 MHz Integration Bandwidth Rev. A | Page 45 of 60 –100 0 5 10 15 20 25 30 35 40 45 50 SNIFFER RECEIVER ATTENUATION (dB) Figure 176. Sniffer Receiver Image vs. Sniffer Receiver Attenuation, 3500 MHz LO, CW Signal 5 MHz Offset, 20 MHz RF Bandwidth, 38.4 MSPS Sample Rate 14651-117 –120 3300 14651-116 –110 14651-113 SNIFFER RECEIVER LO LEAKAGE (dBm) 70 10 –90 SNIFFER RECEIVER NOISE FIGURE (dB) +110°C +40°C –40°C 80 SNIFFER RECEIVER IIP2 (dBm) OBSERVATION RECEIVER HD3 (dBc) –10 AD9371 Data Sheet 0 +110°C +40°C –40°C –60 –70 –80 –90 –100 –10 –15 –20 –25 –30 –35 0 5 10 15 20 SNIFFER RECEIVER ATTENUATION (dB) –45 –70 Figure 177. Sniffer Receiver DC Offset vs. Sniffer Receiver Attenuation, 3500 MHz LO, CW Signal 5 MHz Offset, −35 dBm at 0 dB Attenuation, Input Power Increasing Decibel for Decibel with Attenuation, 20 MHz RF Bandwidth, 38.4 MSPS Sample Rate –65 –60 –55 –50 –45 –40 –35 –30 SNIFFER RECEIVER INPUT POWER (dBm) 14651-121 –40 –110 Figure 180. Sniffer Receiver EVM vs. Sniffer Receiver Input Power, 3600 MHz LO, 20 MHz RF Bandwidth, LTE 20 MHz Uplink Centered at DC, BTC Active, 38.4 MSPS Sample Rate 0 35 +110°C +40°C –40°C –10 +110°C +40°C –40°C 25 –20 SNIFFER RECEIVER GAIN (dB) SNIFFER RECEIVER HD2 (dBc) +110°C +40°C –40°C –5 SNIFFER RECEIVER EVM (dB) –50 14651-118 SNIFFER RECEIVER DC OFFSET (dBFS) –40 –30 –40 –50 –60 –70 –80 15 5 –5 –15 –25 0 5 10 15 20 SNIFFER RECEIVER ATTENUATION (dB) Figure 178. Sniffer Receiver HD2 vs. Sniffer Receiver Attenuation, 3500 MHz LO, CW Signal 5 MHz Offset, −35 dBm at 0 dB Attenuation, Input Power Increasing Decibel for Decibel with Attenuation, 20 MHz RF Bandwidth, 38.4 MSPS Sample Rate 0 +110°C +40°C –40°C –20 –30 –40 –50 –60 –70 –80 –90 –100 0 5 10 15 20 SNIFFER RECEIVER ATTENUATION (dB) 14651-120 SNIFFER RECEIVER HD3 (dBc) –10 Figure 179. Sniffer Receiver HD3 vs. Sniffer Receiver Attenuation, 3500 MHz LO, CW Signal 5 MHz Offset, −35 dBm at 0 dB Attenuation, Input Power Increasing Decibel for Decibel with Attenuation, 20 MHz RF Bandwidth, 38.4 MSPS Sample Rate Rev. A | Page 46 of 60 –35 0 5 10 15 20 25 30 35 40 45 50 55 SNIFFER RECEIVER ATTENUATION (dB) Figure 181. Sniffer Receiver Gain vs. Sniffer Receiver Attenuation, 3600 MHz LO, CW Signal 5 MHz Offset, 20 MHz RF Bandwidth, De-Embedded to Receiver Port, 38.4 MSPS Sample Rate 14651-122 –100 14651-119 –90 Data Sheet AD9371 5.5 GHz BAND 100 –30 80 –50 RECEIVER IIP2 (dBm) –60 –70 –80 60 50 40 30 20 –90 5500 5600 5700 5800 5900 RECEIVER LO FREQUENCY (MHz) 0 14651-223 5400 0 10 20 30 40 50 Figure 185. Receiver IIP2 vs. f1 Offset Frequency, 5600 MHz LO, 0 dB Attenuation, 100 MHz RF Bandwidth, f2 = f1 + 1 MHz, 122.88 MSPS Sample Rate Figure 182. Receiver Local Oscillator (LO) Leakage vs. Receiver LO Frequency, 0 dB Receiver Attenuation, 100 MHz RF Bandwidth, 122.88 MSPS Sample Rate 100 45 90 +110°C +40°C –40°C 80 RECEIVER IIP2 (dBm) 35 30 25 20 15 70 60 50 30 10 20 5 10 3 0 6 9 12 15 RECEIVER ATTENUATION (dB) 0 15 14651-224 0 Figure 183. Receiver Noise Figure vs. Receiver Attenuation, 5600 MHz LO, 100 MHz Bandwidth, 122.88 MSPS Sample Rate, 50 MHz Integration Bandwidth (Includes 1.2 dB Matching Circuit Loss) f2 + f1, +110°C f2 + f1, +40°C f2 + f1, –40°C f2 – f1, +110°C f2 – f1, +40°C f2 – f1, –40°C 40 20 25 30 35 45 40 INTERMODULATION FREQUENCY (MHz) 14651-226 40 Figure 186. Receiver IIP2 vs. Intermodulation Frequency, 5600 MHz LO, 0 dB Attenuation, 100 MHz RF Bandwidth, 122.88 MSPS Sample Rate 40 30 +110°C +40°C –40°C 35 25 30 RECEIVER IIP3 (dBm) RECEIVER NOISE FIGURE (dB) 60 f1 OFFSET FREQUENCY (MHz) 14651-185 10 –100 5300 RECEIVER NOISE FIGURE (dB) 70 20 15 10 +110°C +40°C –40°C 20 15 10 5 5 0 5400 5500 5600 5700 RECEIVER LO FREQUENCY (MHz) 5800 5900 14651-225 0 5300 25 Figure 184. Receiver Noise Figure vs. Receiver LO Frequency, 0 dB Receiver Attenuation, 100 MHz RF Bandwidth, 122.88 MSPS Sample Rate, 50 MHz Integration Bandwidth (Includes 1.2 dB Matching Circuit Loss) 0 10 20 30 40 f1 OFFSET FREQUENCY (MHz) 50 60 14651-187 RECEIVER LO LEAKAGE (dBm) –40 +110°C +40°C –40°C 90 +110°C +40°C –40°C Figure 187. Receiver IIP3 vs. f1 Offset Frequency, 5600 MHz LO, 0 dB Attenuation, 100 MHz RF Bandwidth, f2 = 2 f1 + 2 MHz, 122.88 MSPS Sample Rate Rev. A | Page 47 of 60 AD9371 Data Sheet –40 35 –50 RECEIVER DC OFFSET (dBFS) 40 25 20 15 +110°C +40°C –40°C 10 –80 –90 25 30 35 INTERMODULATION FREQUENCY (MHz) –110 Figure 188. Receiver IIP3 vs. Intermodulation Frequency, 5600 MHz LO, 0 dB Attenuation, 100 MHz RF Bandwidth, 122.88 MSPS Sample Rate 0 5 10 15 20 25 30 RECEIVER ATTENUATION (dB) 14651-230 20 15 14651-227 0 10 Figure 191. Receiver DC Offset vs. Receiver Attenuation, 5850 MHz LO, 100 MHz RF Bandwidth, 122.88 MSPS Sample Rate –40 –40 –50 +110°C +40°C –40°C RECEIVER HD2 (dBc) –50 –60 –70 –80 –90 +110°C +40°C –40°C –60 –70 –80 –90 –100 0 5 10 15 20 25 30 RECEIVER ATTENUATION (dB) –110 14651-228 –100 0 –40 15 –50 RECEIVER HD3 (dBc) 10 –5 +110°C +40°C –40°C –10 15 20 25 30 Figure 192. Receiver HD2 vs. Receiver Attenuation, 5600 MHz LO, CW Signal 10 MHz Offset, −20 dBm at 0 dB Attenuation, Input Power Increasing Decibel for Decibel with Attenuation, 100 MHz RF Bandwidth, 122.88 MSPS Sample Rate 20 0 10 RECEIVER ATTENUATION (dB) Figure 189. Receiver Image vs. Receiver Attenuation, 5600 MHz LO, Continuous Wave (CW) Signal 10 MHz Offset, 100 MHz RF Bandwidth, Background Tracking Calibration (BTC) Active, 122.88 MSPS Sample Rate 5 5 14651-231 RECEIVER IMAGE (dBc) –70 –100 5 RECEIVER GAIN (dB) +110°C +40°C –40°C –60 –60 –70 –80 +110°C +40°C –40°C –90 –100 –15 0 5 10 15 20 RECEIVER ATTENUATION (dB) 25 30 –110 14651-229 –20 Figure 190. Receiver Gain vs. Receiver Attenuation, 5600 MHz LO, CW Signal 10 MHz Offset, 100 MHz RF Bandwidth, 122.88 MSPS Sample Rate 0 5 10 15 20 RECEIVER ATTENUATION (dB) 25 30 14651-232 RECEIVER IIP3 (dBm) 30 Figure 193. Receiver HD3 vs. Receiver Attenuation, 5600 MHz LO, CW Signal 10 MHz Offset, −20 dBm at 0 dB Attenuation, Input Power Increasing Decibel for Decibel with Attenuation,100 MHz RF Bandwidth, 122.88 MSPS Sample Rate Rev. A | Page 48 of 60 Data Sheet AD9371 0 0 –5 TRANSMITTER IMAGE (dBc) –10 –15 –20 –25 –30 –35 –40 –30 –40 –50 –60 –70 –80 –50 –45 –40 –35 –30 –25 –20 –15 –10 0 –5 0 10 20 15 RF ATTENUATION (dB) Figure 194. Receiver Error Vector Magnitude (EVM) vs. Receiver Input Power, 5600 MHz LO, 100 MHz RF Bandwidth LTE, 20 MHz Uplink Centered at DC, BTC Active, 122.88 MSPS Sample Rate Figure 197. Transmitter Image vs. RF Attenuation, 75 MHz RF Bandwidth, 5600 MHz LO, 0 dB RF Attenuation, Transmitter Quadrature Error Correction (QEC) Tracking Run with Two 20 MHz LTE Downlink Carriers, Then Image Measured with CW 10 MHz Offset from LO, 3 dB Digital Backoff, 245.76 MSPS Sample Rate 0 –10 –10 –20 –20 TRANSMITTER IMAGE (dBc) 0 –30 –40 –50 –60 –70 –80 –90 +110°C +40°C –40°C –30 –40 –50 –60 –70 –80 –90 5400 5500 5600 5700 5800 5900 RECEIVER LO FREQUENCY (MHz) –100 –40 14651-234 –100 5300 5 14651-236 –90 RECEIVER INPUT POWER (dBm) Rx2 TO Rx1 CROSSTALK (dB) –20 –100 14651-233 –45 –55 +110°C +40°C –40°C Figure 195. Rx2 to Rx1 Crosstalk vs. Receiver LO Frequency, 100 MHz RF Bandwidth, CW Tone 3 MHz Offset from LO –30 –20 –10 0 10 20 30 40 DESIRED OFFSET FREQUENCY (MHz) 14651-237 RECEIVER EVM (dB) –10 +110°C +40°C –40°C Figure 198. Transmitter Image vs. Desired Offset Frequency, 75 MHz RF Bandwidth, 5600 MHz LO, 0 dB RF Attenuation, Transmitter QEC Tracking Run with Two 20 MHz LTE Downlink Carriers, Then Image Measured with CW Signal, 3 dB Digital Backoff, 245.76 MSPS Sample Rate 30 10 6 20 Tx OUTPUT (dBm) RECEIVER NOISE FIGURE (dB) 8 25 15 +110°C +40°C –40°C 10 4 2 0 –2 +110°C +40°C –40°C –4 –6 5 –30 –25 –20 –15 –10 –5 0 14651-235 –35 OUT-OF-BAND INTERFERER SIGNAL POWER (dBm) –10 5300 Figure 196. Receiver Noise Figure vs. Out-of-Band Interferer Signal Power, 5400 MHz LO, 5600 MHz CW Interferer, NF Integrated over 7 MHz to 10 MHz 5400 5500 5600 5700 RECEIVER LO FREQUENCY (MHz) 5800 5900 14651-238 –8 0 –40 Figure 199. Tx Output Power, Transmitter QEC, and External LO Leakage Active, 5 MHz CW Offset Signal, 1 MHz Resolution Bandwidth, 245.76 MSPS Sample Rate Rev. A | Page 49 of 60 AD9371 Data Sheet 0 –40 Tx2 TO Rx2 CROSSTALK (dB) TRANSMITTER LO LEAKAGE (dBFS) –10 –50 –60 –70 +110°C +40°C –40°C –80 –90 –20 –30 –40 –50 –60 –70 –80 5 10 20 15 RF ATTENUATION (dB) 14651-239 0 –100 5300 Figure 200. Transmitter LO Leakage vs. RF Attenuation, 5600 MHz LO, External Transmitter QEC, and LO Leakage Tracking Active, CW Signal 10 MHz Offset from LO, 6 dB Digital Backoff, 1 MHz Measurement Bandwidth Tx2 TO Tx1 CROSSTALK (dB) 5900 –30 +110°C +40°C –40°C +110°C +40°C –40°C –20 –10 5.3GHz, +110°C 5.3GHz, +40°C 5.3GHz, –40°C –30 –40 –50 –60 –70 –80 –90 –100 0 10 20 30 40 –110 5300 5400 5500 5600 5700 5800 5900 TRANSMITTER LO FREQUENCY (MHz) Figure 204. Tx2 to Tx1 Crosstalk vs. Transmitter LO Frequency, 75 MHz RF Bandwidth, CW Signal 3 MHz Offset from LO 0 –80 –10 –90 TRANSMITTER NOISE (dBm/Hz) Figure 201. Transmitter LO Leakage vs. Offset Frequency, External Transmitter QEC and LO Leakage Tracking Active, 6 dB Digital Backoff, 1 MHz Measurement Bandwidth –20 –30 –40 –50 –60 –70 –80 –90 +110°C +40°C –40°C –100 –110 –120 –130 –140 –150 –160 5400 5500 5600 5700 RECEIVER LO FREQUENCY (MHz) 5800 5900 Figure 202. Tx1 to Rx1 Crosstalk vs. Receiver LO Frequency, 100 MHz Receiver RF Bandwidth, 75 MHz Transmitter RF Bandwidth, CW Signal 3 MHz Offset from LO Rev. A | Page 50 of 60 –180 0 5 10 15 20 RF ATTENUATION (dB) Figure 205. Transmitter Noise vs. RF Attenuation, 5600 MHz LO, 1 MHz Offset Frequency 14651-244 –170 14651-241 –100 5300 14651-243 5.9GHz, 5.9GHz, 5.9GHz, 5.6GHz, 5.6GHz, 5.6GHz, 14651-240 TRANSMITTER LO LEAKAGE (dBFS) –80 OFFSET FREQUENCY (MHz) Tx1 TO Rx1 CROSSTALK (dB) 5800 –20 –75 –100 –40 5700 –10 –70 –95 5600 Figure 203. Tx2 to Rx2 Crosstalk vs. Receiver LO Frequency, 100 MHz Receiver RF Bandwidth, 75 MHz Transmitter RF Bandwidth, CW Signal 3 MHz Offset from LO –65 –90 5500 RECEIVER LO FREQUENCY (MHz) –60 –85 5400 14651-242 –90 –100 AD9371 –40 –45 –50 –55 –60 –65 +110°C LOWER +40°C LOWER –40°C LOWER +110°C UPPER +40°C UPPER –40°C UPPER –70 –75 –80 5 0 10 15 20 RF ATTENUATION (dB) 0.7 0.6 0.5 0.4 +110°C +40°C –40°C 0.3 0.2 0.1 5400 5500 5600 5700 5800 5900 TRANSMITTER LO FREQUENCY (MHz) Figure 209. Tx Integrated Phase Noise vs. Transmitter LO Frequency, 75 MHz RF Bandwidth, CW 10 MHz Offset from LO, 3 dB Digital Backoff –40 30 –45 +110°C +40°C –40°C TRANSMITTER OIP3 (dBm) 25 –50 –55 –60 +110°C LOWER +40°C LOWER –40°C LOWER +110°C UPPER +40°C UPPER –40°C UPPER –70 –75 10 15 15 10 5 –80 5 20 20 RF ATTENUATION (dB) 0 Figure 207. Tx Alternate Channel Leakage Ratio vs. RF Attenuation, 5600 MHz LO, 75 MHz RF Bandwidth, Four-Carrier W-CDMA Desired Signal, 2 dB Digital Backoff, Transmitter QEC and LO Leakage Tracking Active 0 10 20 15 RF ATTENUATION (dB) Figure 210. Transmitter OIP3 vs. RF Attenuation, 5600 MHz LO, 75 MHz RF Bandwidth, f1 = 20 MHz, f2 = 21 MHz, 3 dB Digital Backoff, 245.76 MSPS Sample Rate –60 0 –70 –10 –20 Tx OUTPUT (dBm) –80 –90 –100 –110 –120 –30 –40 –50 –60 –70 –130 –80 –140 1k 10k 100k 1M 10M –100 5750 OFFSET FREQUENCY (Hz) Figure 208. LO Phase Noise vs. Offset Frequency, 3 dB Digital Backoff, 5850 MHz LO 5775 5800 5825 5850 5875 FREQUENCY (MHz) 5900 5925 5950 14651-250 –90 14651-247 –150 100 5 14651-249 –65 0 LO PHASE NOISE (dBc) 0.8 0 5300 14651-246 Tx ALTERNATE CHANNEL LEAKAGE RATIO (dB) Figure 206. Tx Adjacent Channel Leakage Ratio vs. RF Attenuation, 5600 MHz LO, 75 MHz RF Bandwidth, Four-Carrier W-CDMA Desired Signal, Transmitter QEC and LO Leakage Tracking Active 0.9 14651-248 Tx INTEGRATED PHASE NOISE (Degrees) 1.0 14651-245 Tx ADJACENT CHANNEL LEAKAGE RATIO (dB) Data Sheet Figure 211. Tx Output Power Spectrum, 3 dB Digital and 1 dB RF Backoff, 40 MHz RF Bandwidth, Transmitter QEC, and Internal LO Leakage Active, LTE 10 MHz Signal, 5850 MHz LO, 1 MHz Resolution Bandwidth, 122.88 MSPS Sample Rate, Test Equipment Noise Floor De-Embedded Rev. A | Page 51 of 60 AD9371 Data Sheet 0 0 –10 –10 +110°C +40°C –40°C TRANSMITTER HD3 (dBc) Tx OUTPUT (dBm) –20 –30 –40 –50 –60 –70 –20 –30 –40 –50 –60 –80 FREQUENCY (MHz) –80 14651-251 –100 5350 5450 5550 5650 5750 5850 5950 6050 6150 6250 6350 15 20 Figure 215. Transmitter HD3 vs. RF Attenuation, 5850 MHz LO, 5855 MHz CW Desired Signal, 75 MHz RF Bandwidth, 245.76 MSPS Sample Rate 10 –25 +110°C +40°C –40°C –30 –35 –40 –50 0 5 10 20 15 RF ATTENUATION (dB) Figure 213. Transmitter EVM vs. RF Attenuation, 5600 MHz LO, Transmitter LO Leakage, and Transmitter QEC Tracking Active, 75 MHz RF Bandwidth, LTE 20 MHz Downlink Signal, 245.76 MSPS Sample Rate 0 –5 –10 –15 –20 14651-252 –45 +110°C +40°C –40°C 5 0 5 10 15 20 25 RF ATTENUATION (dB) 14651-255 TRANSMITTER OUTPUT POWER (dBm) –20 Figure 216. Transmitter Output Power vs. RF Attenuation, 5850 MHz LO, 5855 MHz CW Desired Signal, 75 MHz RF Bandwidth, 245.76 MSPS Sample Rate 0.10 0 –10 0.08 Tx ATTENUATION STEP ERROR (dB) +110°C +40°C –40°C –20 –30 –40 –50 –60 –70 –80 +110°C +40°C –40°C 0.06 0.04 0.02 0 –0.02 –0.04 –0.06 –0.08 –90 0 5 10 RF ATTENUATION (dB) 15 20 –0.10 14651-253 –100 Figure 214. Transmitter HD2 vs. RF Attenuation, 5850 MHz LO, 5855 MHz CW Desired Signal, 75 MHz RF Bandwidth, 245.76 MSPS Sample Rate 0 5 10 RF ATTENUATION (dB) 15 20 14651-256 TRANSMITTER EVM (dB) 10 RF ATTENUATION (dB) Figure 212. Tx Output Power Spectrum, 3 dB Digital and 1 dB RF Backoff, 40 MHz RF Bandwidth, Transmitter QEC, and Internal LO Leakage Active, LTE 10 MHz Signal, 5850 MHz LO, 1 MHz Resolution Bandwidth, 122.88 MSPS Sample Rate, Test Equipment Noise Floor De-Embedded TRANSMITTER HD2 (dBc) 5 0 14651-254 –70 –90 Figure 217. Tx Attenuation Step Error vs. RF Attenuation, 5850 MHz LO, 5855 MHz CW Desired Signal, 75 MHz RF Bandwidth, 245.76 MSPS Sample Rate Rev. A | Page 52 of 60 Data Sheet AD9371 80 0.5 OBSERVATION RECEIVER IIP2 (dBm) DEVIATION FROM FLATNESS (dB) 0.4 0.3 0.2 0.1 0 –0.1 –0.2 –0.3 70 60 50 40 30 +110°C +40°C –40°C 20 10 –80 –60 –40 –20 0 20 40 60 80 100 FREQUENCY OFFSET FROM LO (MHz) Figure 218. Transmitter Frequency Response Deviation from Flatness vs. Frequency Offset from LO, 5850 MHz LO, 200 MHz Synthesis Bandwidth, 6 dB Digital Backoff, 245.76 MSPS Sample Rate 0 –60 –65 –70 –75 5400 5500 5600 5700 5800 5900 OBSERVATION RECEIVER LO FREQUENCY (MHz) Figure 219. Observation Receiver LO Leakage vs. Observation Receiver LO Frequency, 0 dB Receiver Attenuation, 200 MHz RF Bandwidth, 245.76 MSPS Sample Rate 60 70 80 90 100 110 60 50 40 30 +110°C +40°C –40°C 20 10 20 30 40 50 60 70 80 90 100 110 INTERMODULATION FREQUENCY (MHz) Figure 222. Observation Receiver IIP2 vs. Intermodulation Frequency (f2 − f1), 5600 MHz LO, 0 dB Attenuation, 200 MHz RF Bandwidth, 245.76 MSPS Sample Rate 40 20 15 +110°C +40°C –40°C 5 35 30 25 20 15 +110°C +40°C –40°C 10 5 0 5400 5500 5600 5700 5800 OBSERVATION RECEIVER LO FREQUENCY (MHz) 5900 Figure 220. Observation Receiver Noise Figure vs. Observation Receiver LO Frequency, 0 dB Receiver Attenuation, 200 MHz RF Bandwidth, 245.76 MSPS Sample Rate, 100 MHz Integration Bandwidth 0 10 20 30 40 50 60 70 80 f1 OFFSET FREQUENCY (MHz) 90 100 110 14651-222 OBSERVATION RECEIVER IIP3 (dBm) 25 14651-259 OBSERVATION RECEIVER NOISE FIGURE (dB) 50 70 0 10 30 0 5300 40 14651-260 OBSERVATION RECEIVER IIP2 (dBm) +110°C +40°C –40°C –55 10 30 80 –45 –80 5300 20 Figure 221. Observation Receiver IIP2 vs. f1 Offset Frequency, 5600 MHz LO, 0 dB Attenuation, 200 MHz RF Bandwidth, f2 = f1 + 1 MHz, 245.76 MSPS Sample Rate –40 –50 10 f1 OFFSET FREQUENCY (MHz) 14651-258 OBSERVATION RECEIVER LO LEAKAGE (dBm) 0 14651-257 –0.5 –100 14651-221 –0.4 Figure 223. Observation Receiver IIP3 vs. f1 Offset Frequency, 5600 MHz LO, 0 dB Attenuation, 200 MHz RF Bandwidth, f2 = 2 f1 + 1 MHz, 245.76 MSPS Sample Rate Rev. A | Page 53 of 60 AD9371 Data Sheet –40 30 25 20 15 +110°C +40°C –40°C 10 5 0 5 15 25 35 45 55 65 75 85 95 105 115 INTERMODULATION FREQUENCY (MHz) Figure 224. Observation Receiver IIP3 vs. Intermodulation Frequency (f2 − 2f1), 5600 MHz LO, 0 dB Attenuation, 200 MHz RF Bandwidth, 245.76 MSPS Sample Rate –70 –80 –90 –10 0 3 6 9 12 15 18 OBSERVATION RECEIVER ATTENUATION (dB) Figure 227. Observation Receiver DC Offset vs. Observation Receiver Attenuation, 5850 MHz LO, CW Signal 30 MHz Offset, −15 dBm Input, 200 MHz RF Bandwidth, 245.76 MSPS Sample Rate 0 –10 –10 OBSERVATION RECEIVER HD2 (dBc) +110°C +40°C –40°C –20 –30 –40 –50 –60 –70 –80 +110°C +40°C –40°C –20 –30 –40 –50 –60 –70 –80 –100 0 3 6 9 12 15 18 OBSERVATION RECEIVER ATTENUATION (dB) –100 Figure 225. Observation Receiver Image vs. Observation Receiver Attenuation, 5600 MHz LO, CW Signal 30 MHz Offset, 200 MHz RF Bandwidth, BTC Active, 245.76 MSPS Sample Rate 0 3 6 9 12 15 18 OBSERVATION RECEIVER ATTENUATION (dB) 14651-265 –90 –90 14651-262 Figure 228. Observation Receiver HD2 vs. Observation Receiver Attenuation, 5600 MHz LO, CW Signal 30 MHz Offset, −15 dBm Input, Input Power Increasing Decibel for Decibel with Attenuation, 200 MHz RF Bandwidth, 245.76 MSPS Sample Rate 25 0 20 15 OBSERVATION RECEIVER HD3 (dBc) +110°C +40°C –40°C 10 5 0 –5 –15 0 3 6 9 12 15 OBSERVATION RECEIVER ATTENUATION (dB) 18 Figure 226. Observation Receiver Gain vs. Observation Receiver Attenuation, 5600 MHz LO, CW Signal 30 MHz Offset, 200 MHz RF Bandwidth, 245.76 MSPS Sample Rate –40 –60 –80 –100 –120 14651-263 –10 +110°C +40°C –40°C –20 0 3 6 9 12 15 OBSERVATION RECEIVER ATTENUATION (dB) 18 14651-266 OBSERVATION RECEIVER IMAGE (dBc) –60 –110 0 OBSERVATION RECEIVER GAIN (dBc) +110°C +40°C –40°C –50 14651-264 OBSERVATION RECEIVER DC OFFSET (dBFS) 35 14651-261 OBSERVATION RECEIVER IIP3 (dBm) 40 Figure 229. Observation Receiver HD3 vs. Observation Receiver Attenuation, 5600 MHz LO, CW Signal 30 MHz Offset, −15 dBm Input, Input Power Increasing Decibel for Decibel with Attenuation, 200 MHz RF Bandwidth, 245.76 MSPS Sample Rate Rev. A | Page 54 of 60 Data Sheet AD9371 20 +110°C +40°C –40°C –60 –70 –80 –90 5 0 5500 5600 5700 5800 5900 –10 Figure 230. Sniffer Receiver LO Leakage vs. Sniffer Receiver LO Frequency, 0 dB Receiver Attenuation, 20 MHz RF BW, 30.72 MSPS Sample Rate 3 6 9 15 12 INTERMODULATION FREQUENCY (MHz) 14651-433 5400 SNIFFER RECEIVER LO FREQUENCY (MHz) Figure 233. Sniffer Receiver IIP3 vs. Intermodulation Frequency (f2 − 2f1), 5600 MHz LO, 0 dB Attenuation, 20 MHz RF BW, 30.72 MSPS Sample Rate 20 0 +110°C +40°C –40°C +110°C +40°C –40°C –10 SNIFFER RECEIVER IMAGE (dBc) 18 16 14 12 10 8 6 4 –20 –30 –40 –50 –60 –70 –80 –90 0 5300 5400 5500 5600 5700 5800 5900 SNIFFER RECEIVER LO FREQUENCY (MHz) –100 Figure 231. Sniffer Receiver Noise Figure vs. Sniffer Receiver LO Frequency, 0 dB Receiver Attenuation, 20 MHz RF BW, 38.4 MSPS Sample Rate, 10 MHz Integration BW 0 5 10 15 20 SNIFFER RECEIVER ATTENUATION (dB) 14651-434 2 14651-431 Figure 234. Sniffer Receiver Image vs. Sniffer Receiver Attenuation, 5800 MHz LO, CW Signal 3 MHz Offset, 20 MHz RF BW, 30.72 MSPS Sample Rate 90 –40 80 SNIFFER RECEIVER DC OFFSET (dBFS) +110°C +40°C –40°C 70 60 50 40 30 20 0 3 6 9 12 INTERMODULATION FREQUENCY (MHz) 15 Figure 232. Sniffer Receiver IIP2 vs. Intermodulation Frequency (f2 − f1), 5600 MHz LO, 0 dB Attenuation, 20 MHz RF BW, 30.72 MSPS Sample Rate –50 –60 –70 –80 –90 –100 14651-432 10 +110°C +40°C –40°C 0 5 10 15 SNIFFER RECEIVER ATTENUATION (dB) 20 14651-435 SNIFFER RECEIVER NOISE FIGURE (dB) 10 –5 –100 5300 SNIFFER RECEIVER IIP2 (dB) +110°C +40°C –40°C 15 SNIFFER RECEIVER IIP3 (dB) –50 14651-430 SNIFFER RECEIVER LO LEAKAGE (dBm) –40 Figure 235. Sniffer Receiver DC Offset vs. Sniffer Receiver Attenuation, 5800 MHz LO, CW Signal 3 MHz Offset, −35 dBm at 0 dB Attenuation, Input Power Increasing dB for dB with Attenuation, 20 MHz RF BW, 30.72 MSPS Sample Rate Rev. A | Page 55 of 60 AD9371 Data Sheet 0 0 +110°C +40°C –40°C –20 –30 –40 –50 –60 –70 –80 –10 –15 –20 –25 –30 –35 0 5 10 15 20 SNIFFER RECEIVER ATTENUATION (dB) –45 –65 14651-436 –100 Figure 236. Sniffer Receiver HD2 vs. Sniffer Receiver Attenuation, 5800 MHz LO, CW Signal 3 MHz Offset, −35 dBm at 0 dB Attenuation, Input Power Increasing dB for dB with Attenuation, 20 MHz RF BW, 30.72 MSPS Sample Rate –60 –55 –50 –45 –40 –35 –30 –25 –20 SNIFFER RECEIVER INPUT POWER (dBm) 14651-438 –40 –90 Figure 238. Sniffer Receiver EVM vs. Sniffer Receiver Input Power, 5600 MHz LO, 20 MHz RF BW, LTE 20 MHz Uplink Centered at DC, BTC Active, 30.72 MSPS Sample Rate 0 40 +110°C +40°C –40°C –10 +110°C +40°C –40°C 30 –20 SNIFFER RECEIVER GAIN (dB) –30 –40 –50 –60 –70 –80 20 10 0 –10 –20 –30 –90 0 5 10 15 SNIFFER RECEIVER ATTENUATION (dB) 20 –40 14651-437 –100 Figure 237. Sniffer Receiver HD3 vs. Sniffer Receiver Attenuation, 5800 MHz LO, CW Signal 3 MHz Offset, −35 dBm at 0 dB Attenuation, Input Power Increasing dB for dB with Attenuation, 20 MHz RF BW, 30.72 MSPS Sample Rate 0 4 8 12 16 20 24 28 32 36 40 SNIFFER RECEIVER ATTENUATION (dB) 44 48 52 14651-439 SNIFFER RECEIVER HD3 (dBc) +110°C +40°C –40°C –5 SNIFFER RECEIVER EVM (dB) SNIFFER RECEIVER HD2 (dBc) –10 Figure 239. Sniffer Receiver Gain vs. Sniffer Receiver Attenuation, 5800 MHz LO, CW Signal 3 MHz Offset, 20 MHz RF BW, 30.72 MSPS Sample Rate Rev. A | Page 56 of 60 Data Sheet AD9371 THEORY OF OPERATION The AD9371 is a highly integrated RF transceiver that can be configured for a wide range of applications. The device integrates all the RF, mixed-signal, and digital blocks necessary to provide transmit and receive functions in a single device. Programmability allows the two receiver channels and two transmitter channels to be used in TDD and FDD systems for 3G and 4G cellular standards. The observation receiver channel has two inputs for use in monitoring the transmitter outputs. This channel has a wide channel bandwidth that receives the entire transmit band and feeds it back to the digital section for error correction purposes. In addition, three sniffer receiver inputs can monitor different radio frequency bands (one at a time). These channels share the baseband ADC and digital processing with the two ORx inputs. The AD9371 contains four high speed serial interface links for the transmit chain and four high speed serial interface links shared by the Rx, ORx, and SnRx channels (JESD204B, Subclass 1 compliant), providing a low pin count and reliable data interface to a field-programmable gate array (FPGA) or other custom integrated baseband solutions. The AD9371 also provides self calibration for dc offset, LO leakage, and quadrature error correction using an integrated microcontroller core to maintain a high performance level under varying temperatures and input signal conditions. Firmware is supplied with the device to schedule all calibrations with no user interaction. The device includes test modes that allows system designers to debug designs during prototyping and optimize radio configurations. TRANSMITTER (Tx) The AD9371 employs a direct conversion transmitter architecture consisting of two identical and independently controlled channels that provide all the digital processing, mixed signal, and RF blocks necessary to implement a direct conversion system. Both channels share a common frequency synthesizer. The digital data from the JESD204B lanes pass through a fully programmable 96-tap FIR filter with optional interpolation. The FIR output is sent to a series of conversion filters that provide additional filtering and data rate interpolation prior to reaching the DAC. Each DAC has an adjustable sample rate and is linear up to full scale. When converted to baseband analog signals, the in-phase (I) and quadrature (Q) signals are filtered to remove sampling artifacts, and then the signals are fed to the upconversion mixers. At the mixer stage, the I and Q signals are recombined and modulated onto the carrier frequency for transmission to the output stage. Each transmit chain provides a wide attenuation adjustment range with fine granularity to help designers optimize SNR. RECEIVER (Rx) The AD9371 contains dual receiver channels. Each Rx channel is a direct conversion system that contains a programmable attenuator stage, followed by matched I and Q mixers that downconvert received signals to baseband for digitization. To achieve gain control, a programmed gain index map is implemented. This gain map distributes attenuation among the various Rx blocks for optimal performance at each power level. In addition, support is available for both automatic and manual gain control modes. The receiver includes Σ-Δ ADCs and adjustable sample rates that produce data streams from the received signals. The signals can be conditioned further by a series of decimation filters and a fully programmable 72-tap FIR filter with additional decimation settings. The sample rate of each digital filter block is adjustable by changing the decimation factors to produce the desired output data rate. OBSERVATION RECEIVER (ORx) The ORx operates in a similar manner to the main receivers. Each input is differential and uses a dedicated mixer. The ORx inputs share a baseband ADC and baseband section; therefore, only one can be active at any time. The mixed-signal and digital section is identical in design and operation to the main receiver channels. This channel can monitor the Tx channels and implement error correction functions. It can also be used as a general-purpose receiver. SNIFFER RECEIVER (SnRx) The sniffer receiver provides three differential inputs that can monitor different frequency bands. Each input has a low noise amplifier (LNA) that is multiplexed to feed a single mixer. The output of this mixer stage is multiplexed with the ORx receiver mixers to feed the same baseband section. The SnRx bandwidth is limited to 20 MHz. This receiver can also be used as a generalpurpose receiver if the bandwidth and RF performance are acceptable for a given application. These receiver inputs also provide an LNA bypass mode that removes the gain of the LNA when large signals are present. Note that no requirements for the LNA bypass mode are included in Table 1; performance specifications are only relative to the scenario in which the LNA is enabled. CLOCK INPUT The AD9371 requires a differential clock connected to the DEV_CLK_IN+/DEV_CLK_IN− pins. The frequency of the clock input must be between 10 MHz and 320 MHz, and it must have very low phase noise because this signal generates the RF local oscillator and internal sampling clocks. Rev. A | Page 57 of 60 AD9371 Data Sheet SYNTHESIZERS RF PLL The AD9371 contains three fractional-N PLLs to generate the RF LOs used by the transmitter, receiver, and observation receiver. The PLL incorporates an internal VCO and loop filter that require no external components. The internal VCO LDO regulators eliminate the need for additional external power supplies for the PLLs. These regulators only require an external bypass capacitor for each supply. manual gain mode, calibration flags, state machine states, and various receiver parameters are among the outputs that can be monitored on these pins. In addition, certain pins can be configured as inputs and used in various functions such as setting the receiver gain in real time. The GPIO_3P3_x pins referenced to the VDDA_3P3 supply are also included in the device and can provide control signals to the external components such as VGAs or attenuators in the RF section that typically use a higher reference voltage. Clock PLL AUXILIARY CONVERTERS The AD9371 contains a PLL synthesizer that generates all of the baseband related clock signals and SERDES clocks. This PLL is programmed based on the data rate and sample rate requirements of the system. Auxiliary ADC Inputs (AUXADC_x) External LO Inputs The AD9371 provides two external LO inputs to allow an external synthesizer to be used with the device. These inputs must be 2× the desired LO frequency. Note that operation for the external LO option is limited to a maximum of 4000 MHz. One input pair is dedicated to the receiver LO generation circuit and the other input provides the input to the transmitter and observation receiver LO generation blocks. Note that the observation receiver can obtain the LO from either the Tx LO generator block or its own dedicated PLL. When the sniffer channel is enabled, the LO for this block can only come from the dedicated internal observation channel PLL. SERIAL PERIPHERAL INTERFACE (SPI) INTERFACE The AD9371 uses a SPI to communicate with the baseband processor (BBP). This interface can be configured as a 4-wire interface with dedicated receive and transmit ports, or it can be configured as a 3-wire interface with a bidirectional data communications port. This bus allows the BBP to set all device control parameters using a simple address data serial bus protocol. Write commands follow a 24-bit format. The first bit sets the bus direction of the bus transfer. The next 15 bits set the address where data is written. The final eight bits are the data being transferred to the specific register address. Read commands follow a similar format with the exception that the first 16 bits are transferred on the SDIO pin, and the final eight bits are read from the AD9371, either on the SDO pin in 4-wire mode or on the SDIO pin in 3-wire mode. GPIO_x AND GPIO_3P3_x PINS The AD9371 general-purpose input/output signals referenced to the VDD_IF supply can be configured for numerous functions. Some of these pins, when configured as outputs, are used by the BBP as real-time signals to provide a number of internal settings and measurements. This configuration allows the BBP to monitor receiver performance in different situations. A pointer register selects what information is output to these pins. Signals used for The AD9371 contains an auxiliary ADC that is multiplexed to four input pins (AUXADC_0 through AUXADC_3). This block can monitor system voltages without adding additional components. The auxiliary ADC is 12 bits with an input voltage range of 0.05 V to VDDA_3P3 − 0.25 V. When enabled, the auxiliary ADC is free running. Software reads of the output value provide the last value latched at the ADC output. Auxiliary DACs (AUXDAC_x) The AD9371 contains 10 identical auxiliary DACs (AUXDAC_0 to AUXDAC_9) that can supply bias voltages, analog control voltages, or other system functionality. The inputs of these auxiliary DACs (AUXDAC_0 to AUXDAC_9) are multiplexed with the GPIO_3P3_x pins according to Table 7. The auxiliary DACs are 10 bits and have an output voltage range of approximately 0.5 V to VDDA_3P3 − 0.3 V and have a current drive of 10 mA. Table 7. AUXDAC Input Pin Assignments GPIO_3P3 Pin GPIO_3P3_9 GPIO_3P3_7 GPIO_3P3_6 GPIO_3P3_10 GPIO_3P3_0 GPIO_3P3_1 GPIO_3P3_3 GPIO_3P3_4 GPIO_3P3_5 GPIO_3P3_8 AUXDAC Output AUXDAC_0 AUXDAC_1 AUXDAC_2 AUXDAC_3 AUXDAC_4 AUXDAC_5 AUXDAC_6 AUXDAC_7 AUXDAC_8 AUXDAC_9 JESD204B DATA INTERFACE The digital data interface for the AD9371 uses JEDEC Standard JESD204B Subclass 1. The serial interface operates at speeds of up to 6144 Mbps. The benefits of the JESD204B interface include a reduction in required board area for data interface routing and smaller package options due to the need for fewer pins. Digital filtering is included in all receiver and transmitter paths to provide proper signal conditioning and sampling rates to meet the JESD204B data requirements. Examples of the digital filtering configurations for the Tx and Rx paths are shown in Figure 240 and Figure 241, respectively. Rev. A | Page 58 of 60 Data Sheet AD9371 Table 8. Example Rx/Tx Interface Rates (Two Rx/Two Tx Channels, Maximum JESD Lane Rates) Tx Input Rate (MSPS) 307.2 245.76 122.88 122.88 Rx Output Rate (MSPS) 153.6 122.88 61.44 30.72 TRANSMITTER HALF-BAND FILTER 2 I/Q DAC JESD204B Lane Rate (Mbps), Two Tx/Two Rx 6144 4915.2 2457.6 2457.6 TRANSMITTER HALF-BAND FILTER 1 TRANSMITTER FIR (INTERPOLATION 1, 2, 4) JESD204B (No. of Lanes) Tx/Rx 4/2 4/2 4/2 4/1 Reference Clock Options (MHz) 122.88, 153.6, 245.76, 307.2 122.88, 245.76 122.88, 245.76 122.88, 245.76 QUADRATURE ERROR CORRECTION DIGITAL GAIN JESD204B 14651-125 Tx/Tx Synthesis/ Rx Bandwidth (MHz) 100/250/100 75/200/100 20/100/40 20/100/20 Figure 240. Example Tx Data Path Filter Implementation DEC5 RECEIVER HALF-BAND FILTER 3 RECEIVER HALF-BAND FILTER 2 RECEIVER HALF-BAND FILTER 1 RFIR (DECIMATION 1, 2, 4) QEC CORRECTION FILTER DIGITAL GAIN DC CORRECTION JESD204B 14651-126 ADC Figure 241. Data Rx Data Path Filter Implementation POWER SUPPLY SEQUENCE Table 9. Dual-Function Boundary Scan Test Pins The AD9371 requires a specific power-up sequence to avoid undesired power-up currents. The optimal power-on sequence starts the process by powering up the VDIG and the VDDA_1P3 (analog) supplies simultaneously. If they cannot power up simultaneously, the VDIG supply must power up first. The VDDA_3P3, VDDA_1P8, and JESD_VTT_DES supplies must then power up after the VDIG and VDDA_1P3 supplies. Note that the VDD_IF supply can power up at any time. It is also recommended to toggle the RESET signal after power has stabilized prior to configuration. Follow the reverse order of the power-up sequence to power-down. Mnemonic GPIO_4 GPIO_5 GPIO_6 GPIO_7 GPIO_18 Note that VDDA_1P3 refers to all analog 1.3 V supplies including the following: VDDA_BB, VDDA_CLKSYNTH, VDDA_TXLO, VDDA_RXRF, VDDA_RXSYNTH, VDDA_RXVCO, VDDA_RXTX, VDDA_TXSYNTH, VDDA_TXVCO, VDDA_CALPLL, VDDA_SNRXSYNTH, VDDA_SNRXVCO, VDDA_CLK, and VDDA_RXLO. JTAG Mnemonic TRST TDO TDI TMS TCK Description Test access port reset Test data output Test data input Test access port mode select Test clock Table 10. JTAG Modes Test Pin Level 0 1 GPIO_0 to GPIO_3 XXXX1 1001 1 1011 1 X means don’t care. JTAG BOUNDARY SCAN The AD9371 provides support for a JTAG boundary scan. There are five dual-function pins associated with the JTAG interface. These pins, listed in Table 9, are used to access the on-chip test access port. To enable the JTAG functionality, set the GPIO_0 through GPIO_3 pins according to Table 10 depending on how the desired JESD204B sync pin (that is, SYNCINB0+, SYNCINB0−, SYNCINB1+, SYNCINB1−, SYNCBOUTB0+, or SYNCBOUTB0−) is configured in the software (LVDS or CMOS mode). Pull the TEST pin high to enable the JTAG mode. Rev. A | Page 59 of 60 Description Normal operation JTAG mode with LVDS JESD204B sync signals JTAG mode with CMOS JESD204B sync signals AD9371 Data Sheet OUTLINE DIMENSIONS A1 BALL CORNER 12.10 12.00 SQ 11.90 A1 BALL PAD CORNER 14 13 12 11 10 9 8 7 6 5 4 3 2 1 PIN A1 INDICATOR 7.755 REF A B C D E F G H J K L M N P 10.40 SQ 0.80 TOP VIEW BOTTOM VIEW 0.80 REF 8.165 REF DETAIL A DETAIL A 0.91 0.84 0.77 0.39 0.34 0.29 0.44 REF PKG-004569 SEATING PLANE 0.50 0.45 0.40 BALL DIAMETER COPLANARITY 0.12 COMPLIANT TO JEDEC STANDARDS MO-275-GGAB-1. 03-02-2015-A 1.27 1.18 1.09 Figure 242. 196-Ball Chip Scale Package Ball Grid Array [CSP_BGA] (BC-196-12) Dimensions shown in millimeters ORDERING GUIDE Model1 AD9371BBCZ AD9371BBCZ-REEL ADRV9371-N/PCBZ ADRV9371-W/PCBZ 1 Temperature Range −40°C to +85°C −40°C to +85°C Package Description 196-Ball Chip Scale Package Ball Grid Array [CSP_BGA] 196-Ball Chip Scale Package Ball Grid Array [CSP_BGA] Evaluation Board, 2600 MHz Matching Circuits Evaluation Board, 300 MHz to 6000 MHz Matching Circuits Z = RoHS Compliant Part. ©2016 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D14651-0-11/16(A) Rev. A | Page 60 of 60 Package Option BC-196-12 BC-196-12