VL-FS-MDLS16166D-07 REV. A (MDLS16166D-LV-G-LED01G (DIE FORM IC)) JUL/2005 PAGE 2 OF 15 DOCUMENT REVISION HISTORY DOCUMENT DATE DESCRIPTION REVISION FROM TO A 2005.07.27 First Release Based on a.) Test Specification: VL-TS-MDLS16166D-XX REV. O 2005.03.31. b.) VL-QUA-012A REV.R 2004.03.20 According to VL-PUA-012A, LCD size is small because Unit Per Laminate=32 which is more than 6pcs/Laminate. CHANGED BY ZHANG YAN FANG CHECKED BY FRANK WANG VL-FS-MDLS16166D-07 REV. A (MDLS16166D-LV-G-LED01G (DIE FORM IC)) JUL/2005 PAGE 3 OF 15 CONTENTS Page No. 1. GENERAL DESCRIPTION 4 2. MECHANICAL SPECIFICATIONS 4 3. INTERFACE SIGNALS 6 4. 4.1 4.2 ABSOLUTE MAXIMUM RATINGS ELECTRICAL MAXIMUM RATINGS-FOR IC ONLY ENVIRONMENTAL CONDITION 7 7 7 5. 5.1 5.2 5.3 ELECTRICAL SPECIFICATIONS TYPICAL ELECTRICAL CHARACTERISTICS TIMING SPECIFICATIONS TIMING DIAGRAM OF VDD AGAINST V0 8 8 9 11 6. CORRESPONDENCE BETWEEN CHARACTER CODES AND CHARACTER PATTERNS (NOVATEK STANDARD NT3881D-01) 12 7. INSTRUCTION SET 13 8. REMARK 14 9 LCD COSMETIC CONDITIONS 15 VL-FS-MDLS16166D-07 REV. A (MDLS16166D-LV-G-LED01G (DIE FORM IC)) JUL/2005 PAGE 4 OF 15 VARITRONIX LIMITED Specification of LCD Module Type Model No.: MDLS16166D-07 1. General Description 16 characters (5 x 8 dots) x 1 line STN Positive Yellow Transflective LCD Character Module. Viewing angle: 6 O’clock direction. Driving scheme: 1/16 Duty, 1/5 bias. ‘NOVATEK’ NT3881DH-01/AI (die form) LCD Controller and Driver or equivalent. Yellow-Green LED. LED lightguide. 2. Mechanical Specifications The mechanical detail is shown in Fig. 1 and summarized in Table 1 below. Table 1 Parameter Outline dimensions Viewing area Display format Character size Character spacing Character pitch Dot size Dot spacing Dot pitch Weight Specifications 80.0(W) x 36.0(H) x 12.0 MAX.(D) 64.5(W) x 13.8(H) 16 characters x 1 line 3.15(W) x 6.30(H) (5 x 8 dots) 0.60(W) 3.75(W) 0.55(W) x 0.70(H) 0.10(W) x 0.10(H) 0.65(W) x 0.80(H) Approx:32 Unit mm mm mm mm mm mm mm mm gram VL-FS-MDLS16166D-07 REV. A (MDLS16166D-LV-G-LED01G (DIE FORM IC)) JUL/2005 PAGE 5 OF 15 Figure 1: Module Specification VL-FS-MDLS16166D-07 REV. A (MDLS16166D-LV-G-LED01G (DIE FORM IC)) JUL/2005 PAGE 6 OF 15 3. Interface signals Table 2 Pin No. 1 2 3 4 Symbol VSS VDD V0 RS 5 R/W 6 E 7 8 9 10 11 12 13 14 15 16 DB0 DB1 DB2 DB3 DB4 DB5 DB6 DB7 LEDLED+ Description Ground (0V). Power supply for logic (+5V) Power supply for LCD driver Register Select Input: “High” for Data register (for read and write) “Low” for Instruction register (for write), Busy flag, address counter (for read) Read/Write signal: “High” for Read mode. “Low” for Write mode. Enable. Start signal for data read /write. Data input/output (LSB) Data input/output Data input/output Data input/output Data input/output Data input/output Data input/output Data input/output (MSB) Cathode of LED backlight Anode of LED backlight VL-FS-MDLS16166D-07 REV. A (MDLS16166D-LV-G-LED01G (DIE FORM IC)) JUL/2005 PAGE 7 OF 15 4. 4.1 Absolute Maximum Ratings Electrical Maximum Ratings –For IC Only Table 3 Parameter Symbol Min. Max. Unit Power Supply voltage (Logic) VDD – VSS -0.3 +7.0 V Power Supply voltage (LCD drive) VLCD=VDD – V0 -0.3 +13.5 V Input voltage Vin -0.3 VDD +0.3 V Note: The modules may be destroyed if they are used beyond the absolute maximum ratings. All voltage values are referenced to VSS = 0V. 4.2 Environmental Condition Table 4 Item Ambient Temperature Humidity Vibration (IEC 68-2-6) cells must be mounted on a suitable connector Shock (IEC 68-2-27) Half-sine pulse shape Operating Temperature (Topr) Storage Temperature (Tstg) (Note1) Min. Max. Min. Max. 0°C +50°C -10°C +60°C 90% max. RH for Ta ≤ 40°C Frequency: 10 ∼ 55 Hz Amplitude: 0.75 mm Duration: 20 cycles in each direction. Pulse duration: 11 ms Peak acceleration: 981 m/s2 = 100g Number of shocks: 3 shocks in 3 mutually perpendicular axes. Remark Dry No condensation 3 directions 3 directions Note1: Product cannot sustain in extreme storage conditions for a long time. VL-FS-MDLS16166D-07 REV. A (MDLS16166D-LV-G-LED01G (DIE FORM IC)) JUL/2005 PAGE 8 OF 15 5. Electrical Specifications 5.1 Typical Electrical Characteristics At Ta = 25 °C, VDD = 5V±5%, VSS=0V. Table 5 Parameter Symbol Supply voltage (Logic) VDD-VSS Supply voltage (LCD) VLCD =VDD-V0 Input signal voltage for E,DB0-DB7,R/W,RS. Supply Current (Logic & LCD) Supply Current (LCD) VIH VIL IDD I0 Supply voltage of yellow-green LED01 backlight VLED =VLED(+)VLED(-) Peak wave length of yellow-green LED01 backlight λ Conditions VDD =5.0V, Character mode, Note1, Ta=25 °C “H” level “L” level VDD =5.0V, Character mode, Note1, Ta=25 °C VDD =5.0V, Checkerboard mode, Note1, Ta=25 °C VDD =5.0V, Character mode, Note1, Ta=25 °C VDD =5.0V, Checkerboard mode, Note1, Ta=25 °C Min. 4.75 4.2 Typ. 5.00 4.5 Max. 5.25 4.8 Unit V V 2.2 -0.3 - VDD 0.8 V V - 1.1 1.7 mA - 1.3 2.0 mA - 0.2 0.3 mA - 0.2 0.3 mA 3.9 4.1 4.3 V - 568 - nm Forward current =20mA x 2 =40mA Number of LED dies =2 x 2 =4 Note (1): There is tolerance in optimum LCD driving voltage during production and it will be within the specified range. VL-FS-MDLS16166D-07 REV. A (MDLS16166D-LV-G-LED01G (DIE FORM IC)) JUL/2005 PAGE 9 OF 15 5.2 Timing Specifications At Ta =0 °C To +50 °C, VDD = +5V±5%, VSS = 0V. Refer to Fig. 2, the bus timing diagram for write mode. Table 6 Parameter Enable cycle time Enable ”High” level pulse width Enable rise time Enable fall time RS, R/W set-up time RS, R/W address hold time Data output delay Data hold time Symbol tCYCE tWHE tRE tFE tAS tAH tDS tDHR Min. 500 300 60 100 10 100 10 Max. 25 25 - Unit ns ns ns ns ns - ns ns ns Max. 25 25 - Unit ns ns ns ns ns 190 - ns ns ns Remarks 8-bit operation mode 4-bit operation mode Refer to Fig. 3, the bus timing diagram for read mode. Table 7 Parameter Enable cycle time Enable ”High” level pulse width Enable rise time Enable fall time RS, R/W set-up time RS, R/W address hold time Read data output delay Read data hold time Symbol tCYCE tWHE tRE tFE tAS tAH tRD tDHR Min. 500 300 60 100 10 20 Remarks 8-bit operation mode 4-bit operation mode VL-FS-MDLS16166D-07 REV. A (MDLS16166D-LV-G-LED01G (DIE FORM IC)) JUL/2005 PAGE 10 OF 15 Figure 2: Bus write operation sequence (Writing data from MPU to NT3881D). Figure 3: Bus read operation sequence (Reading out data from NT3881D to MPU). VL-FS-MDLS16166D-07 REV. A (MDLS16166D-LV-G-LED01G (DIE FORM IC)) JUL/2005 PAGE 11 OF 15 5.3 Timing Diagram of VDD against V0. Power on sequence shall meet the requirement of Figure 4, the timing diagram of VDD against V0. VDD 95% LOGIC SUPPLY VOLTAGE V0 0V 50ms(typical) 0V LCD SUPPLY VOLTAGE Figure 4: Timing diagram of VDD against V0. VL-FS-MDLS16166D-07 REV. A (MDLS16166D-LV-G-LED01G (DIE FORM IC)) JUL/2005 PAGE 12 OF 15 6. Correspondence between Character Codes and Character Patterns (NOVATEK Standard NT3881D-01) VL-FS-MDLS16166D-07 REV. A (MDLS16166D-LV-G-LED01G (DIE FORM IC)) JUL/2005 PAGE 13 OF 15 7. Instruction Set VL-FS-MDLS16166D-07 REV. A (MDLS16166D-LV-G-LED01G (DIE FORM IC)) JUL/2005 PAGE 14 OF 15 8. Remark: VL-FS-MDLS16166D-07 REV. A (MDLS16166D-LV-G-LED01G (DIE FORM IC)) JUL/2005 PAGE 15 OF 15 9. LCD Cosmetic Conditions a.) Reference document follow VL-QUA-012A. b.) LCD size of the product is small. “Varitronix Limited reserves the right to change this specification.” FAX: (852) 2343-9555. URL: http://www.varitronix.com - END -