LINER LTC3407 Dual synchronous, 600ma, 1.5mhz step-down dc/dc regulator Datasheet

LTC3407
Dual Synchronous, 600mA,
1.5MHz Step-Down
DC/DC Regulator
DESCRIPTION
FEATURES
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High Efficiency: Up to 96%
Very Low Quiescent Current: Only 40μA
1.5MHz Constant Frequency Operation
High Switch Current: 1A on Each Channel
No Schottky Diodes Required
Low RDS(ON) Internal Switches: 0.35Ω
Current Mode Operation for Excellent Line
and Load Transient Response
Short-Circuit Protected
Low Dropout Operation: 100% Duty Cycle
Ultralow Shutdown Current: IQ < 1μA
Output Voltages from 5V down to 0.6V
Power-On Reset Output
Externally Synchronizable Oscillator
Small Thermally Enhanced MSOP and 3mm × 3mm
DFN Packages
APPLICATIONS
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PDAs/Palmtop PCs
Digital Cameras
Cellular Phones
Portable Media Players
PC Cards
Wireless and DSL Modems
The LTC®3407 is a dual, constant frequency, synchronous
step down DC/DC converter. Intended for low power applications, it operates from 2.5V to 5.5V input voltage
range and has a constant 1.5MHz switching frequency,
allowing the use of tiny, low cost capacitors and inductors
2mm or less in height. Each output voltage is adjustable
from 0.6V to 5V. Internal synchronous 0.35Ω, 1A power
switches provide high efficiency without the need for
external Schottky diodes.
A user selectable mode input is provided to allow the user
to trade-off ripple noise for low power efficiency. Burst
Mode® operation provides high efficiency at light loads,
while pulse-skipping mode provides low ripple noise at
light loads.
To further maximize battery life, the P-channel MOSFETs
are turned on continuously in dropout (100% duty cycle),
and both channels draw a total quiescent current of only
40μA. In shutdown, the device draws <1μA.
L, LT, LTC, LTM, Burst Mode, Linear Technology and the Linear logo are registered trademarks
of Linear Technology Corporation. All other trademarks are the property of their respective
owners.
TYPICAL APPLICATION
LTC3407 Efficiency Curve
VIN = 2.5V
TO 5.5V
RUN2
VIN
MODE/SYNC
VOUT2 = 2.5V
AT 600mA
C3
10μF
RUN1
POR
LTC3407
L2
2.2μH
SW1
SW2
C4, 22pF
GND
VOUT1 = 1.8V
AT 600mA
1.8V
85
80
75
70
R2
R1 887k
442k
C2
10μF
L1, L2: MURATA LQH32CN2R2M33
VIN = 3.3V
Burst Mode OPERATION
NO LOAD ON OTHER CHANNEL
65
60
C1, C2, C3: TAIYO YUDEN JMK316BJ106ML
2.5V
90
VFB1
VFB2
R3
280k
95
RESET
L1
2.2μH
C5, 22pF
R4
887k
R5
100k
EFFICIENCY (%)
C1
10μF
100
3407 TA01
1
10
100
LOAD CURRENT (mA)
1000
3407 TA02
Figure 1. 2.5V/1.8V at 600mA Step-Down Regulators
3407fa
1
LTC3407
ABSOLUTE MAXIMUM RATINGS
(Note 1)
VIN Voltages .................................................– 0.3V to 6V
VFB1, VFB2 Voltages .......................... –0.3V to VIN + 0.3V
RUN1, RUN2 Voltages .................................–0.3V to VIN
MODE/SYNC Voltage........................ –0.3V to VIN + 0.3V
SW1, SW2 Voltage ........................... –0.3V to VIN + 0.3V
POR Voltage ................................................. –0.3V to 6V
Ambient Operating Temperature
Range (Note 2) .................................... –40°C to 85°C
Junction Temperature (Note 5) ............................. 125°C
Storage Temperature Range
LTC3407EMSE ...................................– 65°C to 150°C
LTC3407EDD ...................................... –65°C to 125°C
Lead Temperature (Soldering, 10 sec)
LTC3407EMSE only........................................... 300°C
PIN CONFIGURATION
TOP VIEW
1
RUN1
VIN
2
SW1
4
7 SW2
GND
5
6 MODE/
SYNC
3
TOP VIEW
10 VFB2
VFB1
VFB1
RUN1
VIN
SW1
GND
9 RUN2
11
8 POR
1
2
3
4
5
11
10
9
8
7
6
VFB2
RUN2
POR
SW2
MODE/
SYNC
MSE PACKAGE
10-LEAD PLASTIC MSOP
DD PACKAGE
10-LEAD (3mm × 3mm) PLASTIC DFN
TJMAX = 125°C, θJA = 45°C/W, θJC = 10°C/W
EXPOSED PAD IS PGND (PIN 11) MUST BE CONNECTED TO GND
TJMAX = 125°C, θJA = 45°C/W, θJC = 10°C/W
EXPOSED PAD IS PGND (PIN 11) MUST BE CONNECTED TO GND
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING
PACKAGE DESCRIPTION
TEMPERATURE RANGE
LTC3407EDD#PBF
LTC3407EDD#TRPBF
LAGK
10-Lead (3mm × 3mm) Plastic DFN
–40°C to 85°C
LTC3407EMSE#PBF
LTC3407EMSE#TRPBF
LTABA
10-Lead (3mm × 3mm) Plastic MSOP
–40°C to 85°C
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V, unless otherwise specified. (Note 2)
SYMBOL
PARAMETER
VIN
Operating Voltage Range
IFB
Feedback Pin Input Current
VFB
Feedback Voltage (Note 3)
ΔVLINE REG
Reference Voltage Line Regulation
ΔVLOAD REG
Output Voltage Load Regulation
CONDITIONS
MIN
●
TYP
2.5
●
MAX
UNITS
5.5
V
30
nA
0.6
0.6
0.612
0.612
V
V
VIN = 2.5V to 5.5V (Note 3)
0.3
0.5
(Note 3)
0.5
0°C ≤ TA ≤ 85°C
–40°C ≤ TA ≤ 85°C
●
0.588
0.585
%/V
%
3407fa
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LTC3407
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V, unless otherwise specified. (Note 2)
SYMBOL
PARAMETER
CONDITIONS
IS
Input DC Supply Current
Active Mode
Sleep Mode
Shutdown
MIN
VFB1 = VFB2 = 0.5V
VFB1 = VFB2 = 0.63V, MODE/SYNC = 3.6V
RUN = 0V, VIN = 5.5V, MODE/SYNC = 0V
fOSC
Oscillator Frequency
VFBX = 0.6V
fSYNC
Synchronization Frequency
ILIM
Peak Switch Current Limit
VIN = 3V, VFB = 0.5V, Duty Cycle <35%
1
1.25
A
RDS(ON)
Top Switch On-Resistance
Bottom Switch On-Resistance
(Note 6)
(Note 6)
0.35
0.30
0.45
0.45
Ω
Ω
ISW(LKG)
Switch Leakage Current
VIN = 5V, VRUN = 0V, VFBX = 0V
0.01
1
μA
POR
Power-On Reset Threshold
VFBX Ramping Up, MODE/SYNC = 0V
VFBX Ramping Down, MODE/SYNC = 0V
8.5
–8.5
●
1.2
TYP
MAX
UNITS
600
40
0.1
800
60
1
μA
μA
μA
1.5
1.8
MHz
1.5
0.75
Power-On Reset On-Resistance
100
Power-On Reset Delay
MHz
%
%
200
262,144
VRUN
RUN Threshold
●
IRUN
RUN Leakage Current
●
VMODE
Mode Threshold Low
Mode Threshold High
0.3
0
VIN – 0.5
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: The LTC3407E is guaranteed to meet specified performance
from 0°C to 70°C. Specifications over the – 40°C and 85°C operating
temperature range are assured by design, characterization and correlation
with statistical process controls.
Ω
Cycles
1
1.5
V
0.01
1
μA
0.5
VIN
V
V
Note 3: The LTC3407 is tested in a proprietary test mode that connects VFB
to the output of the error amplifier.
Note 4: Dynamic supply current is higher due to the internal gate charge
being delivered at the switching frequency.
Note 5: TJ is calculated from the ambient TA and power dissipation PD
according to the following formula: TJ = TA + (PD • θJA).
Note 6: The DFN switch on-resistance is guaranteed by correlation to
wafer level measurements.
TYPICAL PERFORMANCE CHARACTERISTICS
Pulse-Skipping Mode
Burst Mode Operation
Load Step
SW
5V/DIV
SW
5V/DIV
VOUT
200mV/DIV
VOUT
100mV/DIV
VOUT
10mV/DIV
IL
500mA/DIV
IL
200mA/DIV
IL
200mA/DIV
ILOAD
500mA/DIV
VIN = 3.6V
4μs/DIV
VOUT = 1.8V
ILOAD = 50mA
CIRCUIT OF FIGURE 1
3407 G01
VIN = 3.6V
1μs/DIV
VOUT = 1.8V
ILOAD = 50mA
CIRCUIT OF FIGURE 1
3407 G02
VIN = 3.6V
20μs/DIV
VOUT = 1.8V
ILOAD = 50mA TO 600mA
CIRCUIT OF FIGURE 1
3407 G03
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LTC3407
TYPICAL PERFORMANCE CHARACTERISTICS
Oscillator Frequency vs
Temperature
Efficiency vs Input Voltage
Oscillator Frequency vs Supply
Voltage
1.70
100
1.8
TA = 25°C
FREQUENCY (MHz)
85
1.60
10mA
1mA
OSCILLATOR FREQUENCY (MHz)
100mA
90
EFFICIENCY (%)
TA = 25°C
1.65
95
600mA
80
75
1.55
1.50
1.45
70
1.40
65 VOUT = 1.8V
CIRCUIT OF FIGURE 1
60
4
5
2
3
INPUT VOLTAGE (V)
1.35
1.30
–50 –25
6
50
25
75
0
TEMPERATURE (°C)
100
1.5
1.4
1.3
1.2
125
2
RDS(ON) vs Input Voltage
VIN = 3.6V
0.610
VIN = 2.7V
500
450
VIN = 4.2V
450
350
300
0.590
250
0.585
–50 –25
200
50
25
75
0
TEMPERATURE (°C)
100
MAIN
SWITCH
RDS(ON) (mΩ)
RDS(ON) (mΩ)
0.595
400
125
SYNCHRONOUS
SWITCH
2
3
350
300
250
200
4
VIN (V)
5
100
–50 –25
7
6
3407 G07
Efficiency vs Load Current
Efficiency vs Load Current
Load Regulation
2
VOUT ERROR (%)
75
85
80
PULSE-SKIPPING
MODE
75
70
70
65
VOUT = 2.5V Burst Mode OPERATION
CIRCUIT OF FIGURE 1
60
1
10
100
LOAD CURRENT (mA)
1000
3407 G10
Burst Mode OPERATION
3
Burst Mode OPERATION
90
4.2V
EFFICIENCY (%)
EFFICIENCY (%)
95
80
25 50 75 100 125 150
TEMPERATURE (°C)
4
2.7V
3.3V
85
0
3407 G09
100
90
MAIN SWITCH
SYNCHRONOUS SWITCH
3407 G08
100
95
VIN = 3.6V
400
150
1
6
RDS(ON) vs Temperature
550
TA = 25°C
0.600
5
3407 G06
500
0.605
4
3
3407 G05
Reference Voltage vs
Temperature
REFERENCE VOLTAGE (V)
1.6
SUPPLY VOLTAGE (V)
3407 G04
0.615
1.7
1
0
PULSE-SKIPPING
MODE
–1
–2
65
VIN = 3.6V, VOUT = 1.8V
NO LOAD ON OTHER CHANNEL
60
1
10
100
LOAD CURRENT (mA)
1000
3407 G11
–3
VIN = 3.6V, VOUT = 1.8V
NO LOAD ON OTHER CHANNEL
–4
1
10
100
LOAD CURRENT (mA)
1000
3407 G12
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LTC3407
TYPICAL PERFORMANCE CHARACTERISTICS
Efficiency vs Load Current
Efficiency vs Load Current
100
95
3.3V
3.3V
2.7V
0.3
4.2V
80
75
70
VOUT ERROR (%)
EFFICIENCY (%)
90
85
VOUT = 1.8V
IOUT = 200mA
TA = 25°C
0.4
95
2.7V
90
EFFICIENCY (%)
Line Regulation
0.5
100
4.2V
85
80
75
70
0.2
0.1
0
–0.1
–0.2
–0.3
65
VOUT = 1.2V Burst Mode OPERATION
CIRCUIT OF FIGURE 1
60
1
10
100
LOAD CURRENT (mA)
1000
65
VOUT = 1.5V Burst Mode OPERATION
CIRCUIT OF FIGURE 1
60
1
10
100
LOAD CURRENT (mA)
3407 G13
1000
3407 G14
–0.4
–0.5
2
3
4
VIN (V)
5
6
3407 G15
PIN FUNCTIONS
VFB1 (Pin 1): Output Feedback. Receives the feedback voltage from the external resistive divider across the output.
Nominal voltage for this pin is 0.6V.
RUN1 (Pin 2): Regulator 1 Enable. Forcing this pin to VIN
enables regulator 1, while forcing it to GND causes regulator
1 to shut down. This pin must be driven; do not float.
VIN (Pin 3): Main Power Supply. Must be closely decoupled
to GND.
SW1 (Pin 4): Regulator 1 Switch Node Connection to the
Inductor. This pin swings from VIN to GND.
GND (Pin 5): Ground. This pin is not connected internally.
Connect to PCB ground for shielding.
MODE/SYNC (Pin 6): Combination Mode Selection and
Oscillator Synchronization. This pin controls the operation of the device. When tied to VIN or GND, Burst Mode
operation or pulse-skipping mode is selected, respectively.
Do not float this pin. The oscillation frequency can be
synchronized to an external oscillator applied to this pin
and pulse-skipping mode is automatically selected.
SW2 (Pin 7): Regulator 2 Switch Node Connection to the
Inductor. This pin swings from VIN to GND.
POR (Pin 8): Power-On Reset . This common-drain logic
output is pulled to GND when the output voltage is not
within ±8.5% of regulation and goes high after 175ms
when both channels are within regulation.
RUN2 (Pin 9): Regulator 2 Enable. Forcing this pin to VIN
enables regulator 2, while forcing it to GND causes regulator
2 to shut down. This pin must be driven; do not float.
VFB2 (Pin 10): Output Feedback. Receives the feedback
voltage from the external resistive divider across the output.
Nominal voltage for this pin is 0.6V.
Exposed Pad (GND) (Pin 11): Power Ground. Connect to
the (–) terminal of COUT, and (–) terminal of CIN. Must be
soldered to electrical ground on PCB.
3407fa
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LTC3407
BLOCK DIAGRAM
REGULATOR 1
MODE/SYNC
6
BURST
CLAMP
VIN
SLOPE
COMP
0.6V
EA
VFB1
SLEEP
ITH
–
+
5Ω
ICOMP
+
0.35V
–
1
EN
–
+
BURST
S
Q
RS
LATCH
R
0.55V
–
UVDET
Q
SWITCHING
LOGIC
AND
BLANKING
CIRCUIT
UV
+
ANTI
SHOOTTHRU
4 SW1
+
OVDET
–
+
0.65V
OV
IRCMP
SHUTDOWN
–
11 GND
VIN
PGOOD1
RUN1
8 POR
2
0.6V REF
RUN2
9
3 VIN
POR
COUNTER
OSC
OSC
5 GND
PGOOD2
REGULATOR 2 (IDENTICAL TO REGULATOR 1)
VFB2
10
7 SW2
3407 BD
OPERATION
The LTC3407 uses a constant frequency, current mode
architecture. The operating frequency is set at 1.5MHz
and can be synchronized to an external oscillator. Both
channels share the same clock and run in-phase. To suit
a variety of applications, the selectable Mode pin allows
the user to trade-off noise for efficiency.
The output voltage is set by an external divider returned
to the VFB pins. An error amplifier compares the divided
output voltage with a reference voltage of 0.6V and adjusts
the peak inductor current accordingly. Overvoltage and
undervoltage comparators will pull the POR output low if
the output voltage is not within ±8.5%. The POR output
will go high after 262,144 clock cycles (about 175ms) of
achieving regulation.
Main Control Loop
During normal operation, the top power switch (P-channel
MOSFET) is turned on at the beginning of a clock cycle
when the VFB voltage is below the the reference voltage.
The current into the inductor and the load increases until
the current limit is reached. The switch turns off and
energy stored in the inductor flows through the bottom
switch (N-channel MOSFET) into the load until the next
clock cycle.
The peak inductor current is controlled by the internally
compensated ITH voltage, which is the output of the error amplifier. This amplifier compares the VFB pin to the
0.6V reference. When the load current increases, the
VFB voltage decreases slightly below the reference. This
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LTC3407
OPERATION
decrease causes the error amplifier to increase the ITH
voltage until the average inductor current matches the
new load current.
The main control loop is shut down by pulling the RUN
pin to ground.
Low Current Operation
Two modes are available to control the operation of the
LTC3407 at low currents. Both modes automatically switch
from continuous operation to to the selected mode when
the load current is low.
To optimize efficiency, the Burst Mode operation can be
selected. When the load is relatively light, the LTC3407
automatically switches into Burst Mode operation in which
the PMOS switch operates intermittently based on load
demand with a fixed peak inductor current. By running
cycles periodically, the switching losses which are dominated by the gate charge losses of the power MOSFETs
are minimized. The main control loop is interrupted when
the output voltage reaches the desired regulated value.
A hysteretic voltage comparator trips when ITH is below
0.35V, shutting off the switch and reducing the power. The
output capacitor and the inductor supply the power to the
load until ITH exceeds 0.65V, turning on the switch and the
main control loop which starts another cycle.
For lower ripple noise at low currents, the pulse-skipping
mode can be used. In this mode, the LTC3407 continues to
switch at a constant frequency down to very low currents,
where it will begin skipping pulses.
Dropout Operation
When the input supply voltage decreases toward the
output voltage, the duty cycle increases to 100% which
is the dropout condition. In dropout, the PMOS switch is
turned on continuously with the output voltage being equal
to the input voltage minus the voltage drops across the
internal P-channel MOSFET and the inductor.
An important design consideration is that the RDS(ON)
of the P-channel switch increases with decreasing input
supply voltage (See Typical Performance Characteristics).
Therefore, the user should calculate the power dissipation
when the LTC3407 is used at 100% duty cycle with low
input voltage (See Thermal Considerations in the Applications Information Section).
Low Supply Operation
The LTC3407 incorporates an Under-Voltage Lockout circuit
which shuts down the part when the input voltage drops
below about 1.65V to prevent unstable operation.
APPLICATIONS INFORMATION
A general LTC3407 application circuit is shown in Figure 2.
External component selection is driven by the load requirement, and begins with the selection of the inductor L. Once
the inductor is chosen, CIN and COUT can be selected.
Inductor Selection
Although the inductor does not influence the operating frequency, the inductor value has a direct effect on
ripple current. The inductor ripple current ΔIL decreases
with higher inductance and increases with higher VIN or
VOUT:
⎛ V ⎞
V
ΔIL = OUT • ⎜1− OUT ⎟
fO • L ⎝
VIN ⎠
Accepting larger values of ΔIL allows the use of low
inductances, but results in higher output voltage ripple,
greater core losses, and lower output current capability. A
reasonable starting point for setting ripple current is ΔIL =
0.3 • ILIM, where ILIM is the peak switch current limit. The
largest ripple current ΔIL occurs at the maximum input
voltage. To guarantee that the ripple current stays below a
specified maximum, the inductor value should be chosen
according to the following equation:
⎛
⎞
V
V
L ≥ OUT • ⎜⎜1– OUT ⎟⎟
fO • ΔIL ⎝ VIN(MAX) ⎠
The inductor value will also have an effect on Burst Mode
operation. The transition from low current operation
begins when the peak inductor current falls below a level
set by the burst clamp. Lower inductor values result in
higher ripple current which causes this to occur at lower
3407fa
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LTC3407
APPLICATIONS INFORMATION
load currents. This causes a dip in efficiency in the upper
range of low current operation. In Burst Mode operation,
lower inductance values will cause the burst frequency
to increase.
Inductor Core Selection
Different core materials and shapes will change the size/
current and price/current relationship of an inductor. Toroid
or shielded pot cores in ferrite or permalloy materials are
small and don’t radiate much energy, but generally cost
more than powdered iron core inductors with similar
electrical characteristics. The choice of which style inductor to use often depends more on the price vs size
requirements and any radiated field/EMI requirements
than on what the LTC3407 requires to operate. Table 1
shows some typical surface mount inductors that work
well in LTC3407 applications.
Input Capacitor (CIN) Selection
In continuous mode, the input current of the converter is a
square wave with a duty cycle of approximately VOUT/VIN.
To prevent large voltage transients, a low equivalent series
resistance (ESR) input capacitor sized for the maximum
RMS current must be used. The maximum RMS capacitor
current is given by:
VOUT (VIN – VOUT )
IRMS ≈IMAX
VIN
where the maximum average output current IMAX equals
the peak current minus half the peak-to-peak ripple current, IMAX = ILIM – ΔIL/2.
This formula has a maximum at VIN = 2VOUT, where IRMS
= IOUT/2. This simple worst-case is commonly used to
design because even significant deviations do not offer
much relief. Note that capacitor manufacturer’s ripple current ratings are often based on only 2000 hours lifetime.
This makes it advisable to further derate the capacitor,
or choose a capacitor rated at a higher temperature than
required. Several capacitors may also be paralleled to meet
the size or height requirements of the design. An additional
0.1μF to 1μF ceramic capacitor is also recommended on
VIN for high frequency decoupling, when not using an all
ceramic capacitor solution.
Table 1. Representative Surface Mount Inductors
PART
NUMBER
VALUE
(μH)
DCR
(Ω MAX)
MAX DC
CURRENT (A)
SIZE
W × L × H (mm3)
Sumida
CDRH3D16
1.5
2.2
3.3
4.7
0.043
0.075
0.110
0.162
1.55
1.20
1.10
0.90
3.8 × 3.8 × 1.8
Sumida
CMD4D06
2.2
3.3
4.7
0.116
0.174
0.216
0.950
0.770
0.750
3.5 × 4.3 × 0.8
Panasonic
ELT5KT
3.3
4.7
0.17
0.20
1.00
0.95
4.5 × 5.4 × 1.2
Murata
LQH32CN
1.0
2.2
4.7
0.060
0.097
0.150
1.00
0.79
0.65
2.5 × 3.2 × 2.0
Output Capacitor (COUT) Selection
The selection of COUT is driven by the required ESR to
minimize voltage ripple and load step transients. Typically,
once the ESR requirement is satisfied, the capacitance
is adequate for filtering. The output ripple (ΔVOUT) is
determined by:
1
VOUT IL ESR+
8fO COUT where f = operating frequency, COUT = output capacitance
and ΔIL = ripple current in the inductor. The output ripple
is highest at maximum input voltage since ΔIL increases
with input voltage. With ΔIL = 0.3 • ILIM the output ripple
will be less than 100mV at maximum VIN and fO = 1.5MHz
with:
ESRCOUT < 150mΩ
Once the ESR requirements for COUT have been met, the
RMS current rating generally far exceeds the IRIPPLE(P-P)
requirement, except for an all ceramic solution.
In surface mount applications, multiple capacitors may
have to be paralleled to meet the capacitance, ESR or RMS
current handling requirement of the application. Aluminum
electrolytic, special polymer, ceramic and dry tantulum
capacitors are all available in surface mount packages. The
OS-CON semiconductor dielectric capacitor available from
Sanyo has the lowest ESR(size) product of any aluminum
electrolytic at a somewhat higher price. Special polymer
3407fa
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LTC3407
APPLICATIONS INFORMATION
capacitors, such as Sanyo POSCAP, offer very low ESR,
but have a lower capacitance density than other types.
Tantalum capacitors have the highest capacitance density,
but it has a larger ESR and it is critical that the capacitors
are surge tested for use in switching power supplies.
An excellent choice is the AVX TPS series of surface
mount tantalums, available in case heights ranging from
2mm to 4mm. Aluminum electrolytic capacitors have a
significantly larger ESR, and are often used in extremely
cost-sensitive applications provided that consideration
is given to ripple current ratings and long term reliability.
Ceramic capacitors have the lowest ESR and cost, but also
have the lowest capacitance density, a high voltage and
temperature coefficient, and exhibit audible piezoelectric
effects. In addition, the high Q of ceramic capacitors along
with trace inductance can lead to significant ringing. Other
capacitor types include the Panasonic special polymer
(SP) capacitors.
In most cases, 0.1μF to 1μF of ceramic capacitors should
also be placed close to the LTC3407 in parallel with the
main capacitors for high frequency decoupling.
VIN = 2.5V
TO 5.5V
CIN
RUN2
BURST*
PULSESKIP*
VIN
MODE/SYNC
R5
RUN1
POWER-ON
RESET
POR
LTC3407
L1
L2
VOUT2
SW1
SW2
C5
C4
VFB1
VFB2
R4
COUT2
VOUT1
GND
R3
R2
R1
COUT1
caps are prone to temperature effects which requires the
designer to check loop stability over the operating temperature range. To minimize their large temperature and
voltage coefficients, only X5R or X7R ceramic capacitors
should be used. A good selection of ceramic capacitors
is available from Taiyo Yuden, TDK, and Murata.
Great care must be taken when using only ceramic input
and output capacitors. When a ceramic capacitor is used
at the input and the power is being supplied through long
wires, such as from a wall adapter, a load step at the output
can induce ringing at the VIN pin. At best, this ringing can
couple to the output and be mistaken as loop instability.
At worst, the ringing at the input can be large enough to
damage the part.
Since the ESR of a ceramic capacitor is so low, the input
and output capacitor must instead fulfill a charge storage
requirement. During a load step, the output capacitor must
instantaneously supply the current to support the load
until the feedback loop raises the switch current enough
to support the load. The time required for the feedback
loop to respond is dependent on the compensation and
the output capacitor size. Typically, 3-4 cycles are required
to respond to a load step, but only in the first cycle does
the output drop linearly. The output droop, VDROOP, is
usually about 3 times the linear drop of the first cycle.
Thus, a good place to start is with the output capacitor
size of approximately:
ΔIOUT
COUT ≈ 3
fO • VDROOP
3407 F02
*MODE/SYNC = 0V: PULSE-SKIPPING
MODE/SYNC = VIN: Burst Mode OPERATION
Figure 2. LTC3407 General Schematic
Ceramic Input and Output Capacitors
Higher value, lower cost ceramic capacitors are now becoming available in smaller case sizes. These are tempting
for switching regulator use because of their very low ESR.
Unfortunately, the ESR is so low that it can cause loop
stability problems. Solid tantalum capacitor ESR generates a loop “zero” at 5kHz to 50kHz that is instrumental in
giving acceptable loop phase margin. Ceramic capacitors
remain capacitive to beyond 300kHz and usually resonate
with their ESL before ESR becomes effective. Also, ceramic
More capacitance may be required depending on the duty
cycle and load step requirements.
In most applications, the input capacitor is merely required
to supply high frequency bypassing, since the impedance
to the supply is very low. A 10μF ceramic capacitor is
usually enough for these conditions.
Setting the Output Voltage
The LTC3407 develops a 0.6V reference voltage between
the feedback pin, VFB, and the ground as shown in Figure 2.
The output voltage is set by a resistive divider according
to the following formula:
3407fa
9
LTC3407
APPLICATIONS INFORMATION
⎛ R2 ⎞
VOUT = 0.6V ⎜1+ ⎟
⎝ R1 ⎠
Keeping the current small (<5μA) in these resistors maximizes efficiency, but making them too small may allow
stray capacitance to cause noise problems and reduce the
phase margin of the error amp loop.
To improve the frequency response, a feed-forward capacitor CF may also be used. Great care should be taken to
route the VFB line away from noise sources, such as the
inductor or the SW line.
Power-On Reset
The POR pin is an open-drain output which pulls low when
either regulator is out of regulation. When both output voltages are within ±8.5% of regulation, a timer is started which
releases POR after 218 clock cycles (about 175ms). This
delay can be significantly longer in Burst Mode operation
with low load currents, since the clock cycles only occur
during a burst and there could be milliseconds of time
between bursts. This can be bypassed by tying the POR
output to the MODE/SYNC input, to force pulse-skipping
mode during a reset. In addition, if the output voltage
faults during Burst Mode sleep, POR could have a slight
delay for an undervoltage output condition and may not
respond to an overvoltage output. This can be avoided by
using pulse-skipping mode instead. When either channel
is shut down, the POR output is pulled low, since one or
both of the channels are not in regulation.
Mode Selection & Frequency Synchronization
The MODE/SYNC pin is a multipurpose pin which provides
mode selection and frequency synchronization. Connecting this pin to VIN enables Burst Mode operation, which
provides the best low current efficiency at the cost of a
higher output voltage ripple. When this pin is connected
to ground, pulse-skipping operation is selected which
provides the lowest output ripple, at the cost of low current efficiency.
The LTC3407 can also be synchronized to another LTC3407
by the MODE/SYNC pin. During synchronization, the mode
is set to pulse-skipping and the top switch turn-on is synchronized to the rising edge of the external clock.
Checking Transient Response
The regulator loop response can be checked by looking
at the load transient response. Switching regulators take
several cycles to respond to a step in load current. When
a load step occurs, VOUT immediately shifts by an amount
equal to ΔILOAD • ESR, where ESR is the effective series
resistance of COUT. ΔILOAD also begins to charge or discharge COUT generating a feedback error signal used by the
regulator to return VOUT to its steady-state value. During
this recovery time, VOUT can be monitored for overshoot
or ringing that would indicate a stability problem.
The initial output voltage step may not be within the
bandwidth of the feedback loop, so the standard secondorder overshoot/DC ratio cannot be used to determine
phase margin. In addition, a feed-forward capacitor, CF,
can be added to improve the high frequency response, as
shown in Figure 2. Capacitor CF provides phase lead by
creating a high frequency zero with R2 which improves
the phase margin.
The output voltage settling behavior is related to the stability
of the closed-loop system and will demonstrate the actual
overall supply performance. For a detailed explanation of
optimizing the compensation components, including a review of control loop theory, refer to Application Note 76.
In some applications, a more severe transient can be caused
by switching in loads with large (>1μF) input capacitors.
The discharged input capacitors are effectively put in parallel with COUT, causing a rapid drop in VOUT. No regulator
can deliver enough current to prevent this problem, if the
switch connecting the load has low resistance and is driven
quickly. The solution is to limit the turn-on speed of the
load switch driver. A Hot Swap™ controller is designed
specifically for this purpose and usually incorporates current limiting, short-circuit protection, and soft-starting.
Efficiency Considerations
The percent efficiency of a switching regulator is equal to
the output power divided by the input power times 100%.
It is often useful to analyze individual losses to determine
what is limiting the efficiency and which change would
Hot Swap is a trademark of Linear Technology Corporation.
3407fa
10
LTC3407
APPLICATIONS INFORMATION
produce the most improvement. Percent efficiency can
be expressed as:
%Efficiency = 100% - (L1 + L2 + L3 + ...)
where L1, L2, etc. are the individual losses as a percentage of input power.
Although all dissipative elements in the circuit produce
losses, 4 main sources usually account for most of the
losses in LTC3407 circuits: 1)VIN quiescent current, 2)
switching losses, 3) I2R losses, 4) other losses.
1) The VIN current is the DC supply current given in the
Electrical Characteristics which excludes MOSFET driver
and control currents. VIN current results in a small (<0.1%)
loss that increases with VIN, even at no load.
2) The switching current is the sum of the MOSFET driver
and control currents. The MOSFET driver current results
from switching the gate capacitance of the power MOSFETs.
Each time a MOSFET gate is switched from low to high
to low again, a packet of charge dQ moves from VIN to
ground. The resulting dQ/dt is a current out of VIN that is
typically much larger than the DC bias current. In continuous mode, IGATECHG = fO(QT + QB), where QT and QB are
the gate charges of the internal top and bottom MOSFET
switches. The gate charge losses are proportional to VIN
and thus their effects will be more pronounced at higher
supply voltages.
3) I2R losses are calculated from the DC resistances of the
internal switches, RSW, and external inductor, RL. In continuous mode, the average output current flowing through
inductor L, but is “chopped” between the internal top and
bottom switches. Thus, the series resistance looking into
the SW pin is a function of both top and bottom MOSFET
RDS(ON) and the duty cycle (DC) as follows:
RSW = (RDS(ON)TOP)(DC) + (RDS(ON)BOT)(1 – DC)
The RDS(ON) for both the top and bottom MOSFETs can
be obtained from the Typical Performance Characteristics
curves. Thus, to obtain I2R losses:
I2R losses = (IOUT)2 (RSW + RL)
4) Other ‘hidden’ losses such as copper trace and internal
battery resistances can account for additional efficiency
degradations in portable systems. It is very important
to include these “system” level losses in the design of a
system. The internal battery and fuse resistance losses
can be minimized by making sure that CIN has adequate
charge storage and very low ESR at the switching frequency.
Other losses including diode conduction losses during
dead-time and inductor core losses generally account for
less than 2% total additional loss.
Thermal Considerations
In a majority of applications, the LTC3407 does not dissipate much heat due to its high efficiency. However, in
applications where the LTC3407 is running at high ambient
temperature with low supply voltage and high duty cycles,
such as in dropout, the heat dissipated may exceed the
maximum junction temperature of the part. If the junction
temperature reaches approximately 150°C, both power
switches will be turned off and the SW node will become
high impedance.
To prevent the LTC3407 from exceeding the maximum
junction temperature, the user will need to do some thermal
analysis. The goal of the thermal analysis is to determine
whether the power dissipated exceeds the maximum
junction temperature of the part. The temperature rise is
given by:
TRISE = PD • θJA
where PD is the power dissipated by the regulator and θJA
is the thermal resistance from the junction of the die to
the ambient temperature.
The junction temperature, TJ, is given by:
TJ = TRISE + TAMBIENT
As an example, consider the case when the LTC3407 is
in dropout on both channels at an input voltage of 2.7V
with a load current of 600mA and an ambient temperature
of 70°C. From the Typical Performance Characteristics
graph of Switch Resistance, the RDS(ON) resistance of
the main switch is 0.425Ω. Therefore, power dissipated
by each channel is:
PD = IOUT2 • RDS(ON) = 153mW
The MS package junction-to-ambient thermal resistance,
θJA, is 45°C/W. Therefore, the junction temperature of
3407fa
11
LTC3407
APPLICATIONS INFORMATION
the regulator operating in a 70°C ambient temperature is
approximately:
TJ = 2 • 0.153 • 45 + 70 = 84°C
which is below the absolute maximum junction temperature of 125°C.
Design Example
As a design example, consider using the LTC3407 in an
portable application with a Li-Ion battery. The battery provides a VIN = 2.8V to 4.2V. The load requires a maximum
of 600mA in active mode and 2mA in standby mode. The
output voltage is VOUT = 2.5V. Since the load still needs
power in standby, Burst Mode operation is selected for
good low load efficiency.
First, calculate the inductor value for about 30% ripple
current at maximum VIN:
⎛ 2.5V ⎞
2.5V
L≥
• ⎜1–
⎟ = 2.25μH
1.5MHz • 300mA ⎝ 4.2V ⎠
Choosing the closest inductor from a vendor of 2.2μH
inductor, results in a maximum ripple current of:
⎛ 2.5V ⎞
2.5V
ΔIL =
• ⎜1−
⎟ = 307mA
1.5MHz • 2.2μH ⎝ 4.2V ⎠
For cost reasons, a ceramic capacitor will be used. COUT
selection is then based on load step droop instead of ESR
requirements. For a 5% output droop:
600mA
COUT ≈ 3
= 9.6μF
1.5MHz • (5% • 2.5V)
The closest standard value is 10μF. Since the output impedance of a Li-Ion battery is very low, CIN is typically 10μF.
The output voltage can now be programmed by choosing
the values of R1 and R2. To maintain high efficiency, the
current in these resistors should be kept small. Choosing
2μA with the 0.6V feedback voltage makes R1~300k. A close
standard 1% resistor is 280k, and R2 is then 887k.
The POR pin is a common drain output and requires a pullup resistor. A 100k resistor is used for adequate speed.
Figure 1 shows the complete schematic for this design
example.
Board Layout Considerations
When laying out the printed circuit board, the following
checklist should be used to ensure proper operation of
the LTC3407. These items are also illustrated graphically
in the layout diagram of Figure 3. Check the following in
your layout:
1. Does the capacitor CIN connect to the power VIN (Pin
3) and GND (exposed pad) as close as possible? This
capacitor provides the AC current to the internal power
MOSFETs and their drivers.
2. Are the COUT and L1 closely connected? The (–) plate of
COUT returns current to GND and the (–) plate of CIN.
3. The resistor divider, R1 and R2, must be connected
between the (+) plate of COUT and a ground sense line
terminated near GND (Exposed Pad). The feedback signals
VFB should be routed away from noisy components and
traces, such as the SW line (Pins 4 and 7), and its trace
should be minimized.
4. Keep sensitive components away from the SW pins. The
input capacitor CIN and the resistors R1 to R4 should be
routed away from the SW traces and the inductors.
5. A ground plane is preferred, but if not available, keep
the signal and power grounds segregated with small signal
components returning to the GND pin at one point and
should not share the high current path of CIN or COUT.
6. Flood all unused areas on all layers with copper. Flooding with copper will reduce the temperature rise of power
components. These copper areas should be connected to
VIN or GND.
VIN
CIN
RUN2
VIN
MODE/SYNC
RUN1
POR
LTC3407
L1
L2
VOUT2
SW1
SW2
C5
VFB1
VFB2
R4
COUT2
VOUT1
C4
GND
R3
R2
R1
COUT1
3407 F03
BOLD LINES INDICATE HIGH CURRENT PATHS
Figure 3. LTC3407 Layout Diagram (See Board Layout Checklist)
3407fa
12
LTC3407
TYPICAL APPLICATIONS
Low Ripple Buck Regulators Using Ceramic Capacitors
VIN = 2.5V
TO 5.5V
C1
10μF
RUN2
VIN
RUN1
R5
100k
POWER-ON
RESET
POR
C3
10μF
LTC3407
L2
4.7μH
L1
4.7μH
SW2
SW1
C5, 22pF
R4
887k
C4, 22pF
R3
442k
VOUT1 = 1.2V
AT 600mA
VFB1
VFB2
MODE/SYNC
R2
R1 604k
604k
GND
C1, C2, C3: TAIYO YUDEN JMK316BJ106ML
L1, L2: MURATA LQH32CN4R7M11
C2
10μF
3407 TA03
Efficiency
100
95
VOUT = 1.8V
90
EFFICIENCY (%)
VOUT2 = 1.8V
AT 600mA
85
VOUT = 1.2V
80
75
70
65
60
VIN = 3.3V Burst Mode OPERATION
NO LOAD ON OTHER CHANNEL
1
10
100
LOAD CURRENT (mA)
1000
3407 TA03b
3407fa
13
LTC3407
TYPICAL APPLICATIONS
2mm Height Core Supply
VIN = 3.6V
TO 5.5V
C1
10μF
RUN2
VIN
MODE/SYNC
VOUT2 = 3.3V
AT 600mA
C3
10μF
SW2
POWER-ON
RESET
POR
LTC3407
L2
4.7μH
R5
100k
RUN1
L1
2.2μH
SW1
C5, 22pF
R4
887k
C4, 22pF
VFB1
VFB2
R3
196k
VOUT1 = 1.8V
AT 600mA
R2
R1 604k
301k
GND
C1, C2, C3: TAIYO YUDEN JMK316BJ106ML
L1: MURATA LQH32CN2R2M33
L2: MURATA LQH32CN4R7M11
C2
10μF
3407 TA07
Efficiency vs Load Current
100
3.3V
95
EFFICIENCY (%)
90
1.8V
85
80
75
70
65
VIN = 5V Burst Mode OPERATION
NO LOAD ON OTHER CHANNEL
60
1
10
100
LOAD CURRENT (mA)
1000
3407 TA08
3407fa
14
LTC3407
PACKAGE DESCRIPTION
DD Package
10-Lead Plastic DFN (3mm × 3mm)
(Reference LTC DWG # 05-08-1699 Rev B)
R = 0.125
TYP
0.40 ± 0.10
6
10
5
1
0.70 ±0.05
3.55 ±0.05
1.65 ±0.05
2.15 ±0.05 (2 SIDES)
3.00 ±0.10
(4 SIDES)
PACKAGE
OUTLINE
PIN 1
TOP MARK
(SEE NOTE 6)
(DD) DFN REV B 0309
0.25 ± 0.05
0.50 BSC
0.75 ±0.05
0.200 REF
0.25 ± 0.05
1.65 ± 0.10
(2 SIDES)
0.50
BSC
2.38 ±0.05
(2 SIDES)
2.38 ±0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (WEED-2).
CHECK THE LTC WEBSITE DATA SHEET FOR CURRENT STATUS OF VARIATION ASSIGNMENT
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
MSE Package
10-Lead Plastic MSOP, Exposed Die Pad
(Reference LTC DWG # 05-08-1664 Rev C)
2.794 ± 0.102
(.110 ± .004)
BOTTOM VIEW OF
EXPOSED PAD OPTION
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.889 ± 0.127
(.035 ± .005)
10 9 8 7 6
5.23
(.206)
MIN
2.083 ± 0.102 3.20 – 3.45
(.082 ± .004) (.126 – .136)
0.254
(.010)
DETAIL “A”
0° – 6° TYP
0.497 ± 0.076
(.0196 ± .003)
REF
2.06 ± 0.102
(.081 ± .004)
1
1.83 ± 0.102
(.072 ± .004)
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
GAUGE PLANE
0.50
0.305 ± 0.038
(.0197)
(.0120 ± .0015)
BSC
TYP
RECOMMENDED SOLDER PAD LAYOUT
DETAIL “B”
0.53 ± 0.152
(.021 ± .006)
DETAIL “A”
SEATING
PLANE
10
0.29
REF
0.86
(.034)
REF
1.10
(.043)
MAX
0.18
(.007)
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
1 2 3 4 5
0.05 REF
0.17 – 0.27
(.007 – .011)
TYP
0.50
(.0197)
BSC
0.1016 ± 0.0508
(.004 ± .002)
DETAIL “B”
CORNER TAIL IS PART OF
THE LEADFRAME FEATURE.
FOR REFERENCE ONLY
NO MEASUREMENT PURPOSE
MSOP (MSE) 0908 REV C
3407fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC3407
TYPICAL APPLICATION
2mm Height Lithium-Ion Single Inductor Buck-Boost Regulator and a Buck Regulator
VIN = 2.8V
TO 4.2V
C1
10μF
RUN2
VIN
MODE/SYNC
R5
100k
POWER-ON
RESET
POR
LTC3407
L2
10μH
D1
VOUT2 = 3.3V
AT 200mA
RUN1
L1
2.2μH
SW1
SW2
C4, 22pF
M1
+
C6
47μF
C3
10μF
R4
887k R3
196k
C1, C2, C3: TAIYO YUDEN JMK316BJ106ML
C6: SANYO 6TPB47M
D1: PHILIPS PMEG2010
VFB1
VFB2
GND
R2
R1 887k
442k
C2
10μF
L1: MURATA LQH32CN2R2M33
L2: TOKO A914BYW-100M (D52LC SERIES)
M1: SILICONIX Si2302
Efficiency vs Load Current
3407 TA04
Efficiency vs Load Current
100
90
95
80
70
2.8V
2.8V
3.6V
90
4.2V
EFFICIENCY (%)
EFFICIENCY (%)
VOUT1 = 1.8V
AT 600mA
3.6V
60
50
4.2V
85
80
75
70
40 VOUT = 3.3V
Burst Mode OPERATION
NO LOAD ON OTHER CHANNEL
30
1
10
100
LOAD CURRENT (mA)
VOUT = 1.8V
Burst Mode OPERATION
NO LOAD ON OTHER CHANNEL
65
60
1000
1
10
100
LOAD CURRENT (mA)
1000
3407 TA06
3407 TA05
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LTC3414
4A (IOUT), 4MHz,
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95% Efficiency, VIN: 2.25V to 5.5V, VOUT(MIN) = 0.8V IQ = 64μA,
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LTC3440/LTC3441
600mA/1.2A (IOUT), 2MHz/1MHz,
Synchronous Buck-Boost DC/DC Converter
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ThinSOT is a trademark of Linear Technology Corporation.
3407fa
16 Linear Technology Corporation
LT 0809 REV A • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
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© LINEAR TECHNOLOGY CORPORATION 2003