IFX80471 Step-Down DC/DC Controller IFX80471SKV IFX80471SKV50 Data Sheet Rev. 1.0, 2011-02-07 Standard Power IFX80471 Table of Contents Table of Contents 1 Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 3 2 Block Diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 3.1 3.2 Pin Configuration . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin Assignment . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 Pin Definitions and Functions . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 4 4.1 4.2 4.3 General Product Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Absolute Maximum Ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Functional Range . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Thermal Resistance . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 5 5.1 5.2 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Electrical Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 Typical Performance Characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 6 6.1 6.2 6.3 Detailed Circuit Description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PFM/PWM Step-down regulator . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Battery voltage sense . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Undervoltage Reset . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 19 20 20 7 7.1 7.2 7.3 7.3.1 7.4 7.5 7.6 7.7 7.8 7.8.1 7.8.2 7.8.3 7.8.4 7.8.5 7.8.6 7.8.7 7.8.8 7.8.9 7.9 7.10 Application Information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . General . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Output voltage at adjustable version - feedback divider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SI_Enable . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Battery sense comparator - voltage divider . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Undervoltage reset - delay time . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 100% duty-cycle operation and dropout . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . SYNC Input and Frequency Control . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Shutdown Mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Buck converter circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Buck inductance (L1) selection in terms of ripple current: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Determining the current limit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . PFM and PWM thresholds . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Buck output capacitor (COUT) selection: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input capacitor (CIN1) selection: . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Freewheeling diode / catch diode (D1) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Buck driver supply capacitor (CBDS) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Input pi-filter components for reduced EME . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Frequency compensation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Components recommendation - Overview . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . Layout recommendation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 21 21 21 22 22 22 23 23 23 23 24 24 24 25 25 25 25 25 26 26 8 Package Outlines . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 9 Revision History . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 Data Sheet 2 7 7 8 9 Rev. 1.0, 2011-02-07 Step-Down DC/DC Controller 1 IFX80471 Overview Features • • • • • • • • • • • • • • Input voltage range from 5V up to 60V Output voltage: 5V fixed or adjustable Output voltage accuracy: 3% Output current up to 2.3A 100% maximum duty cycle Less than 120µA quiescent current at low loads1) 2µA max. shutdown current at device off (IFX80471SKV) Fixed 360kHz switching frequency Frequency synchronization input for external clocks Current Mode control scheme Integrated output undervoltage reset circuit2) On chip low battery detector (on chip comparator) Temperature range -40°C to 125 °C Green Product (RoHS compliant) PG-DSO-14 1) dependent on external component 2) for the adjustable version IFX80471SKV the reset functionality is available for output voltages > 7V For automotive and transportation applications, please refer to the Infineon TLE and TLF voltage regulator series. Description The IFX80471 step-down DC-DC switching controllers provide high efficiency over loads ranging from 1mA up to 2.3A. A unique PWM/PFM control scheme operates with a duty cycle up to 100% resulting in a very low dropout voltage. This control scheme eliminates minimum load requirements and reduces the supply current under light loads to 120µA, depending on dimensioning of external components. In addition the adjustable version IFX80471SKV can be shut down via the Enable input reducing the input current to <2µA. The IFX80471 step-down controllers drive an external P-channel MOSFET, allowing design flexibility for applications up to 11.5W of output power at 5V output voltage. The IFX80471 offers high switching frequency of up to 360kHz as well as operation in continuous-conduction mode and allows the usage of tiny surface-mount inductors. Output capacitor requirements are also reduced, minimizing PC board area and system costs. The output voltage of the IFX80471SKV50 is preset to 5V and is adjustable for the IFX80471SKV. The IFX80471SKV50 features a reset function with a threshold between 4.5V and 4.8V, including a small hysteresis of typ. 50mV. Input voltages of both IFX80471 versions can be up to 60V. Type Package Marking IFX80471SKV PG-DSO-14 I80471V IFX80471SKV50 PG-DSO-14 I80471V50 Data Sheet 3 Rev. 1.0, 2011-02-07 IFX80471 Block Diagram 2 Block Diagram VS VOUT BDS ENA BLE Battery Sense and Undervoltage Reset Internal Power Supply and Biasing FB SIGND SI RO SO PWM / PFM Regulator G DRV Driver CS COMP Clock generator Voltage Reference Block IFX80471SKV Figure 1 Data Sheet SYNC GND Block Diagram 4 Rev. 1.0, 2011-02-07 IFX80471 Pin Configuration 3 Pin Configuration 3.1 Pin Assignment ENABLE / SI_ENABLE 1 14 CS FB 2 13 VS VOUT 3 12 GDRV GND 4 11 BDS SYNC 5 10 RO SI_GND 6 9 SO SI 7 8 COMP Figure 2 Pin Configuration 3.2 Pin Definitions and Functions Pin Symbol Function 1 ENABLE Active-High enable input (only adjustable version, IFX80471SKV) for the device. The device is shut down when ENABLE is driven low. In this shut down-mode the reference, the output and the external MOSFET are turned off. Connect to logic high for normal operation. 1 SI_ENABLE Active-High enable input (only 5V version, IFX80471SKV50) for SI_GND input. SI_GND is switched to high impedance when SI_ENABLE is low. High level at SI_ENABLE connects SI_GND to GND with low impedance. SO is undefined when SI_ENABLE is low. 2 FB Feedback input. 1. For adjustable version (IFX80471SKV) connect this pin to an external voltage divider from the output to GND (see Chapter 7.2). 2. For the 5V fixed output voltage version (IFX80471SKV50) the FB is connected to an on-chip voltage divider supplied internally by VOUT. It does not have to be connected externally to the output. 3 VOUT Buck output voltage input. Input for the internal supply. Connect always to the output of the buck converter (output capacitor). Data Sheet 5 Rev. 1.0, 2011-02-07 IFX80471 Pin Configuration Pin Symbol Function 4 GND Ground connection. Analog signal ground. 5 SYNC Input for external frequency synchronization. An external clock signal connected to this pin allows switching frequency synchronization of the device. The internal oscillator is clocked then by the frequency applied at the SYNC input. 6 SI_GND SI-Ground input. Ground connection for SI comparator resistor divider. Depending on SI_ENABLE this input is switched to high impedance or low ohmic to GND. 7 SI Sense comparator input. Input of the low-battery comparator. This input is compared to an internal 1.25V reference where SO gives the result of the comparison. Can be used for any comparison, not necessarily as battery sense. 8 COMP Compensation input. Connect via RC-compensation network to GND. 9 SO Sense comparator output. Open drain output from SI comparator at the adjustable version (IFX80471SKV), Pull down structure with an internal 20kΩ pull up resistor to VOUT at the 5V version (IFX80471SKV50). 10 RO Reset output. Open drain output from undervoltage reset comparator at the adjustable version (IFX80471SKV), Pull down structure with an internal 20kΩ pull up resistor to VOUT at the 5V version (IFX80471SKV50). 11 BDS Buck driver supply input. Connect a ceramic capacitor between BDS and VS to generate clamped gatesource voltage to supply the driver of the PMOS power stage. 12 GDRV Gate drive output. Connect to the gate of the external P-Channel MOSFET. The voltage at GDRV swings between the levels of VS and BDS. 13 VS Device supply input. Connect a 220nF ceramic cap close to the pin in addition to the low ESR tantalum input capacitance. 14 CS Current-sense input. Connect current-sense resistor between VS and CS. The voltage drop over the sense-resistor determines the peak current flowing in the buck circuit. The external MOSFET is turned off when the peak current is exceeded. Data Sheet 6 Rev. 1.0, 2011-02-07 IFX80471 General Product Characteristics 4 General Product Characteristics 4.1 Absolute Maximum Ratings Absolute Maximum Ratings 1) all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Max. -0.3 61 V – – – – – Device supply input VS 4.1.1 Voltage 4.1.2 Current VVS IVS Current sense input CS 4.1.3 Voltage 4.1.4 Current VCS ICS -0.3 61 V |VVS - VCS| < 0.3V – – – – Gate drive output GDRV 4.1.5 Voltage VGDRV – 0.3 61 V -0.3V < |VVS -VGDRV| < 6.8V; -0.3V < |VBDS - VGDRV| < 6.8V 4.1.6 Current IGDRV – – – limited internally Buck driver supply input BDS 4.1.7 Voltage VBDS – 0.3 61 V -0.3V < |VVS - VBDS| < 6.8V 4.1.8 Current IBDS – – – – VFB IFB – 0.3 6.8 V – – – – – 61 V IFX80471SKV50 – – – Feedback input FB 4.1.9 Voltage 4.1.10 Current Enable input SI_ENABLE 4.1.11 Voltage 4.1.12 Current VSI_ENABLE – 0.3 ISI_ENABLE – SI-Ground input SI_GND 4.1.13 Voltage 4.1.14 Current VSI_GND ISI_GND – 0.3 61 V – – – – – VENABLE IENABLE – 0.3 61 V IFX80471SKV – – V – VSI ISI – 0.3 61 V – – – V – VSO ISO – 0.3 6.8 V – – – V limited internally Enable input ENABLE 4.1.15 Voltage 4.1.16 Current Sense comparator input SI 4.1.17 Voltage 4.1.18 Current Sense comparator output SO 4.1.19 Voltage 4.1.20 Current Data Sheet 7 Rev. 1.0, 2011-02-07 IFX80471 General Product Characteristics Absolute Maximum Ratings (cont’d)1) all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Max. VVOUT VVOUT IVOUT – 0.3 15 V IFX80471SKV – 0.3 6.8 V IFX80471SKV50 – – V – VCOMP ICOMP – 0.3 6.8 V – – – V – VRO IRO – 0.3 6.8 V – – – V limited internally VSYNC ISYNC – 0.3 6.8 V – – – V – TJ TSTG -40 150 °C – -50 150 °C – 1.5 kV HBM2) 2 kV HBM2) 500 V CDM3) Buck output voltage input VOUT 4.1.21 Voltage 4.1.22 Voltage 4.1.23 Current Compensation input COMP 4.1.24 Voltage 4.1.25 Current Reset output RO 4.1.26 Voltage 4.1.27 Current Frequency synchronization input SYNC 4.1.28 Voltage 4.1.29 Current Temperatures 4.1.30 Junction Temperature 4.1.31 Storage temperature ESD Susceptibility 4.1.32 ESD Resistivity Pin VOUT 4.1.33 ESD Resistivity all Pins except VOUT 4.1.34 ESD Resistivity to GND VESD_VOUT -1.5 VESD -2 VESD -500 1) Not subject to production test, specified by design. 2) ESD susceptibility, HBM according to EIA/JESD 22-A114B 3) ESD susceptibility, Charged Device Model “CDM” EIA/JESD22-C101 or ESDA STM5.3.1 Note: Stresses above the ones listed here may cause permanent damage to the device. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Note: Integrated protection functions are designed to prevent IC destruction under fault conditions described in the data sheet. Fault conditions are considered as “outside” normal operating range. Protection functions are not designed for continuous repetitive operation. Data Sheet 8 Rev. 1.0, 2011-02-07 IFX80471 General Product Characteristics 4.2 Functional Range [ Table 1 Pos. Parameter Symbol Limit Values Unit Conditions Min. Max. VVS VOUT 5 60 V – 7 15 V IFX80471SKV 10 47 mΩ Calculation see Chapter 7 4.2.1 Supply Voltage Range 4.2.2 Output voltage adjust range IFX80471SKV 4.2.3 Sense Resistor RSENSE 4.2.4 PMOS, on+off delay ton+off delay – tmin-300 1) ns tmin= VVOUT / (VVS*fSW) 4.2.5 Buck driver supply capacitor 220 – nF – 4.2.6 Buck inductance 22 100 µH –2) 4.2.7 Buck output capacitor 100 – µF – 4.2.8 Junction Temperature CBDS L1 COUT Tj -40 125 °C – 1) A too high PMOS on+off delay might cause an instable output voltage 2) a recommended minimum value for L1 is 47µH Note: Within the functional or operating range, the IC operates as described in the circuit description. The electrical characteristics are specified within the conditions given in the Electrical Characteristics table. Data Sheet 9 Rev. 1.0, 2011-02-07 IFX80471 General Product Characteristics 4.3 Thermal Resistance Note: This thermal data was generated in accordance with JEDEC JESD51 standards. For more information, go to www.jedec.org. Pos. 4.3.1 4.3.2 Parameter Symbol Junction to Soldering Point Junction to Ambient 1) 1) RthJSP RthJA Limit Values Unit Conditions Min. Typ. Max. – 50 – K/W – – 140 – K/W Footprint only 1) Not subject to production test, specified by design. Data Sheet 10 Rev. 1.0, 2011-02-07 IFX80471 Electrical Characteristics 5 Electrical Characteristics 5.1 Electrical Characteristics Electrical Characteristics: Power 5V < VVS < 48V; Tj = -40 °C to +125 °C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. – 80 150 µA VVS = 48V; – 70 85 µA VVS = 13.5V; µA Tj = 25 °C VVS = 48V; VSI_ENABLE = 48V; Current Consumption1) IFX80471SKV50 5.1.1 Current consumption of VS IVS PFM mode PFM mode; 5.1.2 Current consumption of SI_ENABLE ISI_ENABLE – 9 30 PFM mode 5.1.3 Current consumption of VOUT IVOUT 95 – 130 µA VSI_ENABLE = L; VVOUT = 5.5V; VVS=13.5V; PFM mode; Tj = 25°C 140 – 220 µA VSI_ENABLE = H; VVOUT = 5.5V; VVS = 13.5V; VSI > VSI, high; PFM mode 5.1.4 Current consumption of SI ISI 0.2 – 0.5 µA VSI_ENABLE = H; VVS = 13.5V; VSI = 10V; PFM mode 1) Current Consumption IFX80471SKV (variable) 5.1.5 Current consumption of VS IVS 80 – 150 µA VVS = 48V; VENABLE = H; PFM mode; VOUT > 7V 70 – 85 µA VVS = 13.5V; VENABLE = H; PFM mode; Tj = 25 °C; VOUT > 7V 5.1.6 Current consumption of VS 5.1.7 Current consumption of ENABLE – IEN 9 – 2 µA 30 µA VENABLE = 0V; Tj < 105°C VVS = 48V; VENABLE = H; PFM mode Data Sheet 10 Rev. 1.0, 2011-02-07 IFX80471 Electrical Characteristics Electrical Characteristics: Power (cont’d) 5V < VVS < 48V; Tj = -40 °C to +125 °C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. 5.1.8 Parameter Current consumption of VOUT Symbol IVOUT Limit Values Min. Typ. Max. – 140 220 Unit Conditions µA VOUT = 8V; VVS = 13.5V; VENABLE = H; VSI > VSI, high; PFM mode 5.1.9 Current consumption of SI ISI 0.2 – 0.5 µA VVS = 13.5V; VENABLE = H; VSI = 10V; PFM mode; Tj = 25°C 5.1.10 Current consumption of FB IFB 0.2 – 0.5 µA VVS = 13.5V; VFB = 1.25V; VENABLE = H; PFM mode; Tj = 25°C Buck Controller 5.1.11 Output voltage 5.1.12 FB threshold voltage 5.1.13 Output voltage Data Sheet VVOUT VFB, th VVOUT 4.85 5.00 5.15 V IFX80471SKV50; VVS=13.5V& 48V; PWM mode IOUT = 0.5 to 2A; RSENSE = 22mΩ; RM1 = 0.25Ω; RL1 = 0.1Ω 4.75 5.00 5.25 V IFX80471SKV50; VVS = 24V; PFM mode; IOUT = 15mA; RSENSE = 22mΩ; RM1 = 0.25Ω; RL1 = 0.1Ω; 1.225 1.25 1.275 V IFX80471SKV 9.7 10.0 10.3 V IFX80471SKV; Calibrated divider, see Chapter 7.2; VVS = 13.5V & 48V; IOUT = 0.5 to 2A; PWM mode; RSENSE = 22mΩ; RM1 = 0.25Ω; RL1 = 0.1Ω; 9.5 10.0 10.5 V IFX80471SKV; Calibrated divider, see Chapter 7.2; VVS = 24V; IOUT = 15mA; PFM mode; RSENSE = 22mΩ; RM1 = 0.25Ω; RL1 = 0.1Ω; 11 Rev. 1.0, 2011-02-07 IFX80471 Electrical Characteristics Electrical Characteristics: Power (cont’d) 5V < VVS < 48V; Tj = -40 °C to +125 °C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol 5.1.14 Buck output voltage adjust range VVOUT Limit Values Min. Typ. Max. VFB, th – 7 Unit Conditions V IFX80471SKV, supplied by VS only, complete current to supply the IC drawn from VS, no reset function 2) 7 – 15 V IFX80471SKV, current to supply the IC drawn from VS and VOUT, as specified 2) 5.1.15 Buck output voltage accuracy VVOUT 0.97 * – VOUT_nom 1.03 * VOUT_nom IFX80471SKV; PWM mode 2) 5.1.16 Buck output voltage accuracy VVOUT 0.95 * – VOUT_nom IFX80471SKV, PFM mode 2) 5.1.17 Line regulation |ΔV VOUT | – 1.05 * VOUT_nom – 35 mV IFX80471SKV50, VVS = 9V to 16V; IOUT = 1A; RSENSE = 22mΩ; PWM mode – – 50 mV IFX80471SKV50, VVS = 16V to 32V; IOUT = 1A; RSENSE = 22mΩ; PWM mode – – 2.5 % IFX80471SKV, VVS = 12V to 36V; VVOUT=10V IOUT = 1A; RSENSE = 22mΩ; PWM mode – 40 – mV/ A 5.1.18 Line regulation ΔV VOUT/ VVOUT 5.1.19 Load regulation ΔV VOUT/ ΔILOAD IFX80471SKV50; IOUT = 0.5A to 2A; VVS = 5.8V & 48V; RSENSE = 22mΩ 5.1.20 Gate driver, PMOS off 5.1.21 Gate driver, PMOS on 5.1.22 Gate driver, UV lockout – 8* – VOUT_nom /V mV/ A VVS – VGDRV 0 – 0.2 V VVS – VGDRV 6 – 8.2 V – 4 V VVS – VBDS 2.75 IFX80471SKV; IOUT = 0.5 to 2A; VVS= 13.5V & 48V; RSENSE = 22mΩ VENABLE/SI_ENABLE = 5 V; CBDS = 220 nF; CGDRV = 4.7nF VENABLE/SI_ENABLE = 5 V; CBDS = 220 nF; CGDRV = 4.7nF3) Decreasing (VVS-VBDS) until GDRV is permanently at VS level 5.1.23 Gate driver, peak charging current 5.1.24 Gate driver, IGDRV – 1 – A PMOS dependent; 2) IGDRV – 1 – A PMOS dependent; 2) peak discharging current Data Sheet 12 Rev. 1.0, 2011-02-07 IFX80471 Electrical Characteristics Electrical Characteristics: Power (cont’d) 5V < VVS < 48V; Tj = -40 °C to +125 °C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Unit Conditions Min. Typ. Max. tr – 45 60 ns tf – 50 65 ns VLIM = VVS - VCS fOSC dMAX tMIN Δfsync 50 70 90 mV 290 360 420 kHz PWM mode only 100 – – % PWM mode only – 220 400 ns PWM mode only 250 – 530 kHz PWM mode only VSYNC,h VSYNC,l 4.0 – – V 2) – – 0.8 V 2) 5.1.34 Reset headroom VRT,HEAD 80 – – mV 5.1.35 Reset threshold VVOUT, RT 4.5 4.65 4.8 V 5.1.36 Reset threshold hysteresis ΔVVOUT, RT – 50 – mV IFX80471SKV50 2) 5.1.37 Reset threshold VFB, RT – 1.12 – V IFX80471SKV; VVOUT decreasing – 1.17 – V IFX80471SKV; VVOUT increasing IFX80471SKV50; Internally connected to VOUT 5.1.25 Gate driver, gate voltage, rise time 5.1.26 Gate driver, gate voltage, fall time 5.1.27 Peak current limit threshold voltage 5.1.28 Oscillator frequency 5.1.29 Maximum duty cycle 5.1.30 Minimum on time 5.1.31 SYNC capture range 5.1.32 SYNC trigger level high 5.1.33 SYNC trigger level low VENABLE/SI_ENABLE = 5 V; CBDS = 220 nF; CGDRV = 4.7nF VENABLE/SI_ENABLE = 5 V; CBDS = 220 nF; CGDRV = 4.7nF Reset Generator IFX80471SKV50; VOUT (VS=6V, ILOAD=1A) -VVOUT,RT IFX80471SKV50; VVOUT increasing/decreasing 5.1.38 Reset output pull up resistor RRO 10 20 40 kΩ 5.1.39 Reset output High voltage VRO, H 0.8 * VVOUT – – V 5.1.40 Reset output Low voltage VRO,L – 0.2 0.4 V – 0.2 0.4 V 17 21 25 ms 70 82 100 ms IFX80471SKV50 µs 2) 5.1.41 Reset delay time 5.1.42 Reset reaction time trd IFX80471SKV50; IRO = 0mA IRO, L = 1mA; 2.5V < VVOUT < VRT IRO, L = 0.2mA; 1V < VVOUT < 2.5V IFX80471SKV trr – – VVOUT, OV – VOUT_nom – mV IFX80471SKV50; VVOUT increasing VFB, OV – VFB,th,nom – mV IFX80471SKV; VVOUT increasing 10 Overvoltage Lockout 5.1.43 Overvoltage threshold 5.1.44 Overvoltage threshold Data Sheet + 100 + 20 13 Rev. 1.0, 2011-02-07 IFX80471 Electrical Characteristics Electrical Characteristics: Power (cont’d) 5V < VVS < 48V; Tj = -40 °C to +125 °C, all voltages with respect to ground, positive current flowing into pin (unless otherwise specified) Pos. Parameter Symbol Limit Values Min. Unit Conditions Typ. Max. – – V – 0.8 V ENABLE Input 5.1.45 Enable ON-threshold 5.1.46 Enable OFF-threshold Venable,ON 4.5 Venable,OFF – SI_ENABLE Input 5.1.47 Enable ON-threshold 5.1.48 Enable OFF-threshold Venable,ON 4.5 Venable,OFF – – – V – 0.8 V RSW 50 100 230 Ω VSI_ENABLE = 5V; ISI_GND = 3mA VSI, low VSI, high VSI, hys RSO 1.22 1.25 1.28 V VVS decreasing – 1.33 – V VVS increasing 30 80 120 mV 10 20 40 kΩ SI_GND Input 5.1.49 Switch ON resistance Battery Voltage Sense 5.1.50 Sense threshold 5.1.51 Sense threshold 5.1.52 Sense threshold hysteresis 5.1.53 Sense output pull up resistor 5.1.54 Sense out output High voltage VSO,H 0.8 * V VVOUT 5.1.55 Sense out output Low voltage VSO,L IFX80471SKV50; Internally connected to VVOUT ISO,H =0mA 0.2 0.4 V 0.4 VVOUT V ISO,L = 1mA; 2.5V < VVOUT; VSI < 1.13 V ISOL=0.2mA; 1V < VVOUT < 2.5V; VSI < 1.13 V 175 200 °C 2) K 2) Thermal Shutdown 5.1.56 Thermal shutdown junction temperature 5.1.57 Temperature hysteresis TjSD 150 ΔT 30 1) The device current measurements for IVS and IFB exclude MOSFET driver currents. 2) Not subject to production test - specified by design 3) For 4V < VVS < 6V: VGDRV ≈ 0V. Data Sheet 14 Rev. 1.0, 2011-02-07 IFX80471 Electrical Characteristics 5.2 Typical Performance Characteristics Typical Performance Characteristics Current Consumption IVS versus Junction Temperature TJ (INH = ON), VVS = 13.5 V IVS µA Current Consumption IVOUT versus Junction Temperature TJ (INH = ON), VVOUT = 5.5 V 90 IVOUT µA 80 180 170 70 160 60 150 50 140 40 130 30 120 20 -50 -20 10 40 70 100 130 Tj 110 -50 160 -20 10 40 70 100 130 °C °C Current Consumption IVS versus Junction Temperature TJ (INH = ON), VVOUT = 48 V IVS µA Current Consumption IVOUT vs. Junction Temperature TJ (INH = ON), VOUT = 10 V (IFX80471SKV) 110 IVOUT µA 100 160 150 90 140 80 130 70 120 60 110 50 100 40 -50 -20 10 40 70 100 130 Tj 90 -50 160 °C Data Sheet 160 Tj -20 10 40 70 100 130 Tj 160 °C 15 Rev. 1.0, 2011-02-07 IFX80471 Electrical Characteristics Internal oscillator frequency fOSC versus Junction Temperature Tj) fOSC kHz Peak current limit threshold voltage VLIM versus Junction Temperature Tj 380 VLIM mV 370 110 100 360 90 350 80 340 70 330 60 320 50 310 -50 -20 10 40 70 100 130 Tj 40 -50 160 -20 10 40 70 100 130 Minimum on time tMIN (blanking) versus Junction Temperature Tj ns Gate driver supply VVS - VBDS versus Junction Temperature Tj 350 8.6 VVS-VBDS V 325 8.4 300 8.2 275 8.0 250 7.8 225 7.6 200 7.4 175 -50 -20 10 40 70 100 130 Tj 7.2 -50 160 °C Data Sheet 160 °C °C tMIN Tj -20 10 40 70 100 130 Tj 160 °C 16 Rev. 1.0, 2011-02-07 IFX80471 Electrical Characteristics Lower Reset threshold VFB,RT versus Junction Temperature Tj (IFX80471SKV) VFB,RT V Lower Sense threshold VSI, low versus Junction Temperature Tj 1.14 VSI,low V 1.13 1.28 1.27 1.12 1.26 1.11 1.25 1.10 1.24 1.09 1.23 1.08 1.22 1.07 -50 -20 10 40 70 100 130 Tj 1.21 -50 160 -20 10 40 70 100 °C Ω VOUT V 7 240 6 200 5 160 4 120 3 80 2 40 1 -50 -20 10 40 70 100 130 Tj 0 160 °C Data Sheet 160 Output Voltage versus Load Current (IFX80471SKV50) 280 0 Tj °C On resistance of SI_GND switch RSW versus Junction Temperature Tj RSW 130 IFX80471SKV50 RSENSE = 50mΩ VVS = 13.5V App. Circuit Fig. 6 0 0.25 0.5 0.75 1.0 1.25 1.5 1.75 ILOAD A 17 Rev. 1.0, 2011-02-07 IFX80471 Electrical Characteristics Output voltage vs. Load Current (IFX80471SKV) VOUT 1.4 IFX80471SKV RSENSE = 50mΩ VVS = 13.5V App. Circuit Fig. 5 V OUT,nom 1.2 1.0 0.8 0.6 0.4 0.2 0 0 0.25 0.5 0.75 1.0 1.25 1.5 1.75 ILOAD A Data Sheet 18 Rev. 1.0, 2011-02-07 IFX80471 Detailed Circuit Description 6 Detailed Circuit Description In the following, the internal blocks of the IFX80471 are described in more detail. For selecting external components please refer to the section “Application Information” on Page 21. 6.1 PFM/PWM Step-down regulator To meet also high requirements in terms of current consumption a special PFM (Pulse Frequency Modulation) PWM (Pulse Width Modulation) control scheme for highest efficiency is implemented in the IFX80471 regulators. Under light load conditions the output voltage is able to increase slightly and at a certain threshold the controller jumps into PFM mode. In this PFM operation the PMOS is triggered with a certain on time (depending on input voltage, output voltage, inductance- and sense resistor value) whenever the buck output voltage decreases to the so called WAKE-threshold. The switching frequency of the step down regulator is determined in the PFM mode by the load current. It increases with increasing load current and turns finally to the fixed PWM frequency at a certain load current depending on the input voltage, current sense resistor and inductance. The diagram below shows the buck regulation circuit of the IFX80471. VS CS + - VFB, OV + Currentsense Amplifier VREF - VREF VDIODE + OverVoltage Lockout - OverTemp. Shutdown VS Blanking VREF + VFB >1 + - Error Amplifier S PWM Comparator VREF + Slopecompensation R GDRV Q & Levelshift WakeComparator BDS PFM VFB, WK - MUX PWM SYNC MODE Oscillator Figure 3 Buck control scheme The IFX80471 uses a slope-compensated peak current mode PWM control scheme in which the feedback or output voltage of the step down circuit and the peak current of the current through the PMOS are compared to form the OFF signal for the external PMOS. The ON-trigger is set periodically by the internal oscillator when acting in PWM mode and is given by the output of the WAKE-comparator when operating in PFM mode. The Multiplexer (MUX) is switched by the output of the MODE-detector which distinguishes between PFM and PWM by tracking the output voltage (go to PFM) and by tracking the gate trigger frequency (goto PWM). In PFM mode the peak current limit is reduced to prevent overshoots at the output of the buck regulator. In order to avoid a gate turn off signal due to the current peak caused by the parasitic capacitance of the catch diode the blanking filter is necessary. The blanking time is set internally to 200ns and determines (together with the PMOS turn on and turn off delay) the minimum duty cycle of the device. In addition to the PFM/PWM regulation scheme an overvoltage lockout and thermal protection are implemented to guarantee safe operation of the device and of the supplied application circuit. Data Sheet 19 Rev. 1.0, 2011-02-07 IFX80471 Detailed Circuit Description 6.2 Battery voltage sense To detect undervoltage conditions at the battery a sense comparator block is available within the IFX80471. The voltage at the SI input is compared to an internal reference of typ. 1.25V. The output of the comparator drives a NMOS structure giving a low signal at SO as soon as the voltage at SI decreases below this threshold. In the 5V fixed version an internal pull up resistor is connected from the drain of the NMOS to the output of the buck converter, in the variable version SO is open drain. The sense in voltage divider can be switched to high impedance by a low signal at the SI_ENABLE to avoid high current consumption to GND (IFX80471SKV50 only). Of course the sense comparator can be used for any input voltage and does not have to be used for the battery voltage sense only. 6.3 Undervoltage Reset The output voltage is monitored continuously by the internal undervoltage reset comparator. As soon as the output voltage decreases below the thresholds given in the characteristics the NPN structure pulls RO low (latched). In the 5V fixed version an internal pull up resistor is connected from the collector of the NPN to the output of the buck converter, in the variable version RO is open collector. At power up RO is kept low until the output voltage has reached its reset threshold and stayed above this threshold for the power on reset delay time. Data Sheet 20 Rev. 1.0, 2011-02-07 IFX80471 Application Information 7 Application Information Note: The following information is given as a hint for the implementation of the device only and shall not be regarded as a description or warranty of a certain functionality, condition or quality of the device. 7.1 General The IFX80471 step-down DC-DC controllers are designed primarily for use in industrial applications and offer a large flexibility in the input voltage range they can handle. Using an external P-MOSFET and current-sense resistor allows design flexibility and the improved efficiencies associated with high-performance P-channel MOSFETs. The unique, peak current-limited, PWM/PFM control scheme gives these devices excellent efficiency over wide load ranges, while drawing around 100µA current from the battery under no load condition. This wide dynamic range optimizes the IFX80471 for applications, where load currents can vary considerably as individual circuit blocks are turned on and off to conserve energy. Operation to a 100% duty cycle allows the lowest possible dropout voltage, maintaining operation during cold cranking. High switching frequencies and a simple circuit topology minimize PC board area and component costs. 7.2 Output voltage at adjustable version - feedback divider The output voltage is sensed either by an internal voltage divider connected to the VOUT pin (IFX80471SKV50, fixed 5V version) or an external divider from the Buck output voltage to the FB pin (IFX80471SKV, adjustable version). The Vout pin has to be connected always to the Buck converter output regardless which output voltage for the adjustable version is desired. To determine the resistors of the feedback divider for the desired output voltage VOUT at the IFX80471SKV select RFB2 between 5kΩ and 500kΩ and obtain RFB1 with the following formula: V OUT R FB1 = R FB2 ⋅ ⎛⎝ ---------------– 1⎞ V FB, th ⎠ VFB is the threshold of the error amplifier with its value of typical 1.25V which shows that the output voltage can be adjusted in a range from 1.25V to 15V. However the integrated Reset function will only be operational if the output voltage level is adjusted to >7V. Also the current consumption will be increased in PFM mode in the range between 1.25V and 7V. 7.3 SI_Enable Connecting SI_ENABLE to 5V causes SI_GND to have low impedance. Thus the SI comparator is in operation and can be used to monitor the battery voltage. SO output signal is valid. Connecting SI_ENABLE to GND causes SI_GND to have high impedance. Thus the SI comparator is not able to monitor the battery voltage. SO output signal is invalid. Data Sheet 21 Rev. 1.0, 2011-02-07 IFX80471 Application Information 7.3.1 Battery sense comparator - voltage divider The formula to calculate the resistor divider for the sense comparator is basically the same as for the feedback divider in section before. With the selected resistor RSI2, the desired threshold of the input voltage VIN, UV and the lower sense threshold VSI, low the resistor RSI1 is given to: V IN, UV ⎞ R SI1 = R SI2 ⋅ ⎛⎝ ------------------ – 1⎠ V SI, low For high accuracy and low ohmic resistor divider values the on-resistance of the SI_GND NMOS (typ. 100Ω) has to be added to RSI2. 7.4 Undervoltage reset - delay time The diagram below shows the typical behavior of the reset output in dependency on the input voltage VIN, the output voltage VVOUT or VFB. VIN t < trr VVOUT VFB VVOUT, RT VFB,RT t trr VRD VRD, UT VRD, LT t VRO trd trd trd trd t thermal shutdown under voltage Figure 4 Reset timing 7.5 100% duty-cycle operation and dropout over load The IFX80471 operates with a duty cycle up to 100%. This feature allows to operate with the lowest possible drop voltage at low battery voltage as it occurs at cold cranking. The MOSFET is turned on continuously when the supply voltage approaches the output voltage level, conventional switching regulators with less than 100% duty cycle would fail in that case. Data Sheet 22 Rev. 1.0, 2011-02-07 IFX80471 Application Information The drop- or dropout voltage is defined as the difference between the input and output voltage levels when the input is low enough to drop the output out of regulation. Dropout depends on the MOSFET drain-to-source onresistance, the current-sense resistor and the inductor series resistance. It is proportional to the load current: V drop = I LOAD ⋅ ( R DS ( ON )PMOS + R SENSE + R INDUCTANCE ) 7.6 SYNC Input and Frequency Control The IFX80471’s internal oscillator is set for a fixed PWM switching frequency of 360kHz or can be synchronized to an external clock at the SYNC pin. When the internal clock is used SYNC has to be connected to GND. SYNC is a negative-edge triggered input that allows synchronization to an external frequency ranging between 270kHz and 530kHz. When SYNC is clocked by an external signal, the converter operates in PWM mode until the load current drops below the PWM to PFM threshold. Thereafter the converter continues operation in PFM mode. 7.7 Shutdown Mode Connecting ENABLE to GND places the IFX80471SKV in shutdown mode. In shutdown, the reference, control circuitry, external switching MOSFET, and the oscillator are turned off and the output falls to 0V. Connect ENABLE to voltages higher than 4.5V for normal operation. As this input operates analogue way the voltage applied at this pin should have a slope of 0.5V/3µs as a minimum requirement to avoid undefined states within the device. 7.8 Buck converter circuit A typical choice of external components for the buck converter circuit is given in Figure 5 and Figure 6. For basic operation of the buck converter the input capacitors CIN1, CIN2, the driver supply capacitor CBDS, the sense resistor RSENSE, the PMOS device, the catch diode D1, the inductance L1 and the output capacitor COUT are necessary. In addition for low electromagnetic emission a Pi-filter at the input and/or a small resistor in the path between GDRV and the gate of the PMOS may be necessary. 7.8.1 Buck inductance (L1) selection in terms of ripple current The internal PWM/PFM control loop includes a slope compensation for stable operation in PWM mode. This slope compensation is optimized for inductance values of 47µH and Sense resistor values of 47mΩ for the 5V output voltage versions. When choosing an inductance different from 47µH the Sense resistor has to be changed also: R SENSE 3Ω ------------------- = (0,5...1,0 ) ×10 ---H L1 Increasing this ratio above 1000 Ω/H may result in sub harmonic oscillations as well-known for peak current mode regulators without integrated slope compensation. To achieve the same effect of slope compensation in the adjustable voltage version also the inductance in µH is given by Data Sheet 23 Rev. 1.0, 2011-02-07 IFX80471 Application Information HH –4 ⎛ 2,0 × 10 –4 ⋅ -------⋅ V OUT ⋅ R SENSE⎞ < L1 < ⎛ 4,0 × 10 ⋅ --------- ⋅ V ⋅ R SENSE⎞ ⎝ ⎠ ⎝ ⎠ VΩ VΩ OUT The inductance value determines together with the input voltage, the output voltage and the switching frequency the current ripple which occurs during normal operation of the step down converter. This current ripple is important for the all over ripple at the output of the switching converter. ( V IN – V OUT ) ⋅ V OUT ΔI = -----------------------------------------------------f SW ⋅ V IN ⋅ L1 In this equation fsw is the actual switching frequency of the device, given either by the internal oscillator or by an external source connected to the SYNC pin. When picking finally the inductance of a certain supplier (Epcos, Coilcraft etc.) the saturation current has to be considered. The saturation current value of the desired inductance has to be higher than the maximum peak current which can appear in the actual application. 7.8.2 Determining the current limit The peak current which the buck converter is able to provide is determined by the peak current limit threshold voltage VLIM and the sense resistor RSENSE. With a maximum peak current given by the application (IPEAK, PWM=ILOAD+0.5ΔI) the sense resistor is calculated to V LIM R SENSE = -----------------------------------2 ⋅ I PEAK, PWM The equation above takes account for the foldback characteristic of the current limit as shown in the figures ’Output Voltage versus Load Current’ on page 17/18 by introducing a factor of 2. It must be assured by correct dimensioning of RSENSE that the load current doesn’t reach the foldback part of the characteristic curve. 7.8.3 PFM and PWM thresholds The crossover thresholds PFM to PWM and vice versa strongly depend on the input voltage VIN, the Buck converter inductance L1, the sense resistor value RSENSE and the turn on and turn off delays of the external PMOS. 7.8.4 Buck output capacitor (COUT) selection: The choice of the output capacitor effects straight to the minimum achievable ripple which is seen at the output of the buck converter. In continuous conduction mode the ripple of the output voltage can be estimated by the following equation: 1 -⎞ V Ripple = ΔI ⋅ ⎛ R ESRCOUT + ----------------------------------⎝ ⎠ ⋅C 8⋅f SW Data Sheet 24 OUT Rev. 1.0, 2011-02-07 IFX80471 Application Information From the formula it is recognized that the ESR has a big influence in the total ripple at the output, so low ESR tantalum or ceramic capacitors are recommended for the application (recommended range: 50mOhm to 150mOhm). One other important thing to note are the requirements for the resonant frequency of the output LC-combination. The choice of the components L and C have to meet also the specified range given in Chapter 4.2 otherwise instabilities of the regulation loop might occur. 7.8.5 Input capacitor (CIN1) selection: At high load currents, where the current through the inductance flows continuously, the input capacitor is exposed to a square wave current with its duty cycle VOUT/VI. To prevent a high ripple to the battery line a capacitor with low ESR should be used. The maximum RMS current which the capacitor has to withstand is calculated to: 2 V OUT 1 ΔI I RMS = I LOAD ⋅ -------------⋅ 1 + --- ⋅ ⎛⎝ -----------------------⎞⎠ 3 2 ⋅ I LOAD V IN For low ESR an e.g. Al-electrolytic capacitance in parallel to an ceramic capacitance could be used. 7.8.6 Freewheeling diode / catch diode (D1) For lowest power loss in the freewheeling path Schottky diodes are recommended. With those types the reverse recovery charge is negligible and a fast hand over from freewheeling to forward conduction mode is possible. Depending on the application (12V battery systems) 40V types could be also used instead of the 60V diodes. Also for high temperature operation select a Schottky-diode with low reverse leakage. A fast recovery diode with recovery times in the range of 30ns can be also used if smaller junction capacitance values (smaller spikes) are desired. 7.8.7 Buck driver supply capacitor (CBDS) The voltage at the ceramic capacitor is clamped internally to 7V, a ceramic type with a minimum of 220nF and voltage class 16V would be sufficient. 7.8.8 Input pi-filter components for reduced EME At the input of Buck converters a square wave current is observed causing electromagnetic interference on the battery line. The emission to the battery line consists on one hand of components of the switching frequency (fundamental wave) and its harmonics and on the other hand of the high frequency components derived from the current slope. For proper attenuation of those interferers a π-type input filter structure is recommended which is built up with inductive and capacitive components in addition to the Input caps CIN1 and CIN2. The inductance can be chosen up to the value of the Buck converter inductance, higher values might not be necessary, the additional capacitance should be a ceramic type in the range up to 100nF. Inexpensive input filters show due to their parasitics a notch filter characteristic, which means basically that the low pass filter acts from a certain frequency as a high pass filter and means further that the high frequency components are not attenuated properly. To slower down the slopes at the gate of the PMOS switch and get down the emission in the high frequency range a small gate resistor can be put between GDRV and the PMOS gate. 7.8.9 Frequency compensation The external frequency compensation pin should be connected via a 22nF (>10V) ceramic capacitor and a 430 Ω (1/8W) resistor to GND. This node should be kept free from switching noise. Data Sheet 25 Rev. 1.0, 2011-02-07 IFX80471 Application Information 7.9 Components recommendation - Overview Device Values / Remarks CIN1 100μF, 60V CIN2 220nF, 60V L1 47μH, 1.6A, 145mΩ 47μH, 3.5A, 47mΩ 47μH, 3.8A, 110mΩ 68μH, 3.5A, 130mΩ 47μH, 4.0A, 97mΩ M1 60V, 3.44A, 130mΩ, NL 60V, 2.9A, 130mΩ, NL 60V, 9A, 250mΩ, LL CBDS 220nF, 16V D1 Schottky, 60V, 3A Schottky, 40V, 3A Schottky, 40V, 3A COUT Low ESR Tantalum, 100μF, 10V CCOMP see 7.8.9. 7.10 Layout recommendation The most sensitive points for Buck converters - when considering the layout - are the nodes at the input, output and the gate of the PMOS transistor and the feedback path. For proper operation and to avoid stray inductance paths the external catch diode, the Buck inductance and the input capacitor CIN1 have to be connected as close as possible to the PMOS device. Also the GDRV path from the controller to the MOSFET has to be as short as possible. Best suitable for the connection of the cathode of the catch diode and one terminal of the inductance would be a small plain located next to the drain of the PMOS. The GND connection of the catch diode must be also as short as possible. In general the GND level should be implemented as surface area over the whole PCB as second layer, if necessary as third layer. The feedback path has to be well grounded also, a ceramic capacitance might help in addition to the output cap to avoid spikes. To obtain the optimum filter capability of the input pi-filter it has to be located also as close as possible to the input. To filter the supply input of the device (VS) the ceramic cap should be connected directly to the pin. As a guideline an EMC optimized application board / layout is available. Data Sheet 26 Rev. 1.0, 2011-02-07 IFX80471 Application Information R SEN SE = VIN M1 47mΩ to e.g. 5V rail CIN1 = CBD S= 220 nF 100 μF 13 CIN2 = 220nF RSI 2= 100kΩ 14 BDS VS 3 GDRV CS VOUT SO SI_GND ENABLE SYNC GND 1 ON 5 2 100 μF RFB 1= 330kΩ M1: Infineon BSO 613SPV or Infineon BSP 613P 22nF 8 RO 4 COU T = to µC 9 FB COMP SI 6 Figure 5 12 IFX80471SKV 7 R SO = RR O = 20kΩ D1 11 RSI 1= 400kΩ VOUT L1 = 47 μH RFB 2= 47kΩ 430Ω 10 to µC OFF Application Diagram circuit IFX80471SKV R SEN SE = VIN M1 47mΩ L1 = 47 μH VOUT I OUT CIN1 = 100 μF CBD S= 220 nF 11 13 RSI 1= CIN2 = 400kΩ 220nF RSI 2= 100kΩ 14 CS B DS 100 μF 2 3 FB VOUT 9 SO 8 COMP M1: Infineon BSO613SPV or Infineon BSP613P IFX80471SKV50 SI SI_GND SI_E NABLE 1 6 ON Figure 6 12 GDRV VS 7 COU T = D1 S YNC 5 GND RO 4 10 22nF 430Ω OFF Application Diagram circuit IFX80471SKV50 Note: This is a very simplified example of an application circuit. The function must be verified in the real application. Data Sheet 27 Rev. 1.0, 2011-02-07 IFX80471 Package Outlines 8 Package Outlines 1.75 MAX. C 1) 4 -0.2 B 1.27 0.64 ±0.25 0.1 2) 0.41+0.10 -0.06 6±0.2 0.2 M A B 14x 14 0.2 M C 8 1 7 1) 8.75 -0.2 8˚MAX. 0.19 +0.06 0.175 ±0.07 (1.47) 0.35 x 45˚ A Index Marking 1) Does not include plastic or metal protrusion of 0.15 max. per side 2) Lead width can be 0.61 max. in dambar area GPS01230 Figure 7 PG-DSO-14 Green Product (RoHS compliant) To meet the world-wide customer requirements for environmentally friendly products and to be compliant with government regulations the device is available as a green product. Green products are RoHS-Compliant (i.e Pb-free finish on leads and suitable for Pb-free soldering according to IPC/JEDEC J-STD-020). For further information on alternative packages, please visit our website: http://www.infineon.com/packages. Data Sheet 28 Dimensions in mm Rev. 1.0, 2011-02-07 IFX80471 Revision History 9 Revision History Revision Date Changes 1.0 2011-02-07 Data Sheet - Initial Release Data Sheet 29 Rev. 1.0, 2011-02-07 Edition 2011-02-07 Published by Infineon Technologies AG 81726 Munich, Germany © 2011 Infineon Technologies AG All Rights Reserved. Legal Disclaimer The information given in this document shall in no event be regarded as a guarantee of conditions or characteristics. With respect to any examples or hints given herein, any typical values stated herein and/or any information regarding the application of the device, Infineon Technologies hereby disclaims any and all warranties and liabilities of any kind, including without limitation, warranties of non-infringement of intellectual property rights of any third party. Information For further information on technology, delivery terms and conditions and prices, please contact the nearest Infineon Technologies Office (www.infineon.com). Warnings Due to technical requirements, components may contain dangerous substances. For information on the types in question, please contact the nearest Infineon Technologies Office. The Infineon Technologies component described in this Data Sheet may be used in life-support devices or systems and/or automotive, aviation and aerospace applications or systems only with the express written approval of Infineon Technologies, if a failure of such components can reasonably be expected to cause the failure of that life-support automotive, aviation and aerospace device or system or to affect the safety or effectiveness of that device or system. Life support devices or systems are intended to be implanted in the human body or to support and/or maintain and sustain and/or protect human life. If they fail, it is reasonable to assume that the health of the user or other persons may be endangered. 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