LTC3723-1/LTC3723-2
Synchronous Push-Pull
PWM Controllers
DESCRIPTIO
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FEATURES
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High Efficiency Synchronous Push-Pull PWM
1.5A Sink, 1A Source Output Drivers
Supports Push-Pull, Full-Bridge, Half-Bridge, and
Forward Topologies
Adjustable Push-Pull Dead-Time and Synchronous
Timing
Adjustable System Undervoltage Lockout and
Hysteresis
Adjustable Leading Edge Blanking
Low Start-Up and Quiescent Currents
Current Mode (LTC3723-1) or Voltage Mode
(LTC3723-2) Operation
Single Resistor Slope Compensation
VCC UVLO and 25mA Shunt Regulator
Programmable Fixed Frequency Operation to 1MHz
50mA Synchronous Output Drivers
Soft-Start, Cycle-by-Cycle Current Limiting and
Hiccup Mode Short-Circuit Protection
5V, 15mA Low Dropout Regulator
Available in 16-Pin SSOP Package
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APPLICATIO S
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The robust push-pull output stages switch at half the
oscillator frequency. Dead-time is independently programmed with an external resistor. Synchronous rectifier
timing is adjustable to optimize efficiency. A UVLO program input provides precise system turn-on and turn off
voltages. The LTC3723-1 features peak current mode
control with programmable slope compensation and leading edge blanking, while the LTC3723-2 employs voltage
mode control with voltage feedforward capability.
The LTC3723-1/LTC3723-2 feature extremely low operating and start-up currents. Both devices provide reliable
short-circuit and overtemperature protection. The
LTC3723-1/LTC3723-2 are offered in a 16-pin SSOP
package.
, LTC and LT are registered trademarks of Linear Technology Corporation.
All other trademarks are the property of their respective owners.
Telecommunications, Infrastructure Power Systems
Distributed Power Architectures
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The LTC®3723-1/LTC3723-2 synchronous push-pull PWM
controllers provide all of the control and protection functions necessary for compact and highly efficient, isolated
power converters. High integration minimizes external
component count, while preserving design flexibility.
TYPICAL APPLICATIO
Isolated Push-Pull Converter
VOUT
VIN
UVLO
FROM
AUXILIARY
WINDING
ME
DRVA
•
SPRG
SYNC
LTC3901
DRVB
VCC
VREF
•
CS
MF
DPRG
CT
SDRA
RLEB
SDRB
VOUT
VREF
VREF
LTC3723-1
VOUT
SS
V+
COLL
LT1431
RREF
COMP
FB GND
GND-F GND-S
372312 TA01
372312f
1
LTC3723-1/LTC3723-2
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ABSOLUTE
AXI U RATI GS
(Note 1)
VCC to GND (Low Impedance Source) .......– 0.3V to 10V
(Chip Self-Regulates at 10.3V)
UVLO to GND ............................................. – 0.3V to VCC
All Other Pins to GND
(Low Impedance Source) .........................– 0.3V to 5.5V
VCC (Current Fed) ................................................. 40mA
VREF Output Current ............................... Self-Regulated
Operating Temperature (Notes 5,6)
LTC3723E ........................................... – 40°C to 85°C
Storage Temperature Range ................. – 65°C to 125°C
Lead Temperature (Soldering, 10sec)................... 300°C
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PACKAGE/ORDER I FOR ATIO
TOP VIEW
TOP VIEW
VREF
1
16 SPRG
VREF
1
16 SPRG
SDRB
2
15 UVLO
SDRB
2
15 UVLO
SDRA
3
14 SS
SDRA
3
14 SS
DRVB
4
13 FB
DRVB
4
13 FB
VCC
5
12 RLEB
VCC
5
12 DPRG
DRVA
6
11 COMP
DRVA
6
11 COMP
GND
7
10 CS
GND
7
10 CS
CT
8
9
CT
8
9
DPRG
GN PACKAGE
16-LEAD PLASTIC SSOP
TJMAX = 125°C, θJA = 100°C/W
ORDER PART NUMBER
LTC3723EGN-1
RAMP
GN PACKAGE
16-LEAD PLASTIC SSOP
TJMAX = 125°C, θJA = 100°C/W
GN PART MARKING
ORDER PART NUMBER
GN PART MARKING
37231
LTC3723EGN-2
37232
Order Options Tape and Reel: Add #TR
Lead Free: Add #PBF Lead Free Tape and Reel: Add #TRPBF
Lead Free Part Marking: http://www.linear.com/leadfree/
Consult LTC Marketing for parts specified with wider operating temperature ranges.
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 9.5V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
10.25
10.7
V
Input Supply
VCCUV
VCC Undervoltage Lockout
Measured on VCC
VCCHY
VCC UVLO Hysteresis
Measured on VCC
ICCST
Start-Up Current
VCC = VUVLO – 0.3V
ICCRN
Operating Current
No Load on Outputs
VSHUNT
Shunt Regulator Voltage
Current into VCC = 10mA
RSHUNT
Shunt Resistance
Current into VCC = 10mA to 17mA
SUVLO
System UVLO Threshold
Measured on UVLO Pin, 10mA into VCC
4.8
SHYST
System UVLO Hysteresis Current
Current Flows Out of UVLO Pin, 10mA into VCC
8.5
10
3.8
●
4.2
V
230
µA
3
8
mA
10.3
10.8
V
1.4
3.5
Ω
5.0
5.2
V
11.5
µA
145
Pulse Width Modulator
ROS
Ramp Offset Voltage
Measured on COMP, RAMP = 0V
IRMP
Ramp Discharge Current
RAMP = 1V, COMP = 0V, CT = 4V, 3723-1 Only
0.65
50
V
mA
372312f
2
LTC3723-1/LTC3723-2
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 9.5V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
ISLP
Slope Compensation Current
Measured on CS, CT = 1V, 3723-1 Only
CT = 2.25V
MIN
DCMAX
Maximum Duty Cycle
COMP = 4.5V
●
DCMIN
Minimum Duty Cycle
COMP = 0V
●
DTADJ
Dead-Time
TYP
MAX
47
48.2
UNITS
µA
µA
30
68
50
%
0
%
130
ns
Oscillator
OSCI
Initial Accuracy
TA = 25°C, CT = 270pF
OSCT
VCC Variation
VCC = 6.5V to 9.5V, Overtemperature
OSCV
CT Ramp Amplitude
Measured on CT
220
●
250
–3
280
kHz
3
%
2.35
V
Error Amplifier
VFB
FB Input Voltage
COMP = 2.5V, (Note 3)
1.172
FBI
FB Input Range
Measured on FB, (Note 4)
– 0.3
70
1.2
1.22
V
2.5
V
50
nA
AVOL
Open-Loop Gain
COMP = 1V to 3V, (Note 3)
IIB
Input Bias Current
COMP = 2.5V, (Note 3)
90
VOH
Output High
Load on COMP = –100µA
VOL
Output Low
Load on COMP = 100µA
ISOURCE
Output Source Current
COMP = 2.5V
400
700
µA
ISINK
Output Sink Current
COMP = 2.5V
2
5
mA
4.925
5.00
5.075
2
15
mV
mV
5
4.7
dB
4.92
0.27
V
0.5
V
Reference
VREF
Initial Accuracy
TA = 25°C, Measured on VREF
REFLD
Load Regulation
Load on VREF = 100µA to 5mA
REFLN
Line Regulation
VCC = 6.5V to 9.5V
REFTV
Total Variation
Line, Load and Temperature
REFSC
Short-Circuit Current
1
10
4.900
5.000
5.100
VREF Shorted to GND
18
30
45
9.0
●
V
V
mA
Push-Pull Outputs
DRVH(x)
Output High Voltage
IOUT(x) = –100mA
DRVL(x)
Output Low Voltage
IOUT(x) = 100mA
0.17
9.2
V
0.6
V
RDH(x)
Pull-Up Resistance
IOUT(x) = –10mA to –100mA
2.9
4
Ω
RDL(x)
Pull-Down Resistance
IOUT(x) = –10mA to –100mA
1.7
2.5
Ω
TDR(x)
Rise-Time
COUT(x) = 1nF
10
ns
TDF(x)
Fall-Time
COUT(x) = 1nF
10
ns
9.2
V
Synchronous Outputs
OUTH(x)
Output High Voltage
IOUT(x) = –30mA
OUTL(x)
Output Low Voltage
IOUT(x) = 30mA
RHI(x)
Pull-Up Resistance
IOUT(x) = –10mA to -30mA
RLO(x)
Pull-Down Resistance
TR(x)
Rise-Time
TF(x)
Fall-Time
9.0
0.44
0.6
V
11
15
Ω
IOUT(x) = –10mA to -30mA
15
20
COUT(x) = 50pF
10
ns
COUT(x) = 50pF
10
ns
Ω
Current Limit and Shutdown
CLPP
Pulse by Pulse Current Limit Threshold
Measured on CS
280
300
320
mV
475
600
725
mV
CLSD
Shutdown Current Limit Threshold
Measured on CS
CLDEL
Current Limit Delay to Output
100mV Overdrive on CS, (Note 2)
80
ns
372312f
3
LTC3723-1/LTC3723-2
ELECTRICAL CHARACTERISTICS
The ● denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VCC = 9.5V unless otherwise noted.
SYMBOL
PARAMETER
CONDITIONS
SSI
Soft-Start Current
SS = 2.5V
SSR
Soft-Start Reset Threshold
Measured on SS
0.7
0.4
0.1
V
FLT
Fault Reset Threshold
Measured on SS
4.5
4.2
3.5
V
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TYPICAL PERFOR A CE CHARACTERISTICS
150
10.25
250
FREQUENCY (kHz)
260
VCC (V)
ICC (µA)
10.50
0
10.00
9.75
9.50
0
2
6
4
8
10
10
0
30
20
ISHUNT (mA)
40
240
220
– 60 – 40 – 20 0
20 40 60
TEMPERATURE (°C)
50
80
100
372312 G03
VREF vs Temperature
VREF vs IREF
350
µA
CT = 270pF
372312 G02
372312 G01
Leading Edge Blanking Time
vs RLEB
UNITS
230
VCC (V)
5.01
5.05
300
TJ = 25°C
5.00
5.00
250
TJ = 85°C
150
4.95
VREF (V)
200
VREF (V)
BLANK TIME (ns)
16
Oscillator Frequency vs
Temperature
200
50
MAX
13
(TA = 25°C unless otherwise noted)
VCC vs ISHUNT
100
TYP
10
performance specifications from 0°C to 70°C. Specifications over the
–40°C to 85°C operating temperature range are assured by design,
characterization and correlation with statistical process controls.
Note 6: This IC includes overtemperature protection that is intended to
protect the device during momentary overload conditions. Junction
temperature will exceed 125°C when overtemperature protection is active.
Continuous operation above the specified maximum operating junction
temperature may impair device reliability.
Note 1: Absolute Maximum Ratings are those values beyond which the life
of a device may be impaired.
Note 2: Includes leading edge blanking delay, RLEB = 20k, not tested in
production.
Note 3: FB is driven by a servo loop amplifier to control VCOMP for these
tests.
Note 4: Set FB to –0.3V, 2.5V and insure that COMP does not phase invert.
Note 5: The LTC3723E–1/LTC3723E-2 are guaranteed to meet
Start-Up ICC vs VCC
MIN
4.90
TJ = –40°C
100
4.99
4.98
4.85
50
0
4.80
0 10 20 30 40 50 60
RLEB (kΩ)
70 80 90 100
372312 G04
0
5
10
15 20
25
IREF (mA)
30
35
40
372312 G05
4.97
– 60 – 40 – 20 0
20 40 60
TEMPERATURE (°C)
80
100
372312 G06
372312f
4
LTC3723-1/LTC3723-2
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TYPICAL PERFOR A CE CHARACTERISTICS
PHASE (DEG)
100
80
60
40
20
0
190
275
180
250
170
225
160
200
DELAY (ns)
200k PREBIAS
150
140
–180
175
150
130
125
–270
120
100
–360
110
75
10
100
1k
10k
100k
FREQUENCY (Hz)
1M
100
–55
10M
50
–25
5
35
65
TEMPERATURE (°C)
95
372312 G07
125
900
ICC = 10mA
80
800
10.4
CT = 2.25V
50
40
CT = 1V
10.3
600
DELAY (ns)
SHUNT VOLTAGE (V)
700
60
10.2
10.1
500
400
300
10.0
200
20
9.9
10
5
35
65
TEMPERATURE (°C)
95
125
100
9.8
–55
0
–25
5
35
65
TEMPERATURE (°C)
95
0
50
150
200
100
RSPRG (kΩ)
FB Input Voltage vs Temperature
350
1.204
300
1.203
250
1.202
200
1.201
1.200
250
300
372312 G12
Synchronous Driver Turn-Off
Delay vs RSPRG Referenced to
Push-Pull Driver Outputs
1.205
RDPRG = 150k
150
100
1.199
50
1.198
0
1.197
–55
125
372312 G11
372312 G10
DELAY (ns)
–25
FB VOLTAGE (V)
0
–55
50 100 150 200 250 300 350 400 450 500
RDPRG (kΩ)
Synchronous Driver Turn-Off Delay
vs RSPRG Referenced to CT Peak
10.5
30
0
372312 G09
VCC Shunt Voltage vs
Temperature
90
70
NO 200k PREBIAS
372312 G08
Slope Current vs Temperature
CURRENT (µA)
LTC3723 Deadtime vs RDPRG
With and Without 200k Prebias
Compensation
Start-Up ICC vs Temperature
ICC (µA)
GAIN (dB)
Error Amplifier Gain/Phase
(TA = 25°C unless otherwise noted)
–50
–25
5
35
65
TEMPERATURE (°C)
95
125
372312 G13
0
50
100
150
200
RSPRG (kΩ)
250
300
372312 G14
372312f
5
LTC3723-1/LTC3723-2
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PI DESCRIPTIO S
(LTC3723-1/LTC3723-2)
VREF (Pin 1/Pin 1): Output of the 5.0V Reference. VREF is
capable of supplying up to 18mA to external circuitry. VREF
should be decoupled to GND with a 0.47µF ceramic
capacitor.
SDRB (Pin 2/Pin 2): 50mA Driver for Synchronous Rectifier associated with DRVB.
SDRA (Pin 3/Pin 3): 50mA Driver for Synchronous Rectifier associated with DRVA.
DRVB (Pin 4/Pin 4): High Speed 1.5A Sink, 1A Source
Totem Pole MOSFET Driver. Connect to gate of external
push-pull MOSFET with as short a PCB trace as practical
to preserve drive signal integrity. A low value resistor
connected between DRVA and the MOSFET gate is optional and will improve the gate drive signal quality if the
PCB trace from the driver to the MOSFET cannot be made
short.
VCC (Pin 5/Pin 5): Supply Voltage Input to the LTC3723-1/
LTC3723-2 and 10.25V Shunt Regulator. The chip is
enabled after VCC has risen high enough to allow the VCC
shunt regulator to conduct current and the UVLO comparator threshold is exceeded. Once the VCC shunt regulator has turned on, VCC can drop to as low as 6V (typical)
and maintain operation. Bypass VCC to GND with a high
quality 1µF or larger ceramic capacitor to supply the
transient currents caused by the high speed switching and
capacitive loads presented by the on chip totem pole
drivers.
DRVA (Pin 6/Pin 6): High Speed 1.5A Sink, 1A Source
Totem Pole MOSFET Driver. Connect to gate of external
push-pull MOSFET with as short a PCB trace as practical
to preserve drive signal integrity. A low value resistor
connected between DRVA and the MOSFET gate is optional and will improve the gate drive signal quality if the
PCB trace from the driver to the MOSFET cannot be made
short.
GND (Pin 7/Pin 7): All circuits in the LTC3723 are referenced to GND. Use of a ground plane is highly recom-
mended. VIN and VREF bypass capacitors must be terminated with a star configuration as close to GND as practical
for best performance.
CT (Pin 8/Pin 8): Timing Capacitor for the Oscillator. Use
a ±5% or better low ESR ceramic capacitor for best
results. CT ramp amplitude is 2.35V peak-to-peak
(typical).
DPRG (Pin 9/Pin 12): Programming Input for Push-Pull
Dead-Time. Connect a resistor between DPRG and VREF
to program the dead-time. The nominal voltage on DPRG
is 2V.
RAMP (N/A/Pin 9): Input to PWM Comparator for
LTC3723-2 Only (Voltage Mode Controller). The voltage
on RAMP is internally level shifted by 650mV.
CS (Pin 10/Pin 10): Input to Pulse-by-Pulse and Overload
Current Limit Comparators, Output of Slope Compensation Circuitry. The pulse-by-pulse comparator has a nominal 300mV threshold, while the overload comparator has
a nominal 600mV threshold. An internal switch discharges
CS to GND after every timing period. Slope compensation
current flows out of CS during the PWM period.
An external resistor connected from CS to the external
current sense resistor programs the amount of slope
compensation.
COMP (Pin 11/Pin 11): Error Amplifier Output, Inverting
Input to Phase Modulator.
RLEB (Pin 12/N/A): Timing Resistor for Leading Edge
Blanking. Use a 10k to 100k resistor connected between
RLEB and GND to program from 40ns to 310ns of leading
edge blanking of the current sense signal on CS for the
LTC3723-1. A ±1% tolerance resistor is recommended.
The LTC3723-2 has a fixed blanking time of approximately
80ns. The nominal voltage on RLEB is 2V. If leading edge
blanking is not required, tie RLEB to VREF to disable.
FB (Pin 13/Pin 13): Error Amplifier Inverting Input. This is
the voltage feedback input for the LTC3723. The nominal
regulation voltage at FB is 1.2V.
372312f
6
LTC3723-1/LTC3723-2
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PI DESCRIPTIO S
(LTC3723-1/LTC3723-2)
SS (Pin 14/Pin 14): Soft-Start/Restart Delay Circuitry
Timing Capacitor. A capacitor from SS to GND provides a
controlled ramp of the current command (LTC3723-1) or
duty cycle (LTC3723-2). During overload conditions, SS is
discharged to ground initiating a soft-start cycle. SS
charging current is approximately 13µA. SS will charge up
to approximately 5V in normal operation. During a constant overload current fault, SS will oscillate at a low
frequency between approximately 0.5V and 4V.
threshold is exceeded, the LTC3723-1/LTC3723-2 commences a soft-start cycle and a 10µA (nominal) current is
fed out of UVLO to program the desired amount of system
hysteresis. The hysteresis level can be adjusted by changing the resistance of the divider. UVLO can also be used to
terminate all switching by pulling UVLO down to less than
4V. An open drain or collector switch can perform this
function without changing the system turn on or turn off
voltages.
UVLO (Pin 15/Pin 15): Input to Program System Turn-On
and Turn-Off Voltages. The nominal threshold of the UVLO
comparator is 5.0V. UVLO is connected to the main DC
system feed through a resistor divider. When the UVLO
SPRG (Pin 16/Pin 16): A resistor is connected between
SPRG and GND to set the turn off delay for the synchronous rectifier driver outputs. The nominal voltage on
SPRG is 2V.
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UW
TI I G DIAGRA
PROGRAMMABLE
SYNCHRONOUS
TURN-OFF DELAY
PROGRAMMABLE
DEAD-TIME
DRVA
DRVB
SDRA
SDRB
CURRENT
SENSE
OR CT RAMP
PWM
COMPARATOR
(–)
372312 TD01
372312f
7
LTC3723-1/LTC3723-2
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BLOCK DIAGRA S
LTC3723-1 Block Diagram
VCC
UVLO
VREF
CT
DPRG
SPRG
5
15
1
8
9
16
VCC UVLO
REF, LDO
1.2V
10µA
10.25V “ON”
6V “OFF”
–
FB 13
1.2V
5V
VCC
REF GOOD
ERROR
AMPLIFIER
+
+
5V
SYSTEM
UVLO
VCC
GOOD
3 SDRA
–
50k
PULSE WIDTH
MODULATOR
–
COMP 11
SYNC
RECTIFIER
DRIVE
LOGIC
2 SDRB
14.9k
+
+
OSCILLATOR
650mV
–
1A SOURCE
Q
R
6 DRVA
Q
+
S
–
R
Q
1.5A SINK
T
Q
S
VREF
1A SOURCE
13µA
SS 14
4 DRVB
+
600mV
SHUTDOWN
CURRENT
LIMIT
1.5A SINK
FAULT
LOGIC
–
SLOPE
COMPENSATOR
CS 10
+
BLANK
RLEB 12
PULSE-BY-PULSE
CURRENT LIMIT
7
300mV
–
GND
372312 BD01
372312f
8
LTC3723-1/LTC3723-2
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BLOCK DIAGRA S
LTC3723-2 Block Diagram
VCC
UVLO
VREF
CT
SPRG
5
15
1
8
16
VCC UVLO
–
FB 13
1.2V
REF, LDO
1.2V
10µA
10.25V “ON”
6V “OFF”
5V
VCC
REF GOOD
ERROR
AMPLIFIER
SYSTEM
UVLO
+
+
5V
50k
3 SDRA
–
+
+
SYNC
RECTIFIER
DRIVE
LOGIC
PULSE WIDTH
MODULATOR
–
COMP 11
VCC
GOOD
2 SDRB
OSCILLATOR
650mV
–
RAMP 9
1A SOURCE
Q
R
6 DRVA
Q
S
+
–
R
Q
Q
S
VREF
1.5A SINK
T
OUTPUT
DRIVE
LOGIC
1A SOURCE
4 DRVB
13µA
SS 14
1.5A SINK
SHUTDOWN
CURRENT
LIMIT
FAULT
LOGIC
+
600mV
CS 10
–
+
BLANK
300mV
–
PULSE-BY-PULSE
CURRENT LIMIT
7
9
GND
DPRG
372312 BD02
372312f
9
LTC3723-1/LTC3723-2
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OPERATIO
Please refer to the detailed Block Diagrams for this discussion. The LTC3723-1 and LTC3723-2 are synchronous
PWM push-pull controllers. The LTC3723-1 operates with
peak pulse-by-pulse current mode control while the
LTC3723-2 offers voltage mode control operation. They
are best suited for moderate to high power isolated power
systems where small size and high efficiency are required.
The push-pull topology delivers excellent transformer
utilization and requires only two low side power MOSFET
switches. Both controllers generate 180° out of phase
0% to < 50% duty cycle drive signals on DRVA and DRVB.
The external MOSFETs are driven directly by these powerful on-chip drivers. The external MOSFETs typically control opposite primary windings of a centertapped power
transformer. The centertap primary winding is connected
to the input DC feed. The secondary of the transformer can
be configured in different synchronous or nonsynchronous
configurations depending on the application needs.
The duty ratio is controlled by the voltage on COMP. A
switching cycle commences with the falling edge of the
internal oscillator clock pulse. The LTC3723-1 attenuates
the voltage on COMP and compares it to the current sense
signal to terminate the switching cycle. The LTC3723-2
compares the voltage on COMP to a timing ramp to
terminate the cycle. The LTC3723-2’s CT waveform can be
used for this purpose or separate R-C components can be
connected to RAMP to generate the timing ramp. If the
voltage on CS exceeds 300mV, the present cycle is terminated. If the voltage on CS exceeds 600mV, all switching
stops and a soft-start sequence is initiated.
The LTC3723-1 / LTC3723-2 also provide drive signals for
secondary side synchronous rectifier MOSFETs. Synchronous rectification improves converter efficiency, especially as the output voltages drop. Independent turn-off
control of the synchronous rectifiers is provided via SPRG
in order to optimize the benefit of the synchronous rectifiers. A resistor from SPRG to GND sets the desired turn
off delay.
A host of other features including an error amplifier,
system UVLO programming, adjustable leading edge blanking, slope compensation and programmable dead-time
provide flexibility for a variety of applications.
Programming Driver Dead-Time
The LTC3723-1/LTC3723-2 controllers include a feature
to program the minimum time between the output signals
on DRVA and DRVB commonly referred to as the driver
dead-time. This function will come into play if the controller is commanded for maximum duty cycle. The dead-time
is set with an external resistor connected between DPRG
and VREF (see Figure 1). The nominal regulated voltage on
DPRG is 2V. The external resistor programs a current
which flows into DPRG. The dead-time can be adjusted
from 90ns to 300ns with this resistor. The dead-time can
also be modulated based on an external current source
that feeds current into DPRG. Care must be taken to limit
the current fed into DPRG to 350µA or less. An internal
10µA current source sets a maximum deadtime if DPRG is
floated. The internal current source causes the programmed
deadtime to vary non-linearly with increasing values of
RDPRG (see typical performance characteristics). An external 200k resistor connected from DPRG to GND will
compensate for the internal 10µA current source and
linearize the deadtime delay vs RDPRG characteristic.
Powering the LTC3723-1/LTC3723-2
The LTC3723-1/LTC3723-2 utilize an integrated VCC shunt
regulator to serve the dual purposes of limiting the voltage
applied to VCC as well as signaling that the chip’s bias
voltage is sufficient to begin switching operation (under
voltage lockout). With its typical 10.2V turn-on voltage
and 4.2V UVLO hysteresis, the LTC3723-1/LTC3723-2 is
tolerant of loosely regulated input sources such as an
auxiliary transformer winding. The VCC shunt is capable of
sinking up to 40mA of externally applied current. The
UVLO turn-on and turn-off thresholds are derived from an
internally trimmed reference making them extremely accurate. In addition, the LTC3723-1/LTC3723-2 exhibits
VREF
RDPRG
OPTIONAL
200k
10µA
DPRG
+
+
V 2V
–
2.5V
–
TURN-ON
OUTPUT
372312 F01
Figure 1. Delay Timeout Circuitry
372312f
10
LTC3723-1/LTC3723-2
U
OPERATIO
very low (145µA typ) start-up current that allows the use
of 1/8W to 1/4W trickle charge start-up resistors.
The trickle charge resistor should be selected as follows:
RSTART(MAX) = VIN(MIN) – 10.7V/250µA
Adding a small safety margin and choosing standard
values yields:
APPLICATION
VIN RANGE
RSTART
DC/DC
36V to 72V
100k
Off-Line
85V to 270VRMS
430k
390VDC
1.4M
PFC Preregulator
VCC should be bypassed with a 0.1µF to 1µF multilayer
ceramic capacitor to decouple the fast transient currents
demanded by the output drivers and a bulk tantalum or
electrolytic capacitor to hold up the VCC supply before the
bootstrap winding, or an auxiliary regulator circuit takes
over.
VIN
VBIAS < VUVLO
1N5226
3V
1N914
RSTART
+
1µF
1µF
VCC
VCC
RTOP
UVLO
ON OFF
RBOTTOM
Figure 3. System UVLO Setup
Regulated bias supplies as low as 7V can be utilized to
provide bias to the LTC3723-1/LTC3723-2. Refer to
Figure 2 for various bias supply configurations.
1.5k
UVLO can also be used to enable and disable the power
converter. An open drain transistor connected to UVLO as
shown in Figure 3 provides this capability.
372312 F03
CHOLDUP = (ICC + IDRIVE) • tDELAY/3.8V
(minimum UVLO hysteresis)
12V ±10%
UVLO. The amount of DC feed hysteresis provided by this
current is: 10µA • RTOP, (Figure 3). The system UVLO
threshold is: 5V • {(RTOP + RBOTTOM)/RBOTTOM}. If the
voltage applied to UVLO is present and greater than 5V
prior to the VCC UVLO circuitry activation, then the internal
UVLO logic will prevent output switching until the following three conditions are met: (1) VCC UVLO is enabled, (2)
VREF is in regulation and (3) UVLO pin is greater than 5V.
CHOLD
372312 F02
Figure 2. Bias Configurations
Programming Undervoltage Lockout
The LTC3723-1/LTC3723-2 provides undervoltage lockout (UVLO) control for the input DC voltage feed to the
power converter in addition to the VCC UVLO function
described in the preceding section. Input DC feed UVLO is
provided with the UVLO pin. A comparator on UVLO
compares a divided down input DC feed voltage to the 5V
precision reference. When the 5V level is exceeded on
UVLO, the SS pin is released and output switching commences. At the same time a 10µA current is enabled which
flows out of UVLO into the voltage divider connected to
Off-Line Bias Supply Generation
If a regulated bias supply is not available to provide VCC
voltage to the LTC3723-1/LTC3723-2 and supporting
circuitry, one must be generated. Since the power requirement is small, approximately 1W, and the regulation is not
critical, a simple open-loop method is usually the easiest
and lowest cost approach. One method that works well is
to add a winding to the main power transformer, and post
regulate the resultant square wave with an L-C filter (see
Figure 4a). The advantage of this approach is that it
maintains decent regulation as the supply voltage varies,
and it does not require full safety isolation from the input
winding of the transformer. Some manufacturers include
a primary winding for this purpose in their standard
VIN
VCC
RSTART
2k
+
15V*
1µF
CHOLD
372312 F04a
*OPTIONAL
Figure 4a. Auxiliary Winding Bias Supply
372312f
11
LTC3723-1/LTC3723-2
U
OPERATIO
VIN
VOUT
LOUT
RSTART
ISO BARRIER
1µF
+
CHOLD
VCC
372312 F04b
Figure 4b. Output Inductor Bias Supply
Programming the LTC3723-1/LTC3723-2 Oscillator
The high accuracy LTC3723-1/LTC3723-2 oscillator circuit provides flexibility to program the switching frequency and slope compensation required for current
mode control (LTC3723-1). The oscillator circuit produces a 2.35V peak-to-peak amplitude ramp waveform on
CT. Typical maximum duty cycles of 49% are possible. The
oscillator is capable of operation up to 1MHz by the
following equation:
CT = 1/(14.8k • FOSC)
Note that this is the frequency seen on CT. The output
drivers switch at 1/2 of this frequency. Also note that
higher switching frequency and added driver dead-time
via DPRG will reduce the maximum duty cycle.
The LTC3723-1/LTC3723-2 can be synchronized to an
external frequency source such as another PWM chip. In
Figure 5, the leading edge of an external pulse is used to
terminate the natural clock cycle. If the external frequency
is higher than the oscillator frequency, the internal oscillator will synchronize with the external input frequency.
LTC3723
fOSC < fEXT < 1.25 • fOSC
CT
CT
EXTERNAL
FREQUENCY
SOURCE
68pF
fOSC ≅
fSW = fOSC/2
210µA
2.56V • CT
390Ω
BAT54
372312 F05
Figure 5. Synchronization from External Source
Single-Ended Operation
In addition to push-pull and full-bridge topologies, singleended topologies such as the forward and flyback converter can benefit from the many advanced features of the
LTC3723. In Figure 6, the LTC3723 is used with the
LTC4440, 100V high side driver to implement a twotransistor forward converter. DRVB is used which limits
the converter’s maximum duty cycle to 50% (less programmable driver dead time).
VIN
TG
LTC4440
IN
GND
TS
•
product offerings as well. A different approach is to add a
winding to the output inductor and peak detect and filter
the square wave signal (see Figure 4b). The polarity of this
winding is designed so that the positive voltage square
wave is produced while the output inductor is freewheeling. An advantage of this technique over the previous is
that it does not require a separate filter inductor and since
the voltage is derived from the well-regulated output
voltage, it is also well controlled. One disadvantage is that
this winding will require the same safety isolation that is
required for the main transformer. Another disadvantage
is that a much larger VCC filter capacitor is needed, since
it does not generate a voltage as the output is first starting
up, or during short-circuit conditions.
–VIN
DRVB
SDRB
LTC3723
CT
GND
TO SYNCHRONOUS
SECONDARY MOSFET
fSW ≅
210µA
2 • 2.56V • CT
CT
372312 F06
Figure 6. Two-Transistor Forward Converter (Duty Cycle < 50%)
372312f
12
LTC3723-1/LTC3723-2
U
OPERATIO
The 50% duty-cycle limit is overcome with the circuit
shown in Figure 7. Operation is similar to external synchronization, except DRVA output is used to terminate its
own clock cycle early. Switching period is now equal to the
oscillator period plus programmable driver dead time.
Maximum on time is equal to oscillator period minus
driver dead time.
Although near 100% duty cycle operation may be of
benefit with non-isolated converters, it is often desirable
to limit the duty cycle of single-ended isolated converters.
Instead of immediately ending the unused clock’s output,
Figure 8 uses a transistor to switch in additional timing
capacitor charge current. This allows one to preset the
maximum duty.
DRVA
Voltage Mode with LTC3723-2
Figure 9 shows how basic connections differ between
current mode LTC3723-1 and voltage mode LTC3723-2.
Oscillator may be used as the ramp input or the LTC37232 includes an internal 10mA ramp discharge useful when
implementing voltage feedforward. Open loop control in
which the duty cycle varies inversely proportional to input
voltage is shown in Figure 10.
LTC3723-1
CT
DPRG
VREF
9
1
8
CT
RLEB
12
RLEB
RDPRG
TO INPUT
VOLTAGE
DRVB
LTC3723-1
f SW ≅
CT
1
⎛ 2.56V • C T
⎞
+ TDPRG⎟
⎜
⎝ 210µA
⎠
LTC3723-2
CT
CT
⎞
⎛ 2.56V • C T
DMAX ≅ f SW ⎜
– TDPRG⎟
⎠
⎝ 210µA
68pF
BAT54
390Ω
RAMP
8
9
CT
LTC3723-2
VREF
DPRG
RAMP
1
12
9
CT
RDPRG
8
VREF
DPRG
1
12
CT RDPRG
372312 F09
372312 F07
Figure 9. LTC3723-1 Current Mode and LTC3723-2 Voltage
Mode Connections
Figure 7. LTC3723-1 > 50% Duty Cycle
TO INPUT
VOLTAGE
•
VIN
LTC3723-2
–VIN
CT
RAMP
8
9
COMP
FB
13
11
DRVB
DRVA
50k
MMBT2369
SDRB
LTC3723-1
VREF
CT
TO SYNCHRONOUS
SECONDARY MOSFET
f SW ≅
R
CT
CT
1
⎞
⎛ 1
1
2.56V • C T ⎜
+
⎟
⎝ 210µA 210µA + (3 / R) ⎠
⎛ 2.56V • C T
⎞
– TDPRG⎟
DMAX ≅ f SW ⎜
⎝ 210µA
⎠
372312 F10
Figure 10. LTC3723-2 Open Loop Control (Duty Cycle is
Inversely Proportional to Input Voltage)
372312 F08
Figure 8. LTC3723-1 One-Switch Forward or Flyback Converter
(Maximum Duty Cycle 50% to 100%)
372312f
13
LTC3723-1/LTC3723-2
U
OPERATIO
The LTC3723-1 derives a compensating slope current
from the oscillator ramp waveform and sources this
current out of CS. This function is disabled in the
LTC3723-2. The desired level of slope compensation is
selected with an external resistor connected between CS
and the external current sense resistor, (Figure 11).
Current Sensing and Overcurrent Protection
Current sensing provides feedback for the current mode
control loop and protection from overload conditions. The
LTC3723-1/LTC3723-2 are compatible with either resistive sensing or current transformer methods. Internally
connected to the LTC3723-1/LTC3723-2 CS pin are two
comparators that provide pulse-by-pulse and overcurrent
shutdown functions respectively, (Figure 12).
LTC3723
I=
CT
V(CT)
33k
SWITCH
CURRENT
CS
RSLOPE
ADDED
SLOPE
33k
CURRENT SENSE
WAVEFORM
RCS
The pulse-by-pulse comparator has a 300mV nominal
threshold. If the 300mV threshold is exceeded, the PWM
cycle is terminated. The overcurrent comparator is set
approximately 2x higher than the pulse-by-pulse level. If
the current signal exceeds this level, the PWM cycle is
terminated, the soft-start capacitor is quickly discharged
and a soft-start cycle is initiated. If the overcurrent condition persists, the LTC3723-1/LTC3723-2 halts PWM operation and waits for the soft-start capacitor to charge up
to approximately 4V before a retry is allowed. The softstart capacitor is charged by an internal 13µA current
source. If the fault condition has not cleared when softstart reaches 4V, the soft-start pin is again discharged and
a new cycle is initiated. This is referred to as hiccup mode
operation. In normal operation and under most abnormal
conditions, the pulse-by-pulse comparator is fast enough
to prevent hiccup mode operation. In severe cases, however, with high input voltage, very low RDS(ON) MOSFETs
and a shorted output, or with saturating magnetics, the
overcurrent comparator provides a means of protecting
the power converter.
372312 F11
Leading Edge Blanking
Figure 11. Slope Compensation Circuitry
PULSE BY PULSE
CURRENT LIMIT
S Q
S
–
OVERLOAD
CURRENT LIMIT
+
RCS
600mV
Q
R
S Q
–
UVLO
ENABLE
R
+
300mV
Q
H = SHUTDOWN
OUTPUTS
UVLO
ENABLE
–
CS
PWM
PWM
LOGIC
4.1V
+
+
PWM
LATCH
13µA
SS
0.4V
CSS
–
Q
372312 F12
The LTC3723-1/LTC3723-2 provides programmable leading edge blanking to prevent nuisance tripping of the
current sense circuitry. Leading edge blanking relieves the
filtering requirements for the CS pin, greatly improving the
response to real overcurrent conditions. It also allows the
use of a ground referenced current sense resistor or
transformer(s), further simplifying the design. With a
single 10k to 100k resistor from RLEB to GND, blanking
times of approximately 40ns to 320ns are programmed. If
not required, connecting RLEB to VREF can disable leading
edge blanking. Keep in mind that the use of leading edge
blanking will slightly reduce the linear control range for the
pulse width modulator.
Figure 12. Current Sense/Fault Circuitry Detail
372312f
14
LTC3723-1/LTC3723-2
U
OPERATIO
High Current Drivers
The LTC3723-1/LTC3723-2 high current, high speed drivers provide direct drive of external power N-channel
MOSFET switches. The drivers swing from rail to rail. Due
to the high pulsed current nature of these drivers (1.5A
sink, 1A source), care must be taken with the board layout
to obtain advertised performance. Bypass VCC with a 1µF
minimum, low ESR, ESL ceramic capacitor. Connect this
capacitor with minimal length PCB leads to both VCC and
GND. A ground plane is highly recommended. The driver
output pins (DRVA, DRVB) connect to the gates of the
external MOSFET switches. The PCB traces making these
connections should also be as short as possible to minimize overshoot and undershoot of the drive signal.
Synchronous Rectification
The LTC3723-1/LTC3723-2 produces the precise timing
signals necessary to control secondary side synchronous
rectifier MOSFETs on SDRA and SDRB. Synchronous
rectifiers are used in place of Schottky or silicon diodes on
the secondary side to improve converter efficiency. As
MOSFET RDS(ON) levels continue to drop, significant efficiency improvements can be realized with synchronous
rectification, provided that the MOSFET switch timing is
optimized. Synchronous rectification also provides bipolar output current capability, that is, the ability to sink as
well as source current.
new primary side power delivery pulse. This feature provides optimized timing for the synchronous MOSFETs
which improves efficiency. At higher load currents it
becomes more advantageous to delay the turn-off of the
synchronous rectifiers until the beginning of the new
power pulse. This allows for secondary freewheeling
current to flow through the synchronous MOSFET channel
instead of its body diode.
The turn-off delay is programmed with a resistor from
SPRG to GND, (Figure 13). The nominal regulated voltage
on SPRG is 2V. The external resistor programs a current
which flows out of SPRG. The delay can be adjusted from
approximately 20ns to 200ns, with resistor values of 10k
to 200k. Do not leave SPRG floating. The amount of delay
can also be modulated based on an external current
source that sinks current out of SPRG. Care must be taken
to limit the current out of SPRG to 350µA or less.
SPRG
RSPRG
+
V 2V
–
+
–
TURN-OFF
SYNC OUT
372312 F13
Figure 13. Synchronous Delay Circuitry
Programming the Synchronous Rectifier
Turn-Off Delay
The LTC3723-1/LTC3723-2 controllers include a feature
to program the turn-off edge of the secondary side synchronous rectifier MOSFETs relative to the beginning of a
372312f
15
16
1µF
15
5
220pF
100Ω
1/4W
10
8
10k
16
33k
12
7
13
4
DRVB
14
2
11
0.47µF
5V
1
820Ω
COMP
VREF
SDRB
3
SDRA
150k
68nF
9
SS DPRG
LTC3723EGN-1
CS
UVLO
CT SPRG RLEB GND FB
VCC
6
DRVA
330pF
470Ω
6
5
C6
2.2nF
250V
D5
D4
6
5
8
•
47nF
•
5
T2
1(1.5mH):0.5
1
4
100k
2
1
1k
0.1µF
C5
68µF
20V
L4
1mH
MOC207
22Ω
+
10V
4
1
•
66.5k
383k
30k
5V
75k
R2
0.06Ω
1.5W
Si7450DP
80Ω
1W
3
2
•
R1
0.06Ω
1.5W
Si7450DP
80Ω
1W
100pF
200V
9
10
7
8
11
12
3
8.5V
SYNC
360Ω
CSF –
6
5
GND-F GND-S
V+
LT1431CS8
COLL
REF
220pF
9
CSF+
8
MF
14
LTC3901EGN
MF CSE+
15
4.99k
1/4W
6
VE
Si7892DP
×3
VE
4.99k
CSE–
5
4
–VOUT
2.49k
787Ω
VOUT
8
13
Q2
0.022µF
270Ω
10
GND PGND GND PGND
4.99k
12
VF
L6 0.65µH
4.99k
1/4W
11
VF
Si7892DP
×3
100Ω
•
VIN
10V
1µF
100V
×3
100pF
200V
•
1µF
100V
VIN
•
–VIN
VIN
L5
1µH
1
T1
9T(150µH):9T:7T:1T:1T
165W, 36V to 72V to 3.3V at 50A Isolated Push-Pull Converter
47Ω
ME
2
+
D2
16
D7
0.68µF
390pF
PVCC
VCC
1
D1
–VOUT
330Ω
VOUT
7
TIMER
ME
3
C1, C2, C3
470µF
6.3V
×3
VF
1µF
Q1
8.5V
–VOUT
VOUT
–VOUT
D6
9.1V
100Ω
2k
1/4W
–VOUT
1µF
VOUT
372312 TA02
1µF, 100V TDK C3225X7R2A105M
C1-C3: SANYO 6TPB470M
C4: TDK C3225X7R1H335M
C5: AVX TPSE686M020R0150
C6: MURATA DE2E3KH222MB3B
D1, D2: DIODES INC. ES1A
D4, D5: BAS21
D6: MMBD5239B
D7: BAT54
L4: COILCRAFT DO1608C-105
L5: VISHAY IHLP-2525CZ-01
L6: PULSE PA1294.650
Q1: FZT690B
Q2: FMMT3904
R1, R2: IRC LRC-LR2512-01-R060-G
T1: EFD25 TRANSPOWER TTI8696
T2: PULSE PA0785
1µF
40.2k 100Ω
C4
3.3µF
50V
470Ω
1W
LTC3723-1/LTC3723-2
TYPICAL APPLICATIO S
372312f
U
–VIN
66.5k
A
50k
5
CT
8.66k
10nF
14 CT
MMBT2369
7
UVLO
GND SS
VCC
1µF
VREF
6
DRVA
A
8
CT
DRVB
4
120pF
220pF
10k
33k
16
12
13
0.47µF
1
22nF
VREF
VREF COMP
SDRB
158K
VREF
10
CS
9
174k
SPRG RLEB FB DPRG
LTC3723EGN-1
80
11
2
+
10V
6
4
1
5
24Ω
1/4W
6
1 T2 4
220pF
24Ω
1/4W
8
7
220pF
MOC207
220pF
2.2nF
250V
BAS21
BAS21
750Ω
VREF
L4
1mH
1.5nF
200V
3
5
2
1
8
1k
4.7nF
5
•
15
10V
50
60
70
OUTPUT POWER (W)
68µF
20V
0.03Ω
1W
1.78K
Si7450DP
2
T1
EFD20
•
383k
40
100Ω
1/4W
30k
48VIN
30
VIN
85
87
89
91
93
95
1µF
100V
×2
VIN
•
1µF
100V
L1
4.7µH
•
•
•
VIN
EFFICIENCY (%)
560Ω
6
5
OPTO
COMP
15nF
8
1.5k
OC
3
2
4
22nF
FB
470pF
6
GND
LTC3900ES8
GND
LT4430ES6
VIN
1
SYNC
2
CS–
1
CS+
5
909Ω
FG
CS+
1.00k
CG
4
21.5k
VOUT+
TIMER
CG VCC
3
1.13k
7
12Ω
1/4W
220pF
L3
33µH
12Ω
1/2W
1.5nF
L2
15µH
0.1µF
680pF
MMBD914
MMBD914
FG
2.7k
2.7k
Si7456DP
CG
Si7456DP
0.1µF
10µF
25V
10k
CS+
Si7456DP
Si7456DP
FG
LTC3723-1 36VIN to 72VIN to 12V/5A and –12V/1.6A Forward Converter
1nF
26.1k
VOUT
47µF
16V
×2
47µF
16V
×2
0.47µF
D1
4.3V
–VOUT
VOUT
372312 TA03
1µF, 100V TDK C3225X7R2A105M (1210)
10µF, 25V TDK C4532X5R1E106M
47µF, 16V SANYO 16TQC47M
D1: MMBZ5229B
L1: COILCRAFT DO1813P-561HC
L2: TDK SLF12575T-150M4R7
L3: TDK SLF10145T-330M1R6
L4: COILCRAFT DO1608C-105
T1: PULSE PA1040
T2: PULSE PA0785 (1:0.5T)
+
+
VOUT
LTC3723-1/LTC3723-2
TYPICAL APPLICATIO S
372312f
17
U
VIN
93
94
95
96
97
–VIN
6
8
66.5k
1.5nF
1µF
15
5
13 7
8
UVLO
FB GND CT
10k
270pF 33k
16
12 14
68nF
0.47µF
1
VREF
9
150k
SPRG RLEB SS DPRG
SDRB
VCC
DRVB
ISNS
DRVA
LTC3723EGN-1
R2
0.03Ω
1.5W
1.5k
2
B
R1
0.03Ω
1.5W
Si7852DP
4
4
A
2
B
243k
330pF
11
22nF
6
6
1
T2
1(1.5mH):0.5
1
4
D6
D5
Si7852DP
5
3
4
2
8
5
C4
2.2nF
250V
MOC207
665Ω
5
9
CSF+
22nF
D8
10V
11
1k
6.19k
1/4W
SYNC
220pF
100Ω
100k
2
1
866Ω
1k
1/4W
12
1
0.1µF
14 15
6
CSE+
L6
1.25µH
CSE–
5
8
3
V+
4
1k
100Ω
1/4W
6
5
GND-F GND-S
8
10
VOUT
–VOUT
2.49k
9.53k
13
2
+
VE
VF
3
16
C1, C2
47µF
16V
×2
22nF
10k
1
–VOUT
1µF
4.7µF
D7
10V
372312 TA04
MMBT3904
1k
1µF, 100V TDK C3225X7R2A105M
C1,C2: SANYO 16TQC47M
C3: AVX TPSE686M020R0150
C4: MURATA GHM3045X7R222K-GC
D2: DIODES INC. ES1B
D3-D6: BAS21
D7, D8: MMBZ5240B
L4: COILCRAFT DO1608C-105
L5: COILCRAFT DO1813P-561HC
L6: PULSE PA1294.132 OR
PANASONIC ETQP1H1R0BFA
R1, R2: IRC LRC2512-R03G
T1: PULSE PA0805.004
T2: PULSE PA0785
470pF
7
TIMER
PVCC
VOUT
–VOUT
12V/20A
VOUT
42.2k 100Ω
–VOUT
1µF
VOUT
470pF
100V
10Ω
1W
ME ME2 VCC
866Ω
GND PGND GND2 PGND2
LTC3901EGN
MF MF2
LT1431CS8
COLL
REF
CSF –
1k
6.19k
1/4W
VE
1µF
100V
D2
VF
VF
Si7370DP
×2
7
VE
Si7370DP
×2
11
9
T1
4T:6T(65µHMIN):6T:2T:2T
Si7852DP
0.1µF
L4
1mH
ISNS
22Ω
10
+
12V
750Ω
COMP
CS
SDRA
3
C3
68µF
20V
0.1µF
VCC
6
INP BOOST
LTC4440ES6
5 4.7Ω
TG
GND TS
6
A
0.1µF
20
200Ω
1/4W
4
3
D3
•
30k
1/4W
12V
2
Si7852DP
A
1
12V
•
464k
D4
VCC
6
INP BOOST
LTC4440ES6
5 4.7Ω
TG
GND TS
VIN
3
1
12V
18
56VIN
48VIN
42VIN
B
1µF
100V
×3
VIN
16
10
12
14
LOAD CURRENT (A)
1µF
100V
L5
0.56µH
•
•
42V TO 56V
EFFICIENCY (%)
•
•
•
18
•
LTC3723-1 240W 42VIN to 56VIN to 12V/20A Isolated 1/4Brick (2.3" × 1.45")
LTC3723-1/LTC3723-2
TYPICAL APPLICATIO S
372312f
U
LTC3723-1/LTC3723-2
U
TYPICAL APPLICATIO S
LTC3723-1 300W 42VIN to 56VIN to 12V/25A Isolated Bus Converter
VIN
BAS21
T1
29.46mm × 25.4mm × 10.2mm PLANAR
1
VCC
6
INP BOOST
LTC4440ES6
5 4.7Ω
TG
GND
TS
2
4
3
A
VCC
6
INP BOOST
LTC4440ES6
5 4.7Ω
TG
GND
TS
2
4
Si7370DP
0.1µF
Si7370DP
A
4
Si7370DP
0.1µF
3
11
9
7
VE
VF
HAT2169
×2
–VOUT
68µF
20V
–VOUT
VE
+VOUT
L3
1mH
4.53k
BAS21
1
+
4.53k
•
12V
ISNS
2.67k
2.67k
1.27k
1.27k
1k
BAS21
6
11
9
•
•
5
14 15
5
2
3
PGND
8
PVCC
GND2
PGND2
10
13
4
16
CSE– ME ME2 VCC
LTC3901EGN
GND
100Ω
MMBT3904
6
CSF – MF MF2 CSE+
SYNC
22Ω
8
12
CSF+
1 T2 4
0.1µF
220pF
VIN
22µF
25V
×3
B
100Ω
R1
0.015Ω
1.5W
+VOUT
L2
0.44µH
VF
1µF, 100V TDK C3225X7R2A105M
4.7µF, 25V TDK C4532X7R1E475M
22µF, 25V TDK C4532X7R1E226M
D1: MMBZ5240B
D2: MMBZ5242B
L1: COILCRAFT DO1813P-561HC
L2: PULSE PA0513.441
L3: COILCRAFT DO1608C-105
T1: PULSE PA0901.004 (4:4:4:4CT)
T2: PULSE PA0785 (1:0.5T)
–VOUT
+VOUT
2.2nF
250V
Si7370DP
33.2k
1
TIMER
7
4.7µF
–VOUT
100Ω
1/4W
5
464k
15
B
6
4
2
3
DRVA
DRVB
SDRB
SDRA
VCC
13 7
100pF
8
16
12 14
10
11
VREF
9
1
95
53VIN
94
93
150k
66.5k
1µF
270pF 33k
24.9k
68nF
0.47µF
10k
53VIN
12
42VIN
COMP
SPRG RLEB SS DPRG
13
48VIN
96
CS
LTC3723EGN-1
UVLO
FB GND CT
97
ISNS
OUTPUT VOLTAGE (V)
A
EFFICIENCY (%)
MMBT3904
D2
12V
D1
10V
1µF
470pF
12V
30k
1/4W
0.33µF
100V
VE
HAT2169
×2
5
4.7µF
25V
2x
5.1Ω
1/4W
2
1.2k
0.5W
1nF
100V
10Ω
ES1B
1W
•
B
3
BAS21
•
–VIN
12V
•
1µF 12V
100V
×3
1
•
1µF
100V
VF
•
VIN
+VOUT
ES1B
L1
0.56µH
48VIN
11
10
92
42VIN
9
8
330pF
91
7
5
10
20
15
LOAD CURRENT (A)
25
5
10
20
15
LOAD CURRENT (A)
25
372312 TA05
U
PACKAGE DESCRIPTIO
GN Package
16-Lead Plastic SSOP (Narrow .150 Inch)
(Reference LTC DWG # 05-08-1641)
.189 – .196*
(4.801 – 4.978)
.015 ± .004
× 45°
(0.38 ± 0.10)
.007 – .0098
(0.178 – 0.249)
.016 – .050
(0.406 – 1.270)
NOTE:
1. CONTROLLING DIMENSION: INCHES
INCHES
2. DIMENSIONS ARE IN
(MILLIMETERS)
0° – 8°
TYP
.0532 – .0688
(1.35 – 1.75)
.008 – .012
(0.203 – 0.305)
TYP
.004 – .0098
(0.102 – 0.249)
.0250
(0.635)
BSC
16 15 14 13 12 11 10 9
.229 – .244
(5.817 – 6.198)
3. DRAWING NOT TO SCALE
*DIMENSION DOES NOT INCLUDE MOLD FLASH. MOLD FLASH
SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
**DIMENSION DOES NOT INCLUDE INTERLEAD FLASH. INTERLEAD
FLASH SHALL NOT EXCEED 0.010" (0.254mm) PER SIDE
.009
(0.229)
REF
.150 – .157**
(3.810 – 3.988)
1
2 3
4
5 6
7
8
.045 ±.005
.254 MIN
.0165 ± .0015
.150 – .165
.0250 BSC
RECOMMENDED SOLDER PAD LAYOUT
GN16 (SSOP) 0204
372312f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LTC3723-1/LTC3723-2
U
TYPICAL APPLICATIO
LTC3723-1 100W, 36VIN to 72VIN to 3.3V/30A Isolated Forward Converter
VIN
–VIN
2
4
•
•
1µF
100V
×2
1µF
100V
3
5
48VIN
VOUT
2.2nF
8
VX
100µF
6.3V
×2
10
Si7336ADP
×2
5.1Ω
1/2W
11
2.2nF
2.2nF
630V
93
VOUT
7
Si7450DP
94
L2
0.85µH
T1
23.4mm × 20.1mm × 9.4mm PLANAR
•
•
L1
0.33µH
VIN
Si7336ADP
×2
+
470µF
6.3V
5.1Ω
1/2W
–VOUT
0.03Ω
1W
10V
91
90
89
88
68µF
20V
820Ω
–VOUT
L3
1mH
BAS21
845Ω
1
+
BAS21
•
EFFICIENCY (%)
92
VX
1.00k
B0540W
15Ω
1/4W
6
B0540W
87
86
10
5
15
20
LOAD CURRENT (A)
25
30
5
120K
FG
1 T2 4
•
10V
A
30k
120pF
6
150Ω
1/4W
DRVB
DRVA
5
220pF
8
10
4
CS
SDRB
8
•
VIN
VB
562Ω
VREF
5
SYNC
1
2
CS+
CS–
3
4
26.1k
CG VCC
TIMER
LTC3900ES8
D1
10V
7
GND
560Ω
0.47µF
25V
1nF
6
2
–VOUT
VCC
383k
LTC3723EGN-1
15
10nF
UVLO
GND SS
7
100pF
CT
14 CT
SPRG RLEB FB DPRG
8
16
12
13
10k
1µF
68nF
66.5k
220pF
33k
VREF
9
150k
COMP
11
0.47µF
4.7nF
330Ω
1
VREF
330Ω
VREF
4.7nF
VOUT
1
MOC207
820Ω
VB
6
1k
1
VREF
A
50k
MMBT2369
8.66k
CT
1µF, 100V TDK C3225X7R2A105M (1210)
100µF, 6.3V TDK C3225X5R0J107M (1210)
2.2nF, 630V TDK C3216JB2J222K
470µF, 6.3V SANYO 6TPD470M
D1: MMBZ5240B
L1: COILCRAFT DO1813P-331HC
L2: PULSE PA1292.910
L3: COILCRAFT DO1608C-105
T1: PULSE PA810.007 (7:6:6:1:1:1T)
T2: PULSE PA0184 (1:1T)
5
5
2
6
2.2nF
250V
COMP
VIN
LT4430ES6
OPTO
27.4k
GND
2
470pF
4
FB
OC
6.04k
3
47nF
VIN
VOUT
372312 TA06
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
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High Efficiency, Adjustable Volt-Second Clamp, True PWM Soft-Start
LTC3705/LTC3706/
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Regulates Two Secondary Outputs; Optocoupler Feedback Driver and
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LTC3901
Secondary-Side Synchronous Driver for Push-Pull and
Full Bridge Converters
Drives N-Channel Synchronous MOSFETs, Programmable Timeout,
Reverse Current Limit
LT4430
Secondary-Side Optocoupler Driver
Overshoot Control on Start-Up and Short-Circuit Recovery,
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LTC4440
High Speed High Voltage High Side Gate Driver
80V Operation, 100V Tolerant, 1.5Ω Pull-Down, 2.4A Pull-Up
PolyPhase is a registered trademark of Linear Technology Corporation. ThinSOT is a trademark of Linear Technology Corporation.
372312f
20
Linear Technology Corporation
LT 1105 • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2003