ams AS1751 High-speed, low-voltage, single-supply, 0.9î©, quad spst analog switch Datasheet

a u s t ri a m i c r o s y s t e m s
AS1751 , AS1752, AS1753
D a ta S he e t
H i g h - Sp e e d , L o w - Vo l ta g e , S i n g l e - S u p p l y,
0 . 9 Ω, Q u a d S P S T A n a l o g S w i t c h e s
1 General Description
2 Key Features
The AS1751/AS1752/AS1753 are high-speed, low-voltage, quad single-pole/single-throw (SPST) analog
switches.
!
ON-Resistance:
- 0.9Ω (+3V supply)
- 2.5Ω (+1.8V supply)
Fast switching speeds, low ON-resistance, and low
power consumption make these devices ideal for singlecell battery powered applications.
!
RON Matching:
- 0.12Ω (+3V supply)
- 0.25Ω (+1.8V supply)
!
RON Flatness: 0.1Ω (+3V Supply)
!
Supply Voltage Range: +1.6 to +3.6V
!
Switching Speed: tON = 22ns, tOFF = 14ns
!
Current-Handling: 250mA Continuous
These highly-reliable devices operate from a single +1.6
to +3.6V supply, and are differentiated by the type and
number of switches:
!
AS1751 – Four normally open (NO) switches
!
AS1752 – Four normally closed (NC) switches
!
Break-Before-Make Switching (AS1753)
!
AS1753 – Two NO switches and Two NC switches
!
Rail-to-Rail Signal Handling
!
1.8V CMOS Logic Compatible (+3V Supply)
!
Operating Temperature Range: -40 to +85ºC
!
Package Types:
- 16-pin QFN (3mm x 3mm)
- 14-pin TSSOP
The AS1753 supports break-before-make switching.
With very low ON-resistance (RON), RON matching and
RON flatness, the devices can accurately switch signals
for sample and hold circuits, digital filters, and op-amp
gain switching networks.
The AS1751/AS1752/AS1753 digital logic input is 1.8V
CMOS-compatible when using a +3V supply, and all
devices can handle Rail-to-Rail signals.
The devices are available in a 3mm x 3mm 16-pin QFN
package and a 14-pin TSSOP package.
Figure 1. 14-pin TSSOP Block Diagrams
AS1751
3 Applications
The devices are ideal for use in power routing systems,
cordless and mobile phones, MP3 players, CD and DVD
players, PDAs, handheld computers, digital cameras,
hard drives, and any other application where high-speed
signal switching is required.
AS1752
AS1753
1
NO1
14
V+
1
NC1
14
V+
1
NO1
14
V+
2
COM1
13
IN1
2
COM1
13
IN1
2
COM1
13
IN1
3
NO2
12
IN4
3
NC2
12
IN4
3
NC2
12
IN4
4
COM2
11
NO4
4
COM2
11
NC4
4
COM2
11
NC4
5
IN2
10
COM4
5
IN2
10
COM4
5
IN2
10
COM4
6
IN3
9
COM3
6
IN3
9
COM3
6
IN3
9
COM3
7
GND
8
NO3
Device
AS1751
AS1752
AS1753
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7
GND
Input
Low
High
Low
High
Low
High
8
NC3
7
GND
8
NO3
Switch State
Off
On
On
Off
Switches 1, 3 = Off
Switches 2, 4 = On
Switches 1, 3 = On
Switches 2, 4 = Off
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Data Sheet
4 Absolute Maximum Ratings
Stresses beyond those listed in Table 1 may cause permanent damage to the device. These are stress ratings only,
and functional operation of the device at these or any other conditions beyond those indicated in Section 5 Electrical
Characteristics on page 3 is not implied. Exposure to absolute maximum rating conditions for extended periods may
affect device reliability.
Table 1. Absolute Maximum Ratings
Parameter
Min
Max
Units
V+, INx to GND
-0.3
+5
V
-0.3
V+
+ 0.3
V
COMx, NOx, NCx Continuous Current
-250
+250
mA
COMx, NOx, NCx Peak Current
-350
+350
mA
COMx, NOx, NCx to GND
†
16-pin QFN
Continuous Power
Dissipation (TAMB = +70ºC) 14-pin TSSOP
Operating Temperature Range
727
1349
-40
mW
Comments
Pulsed at 1ms 10% duty cycle
Derate at 9.1W/ºC above +70ºC
Derate at 16.9W/ºC above +70ºC
+85
ºC
2500
V
HBM Mil-Std883E 3015.7 methods
Latch Up Immunity
250
mA
Norm: JEDEC 17
Junction Temperature
+150
ºC
+150
ºC
Electro-Static Discharge
Storage Temperature Range
Package Body Temperature
-65
+260
ºC
The reflow peak soldering temperature (body
temperature) specified is in accordance with
IPC/JEDEC J-STD-020C “Moisture/Reflow
Sensitivity Classification for Non-Hermetic
Solid State Surface Mount Devices”
†
Signals on pins COM1, COM3, NO1, NO2, NC1, or NC2 that exceed V+ or GND are clamped by internal diodes. Forward-diode current should be limited to the maximum current rating.
-
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Data Sheet
5 Electrical Characteristics
Table 2. Power Supply Characteristics
Symbol
Parameter
Conditions
Min
V+
Power Supply Range
TAMB = TMIN to TMAX
1.6
I+
Positive Supply
Current
V+ = 3.6V, VINx = 0 or V+, TAMB = +25ºC
Typ
Max Unit
3.6
V
0.1
µA
V+ = +2.7 to +3.6V, VIH = +1.4V, VIL = +0.5V, TAMB = TMIN to TMAX (unless otherwise specified). Typ values @ V+ =
+3.0V, TAMB = +25ºC.
Table 3. +3V Supply Electrical Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max Unit
Analog Switch
VCOMx,
VNOx, VNCx
Analog Signal Range
RON
ON-Resistance
V+ = 2.7V, ICOMx = 100mA,
VNOx or VNCx = 1.5V
ΔRON
ON-Resistance Match
1
Between Channels
V+ = 2.7V, ICOMx = 100mA,
VNOx or VNCx = 1.5V
RFLAT(ON)
ON-Resistance
2
Flatness
V+ = 2.7V, ICOMx = 100mA,
VNOx or VNCx = 1, 1.5, or 2V
INOx(OFF),
INCx(OFF)
NOx or NCx
Off-Leakage Current
V+ = 3.6V,
VCOMx = 0.3 or 3.6V,
VNOx or VNCx = 3.6 or 0.3V
ICOMx(OFF)
COMx Off-Leakage
Current
V+ = 3.6V,
VCOMx = 0.3 or 3.6V,
VNOx or VNCx = 3.6 or 0.3V
ICOMx(ON)
COMx On-Leakage
Current
V+ = 3.6V,
VCOMx = 0.3 or 3.6V,
VNOx or VNCx = 0.3 or 3.6V
0
TAMB = +25ºC
V+
0.4
TAMB = TMIN to TMAX
0.9
1
TAMB = +25ºC
0.03
TAMB = TMIN to TMAX
0.12
0.15
TAMB = +25ºC
0.02
TAMB = TMIN to TMAX
0.1
0.12
TAMB = +25ºC
-2.5
+2.5
TAMB = TMIN to TMAX
-10
+10
TAMB = +25ºC
-2.5
+2.5
TAMB = TMIN to TMAX
-10
+10
TAMB = +25ºC
-2.5
+2.5
TAMB = TMIN to TMAX
-10
+10
V
Ω
Ω
Ω
nA
nA
nA
Switch Dynamic Characteristics
VNOx or VNCx = 1.5V,
RLOAD = 50Ω, CLOAD =
35pF, Figures 11, 12
3
tON
Turn On Time
tOFF
Turn Off Time
tBBM
Break-Before-Make
VNOx or VNCx = 1.5V,
RLOAD = 50Ω, CLOAD =
35pF, Figures 11, 12
3
3
VNOx or VNCx = 1.5V,
RLOAD = 50Ω, CLOAD =
35pF, Figure 13 (AS1753)
TAMB = +25ºC
16
TAMB = TMIN to TMAX
24
TAMB = +25ºC
5
TAMB = TMIN to TMAX
14
15
TAMB = +25ºC
TAMB = TMIN to TMAX
22
11
2
ns
ns
ns
Q
Charge Injection
VGEN = V+, RGEN = 0, CLOAD = 1.0nF, Figure 14
2
pC
COFF
NOx, NCx
Off-Capacitance
f = 1MHz, Figure 15
45
pF
CCOMx(OFF)
COMx
Off-Capacitance
f = 1MHz, Figure 15
49
pF
CCOMx(ON)
COMx
On-Capacitance
f = 1MHz, Figure 15
85
pF
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AS1751, AS1752, AS1753
Data Sheet
Table 3. +3V Supply Electrical Characteristics (Continued)
Symbol
Parameter
VISO
Off-Isolation
Crosstalk
Conditions
4
5
Total Harmonic
Distortion
THD
Min
Typ
f = 10MHz, RLOAD = 50Ω, CLOAD = 5pF, Figure 16
-40
f = 1MHz, RLOAD = 50Ω, CLOAD = 5pF, Figure 16
-55
f = 10MHz, RLOAD = 50Ω, CLOAD = 5pF, Figure 16
-70
f = 1MHz, RLOAD = 50Ω, CLOAD = 5pF, Figure 16
-80
f = 20Hz to 20kHz, VCOMx = 2Vp-p, RLOAD = 32Ω
0.033
Max Unit
dB
dB
%
Logic Input
VIH
Input Logic High
VIL
Input Logic Low
IIN
Input Leakage Current
1.4
VINx = 0 or V+
-1
V
0.0001
0.5
V
+1
µA
V+ = +1.8V, VIH = +1.0V, VIL = 0.4V, TAMB = TMIN to TMAX (unless otherwise specified). Typ values @ TAMB = +25ºC.
Table 4. +1.8V Supply Electrical Characteristics
Symbol
Parameter
Conditions
Min
Typ
Max
Unit
V+
V
Analog Switch
VCOMx,
VNOx, VNCx
Analog Signal
Range
RON
ON-Resistance
V+ = 1.8V, ICOMx = 10mA,
VNOx or VNCx = 0.9V
ΔRON
ON-Resistance
Match Between
1
Channels
V+ = 1.8V, ICOMx = 10mA,
VNOx or VNCx = 0.9V
0
TAMB = +25ºC
0.9
TAMB = TMIN to TMAX
2.5
3
TAMB = +25ºC
0.05
TAMB = TMIN to TMAX
Ω
0.25
0.25
Ω
Switch Dynamic Characteristics
tON
Turn On Time
tOFF
Turn Off Time
Q
3
3
Charge Injection
VNOx or VNCx = 1.0V,
TAMB = +25ºC
RLOAD = 50Ω, CLOAD = 35pF,
TAMB = TMIN to TMAX
Figures 11, 12
22
VNOx or VNCx = 1.0V,
TAMB = +25ºC
RLOAD = 50Ω, CLOAD = 35pF,
TAMB = TMIN to TMAX
Figures 11, 12
12
VGEN = V+, RGEN = 0, CLOAD = 1.0nF, Figure 14
1
30
35
20
25
ns
ns
pC
Logic Input
VIH
Input Logic High
VIL
Input Logic Low
IIN
Input Leakage
Current
1.0
VINx = 0 or V+
-1
V
0.0001
0.4
V
+1
µA
1. ΔRON = RON(MAX) - RON(MIN).
2. Flatness is defined as the difference between the maximum and the minimum value of ON-resistance as measured
over the specified analog signal ranges.
3. Guaranteed by design.
4. Off-Isolation = 20log10(VCOMx/VNOx), VCOMx = output, VNOx = input to off switch.
5. Between two switches.
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Data Sheet
6 Typical Operating Characteristics
Figure 2. Frequency Response
Figure 3. Total Harmonic Distortion vs. Frequency
0.04
10
0
VDD = 3V
0.03
-20
-30
THD (%)
Response (dB)
0.035
Bandwidth
-10
-40
-50
-60
-70
0.025
0.02
0.015
0.01
-80
0.005
-90
-100
0.01
0
0.1
1
10
100
1
1000
10
Figure 4. Turn On/Turn Off Time vs. Temperature
18
tON
Time (ns)
Time (ns)
14
12
10
8
6
tOFF
2
0
-40
-15
10
35
60
26
24
22
20
18
16
14
12
10
8
6
4
2
0
85
tON
tOFF
1.6
2
Temperature (°C)
2.4
2.8
3.2
3.6
Supply Voltage (V)
Figure 6. RON vs. VCOM and Temperature; VDD = 2.7V
Figure 7. RON vs. VCOM
1.0
0.50
Temp = +85ºC
0.45
VDD = 1.8V
0.9
0.8
RON (Ω )
0.40
RON (Ω )
10000 100000
Figure 5. Turn On/Off Time vs. Supply Voltage
20
4
1000
Frequency (Hz)
Frequency (MHz)
16
100
Temp = +25ºC
0.35
0.30
0.7
VDD = 2V
VDD = 2.7V
VDD = 3V
0.6
VDD = 2.5V
0.5
Temp = -40ºC
0.25
VDD = 3.3V
0.4
0.20
VDD = 3.6V
0.3
0
0.5
1
1.5
2
2.5
3
0
1
1.5
2
2.5
3
3.5
VCOM (V)
VCOM (V)
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0.5
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Data Sheet
Figure 8. Charge Injection vs. VCOM
60
50
Q (pC)
40
30
VDD = 3V
20
VDD = 1.8V
10
0
0 0.3 0.6 0.9 1.2 1.5 1.8 2.1 2.4 2.7
3
VCOM (V)
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Data Sheet
ON-Resistance
7 Detailed Description
The AS1751/AS1752/AS1753 are low ON-resistance, low-voltage, quad analog SPST switches that operate from a
single +1.6 to +3.6V supply.
CMOS process technology allows switching of analog signals that are within the supply voltage range (GND to V+).
AS1752
16
COM1
15
NO1
14
V+
13
IN1
12
IN4
11
NC4
10
N/C
9
COM4
1
NC2
2
COM2
3
N/C
4
IN2
12
IN4
11
NC4
10
N/C
9
COM4
AS1753
5
IN3
6
GND
7
NO3
8
COM3
1
NC2
2
COM2
3
N/C
4
IN2
5
IN3
6
GND
7
NO3
8
COM3
AS1751
12
IN4
11
NO4
10
N/C
9
COM4
5
IN3
6
GND
7
NC3
8
COM3
1
NO2
2
COM2
3
N/C
4
IN2
16
COM1
15
NC1
14
V+
13
IN1
16
COM1
15
NO1
14
V+
13
IN1
Figure 9. 16-pin QFN Block Diagrams
Table 5. Truth Tables
Device
AS1751
AS1752
AS1753
Input
Switch State
Low
Off
High
On
Low
On
High
Off
Low
Switches 1, 3 = Off
Switches 2, 4 = On
High
Switches 1, 3 = On
Switches 2, 4 = Off
ON-Resistance
When powered from a +3V supply, the low (0.9Ω, max) ON-resistance allows high-speed, continuous signals to be
switched in a variety of applications.
Bi-Directional Switching
Pins NOx, NCx, and COMx are bi-directional, thus they can be used as inputs to- or outputs from other components.
Analog Signal Levels
Analog signals ranging over the entire supply voltage range (V+ to GND) can be switched with very little change in ONresistance (see Typical Operating Characteristics on page 5).
Logic Inputs
The devices’ logic inputs can be driven up to +3.6V regardless of the supply voltage value. For example, with a +1.8V
supply, INx may be driven low to GND and high to +3.6V. This allows the devices to interface with +3V systems using
a supply of less than 3V.
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Data Sheet
Power Supply Sequencing
8 Application Information
Power Supply Sequencing
Proper power-supply sequencing is critical for proper switch operation. The power supplies should be started up in the
following sequence:
1. V+
2. NOx, NCx, COMx
Note: Do not exceed the absolute maximum ratings (see page 2).
Overvoltage Protection
ON-resistance increases slightly at lower supply voltages.
Figure 10. Overvoltage Protection using 2 External Blocking Diodes
AS1751/AS1752/AS1753
D1
V+
V+
COMx
NOx
VGEN
GND
D2
Adding diode D2 to the circuit shown in Figure 10 causes the logic threshold to be shifted relative to GND. Diodes D1
and D2 also protect against overvoltage conditions.
For example, in the circuit shown in Figure 10, if the supply voltage goes below the absolute maximum rating, and if a
fault voltage up to the absolute maximum rating is applied to an analog signal pin, no damage will result.
Power Supply Bypass
Power supply connections to the devices must maintain a low impedance to ground. This can be done using a bypass
capacitor, which will also improve noise margin and prevent switching noise propagation from the V+ supply to other
components.
A 0.1µF bypass capacitor, connected from V+ to GND (see Figure 16 on page 10), is adequate for most applications.
Logic Inputs
Driving INx Rail-to-Rail will help minimize power consumption.
Layout Considerations
High-speed switches require proper layout and design procedures for optimum performance.
!
Short, wide traces should be used to reduce stray inductance and capacitance.
!
Bypass capacitors should be as close to the device as possible.
!
Large ground planes should be used wherever possible.
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AS1751, AS1752, AS1753
Data Sheet
Timing Diagrams and Test Setups
Timing Diagrams and Test Setups
Figure 11. AS1751/AS1753 Test Circuit and Timing Diagram
V+
NOx
V+
VNOx
AS1751/
AS1753
50Ω
INx
COMx
tR < 5ns
tF < 5ns
VIH + 0.5V
INx
50%
50%
0
VCOMx
50Ω
35pF
GND
VNOx
VCOMx
0
90%
90%
tOFF
tON
Figure 12. AS1752/AS1753 Test Circuit and Timing Diagram
V+
NCx
V+
VNCx
AS1752/
AS1753
INx
INx
50%
50%
0
VCOMx
COMx
50Ω
tR < 5ns
tF < 5ns
VIH + 0.5V
50Ω
35pF
VNCx
VCOMx
0
90%
90%
GND
tON
tOFF
Figure 13. AS1753 Test Circuit and Timing Diagram
VS
NC2
V+
NO1
INx
0
V+
AS1753
VS
COM1
INx
VCOMx
COM2
50Ω
tR < 5ns
tF < 5ns
VIH + 0.5V
VS
50Ω
35pF
VCOMx
90%
90%
0
GND
tBBM
tBBM
tBBM = tON(NOx) - tOFF(NCx)
or tBBM = tON(NCx) - tOFF(NOx)
Figure 14. Charge Injection
V+
NCx
or
NOx
V+
V+
RGEN
VIN
COMx
50Ω
GND
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0
VGEN
AS175x
INx
VIN
AS1751
AS1752
VOUT
CLOAD
1000pF
VOUT
ΔVOUT
ΔVOUT is the measured voltage due to charge transfer error Q
when the channel turns off.
Q = ΔVOUT x CLOAD
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AS1751, AS1752, AS1753
Data Sheet
Timing Diagrams and Test Setups
Figure 15. NOx, NCx, and COMx Capacitance
AS1751/
AS1752/
AS1753
V+
V+
COMx
1MHz
Capacitance
Analyzer
As
Required
INx
GND
NCx or
NOx
Figure 16. Off-Isolation, On-Loss, and Crosstalk
Network Analyzer
V+
V+
0.1µF
VIN
NOx
or
NCx
50Ω
†
AS1751/
AS1752/
AS1753
Measure
COMx
INx
50Ω
Reference
VOUT
GND
50Ω
50Ω
†
Use 50Ω termination for off-isolation
Notes:
1. Measurements are standardized against short-circuit at socket terminals.
2. Off-isolation is measured between COMx and the off NCx/NOx terminal on each switch. Off-isolation = 20log (VOUT/
VIN).
3. On-loss is measured between COMx and the on NCx/NOx terminal on each switch. On-loss = 20log (VOUT/VIN).
4. Signal direction through the switch is reversed; worst values are recorded.
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AS1751, AS1752, AS1753
Data Sheet
Pin Assignments
9 Pinout and Packaging
Pin Assignments
3
–
–
9 COM4
IN3 5
13 IN1
14 V+
15 NO1
16 COM1
14 V+
15 NC1
13 IN1
10
IN2 4
COM3 8
NO3 7
GND 6
IN3 5
–
11 NC4
AS1753
3
10
IN2 4
–
9 COM4
COM3 8
–
9 COM4
AS1752
12 IN4
COM2 2
NO3 7
10
IN2 4
NC2 1
11 NC4
GND 6
3
12 IN4
COM2 2
IN3 5
AS1751
NC2 1
COM3 8
11 NO4
NC3 7
12 IN4
COM2 2
GND 6
NO2 1
–
16 COM1
13 IN1
14 V+
15 NO1
16 COM1
Figure 17. QFN Pin Assignments (Top View)
Figure 18. TSSOP Pin Assignments (Top View)
NO1 1
14 V+
COM1 2
NO2 3
COM2 4
AS1751
NC1 1
14 V+
NO1 1
13 IN1
COM1 2
13 IN1
COM1 2
12 IN4
NC2 3
12 IN4
NC2 3
11 NO4
COM2 4
AS1752
11 NC4
COM2 4
14 V+
13 IN1
12 IN4
AS1753
11 NC4
IN2 5
10 COM4
IN2 5
10 COM4
IN2 5
10 COM4
IN3 6
9 COM3
IN3 6
9 COM3
IN3 6
9 COM3
GND 7
8 NO3
GND 7
8 NC3
GND 7
8 NO3
Pin Descriptions
Table 6. Pin Descriptions
Pin Number
(see Figure 17
and Figure 18)
Pin Name
Description
COM1: COM4
Analog Switch 1, 2, 3, 4 Common
GND
Ground
IN1:IN4
Analog Switch 1, 2, 3, 4 Logic Control Input
NC1:NC4
Analog Switch 1, 2, 3, 4 Normally Closed Terminal
NO1:NO4
Analog Switch 1, 2, 3, 4 Normally Open Terminal
V+
Input Supply Voltage, +1.6 to +3.6V
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Data Sheet
Package Drawings and Markings
Package Drawings and Markings
The devices are available in an 16-pin QFN package and an 14-pin TSSOP package.
Figure 19. 16-pin QFN Package
D2
-A-
D
D2/2
D/2
INDEX AREA
(D/2 xE/2)
-B-
-B-
aaa C 2x
E
SEE
DETAIL B
E2
E2/2
e
E/2
NXL
4
2
1
PIN 1
MARKER
N N-1
aaa C 2x
6
SEE
DETAIL B
4
TOP VIEW
NXb
-A-
INDEX AREA
(D/2 xE/2)
5
bbb
ddd
C A B
C
BTM VIEW
11
NX
0.08 C
A
ccc C
SEATING
PLANE
9
Symbol
Datum A or B
L1
12
DETAIL B
Common Dimensions
Min
Nom
Max
e
Terminal Tip
5
EVEN TERMINAL SIDE
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Revision 1.4
Notes
aaa
0.15
1, 2
bbb
0.10
1, 2
ccc
0.10
1, 2
ddd
0.05
1, 2
A
0.70
0.75
0.80
A1
0.00
0.02
0.05
0.20
Ref
A3
e/2
-C-
A3
8
A1
SIDE VIEW
L1
0.03
0.15
D BSC
3.00
1, 2, 10
E BSC
3.00
1, 2, 10
D2
1.30
1.45
1.55
1, 2, 10
E2
1.30
1.45
1.55
1, 2, 10
L
0.30
0.40
0.50
1, 2, 10
N
16
1, 2, 10
ND
4
1, 2, 10
NE
4
1, 2, 10
12 - 16
austriam i c r o systems
AS1751, AS1752, AS1753
Data Sheet
Package Drawings and Markings
Notes:
1.
2.
3.
4.
Dimensioning and tolerancing conform to ASME Y14.5M-1994.
All dimensions are in millimeters; angles in degrees.
N is the total number of terminals.
The terminal #1 identifier and terminal numbering convention shall conform to JEDEC 95 SPP-012. Details of terminal #1 identifier are optional but must be located within the zone indicated. The terminal #1 identifier may be either
a mold or marked feature.
5. Dimension b applies to metallized terminal and is measured between 0.15 and 0.30mm from terminal tip. If one end
of the terminal has the optional radius, the b dimension should not be measured in that radius area.
6. Dimensions ND and NE refer to the number of terminals on each D and E side, respectively.
7. Depopulation is possible in a symmetrical fashion.
8. Figure 19 is shown for illustration only and does not represent any specific variation.
9. All variations may be constructed per Figure 19, however variations may alternately be constructed between square
or rectangle shape per dimensions D and E.
10. Refer to the Dimensions Table for a complete set of dimensions.
11. Bilateral coplanarity zone applies to the exposed heat sink slug as well as the terminals.
12. Depending on the method of lead termination at the edge of the package, pullback (L1) may be present. L minus
L1 to be ≥ 0.33mm.
13. For variations with more than one lead count for a given body size and terminal pitch, each lead count for that variation is denoted by a dash number (e.g., -1 or -2).
14. NJR designates non-JEDEC registered package.
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Revision 1.4
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austriam i c r o systems
AS1751, AS1752, AS1753
Data Sheet
Package Drawings and Markings
Figure 20. 14-pin TSSOP Package
Symbol
A
A1
A2
L
R
R1
b
b1
c
c1
D
E1
E
1, 2
0.65mm Lead Pitch
Min
Nom
Max
1.10
0.05
0.15
0.85
0.90
0.95
0.50
0.60
0.75
0.09
0.09
0.19
0.30
0.19
0.22
0.25
0.09
0.20
0.09
0.16
4.90
4.30
5.00
4.40
6.4 BSC
5.10
4.50
Note
5
Symbol
θ1
L1
aaa
bbb
ccc
ddd
e
θ2
θ3
Variations
3, 8
e
4, 8
N
1, 2
0.65mm Lead Pitch
Min
Nom
Max
0º
8º
1.0 Ref
0.10
0.10
0.05
0.20
0.65 BSC
12º Ref
12º Ref
0.65 BSC
14
Note
6
Notes:
1. All dimensions are in millimeters; angles in degrees.
2. Dimensions and tolerancing per ASME Y14.5M-1994.
3. Dimension D does not include mold flash, protrusions, or gate burrs. Mold flash, protrusions, or gate burrs shall not
exceed 0.15mm per side.
4. Dimension E1 does not include interlead flash or protrusion. Interlead flash or protrusion shall not exceed 0.25mm
per side.
5. Dimension b does not include dambar protrusion. Allowable dambar protrusion shall be 0.08mm total in excess of
dimension b at maximum material condition. Dambar cannot be located on the lower radius of the foot. Minimum
space between protrusion and adjacent lead is 0.07mm for 0.5mm pitch packages.
6. Terminal numbers shown are for reference only.
7. Datums A and B to be determined at datum plane H.
8. Dimensions D and E1 to be determined at datum plane H.
9. This dimension applies only to variations with an even number of leads per side. For variations with an odd number
of leads per package, the center lead must be coincident with the package centerline, datum A.
10. Cross section A-A to be determined at 0.10 to 0.25mm from the leadtip.
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Revision 1.4
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austriam i c r o systems
AS1751, AS1752, AS1753
Data Sheet
10 Ordering Information
The devices are available as the standard products shown in Table 7.
Table 7. Ordering Information
Part
Description
Delivery Form
Package
AS1751S
SPST Switch
Tube
14-TSSOP
AS1751S-T
Quad SPST Switch
Tape and Reel
14-TSSOP
†
Quad SPST Switch
Tray
16-QFN 3mmx3mm
Quad SPST Switch
Tape and Reel
16-QFN 3mmx3mm
AS1752S
Quad SPST Switch
Tube
14-TSSOP
AS1752S-T
Quad SPST Switch
Tape and Reel
14-TSSOP
†
Quad SPST Switch
Tray
16-QFN 3mmx3mm
Quad SPST Switch
Tape and Reel
16-QFN 3mmx3mm
AS1753S
Quad SPST Switch
Tube
14-TSSOP
AS1753S-T
Quad SPST Switch
Tape and Reel
14-TSSOP
†
Quad SPST Switch
Tray
16-QFN 3mmx3mm
Quad SPST Switch
Tape and Reel
16-QFN 3mmx3mm
AS1751V
AS1751V-T
AS1752V
AS1752V-T
AS1753V
AS1753V-T
†
†
†
†
Future Product
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Revision 1.4
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austriam i c r o systems
AS1751, AS1752, AS1753
Data Sheet
Copyrights
Copyright © 1997-2005, austriamicrosystems AG, Schloss Premstaetten, 8141 Unterpremstaetten, Austria-Europe.
Trademarks Registered ®. All rights reserved. The material herein may not be reproduced, adapted, merged, translated, stored, or used without the prior written consent of the copyright owner.
All products and companies mentioned are trademarks or registered trademarks of their respective companies.
Disclaimer
Devices sold by austriamicrosystems AG are covered by the warranty and patent indemnification provisions appearing
in its Term of Sale. austriamicrosystems AG makes no warranty, express, statutory, implied, or by description regarding
the information set forth herein or regarding the freedom of the described devices from patent infringement. austriamicrosystems AG reserves the right to change specifications and prices at any time and without notice. Therefore, prior
to designing this product into a system, it is necessary to check with austriamicrosystems AG for current information.
This product is intended for use in normal commercial applications. Applications requiring extended temperature
range, unusual environmental requirements, or high reliability applications, such as military, medical life-support or lifesustaining equipment are specifically not recommended without additional processing by austriamicrosystems AG for
each application.
The information furnished here by austriamicrosystems AG is believed to be correct and accurate. However,
austriamicrosystems AG shall not be liable to recipient or any third party for any damages, including but not limited to
personal injury, property damage, loss of profits, loss of use, interruption of business or indirect, special, incidental or
consequential damages, of any kind, in connection with or arising out of the furnishing, performance or use of the technical data herein. No obligation or liability to recipient or any third party shall arise or flow out of
austriamicrosystems AG rendering of technical or other services.
Contact Information
Headquarters
austriamicrosystems AG
A-8141 Schloss Premstaetten, Austria
Tel: +43 (0) 3136 500 0
Fax: +43 (0) 3136 525 01
e-mail: [email protected]
For Sales Offices, Distributors and Representatives, please visit:
http://www.austriamicrosystems.com
austriamicrosystems
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Revision 1.4
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