NCV4279B 5.0 V Micropower 150 mA LDO Linear Regulator with DELAY, Adjustable RESET, and Monitor FLAG The NCV4279B is a 5.0 V precision micropower voltage regulator. The output current capability is 150 mA. The output voltage is accurate within ±2.0% with a maximum dropout voltage of 0.6 V at 150 mA. Low quiescent current is a feature drawing only 90 A with a 100 A load. This part is ideal for any and all battery operated microprocessor equipment. Microprocessor control logic includes an active RESET (with DELAY), and a FLAG monitor which can be used to provide an early warning signal to the microprocessor of a potential impending RESET signal. The use of the FLAG monitor allows the microprocessor to finish any signal processing before the RESET shuts the microprocessor down. The active RESET circuit operates correctly at an output voltage as low as 1.0 V. The RESET function is activated during the power up sequence or during normal operation if the output voltage drops outside the regulation limits. The reset threshold voltage can be decreased by the connection of external resistor divider to RADJ lead. The regulator is protected against reverse battery, short circuit, and thermal overload conditions. The device can withstand load dump transients making it suitable for use in automotive environments. The device has also been optimized for EMC conditions. http://onsemi.com MARKING DIAGRAMS 8 8 1 4279B ALYW 14 SO−14 D SUFFIX CASE 751A 14 1 1 NCV4279B AWLYWW 1 20 20 NCV4279B AWLYYWW SO−20L DW SUFFIX CASE 751D 1 A WL, L YY, Y WW, W 1 = Assembly Location = Wafer Lot = Year = Work Week PIN CONNECTIONS SO−8 Features • 5.0 V ± 2.0% Output • Low 90 A Quiescent Current • Active RESET • Adjustable Reset • 150 mA Output Current Capability • Fault Protection − +60 V Peak Transient Voltage − −15 V Reverse Voltage − Short Circuit − Thermal Overload • Early Warning through FLAG/MON Leads • Internally Fused Leads in SO−14 and SO−20L Packages • NCV Prefix for Automotive and Other Applications Requiring Site and Control Changes SO−8 D SUFFIX CASE 751 VIN 1 8 MON RADJ FLAG RESET DELAY SO−14 SO−20L GND 1 RADJ DELAY GND GND GND NC RESET 14 MON VIN GND GND GND VOUT FLAG 1 RADJ DELAY NC GND GND GND GND NC NC RESET VOUT 20 MON VIN NC GND GND GND GND NC VOUT FLAG ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 10 of this data sheet. Semiconductor Components Industries, LLC, 2003 August, 2003 − Rev. 1 1 Publication Order Number: NCV4279B/D NCV4279B VIN VOUT VDD 10 µF 10 µF RADJ NCV4279B Delay RFLG 10 k Microprocessor VBAT RRST 10 k MON CDELAY RESET FLAG I/O GND I/O Figure 1. Application Diagram MAXIMUM RATINGS* Rating Value Unit −15 to 45 V Peak Transient Voltage (46 V Load Dump @ VIN = 14 V) 60 V Operating Voltage 45 V VOUT (DC) 16 V Voltage Range (RESET, FLAG) −0.3 to 10 V Input Voltage Range (MON) −0.3 to 10 V 2.0 kV Junction Temperature, TJ −40 to +150 °C Storage Temperature, TS −55 to 150 °C VIN (DC) ESD Susceptibility (Human Body Model) °C/W Package Thermal Resistance, SO−8: Junction−to−Case, RθJC Junction−to−Ambient, RθJA 45 165 Package Thermal Resistance, SO−14 (Fused) Minimum Pad Data: Junction−to−Case, RθJC Junction−to−Ambient, RθJA Junction−to−Pin, RθJP (Note 3) 15 110 33 Package Thermal Resistance, SO−20L (Fused) Minimum Pad Data: Junction−to−Case, RθJC Junction−to−Ambient, RθJA Junction−to−Pin, RθJP (Note 4) 12 82 26 °C/W Lead Temperature Soldering: °C/W Reflow: (SMD styles only) (Notes 1, 2) 240 peak °C 1. 60 second maximum above 183°C. 2. −5°C/+0°C allowable conditions. 3. Measured to pin 9. 4. Measured to pin 12. *The maximum package power dissipation must be observed. †During the voltage range which exceeds the maximum tested voltage of VIN, operation is assured, but not specified. Wider limits may apply. Thermal dissipation must be observed closely. http://onsemi.com 2 NCV4279B ELECTRICAL CHARACTERISTICS (IOUT = 1.0 mA, −40°C ≤ TJ ≤ 125°C; 6.0 V < VIN < 26 V; unless otherwise specified.) Test Conditions Characteristic Min Typ Max Unit 4.90 4.85 5.0 5.0 5.10 5.15 V V − − 400 100 600 150 mV mV -30 5.0 30 mV Output Stage Output Voltage 9.0 V < VIN < 16 V, 100 A ≤ IOUT ≤ 150 mA 6.0 V < VIN < 26 V, 100 A ≤ IOUT ≤ 150 mA Dropout Voltage (VIN − VOUT) IOUT = 150 mA IOUT = 100 A Load Regulation VIN = 14 V, 5.0 mA ≤ IOUT ≤ 150 mA Line Regulation [VOUT(typ) + 1.0] < VIN < 26 V, IOUT = 1.0 mA − 15 60 mV Quiescent Current, (IQ) Active Mode IOUT = 100 A, VIN = 12 V, Delay = 3.0 V, MON = 3.0 V IOUT = 75 mA, VIN = 14 V, Delay = 3.0 V, MON = 3.0 V IOUT ≤ 150 mA, VIN = 14 V, Delay = 3.0 V, MON = 3.0 V − − − 90 4.0 12 125 6.0 19 A mA mA − 151 300 − mA Current Limit Short Circuit Output Current VOUT = 0 V 40 190 − mA Thermal Shutdown (Guaranteed by Design) 150 180 − °C RESET Threshold HIGH (VRH) LOW (VRL) VOUT Increasing VOUT Decreasing 4.55 4.50 4.70 4.60 0.98 × VOUT 0.97 × VOUT V V Output Voltage Low (VRLO) 1.0 V ≤ VOUT ≤ VRL, RRESET = 10 k − 0.1 0.4 V 1.4 1.8 2.2 V − − 0.1 V Reset Function (RESET) Delay Switching Threshold (VDT) − Reset Delay Low Voltage VOUT < RESET Threshold Low(min) Delay Charge Current DELAY = 1.0 V, VOUT > VRH 1.5 2.5 3.5 A Delay Discharge Current DELAY = 1.0 V, VOUT = 1.5 V 5.0 − − mA − 1.23 1.31 1.39 V Increasing and Decreasing 1.10 1.20 1.31 V 20 50 100 mV −0.5 0.1 0.5 A − 0.1 0.4 V Reset Adjust Switching Voltage (VR(ADJ)) FLAG/Monitor Monitor Threshold Hysteresis − Input Current MON = 2.0 V Output Saturation Voltage MON = 0 V, IFLAG = 1.0 mA http://onsemi.com 3 NCV4279B PACKAGE PIN DESCRIPTION Package Pin Number SO−8 SO−14 SO−20L Pin Symbol 3 1 1 RADJ 4 2 2 DELAY 5 3−5, 10−12 4−7, 14−17 GND − 6 3, 8, 9, 13, 18 NC 6 7 10 RESET 7 8 11 FLAG Open collector output from early warning comparator. 8 9 12 VOUT ±2.0%, 150 mA output. 1 13 19 VIN 2 14 20 MON Function Reset Adjust. If not needed connect to ground. Timing capacitor for RESET function. Ground. All GND leads must be connected to Ground. No connection. Active reset (accurate to VOUT ≥ 1.0 V) Input Voltage. Monitor. Input for early warning comparator. If not needed connect to VOUT. TYPICAL PERFORMANCE CHARACTERISTICS 5.01 1.2 VIN = 12 V VOUT = 5.0 V VIN = 14 V IOUT = 5.0 mA 1.0 5.00 +125°C IQ (mA) VOUT (V) 0.8 4.99 +25°C 0.6 −40°C 0.4 0.2 4.98 −40 −25 −10 5 20 35 50 65 Temperature (°C) 80 0 95 110 125 Figure 2. Output Voltage vs. Temperature 5 0 10 15 IOUT (mA) 20 Figure 3. Quiescent Current vs. Output Current 14 7 VIN = 12 V T = 25°C 12 6 10 8 IOUT = 100 mA 5 +125°C IQ (mA) IQ (mA) 25 +25°C 6 4 3 −40°C 4 2 2 1 0 0 0 15 30 45 60 75 90 IOUT (mA) 105 120 135 140 IOUT = 50 mA IOUT = 10 mA 6 8 10 12 14 16 18 VIN (V) 20 22 24 Figure 5. Quiescent Current vs. Input Voltage Figure 4. Quiescent Current vs. Output Current http://onsemi.com 4 26 NCV4279B TYPICAL PERFORMANCE CHARACTERISTICS 120 450 T = 25°C 100 400 Dropout Voltage (mV) IOUT = 100 A IQ (µA) 80 60 49 20 0 350 300 +125°C +25°C 250 −40°C 200 150 100 50 6 8 10 12 14 16 18 VIN (V) 20 22 24 0 26 0 Figure 6. Quiescent Current vs. Input Voltage 25 50 75 IOUT (mA) 100 125 150 Figure 7. Dropout Voltage vs. Output Current 1000 1000 Unstable Region Unstable Region CVout = 10 F 100 CVout = 0.1 F ESR () ESR () 100 10 10 1 Stable Region Stable Region 0.1 CVout = 10 F 1 0.01 0 0 10 20 30 40 50 60 70 80 90 100110120130140150 OUTPUT CURRENT (mA) 10 20 30 40 50 60 70 80 90 100 110 OUTPUT CURRENT (mA) Figure 8. Output Capacitor ESR Figure 9. Output Stability with Output Capacitor Change http://onsemi.com 5 NCV4279B VOUT VIN Current Source (Circuit Bias) IBIAS Current Limit Sense + + − RADJ IBIAS + − VBG Error Amplifier RESET VBG + − 1.8 V Thermal Protection 3.0 µA Delay IBIAS Bandgap Reference VBG VBG IBIAS + − MON Figure 10. Block Diagram http://onsemi.com 6 GND FLAG NCV4279B CIRCUIT DESCRIPTION DELAY Function REGULATOR CONTROL FUNCTIONS The NCV4279B contains the microprocessor compatible control function RESET (Figure 11). The reset delay circuit provides a programmable (by external capacitor) delay on the RESET output lead. The DELAY lead provides source current (typically 2.5 A) to the external DELAY capacitor during the following proceedings: 1. During Power Up (once the regulation threshold has been verified). 2. After a reset event has occurred and the device is back in regulation. The DELAY capacitor is discharged when the regulation (RESET threshold) has been violated. This is a latched incident. The capacitor will fully discharge and wait for the device to regulate before going through the delay time event again. VIN RESET Threshold VOUT DELAY DELAY Threshold (VDT) RESET Td Td Figure 11. Reset and Delay Circuit Wave Forms RESET Function FLAG/Monitor Function A RESET signal (low voltage) is generated as the IC powers up until VOUT is within 6.0% of the regulated output voltage, or when VOUT drops out of regulation,and is lower than 8.0% below the regulated output voltage. Hysteresis is included in the function to minimize oscillations. The RESET output is an open collector NPN transistor, controlled by a low voltage detection circuit. The circuit is functionally independent of the rest of the IC thereby guaranteeing that the RESET signal is valid for VOUT as low as 1.0 V. An on−chip comparator is provided to perform an early warning to the microprocessor of a possible reset signal. The reset signal typically turns the microprocessor off instantaneously. This can cause unpredictable results with the microprocessor. The signal received from the FLAG pin will allow the microprocessor time to complete its present task before shutting down. This function is performed by a comparator referenced to the bandgap reference. The actual trip point can be programmed externally using a resistor divider to the input monitor (MON) (Figure 13). The typical threshold is 1.20 V on the MON Pin. Adjustable Reset Function The reset threshold can be made lower by connecting an external resistor divider to the RADJ lead from the VOUT lead, as displayed in Figure 12. This lead is grounded to select the default value of 4.6 V. NCV4279B Delay RRST RESET VOUT VIN NCV4279B to µP and System Power VOUT RADJ VBAT COUT MON FLAG RADJ RESET Delay GND VCC µP COUT I/O RESET Figure 13. FLAG/Monitor Function to µP and RESET Port CDELAY Figure 12. Adjustable RESET http://onsemi.com 7 NCV4279B APPLICATION NOTES FLAG MONITOR Figure 14 shows the FLAG Monitor waveforms as a result of the circuit depicted in Figure 13. As the output voltage falls (VOUT), the Monitor threshold is crossed. This causes the voltage on the FLAG output to go low sending a warning signal to the microprocessor that a RESET signal may occur in a short period of time. TWARNING is the time the microprocessor has to complete the function it is currently working on and get ready for the RESET shutdown signal. The value for the output capacitor COUT shown in Figure 15 should work for most applications, however it is not necessarily the optimized solution. VIN VOUT CIN* 0.1 F NCV4279B COUT** 10 F RRST RESET VOUT *CIN required if regulator is located far from the power supply filter. **COUT required for stability. Capacitor must operate at minimum temperature expected. MON FLAG Monitor Ref. Voltage Figure 15. Test and Application Circuit Showing Output Compensation RESET CALCULATING POWER DISSIPATION IN A SINGLE OUTPUT LINEAR REGULATOR The maximum power dissipation for a single output regulator (Figure 16) is: FLAG PD(max) [VIN(max) VOUT(min)] IOUT(max) VIN(max)IQ TWARNING where: VIN(max) is the maximum input voltage, VOUT(min) is the minimum output voltage, IOUT(max) is the maximum output current for the application, and IQ is the quiescent current the regulator consumes at IOUT(max). Once the value of PD(max) is known, the maximum permissible value of RJA can be calculated: Figure 14. FLAG Monitor Circuit Waveform SETTING THE DELAY TIME The delay time is controlled by the Reset Delay Low Voltage, Delay Switching Threshold, and the Delay Charge Current. The delay follows the equation: tDELAY [CDELAY(Vdt Reset Delay Low Voltage)] Delay Charge Current Example: Using CDELAY = 33 nF. Assume reset Delay Low Voltage = 0. Use the typical value for Vdt = 1.8 V. Use the typical value for Delay Charge Current = 2.5 A. tDELAY (1) T RJA 150°C A PD (2) The value of RJA can then be compared with those in the package section of the data sheet. Those packages with RJA’s less than the calculated value in equation 2 will keep the die temperature below 150°C. In some cases, none of the packages will be sufficient to dissipate the heat generated by the IC, and an external heatsink will be required. [33 nF(1.8 0)] 23.8 ms 2.5 A STABILITY CONSIDERATIONS The output or compensation capacitor helps determine three main characteristics of a linear regulator: start−up delay, load transient response and loop stability. The capacitor value and type should be based on cost, availability, size and temperature constraints. A tantalum or aluminum electrolytic capacitor is best, since a film or ceramic capacitor with almost zero ESR can cause instability. The aluminum electrolytic capacitor is the least expensive solution, but, if the circuit operates at low temperatures (−25°C to −40°C), both the value and ESR of the capacitor will vary considerably. The capacitor manufacturers data sheet usually provides this information. IOUT IIN VIN SMART REGULATOR VOUT } Control Features IQ Figure 16. Single Output Regulator with Key Performance Parameters Labeled http://onsemi.com 8 NCV4279B HEAT SINKS A heat sink effectively increases the surface area of the package to improve the flow of heat away from the IC and into the surrounding air. Each material in the heat flow path between the IC and the outside environment will have a thermal resistance. Like series electrical resistances, these resistances are summed to determine the value of RJA: RJA RJC RCS RSA where: RJC = the junction−to−case thermal resistance, RCS = the case−to−heatsink thermal resistance, and RSA = the heatsink−to−ambient thermal resistance. RJC appears in the package section of the data sheet. Like RJA, it too is a function of package type. RCS and RSA are functions of the package type, heatsink and the interface between them. These values appear in heat sink data sheets of heat sink manufacturers. (3) http://onsemi.com 9 NCV4279B ORDERING INFORMATION Device Output Voltage Package NCV4279BD1 98 Units/Rail SO 8 SO−8 NCV4279BD1R2 NCV4279BD2 NCV4279BD2R2 Shipping 2500 Tape & Reel 55 Units/Rail 50V 5.0 SO 14 SO−14 NCV4279BDW 1000 Tape & Reel 37 Units/Rail SO 20L SO−20L NCV4279BDWR2 http://onsemi.com 10 1000 Tape & Reel NCV4279B PACKAGE DIMENSIONS SO−8 D SUFFIX CASE 751−07 ISSUE AA NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSION A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. 6. 751−01 THRU 751−06 ARE OBSOLETE. NEW STANDAARD IS 751−07 −X− A 8 5 0.25 (0.010) S B 1 M Y M 4 K −Y− G C N X 45 SEATING PLANE −Z− 0.10 (0.004) H M D 0.25 (0.010) Z Y M X S J S DIM A B C D G H J K M N S MILLIMETERS MIN MAX 4.80 5.00 3.80 4.00 1.35 1.75 0.33 0.51 1.27 BSC 0.10 0.25 0.19 0.25 0.40 1.27 0 8 0.25 0.50 5.80 6.20 INCHES MIN MAX 0.189 0.197 0.150 0.157 0.053 0.069 0.013 0.020 0.050 BSC 0.004 0.010 0.007 0.010 0.016 0.050 0 8 0.010 0.020 0.228 0.244 SO−14 D SUFFIX CASE 751A−03 ISSUE F NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETER. 3. DIMENSIONS A AND B DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 (0.006) PER SIDE. 5. DIMENSION D DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE DAMBAR PROTRUSION SHALL BE 0.127 (0.005) TOTAL IN EXCESS OF THE D DIMENSION AT MAXIMUM MATERIAL CONDITION. −A− 14 8 −B− 1 P 7 PL 0.25 (0.010) 7 G M B M F R X 45 C −T− SEATING PLANE D 14 PL 0.25 (0.010) T B J M K M S A S http://onsemi.com 11 DIM A B C D F G J K M P R MILLIMETERS MIN MAX 8.55 8.75 3.80 4.00 1.35 1.75 0.35 0.49 0.40 1.25 1.27 BSC 0.19 0.25 0.10 0.25 0 7 5.80 6.20 0.25 0.50 INCHES MIN MAX 0.337 0.344 0.150 0.157 0.054 0.068 0.014 0.019 0.016 0.049 0.050 BSC 0.008 0.009 0.004 0.009 0 7 0.228 0.244 0.010 0.019 NCV4279B PACKAGE DIMENSIONS SO−20L DW SUFFIX CASE 751D−05 ISSUE F A 20 X 45 M E h 0.25 H 10X NOTES: 1. DIMENSIONS ARE IN MILLIMETERS. 2. INTERPRET DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 3. DIMENSIONS D AND E DO NOT INCLUDE MOLD PROTRUSION. 4. MAXIMUM MOLD PROTRUSION 0.15 PER SIDE. 5. DIMENSION B DOES NOT INCLUDE DAMBAR PROTRUSION. ALLOWABLE PROTRUSION SHALL BE 0.13 TOTAL IN EXCESS OF B DIMENSION AT MAXIMUM MATERIAL CONDITION. 11 B M D 1 10 20X B B 0.25 M T A S B S L A 18X e A1 SEATING PLANE C T DIM A A1 B C D E e H h L MILLIMETERS MIN MAX 2.35 2.65 0.10 0.25 0.35 0.49 0.23 0.32 12.65 12.95 7.40 7.60 1.27 BSC 10.05 10.55 0.25 0.75 0.50 0.90 0 7 SMART REGULATOR is a registered trademark of Semiconductor Components Industries, LLC. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. PUBLICATION ORDERING INFORMATION Literature Fulfillment: Literature Distribution Center for ON Semiconductor P.O. Box 5163, Denver, Colorado 80217 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] JAPAN: ON Semiconductor, Japan Customer Focus Center 2−9−1 Kamimeguro, Meguro−ku, Tokyo, Japan 153−0051 Phone: 81−3−5773−3850 ON Semiconductor Website: http://onsemi.com For additional information, please contact your local Sales Representative. N. American Technical Support: 800−282−9855 Toll Free USA/Canada http://onsemi.com 12 NCV4279B/D