IRFB7440GPbF
IRFB7440GPBF
TO-220AB
IRFB7440GPbF
Applications
Brushed Motor drive applications
l BLDC Motor drive applications
l Battery powered circuits
l Half-bridge and full-bridge topologies
l Synchronous rectifier applications
l Resonant mode power supplies
l OR-ing and redundant power switches
l DC/DC and AC/DC converters
l DC/AC Inverters
Benefits
l
l
l
l
l
G
S
Improved Gate, Avalanche and Dynamic dV/dt
Ruggedness
Fully Characterized Capacitance and Avalanche
SOA
Enhanced body diode dV/dt and dI/dt Capability
Lead-Free
Halogen-Free
Base Part Number
Package Type
RDS(on), Drain-to -Source On Resistance (m )
IRFB7440GPbF
VDSS
RDS(on) typ.
max.
ID
c
120A
G
D
S
Gate
Drain
Source
Standard Pack
Form
Tube
TO-220
40V
2.0m
2.5m
208A
ID (Package Limited)
Orderable Part Number
Quantity
50
7.0
IRFB7440GPbF
240
ID = 100A
6.0
Limited By Package
200
ID, Drain Current (A)
l
D
5.0
T J = 125°C
4.0
3.0
2.0
160
120
80
40
T J = 25°C
1.0
0
4
6
8
10
12
14
16
18
20
25
75
100
125
150
175
T C , Case Temperature (°C)
VGS, Gate -to -Source Voltage (V)
Fig 2. Maximum Drain Current vs. Case Temperature
Fig 1. Typical On-Resistance vs. Gate Voltage
2014-8-13
50
1
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IRFB7440GPBF
Absolute Maximum Ratings
Max.
Units
ID @ TC = 25°C
ID @ TC = 100°C
ID @ TC = 25°C
IDM
Symbol
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)
Pulsed Drain Current
208
147
120
772
A
PD @TC = 25°C
Maximum Power Dissipation
Linear Derating Factor
Gate-to-Source Voltage
Operating Junction and
Storage Temperature Range
Soldering Temperature, for 10 seconds (1.6mm from case)
Mounting torque, 6-32 or M3 screw
208
1.4
± 20
-55 to + 175
VGS
TJ
TSTG
Parameter
d
Avalanche Characteristics
EAS (Thermally limited)
EAS (tested)
IAR
EAR
Single Pulse Avalanche Energy
Symbol
e
Single Pulse Avalanche Energy Tested Value
Avalanche Current
Repetitive Avalanche Energy
d
Thermal Resistance
RJC
RCS
RJA
c
c
W
W/°C
V
°C
300
10lbf in (1.1N m)
x
x
238
298
See Fig. 14, 15, 22a, 22b
k
d
Parameter
j
Junction-to-Case
Case-to-Sink, Flat Greased Surface
Junction-to-Ambient
mJ
A
mJ
Typ.
Max.
Units
–––
0.50
–––
0.72
–––
62
°C/W
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
V(BR)DSS
V(BR)DSS/TJ
RDS(on)
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
Static Drain-to-Source On-Resistance
VGS(th)
IDSS
Gate Threshold Voltage
Drain-to-Source Leakage Current
IGSS
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Internal Gate Resistance
RG
Notes:
Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 120A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements. (Refer to AN-1140)
Repetitive rating; pulse width limited by max. junction
temperature.
Limited by TJmax, starting TJ = 25°C, L = 0.048mH
RG = 50, IAS = 100A, VGS =10V.
ISD 100A, di/dt 1330A/μs, VDD V(BR)DSS, TJ 175°C.
2014-8-13
2
Min.
Typ.
Max. Units
40
–––
–––
–––
2.2
–––
–––
–––
–––
–––
–––
0.035
2.0
3.0
3.0
–––
–––
–––
–––
2.6
–––
–––
2.5
–––
3.9
1.0
150
100
-100
–––
V
V/°C
m
m
V
μA
nA
Conditions
VGS = 0V, ID = 250μA
Reference to 25°C, ID = 5.0mA
VGS = 10V, ID = 100A
VGS = 6.0V, ID = 50A
VDS = VGS, ID = 100μA
VDS = 40V, VGS = 0V
VDS = 40V, VGS = 0V, TJ = 125°C
VGS = 20V
VGS = -20V
g
g
d
Pulse width 400μs; duty cycle 2%.
Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS.
R is measured at TJ approximately 90°C.
This value determined from sample failure population,
starting T J = 25°C, L= 0.048mH, RG = 50, IAS = 100A, VGS =10V.
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IRFB7440GPBF
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
gfs
Qg
Qgs
Qgd
Qsync
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss eff. (ER)
Coss eff. (TR)
Parameter
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
Min.
Typ.
88
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
90
23
32
58
24
68
115
68
4730
680
460
845
980
Max. Units
Min.
Typ.
–––
–––
193
–––
–––
772
–––
–––
–––
–––
–––
–––
–––
0.9
6.8
24
28
17
20
1.3
1.3
–––
–––
–––
–––
–––
–––
–––
135
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
S
nC
Conditions
VDS = 10V, ID = 100A
ID = 100A
VDS =20V
VGS = 10V
ID = 100A, VDS =0V, VGS = 10V
VDD = 20V
ID = 30A
R G = 2.7
VGS = 10V
VGS = 0V
VDS = 25V
ƒ = 1.0 MHz
VGS = 0V, VDS = 0V to 32V
VGS = 0V, VDS = 0V to 32V
g
ns
pF
g
i
h
Diode Characteristics
Symbol
IS
Parameter
VSD
dv/dt
trr
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
Peak Diode Recovery
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
ISM
2014-8-13
d
f
3
Max. Units
Conditions
A
MOSFET symbol
showing the
G
A
integral reverse
p-n junction diode.
V
TJ = 25°C, IS = 100A, VGS = 0V
V/ns TJ = 175°C, IS = 100A, VDS = 40V
ns TJ = 25°C
VR = 34V,
TJ = 125°C
IF = 100A
di/dt = 100A/μs
nC TJ = 25°C
TJ = 125°C
A
TJ = 25°C
g
D
S
g
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IRFB7440GPBF
1000
1000
100
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
10
4.5V
1
60μs PULSE WIDTH
100
BOTTOM
10
4.5V
60μs PULSE WIDTH
Tj = 25°C
Tj = 175°C
0.1
1
0.1
1
10
100
0.1
V DS, Drain-to-Source Voltage (V)
100
2.0
100
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current (A)
10
Fig 4. Typical Output Characteristics
1000
T J = 175°C
T J = 25°C
10
VDS = 10V
60μs PULSE WIDTH
ID = 100A
VGS = 10V
1.8
1.6
1.4
1.2
1.0
0.8
0.6
1.0
3
4
5
6
7
8
9
-60 -40 -20 0 20 40 60 80 100120140160180
T J , Junction Temperature (°C)
VGS, Gate-to-Source Voltage (V)
Fig 6. Normalized On-Resistance vs. Temperature
Fig 5. Typical Transfer Characteristics
100000
14.0
VGS, Gate-to-Source Voltage (V)
VGS = 0V,
f = 1 MHZ
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
C oss = C ds + C gd
C, Capacitance (pF)
1
V DS, Drain-to-Source Voltage (V)
Fig 3. Typical Output Characteristics
10000
Ciss
Coss
Crss
1000
100
ID= 100A
12.0
VDS= 32V
VDS= 20V
10.0
8.0
6.0
4.0
2.0
0.0
1
10
100
0
VDS, Drain-to-Source Voltage (V)
20
40
60
80
100
120
QG, Total Gate Charge (nC)
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
2014-8-13
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
4
Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage
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IRFB7440GPBF
10000
T J = 175°C
100
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
10
T J = 25°C
1
OPERATION IN THIS AREA
LIMITED BY R DS(on)
1000
100μsec
100
1msec
Limited by
package
10
10msec
DC
1
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
0.1
0.1
0.0
0.5
1.0
1.5
2.0
2.5
0.1
1
0.8
50
Id = 5.0mA
VDS= 0V to 32V
48
0.6
47
Energy (μJ)
V(BR)DSS , Drain-to-Source Breakdown Voltage (V)
100
Fig 10. Maximum Safe Operating Area
Fig 9. Typical Source-Drain Diode
Forward Voltage
49
10
VDS, Drain-to-Source Voltage (V)
VSD, Source-to-Drain Voltage (V)
46
45
44
0.4
43
0.2
42
41
0.0
40
0
-60 -40 -20 0 20 40 60 80 100120140160180
5
T J , Temperature ( °C )
15
20
25
30
35
40
45
VDS, Drain-to-Source Voltage (V)
Fig 11. Drain-to-Source Breakdown Voltage
RDS(on), Drain-to -Source On Resistance ( m)
10
Fig 12. Typical COSS Stored Energy
40
VGS = 5.5V
VGS = 6.0V
VGS = 7.0V
VGS = 8.0V
30
VGS =10V
20
10
0
0
100 200 300 400 500 600 700 800
ID, Drain Current (A)
Fig 13. Typical On-Resistance vs. Drain Current
2014-8-13
5
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IRFB7440GPBF
1
Thermal Response ( Z thJC ) °C/W
D = 0.50
0.20
0.10
0.1
0.05
0.02
0.01
0.01
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
1000
Avalanche Current (A)
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming Tj = 150°C and
Tstart =25°C (Single Pulse)
100
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming j = 25°C and
Tstart = 150°C.
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth
EAR , Avalanche Energy (mJ)
250
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 16a, 16b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. T = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
TOP
Single Pulse
BOTTOM 1.0% Duty Cycle
ID = 100A
200
150
100
50
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
0
25
50
75
100
125
150
175
Starting T J , Junction Temperature (°C)
Fig 16. Maximum Avalanche Energy vs. Temperature
2014-8-13
6
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IRFB7440GPBF
8
IF = 60A
V R = 34V
7
4.0
TJ = 25°C
TJ = 125°C
6
3.0
IRRM (A)
VGS(th), Gate threshold Voltage (V)
5.0
ID = 100μA
ID = 1.0mA
ID = 1.0A
5
4
3
2.0
2
1
1.0
-75 -50 -25
0
0
25 50 75 100 125 150 175
200
T J , Temperature ( °C )
600
800
1000
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig 17. Threshold Voltage vs. Temperature
8
110
IF = 100A
V R = 34V
7
IF = 60A
V R = 34V
100
TJ = 25°C
TJ = 125°C
TJ = 25°C
TJ = 125°C
90
QRR (nC)
6
IRRM (A)
400
diF /dt (A/μs)
5
4
80
70
3
60
2
50
1
40
0
200
400
600
800
1000
0
200
diF /dt (A/μs)
400
600
800
1000
diF /dt (A/μs)
Fig. 20 - Typical Stored Charge vs. dif/dt
Fig. 19 - Typical Recovery Current vs. dif/dt
100
IF = 100A
V R = 34V
QRR (nC)
80
TJ = 25°C
TJ = 125°C
60
40
20
0
0
200
400
600
800
1000
diF /dt (A/μs)
Fig. 21 - Typical Stored Charge vs. dif/dt
2014-8-13
7
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IRFB7440GPBF
Driver Gate Drive
D.U.T
-
-
-
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+
RG
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
V DD
P.W.
Period
VGS=10V
Circuit Layout Considerations
Low Stray Inductance
Ground Plane
Low Leakage Inductance
Current Transformer
+
D=
Period
P.W.
+
+
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor
Current
Inductor Curent
-
ISD
Ripple 5%
* VGS = 5V for Logic Level Devices
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel
Power MOSFETs
V(BR)DSS
15V
DRIVER
L
VDS
tp
D.U.T
RG
20V
VGS
+
V
- DD
IAS
A
0.01
tp
I AS
Fig 22b. Unclamped Inductive Waveforms
Fig 22a. Unclamped Inductive Test Circuit
RD
VDS
VDS
90%
VGS
D.U.T.
RG
+
- VDD
V10V
GS
10%
VGS
Pulse Width µs
Duty Factor
td(on)
Fig 23a. Switching Time Test Circuit
tr
t d(off)
Fig 23b. Switching Time Waveforms
Id
Current Regulator
Same Type as D.U.T.
Vds
Vgs
50K
12V
tf
.2F
.3F
D.U.T.
+
V
- DS
Vgs(th)
VGS
3mA
IG
ID
Qgs1 Qgs2
Current Sampling Resistors
Fig 24a. Gate Charge Test Circuit
2014-8-13
Qgd
Qgodr
Fig 24b. Gate Charge Waveform
8
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