NTD4855N Power MOSFET 25 V, 98 A, Single N-Channel, DPAK/IPAK Features •Trench Technology •Low RDS(on) to Minimize Conduction Losses •Low Capacitance to Minimize Driver Losses •Optimized Gate Charge to Minimize Switching Losses •These are Pb-Free Devices http://onsemi.com V(BR)DSS RDS(ON) MAX ID MAX 4.3 mW @ 10 V 25 V 98 A Applications 6.0 mW @ 4.5 V •VCORE Applications •DC-DC Converters •Low Side Switching D MAXIMUM RATINGS (TJ = 25°C unless otherwise stated) Symbol G Value Unit Drain-to-Source Voltage VDSS 25 V Gate-to-Source Voltage VGS ±20 V ID 18 A Continuous Drain Current RqJA (Note 1) TA = 25°C Power Dissipation RqJA (Note 1) TA = 25°C PD 2.24 W Continuous Drain Current RqJA (Note 2) TA = 25°C ID 14 A TA = 85°C PD 1.35 W Continuous Drain Current RqJC (Note 1) TC = 25°C ID 98 A Power Dissipation RqJC (Note 1) TC = 25°C PD 66.7 W TA = 25°C IDM 197 A TC = 85°C tp=10ms Current Limited by Package TA = 25°C Operating Junction and Storage Temperature Source Current (Body Diode) 1 3 CASE 369AA DPAK (Bent Lead) STYLE 2 2 3 1 2 3 CASE 369AC CASE 369D 3 IPAK IPAK (Straight Lead) (Straight Lead DPAK) 76 IDmaxPkg 45 A TJ, TSTG -55 to +175 °C IS 56 A Drain to Source dV/dt dV/dt 6 V/ns Single Pulse Drain-to-Source Avalanche Energy (TJ = 25°C, VDD = 50 V, VGS = 10 V, IL = 21 Apk, L = 1.0 mH, RG = 25 W) EAS 220 mJ TL 260 °C Lead Temperature for Soldering Purposes (1/8” from case for 10 s) 1 2 10.9 TA = 25°C Pulsed Drain Current 4 Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. MARKING DIAGRAMS & PIN ASSIGNMENTS 4 Drain 4 Drain 4 Drain YWW 48 55NG Steady State 4 4 14 YWW 48 55NG Power Dissipation RqJA (Note 2) TA = 85°C S N-CHANNEL MOSFET YWW 48 55NG Parameter 2 1 2 3 1 Drain 3 Gate Source Gate Drain Source 1 2 3 Gate Drain Source Y WW 4855N G = Year = Work Week = Device Code = Pb-Free Package ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 6 of this data sheet. © Semiconductor Components Industries, LLC, 2008 April, 2008 - Rev. 1 1 Publication Order Number: NTD4855N/D NTD4855N THERMAL RESISTANCE MAXIMUM RATINGS Symbol Value Unit Junction-to-Case (Drain) Parameter RqJC 2.25 °C/W Junction-to-TAB (Drain) RqJC-TAB 3.5 Junction-to-Ambient – Steady State (Note 1) RqJA 67 Junction-to-Ambient – Steady State (Note 2) RqJA 111 1. Surface-mounted on FR4 board using 1 sq-in pad, 1 oz Cu. 2. Surface-mounted on FR4 board using the minimum recommended pad size. ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Symbol Test Condition Min Drain-to-Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 250 mA 25 Drain-to-Source Breakdown Voltage Temperature Coefficient V(BR)DSS/ TJ Parameter Typ Max Unit OFF CHARACTERISTICS Zero Gate Voltage Drain Current Gate-to-Source Leakage Current IDSS V 22 VGS = 0 V, VDS = 20 V mV/°C TJ = 25°C 1.0 TJ = 125°C 10 IGSS VDS = 0 V, VGS = ±20 V VGS(TH) VGS = VDS, ID = 250 mA mA ±100 nA 2.5 V ON CHARACTERISTICS (Note 3) Gate Threshold Voltage Negative Threshold Temperature Coefficient VGS(TH)/TJ Drain-to-Source On Resistance RDS(on) Forward Transconductance gFS 1.45 TBD mV/°C VGS = 10 V ID = 30 A 3.5 4.3 VGS = 4.5 V ID = 30 A 4.6 6.0 VDS = 1.5 V, ID = 15 A 80 mW S CHARGES AND CAPACITANCES Input Capacitance CISS Output Capacitance COSS Reverse Transfer Capacitance CRSS 400 Total Gate Charge QG(TOT) 21.8 Threshold Gate Charge QG(TH) Gate-to-Source Charge Gate-to-Drain Charge Total Gate Charge QGS 2950 VGS = 0 V, f = 1.0 MHz, VDS = 12 V pF 32.7 2.4 VGS = 4.5 V, VDS = 15 V, ID = 30 A QGD QG(TOT) 740 7.9 nC 8.6 VGS = 10 V, VDS = 15 V, ID = 30 A 44 nC SWITCHING CHARACTERISTICS (Note 4) Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time Turn-On Delay Time Rise Time Turn-Off Delay Time Fall Time td(ON) tr td(OFF) 17.75 VGS = 4.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W 31.48 20.28 tf 10.74 td(ON) 10.01 tr td(OFF) VGS = 11.5 V, VDS = 15 V, ID = 15 A, RG = 3.0 W tf 16.52 32.02 4.35 3. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 2 ns ns NTD4855N ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise specified) Parameter Symbol Test Condition Min Typ Max TJ = 25°C 0.86 1.2 TJ = 125°C 0.74 Unit DRAIN-SOURCE DIODE CHARACTERISTICS Forward Diode Voltage Reverse Recovery Time Charge Time Discharge Time Reverse Recovery Charge VSD VGS = 0 V, IS = 30 A tRR ta tb V 25.5 VGS = 0 V, dIS/dt = 100 A/ms, IS = 30 A 12.9 ns 12.6 QRR 13.8 nC Source Inductance LS 2.49 nH Drain Inductance, DPAK LD 0.0164 Drain Inductance, IPAK LD PACKAGE PARASITIC VALUES TA = 25°C 1.88 Gate Inductance LG 3.46 Gate Resistance RG 0.8 3. Pulse Test: pulse width v 300 ms, duty cycle v 2%. 4. Switching characteristics are independent of operating junction temperatures. http://onsemi.com 3 W NTD4855N TYPICAL PERFORMANCE CURVES 90 ID, DRAIN CURRENT (AMPS) 80 3.4 V 70 60 3.2 V 50 40 3.0 V 30 20 2.8 V 10 0 1 2 3 4 5 TJ = 25°C TJ = -55°C 1 2 3 4 5 Figure 2. Transfer Characteristics 0.035 0.03 0.025 0.02 0.015 0.01 0.005 2 4 6 8 10 0.007 TJ = 25°C 0.006 VGS = 4.5 V 0.005 0.004 VGS = 11.5 V 0.003 0.002 30 40 50 60 70 80 90 100 110 120 VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) ID, DRAIN CURRENT (AMPS) Figure 3. On-Resistance vs. Gate-to-Source Voltage Figure 4. On-Resistance vs. Drain Current and Gate Voltage 1.8 10000 VGS = 0 V ID = 30 A VGS = 10 V TJ = 150°C IDSS, LEAKAGE (nA) RDS(on), DRAIN-TO-SOURCE RESISTANCE (NORMALIZED) TJ = 125°C Figure 1. On-Region Characteristics ID = 30 A TJ = 25°C 1.6 VDS ≥ 10 V VGS, GATE-TO-SOURCE VOLTAGE (VOLTS) 0.04 0 140 130 120 110 100 90 80 70 60 50 40 30 20 10 0 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) 0 RDS(on), DRAIN-TO-SOURCE RESISTANCE (W) TJ = 25°C 3.8 V 3.6 V ID, DRAIN CURRENT (AMPS) 10 V 1.4 1.2 1.0 1000 TJ = 125°C 100 10 TJ = 25°C 0.8 0.6 -50 1 -25 0 25 50 75 100 125 150 175 5 10 15 20 TJ, JUNCTION TEMPERATURE (°C) VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) Figure 5. On-Resistance Variation with Temperature Figure 6. Drain-to-Source Leakage Current vs. Drain Voltage http://onsemi.com 4 25 NTD4855N TYPICAL PERFORMANCE CURVES C, CAPACITANCE (pF) 3600 3200 VGS , GATE-TO-SOURCE VOLTAGE (VOLTS) 4000 VGS = 0 V Ciss TJ = 25°C 2800 2400 2000 1600 1200 Coss 800 400 0 0 Crss 2.5 5 7.5 10 12.5 15 17.5 20 DRAIN-TO-SOURCE VOLTAGE (VOLTS) 12 8 Q1 4 IS, SOURCE CURRENT (AMPS) td(off) tf 100 tr td(on) 10 0 0 10 RG, GATE RESISTANCE (OHMS) 8 12 16 20 24 28 32 36 40 44 48 VGS = 0 V 25 20 15 10 5 100 ms 1 ms 10 ms dc VGS = 20 V SINGLE PULSE TC = 25°C RDS(on) LIMIT THERMAL LIMIT PACKAGE LIMIT 1 1.0 0.8 Figure 10. Diode Forward Voltage vs. Current 10 ms 10 0.6 0.4 VSD, SOURCE-TO-DRAIN VOLTAGE (VOLTS) 10 100 VDS, DRAIN-TO-SOURCE VOLTAGE (VOLTS) EAS, SINGLE PULSE DRAIN-TO-SOURCE AVALANCHE ENERGY (mJ) 100 TJ = 25°C 0 0.2 100 1000 I D, DRAIN CURRENT (AMPS) 4 QG, TOTAL GATE CHARGE (nC) Figure 9. Resistive Switching Time Variation vs. Gate Resistance 0.1 0.1 ID = 30 A VDD = 15 V TJ = 25°C 2 30 VDD = 15 V ID = 30 A VGS = 11.5 V 1 Q2 Figure 8. Gate-To-Source and Drain-To-Source Voltage vs. Total Charge 1000 t, TIME (ns) VGS 6 Figure 7. Capacitance Variation 1 1 QT 10 240 ID = 21 A 220 200 180 160 140 120 100 80 60 40 20 0 25 Figure 11. Maximum Rated Forward Biased Safe Operating Area 50 75 100 125 150 TJ, JUNCTION TEMPERATURE (°C) Figure 12. Maximum Avalanche Energy vs. Starting Junction Temperature http://onsemi.com 5 175 NTD4855N ORDERING INFORMATION Package Shipping† NTD4855NT4G DPAK (Pb-Free) 2500 / Tape & Reel NTD4855N-1G IPAK (Pb-Free) 75 Units / Rail NTD4855N-35G IPAK Trimmed Lead (3.5 " 0.15 mm) (Pb-Free) 75 Units / Rail Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 6 NTD4855N PACKAGE DIMENSIONS DPAK (SINGLE GAUGE) CASE 369AA-01 ISSUE A -TC B V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. SEATING PLANE E R 4 Z A S 1 2 DIM A B C D E F H J L R S U V Z H 3 U F J L D STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN 2 PL 0.13 (0.005) M INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.025 0.035 0.018 0.024 0.030 0.045 0.386 0.410 0.018 0.023 0.090 BSC 0.180 0.215 0.024 0.040 0.020 --0.035 0.050 0.155 --- T SOLDERING FOOTPRINT* 6.20 0.244 2.58 0.101 5.80 0.228 3.0 0.118 1.6 0.063 6.172 0.243 SCALE 3:1 mm Ǔ ǒinches *For additional information on our Pb-Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 7 MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.63 0.89 0.46 0.61 0.77 1.14 9.80 10.40 0.46 0.58 2.29 BSC 4.57 5.45 0.60 1.01 0.51 --0.89 1.27 3.93 --- NTD4855N PACKAGE DIMENSIONS 3 IPAK, STRAIGHT LEAD CASE 369AC-01 ISSUE O B V NOTES: 1.. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2.. CONTROLLING DIMENSION: INCH. 3. SEATING PLANE IS ON TOP OF DAMBAR POSITION. 4. DIMENSION A DOES NOT INCLUDE DAMBAR POSITION OR MOLD GATE. C E R DIM A B C D E F G H J K R V W A SEATING PLANE K W F J G H D 3 PL 0.13 (0.005) W INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.043 0.090 BSC 0.034 0.040 0.018 0.023 0.134 0.142 0.180 0.215 0.035 0.050 0.000 0.010 MILLIMETERS MIN MAX 5.97 6.22 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.09 2.29 BSC 0.87 1.01 0.46 0.58 3.40 3.60 4.57 5.46 0.89 1.27 0.000 0.25 IPAK (STRAIGHT LEAD DPAK) CASE 369D-01 ISSUE B C B V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. E R 4 Z A S 1 2 3 -TSEATING PLANE K J F H D G DIM A B C D E F G H J K R S V Z INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 --- MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93 --- 3 PL 0.13 (0.005) M STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN T ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC reserves the right to make changes without further notice to any products herein. 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