MPS MP4030A Triac-dimmable, primary-side-control offline led controller with active pfc Datasheet

MP4030A
TRIAC-Dimmable, Primary-Side-Control
Offline LED Controller with Active PFC
The Future of Analog IC Technology
DESCRIPTION
The MP4030A is a TRIAC-dimmable, primaryside-control, offline LED lighting controller with
active PFC. It can output an accurate LED
current for an isolated lighting application with a
single-stage converter. The proprietary realcurrent-control method can accurately control the
LED current using primary-side information. It
can significantly simplify LED lighting system
design by eliminating secondary-side feedback
components and the optocoupler.
The
MP4030A
implements
power-factor
correction and works in boundary-conduction
mode to reduce MOSFET switching losses.
The MP4030A has an integrated charging circuit
at the supply pin for fast start-up without a
perceptible delay.
The proprietary dimming control expands the
TRIAC-based dimming range.
The MP4030A features multiple protections
including over-voltage protection (OVP), shortcircuit protection (SCP), primary-side overcurrent protection (OCP), supply-pin undervoltage lockout (UVLO), and over temperature
protection (OTP). All of which not only simplifies
circuit design but also enhances system reliability
and safety greatly. All fault protections feature
auto-restart.
FEATURES
•
•
•
•
•
•
•
•
•
•
•
•
Primary-Side-Control without Requiring a
Secondary-Side Feedback Circuit
Internal Charging Circuit at the Supply Pin for
Fast Start-Up
Accurate Line & Load Regulation
High Power Factor and Improved THD
Flicker-Free, Phase-Controlled TRIAC
Dimming with Expanded Dimming Range 1%
to 100% Full Range
Operates in Boundary Conduction Mode
Cycle-by-Cycle Current Limit
Primary-Side, Over-Current Protection
Over-Voltage Protection
Short-Circuit Protection
Over-Temperature Protection
Available in an 8-Pin SOIC Package
APPLICATIONS
•
Solid-State Lighting, including:
• Industrial and Commercial Lighting
• Residential Lighting
All MPS parts are lead-free and adhere to the RoHS directive. For MPS green
status, please visit MPS website under Products, Quality Assurance page.
“MPS” and “The Future of Analog IC Technology” are registered trademarks of
Monolithic Power Systems, Inc.
The MP4030A is available in an 8-pin SOIC
package.
MP4030A Rev.1.01
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9/27/2013
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1
MP4030A—PRIMARY-SIDE-CONTROL, OFFLINE, LED CONTROLLER WITH PFC
TYPICAL APPLICATION
A
MP4030A Rev.1.01
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MP4030A—PRIMARY-SIDE-CONTROL, OFFLINE, LED CONTROLLER WITH PFC
ORDERING INFORMATION
Part Number*
Package
SOIC8
MP4030AGS
Top Marking
MP4030A
* For Tape & Reel, add suffix –-Z (e.g. MP4030AGS–Z);
PACKAGE REFERENCE
SOIC8
(4)
ABSOLUTE MAXIMUM RATINGS (1)
Thermal Resistance
VCC Pin Voltage ...........................-0.3V to +30V
Low-Side MOSFET Drain Voltage -0.3V to +30V
ZCD Pin Voltage ................................-8V to +7V
Other Analog Inputs and Outputs .....-0.3V to 7V
ZCD Pin Current ..........................-5mA to +5mA
(2)
Continuous Power Dissipation
(TA = +25°C)
SOIC8 ........................................................ 1.3W
Junction Temperature ...............................150°C
Lead Temperature ....................................260°C
Storage Temperature............... -65°C to +150°C
SOIC8 ....................................96 ...... 45 ... °C/W
Recommended Operating Conditions
(3)
θJA
θJC
Notes:
1) Exceeding these ratings may damage the device.
2) The maximum allowable power dissipation is a function of the
maximum junction temperature TJ(MAX), the junction-toambient thermal resistance θJA, and the ambient temperature
TA. The maximum allowable continuous power dissipation at
any ambient temperature is calculated by PD(MAX)=(TJ(MAX)TA)/ θJA. Exceeding the maximum allowable power dissipation
will cause excessive die temperature, and the regulator will go
into thermal shutdown. Internal thermal shutdown circuitry
protects the device from permanent damage.
3) The device is not guaranteed to function outside of its
operation conditions.
4) Measured on JESD51-7 4-layer board.
VCC Pin Voltage ...............................11V to 27V
Operating Junction Temp (TJ).. -40°C to +125°C
MP4030A Rev.1.01
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MP4030A—PRIMARY-SIDE-CONTROL, OFFLINE, LED CONTROLLER WITH PFC
ELECTRICAL CHARACTERISTICS
TA = +25°C, unless otherwise noted.
Parameter
Supply Voltage
Symbol
Operating Range
VCC
VCC Upper Level: Internal
Charging Circuit Stops and IC
Turns On
VCC Lower Level: Internal
Charging Circuit Triggers
VCC Re-charge and IC turns off
Level in Fault Condition
Supply Current
VCC Charging Current from D
Quiescent Current
Quiescent Current at Fault
Operating Current
Condition
Min
After turn on
10
Typ
Max
Units
27
V
VCCH
9.4
10
10.5
V
VCCL
8.65
9
9.55
V
Fault condition
6.55
7
7.45
V
VD=16V, VCC=5V
12.5
15
17.5
mA
800
1000
µA
220
300
µA
1
2
mA
3
V
VCCEN
ID_Charge
IQ
No switching, VCC=15V
IQ_Fault
Icc
Fault condition, IC latch,
VCC=15V
fs =70kHz, VCC=15V
VMULT
VCOMP from 1.9V to 4.9V
160
Multiplier
Linear Operation Range
Gain
(5)
K
0
VCOMP=2V, VMULT=0.5V
0.82
1.04
1.24
1/V
VCOMP=2V, VMULT=1.5V
0.86
1.05
1.20
1/V
VCOMP=2V, VMULT=3V
0.91
1.06
1.24
1/V
TRIAC-Dimming OFF Detection
Threshold
TRIAC-Dimming ON Detection
Threshold
VMUL_OFF
0.13
0.15
0.17
V
VMUL_ON
0.32
0.35
0.38
V
TRIAC-Dimming OFF Line-Cycle
Blanking Ratio
DOFF_LEB
25
%
TRIAC Dimming Threshold, DutyCycle Ratio to Disable DP
74.4
75
75.4
%
TRIAC Dimming Hysteresis,
Duty-Cycle Ratio to Disable DP
4.6
5.3
6.0
%
0.22
0.25
0.28
V
150
200
250
µs
0.388
0.403
0.417
V
Dimming Pull-Down MOSFET
Turn-ON Threshold
VMULT_DP_ON
Dimming Pull-Down MOSFET
Turn-OFF Delay Time
tDP_OFF_Delay
Starts at the rising edge
of VMULT=VMULT_ON
Error Amplifier
Reference Voltage
VREF
Transconductance
GEA
150
µA/V
COMP Lower Clamp Voltage
VCOMPL
Max. Source Current
ICOMP+
55
µA
ICOMP-
-270
µA
Max. Sink Current without
Dimmer
1.85
1.9
1.96
MP4030A Rev.1.01
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V
4
MP4030A—PRIMARY-SIDE-CONTROL, OFFLINE, LED CONTROLLER WITH PFC
ELECTRICAL CHARACTERISTICS (continued)
TA = +25°C, unless otherwise noted.
Parameter
Symbol
Sink Current at TRIAC Dimming OFF
Condition
Min
Typ
Max
Units
ISink_Dim
60
70
80
µA
tLEB
575
685
795
ns
Current Sense Comparator
Leading-Edge-Blanking Time
Leading-Edge-Blanking Time for
OCP
tLEB_OCP
0.7
tLEB
VOCP
2.63
2. 73
2.83
V
Current-Sense Upper Clamp Voltage
VS_Clamp_H
2.2
2. 3
2.4
V
Current-Sense Lower Clamp Voltage
VS_Clamp_L
0.08
0.1
0.13
V
0.32
0.35
0.38
V
510
550
590
mV
1.8
2.5
3.1
µs
0.85
1.2
1.5
µs
5.1
5.4
5.7
V
1.35
1.85
2.35
µs
OCP Threshold
Zero-Current Detector
Zero-Current Detection Threshold
VZCD_T
Zero-Current Detection Hysteresis
VZCD_HY
tZCD_LEB
Zero-Current Detection LEB
Falling Edge
Starts at Gate Turn Off,
VS≥0.25
Starts at Gate Turn Off,
VS<0.25
Over-Voltage Threshold
VZCD_OVP
OVP Detect LEB
tOVP_LEB
Minimum OFF Time
tOFF_MIN
3.6
5.1
6.6
µs
ΤStart
90
115
140
µs
Starts at Gate Turn Off
Starter
Start Timer Period
Internal Main MOSFET
Breakdown Voltage
BVDSS_Main
Drain-Source On-Resistor
RDS(ON)_Main ID=100mA
200
BVDSS_D-VCC VGS=0
30
VGS=0
30
V
260
320
mΩ
Internal Fault Pull Up MOSFET
Breakdown Voltage
ID_D-VCC
Continue Drain Current
V
12
mA
Internal Dimming Pull Down MOSFET
Breakdown Voltage
BVDSS_DP
VGS=0
30
Drain-Source On-Resistor
RDS(ON)_DP
ID=50mA
24
V
28
32
Ω
Thermal Shutdown
Thermal Shutdown Threshold
TSD
Thermal Shutdown Recovery
Hysteresis
THYS
Guaranteed by
Characterization
Guaranteed by
Characterization
150
°C
30
°C
Notes:
5) The multiplier output is given by: Vs=K•VMULT• (VCOMP-1.5)
MP4030A Rev.1.01
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MP4030A—PRIMARY-SIDE-CONTROL, OFFLINE, LED CONTROLLER WITH PFC
PIN FUNCTIONS
Pin #
Name
1
MULT
2
ZCD
3
VCC
4
DP
5
S
6
D
7
GND
8
COMP
Pin Function
Internal Multiplier Input. Connect to the tap of resistor divider from the rectified voltage of
the AC line. The half-wave sinusoidal signal provides a reference signal for the internal
current-control loop. MULT also detects the TRIAC-dimming phase.
Zero-Current Detection. A negative going-edge triggers the internal MOSFET’s turn-on
signal. Connect to the tap of a resistor divider from the auxiliary winding to GND. The ZCD
pin can also detect over-voltage. Over-voltage occurs if VZCD exceeds the OVP threshold
after a 1.85µs blanking time when the internal MOSFET turns off.
Supply Voltage. Supplies power for both the control signal and the internal MOSFET’s gate
driver. Connect to an external bulk capacitor - typically 22µF with a 100pF ceramic capacitor
to reduce noise.
Dimming Pull-Down. Drain of the internal dimming pull-down MOSFET. Connect a resistor
from this pin to the D pin to pull down the rectified input voltage during the TRIAC dimming
OFF interval.
Internal Low-Side Main MOSFET Source. Connect a resistor from this pin to GND to sense
the internal MOSFET current. An internal comparator compares the resulting voltage to the
internal sinusoid shaped current reference signal to determine when the MOSFET turns off.
If the voltage exceeds the current-limit threshold of 2.3V after the leading edge blanking
time during the turn-on interval, the gate signal turns off. Over-current occurs if Vs exceeds
2.73V during the turn-on interval after the leading-edge blanking time for OCP.
Internal Low-Side Main MOSFET Drain. Internally connects to VCC via a diode and a JFET
to form an internal charging circuit for VCC. Connect to the source of the high-side MOSFET.
An internal MOSFET pulls up the D to VCC through a diode at fault condition to turn off the
main switch.
Ground. Current return of the control signal and the gate drive signal.
Loop Compensation. Connects to a compensation network to stabilize the LED driver and
accurately control the LED driver current.
MP4030A Rev.1.01
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9/27/2013
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MP4030A—PRIMARY-SIDE-CONTROL, OFFLINE, LED CONTROLLER WITH PFC
TYPICAL CHARACTERISTICS
0.410
0.405
0.400
0.395
0.390
0.385
0.380
-40 -20
0 20 40 60 80 100 120
MP4030A Rev.1.01
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MP4030A—PRIMARY-SIDE-CONTROL, OFFLINE, LED CONTROLLER WITH PFC
TYPICAL PERFORMANCE CHARACTERISTICS
VIN =120VAC/60Hz, 7 LEDs in series, IO=350mA, VO=21V, LP=1.6mH, NP:NS:NAUX =82:16:19, TRIAC
dimmable.
100.0
95.0
100
2.0
90
90.0
1.0
85.0
70
80.0
60
75.0
50
0.0
70.0
40
65.0
60.0
30
-1.0
55.0
50.0
105 110 115 120 125 130 135
-2.0
105 110 115 120 125 130 135
Dimming Curve
Conducted EMI
Based on Line L
120
EN550150
110
350
100 kHz
1 MHz
Based on Line N
2AV
CLRWR
250
120
EN550150
110
10 MHz
SGL
PK 100
CLRWR
300
90
TDS
80
2AV
CLRWR
150
50
6DB
TDS
80
30
30
20
10
0
0
0 10 20 30 40 50 60 70 80 90 100
Steady State
Steady State
6DB
40
20
9 kHz
VIN
250V/div.
SGL
90
50
10
0
10 MHz
60
EN55015A
40
100
1 MHz
70
60
50
100 kHz
PK 100
CLRWR
70
200
VOUT
10V/div.
ILED
200mA/div.
20
THD
10
0
105 110 115 120 125 130 135
Conducted EMI
400
IIN
100mA/div.
PF
80
30 MHz
9 kHz
30 MHz
VIN Start-Up
VCOMP
2V/div.
VMULT
1V/div.
VZCD
2V/div.
VCC
20V/div.
VMULT
1V/div.
VS
500mV/div.
VD
10V/div.
ILED
200mA/div.
MP4030A Rev.1.01
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MP4030A—PRIMARY-SIDE-CONTROL, OFFLINE, LED CONTROLLER WITH PFC
TYPICAL PERFORMANCE CHARACTERISTICS
VIN =120VAC/60Hz, 7 LEDs in series, IO=350mA, VO=21V, LP=1.6mH, NP:NS:NAUX =82:16:19, TRIAC
dimmable.
VMULT
1V/div.
VMULT
1V/div.
VMULT
1V/div.
IIN
100mA/div.
VCOMP
1V/div.
IIN
100mA/div.
VCOMP
1V/div.
IIN
100mA/div.
VCOMP
1V/div.
VD
10V/div.
VD
10V/div.
VD
10V/div.
VMULT
1V/div.
VMULT
1V/div.
VMULT
1V/div.
IIN
100mA/div.
VCOMP
1V/div.
IIN
100mA/div.
VCOMP
1V/div.
IIN
100mA/div.
VCOMP
1V/div.
VD
10V/div.
VD
10V/div.
VD
10V/div.
VCC
10V/div.
VCC
10V/div.
VD
10V/div.
VD
10V/div.
VCOMP
1V/div.
VOUT
5V/div.
VCOMP
1V/div.
ILED
200mA/div.
ILED
100mA/div.
ILED
200mA/div.
MP4030A Rev.1.01
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MP4030A—PRIMARY-SIDE-CONTROL, OFFLINE, LED CONTROLLER WITH PFC
BLOCK DIAGRAM
Figure 1: Functional Block Diagram
MP4030A Rev.1.01
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MP4030A—PRIMARY-SIDE-CONTROL, OFFLINE, LED CONTROLLER WITH PFC
OPERATION
The MP4030A is a TRIAC-dimmable, primaryside-controlled, offline, LED controller designed
for high-performance LED lighting. The MP4030A
can accurately control the LED current using
real-current-control based on primary-side
information. It can also achieve a high power
factor to eliminate noise on the AC line. The
integrated VCC charging circuit can achieve fast
start-up without any perceptible delay. The
MP4030A is suitable for TRIAC-based dimming
with an extended dimming range.
Boundary-Conduction Mode
During the external MOSFET ON time (tON), the
rectified input voltage applied across the primaryside inductor (LP) increases the primary current
increases linearly from zero to the peak value
(IPK). When the external MOSFET turns off, the
energy stored in the inductor forces the
secondary side diode to turn on, and the inductor
current decreases linearly from the peak value to
zero. When the current decreases to zero, the
parasitic resonance caused by the inductor and
the combined parasitic capacitances decreases
the MOSFET drain-source voltage, which is also
reflected on the auxiliary winding (see Figure 2).
The zero-current detector (ZCD) generates the
external MOSFET turn-on signal when the ZCD
voltage falls below 0.35V after a blanking time
and ensures the MOSFET turns on at a relatively
low voltage (see Figure 3).
VDS
VAC Line + N V OUT
Auxiliary Winding
+
Vcc
RZCD1
ZCD
RZCD2
0.35V
CZCD
Figure 3: Zero-Current Detector
As a result, there are virtually no primary-switch
turn-on losses and no secondary-diode reverserecovery losses. This ensures high efficiency and
low EMI noise.
Real-Current Control
The proprietary real-current-control method
allows the MP4030A to control the secondaryside LED current based on primary-side
information. The output LED mean current can
be approximated as:
IO =
N ⋅ VREF
2 ⋅ RS
Where:
• N is the turn ratio of the primary side to the
secondary side,
• VREF is the reference voltage (typically value
is 0.403V),
• RS is the sense resistor between the
MOSFET source and GND.
Power-Factor Correction
VAC Line
Turn ON
IP
Inductor
current
IS /N
t ON
t OFF
VZCD
0
The MULT pin connects to the tap of a resistor
divider from the rectified, instantaneous, line
voltage. The multiplier output is also sinusoidal.
This signal provides the reference for the current
comparator against the primary-side-inductor
current, which shapes the primary-peak current
into a sinusoid with the same phase as the input
line voltage. This achieves a high power factor.
Figure 2: Boundary-Conduction Mode
MP4030A Rev.1.01
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MP4030A—PRIMARY-SIDE-CONTROL, OFFLINE, LED CONTROLLER WITH PFC
Multiplier Output
Vcc
Inductor Current
Auxiliary Winding Takes Charge
and Regulates the VCC
Fault Happens
10V
9V
7V
Internal
Charging Circuit
Figure 4: Power-Factor Correction
The multiplier’s maximum output voltage to the
current comparator is clamped at 2.3V to limit the
cycle-by-cycle current. The multiplier’s minimum
output voltage is clamped to 0.1V to ensure a
turn-on signal during the TRIAC dimming OFF
interval to pull down the rectifier input voltage for
accurate dimming-phase detection.
VCC Timing Sequence
Initially, VCC charges through the internal
charging circuit from the AC line. When VCC
reaches 10V, the internal charging circuit stops
charging, the control logic initializes and the
internal main MOSFET begins to switch. Then
the auxiliary winding takes over the power supply.
However, the initial auxiliary-winding positive
voltage may not be large enough to charge VCC,
causing VCC to drop. Instead, if VCC drops below
the 9V threshold, the internal charging circuit
triggers and charges VCC to 10V again. This cycle
repeats until the auxiliary winding voltage is high
enough to power VCC.
If any fault occurs during this time, the switching
and the internal charging circuit will stop and
latch, and VCC drops. When VCC decreases to 7V,
the internal charging circuit re-charges for autorestart.
Gate
Switching Pulses
Figure 5: VCC Timing Sequence
Auto-Start
The MP4030A includes an auto-starter that starts
timing when the MOSFET turns off. If ZCD fails
to send a turn-on signal after 115µs, the autostarter sends a turn-on signal to avoid
unnecessary IC shutdowns if ZCD fails.
Minimum OFF Time
The MP4030A operates with a variable switching
frequency and the frequency changes with the
instantaneous input-line voltage. To limit the
maximum frequency and for good EMI
performance, the MP4030A employs an internal
minimum OFF-time limiter of 5.1µs, as shown in
ZCD
GATE
Figure 6.
5.1µs
MP4030A Rev.1.01
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MP4030A—PRIMARY-SIDE-CONTROLLED, OFFLINE LED CONTROLLER WITH PFC
MPS CONFIDENTIAL AND PROPRIETARY INFORMATION- INTERNAL USE ONLY
Figure 6: Minimum OFF time
MP4030A Rev.1.0
9/27/2013
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MP4030A—PRIMARY-SIDE-CONTROL, OFFLINE, LED CONTROLLER WITH PFC
Auxiliary Winding
Leading-Edge Blanking
An internal LEB unit between the S pin and the
current-comparator input blocks the path from the
S pin to the current comparator input during the
blanking time to avoid premature switching-pulse
termination due to the parasitic capacitances
discharging when the MOSFET turns on, as
shown in Figure 7.
+
Vcc
RZCD1
ZCD
OVP
signal
Latch
5.4V
RZCD2
CZCD
VS
Blanking
t LEB = 685ns
Figure 8: OVP Sampling Circuit
To avoid switch-on spikes mis-triggering OVP,
OVP sampling has a blanking period (tOVP_LEB ) of
around 1.85µs, as shown in Figure 9.
VZCD
t
Sampling Here
Figure 7: Leading-Edge Blanking
Output Over-Voltage Protection (OVP)
Output OVP prevents component damage from
over-voltage conditions. The auxiliary winding
voltage’s positive plateau is proportional to the
output voltage, and the IC monitors this auxiliary
winding voltage from the ZCD pin instead of
directly monitoring the output voltage as shown in
Figure 8. Once the ZCD pin voltage exceeds
5.4V, the OVP signal triggers and latches, the
gate driver turns off, and the IC enters quiescent
mode. When VCC drops below the UVLO
threshold, the IC shuts down and the system
restarts. The output OVP set point can be
calculated as:
N
R ZCD2
VOUT_OVP ⋅ AUX
= 5.4V
NSEC R ZCD1 + R ZCD2
Where:
VOUT_OVP is the output OVP threshold,
NAUX is the number of auxiliary winding turns, and
NSEC is the number of secondary winding turns.
0V
tOVP_LEB
Figure 9: ZCD Voltage and OVP Sampling
Output Short-Circuit Protection (SCP)
If a short circuit on the secondary-side occurs,
ZCD pin can’t detect the zero-crossing signal and
system works in 115µs auto-restart mode until
VCC drops below UVLO before restarting.
Primary Over-Current Protection (OCP)
The S pin has an internally-integrated
comparator for primary OCP. When the gate is
on, the comparator is enabled. Over-current
occurs when VS exceeds 2.73V after a blanking
time. Then the IC shuts down and will not restart
until VCC drops below UVLO. Figure 10 shows
OCP.
MP4030A Rev.1.01
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MP4030A—PRIMARY-SIDE-CONTROL, OFFLINE, LED CONTROLLER WITH PFC
IP
Latch
OCP
Signal
LEB
2.73V
RS
this as a dimmer turn-off signal. The MP4030A
has a 25% line-cycle-detection blanking time for
each line cycle, the real-phase-detector output
inserts this blanking time, as shown in Figure 12,
such that if the turn-on cycle exceeds 75% of the
line cycle, the output remains at the maximum
current. This implementation improves line
regulation during the maximum TRIAC turn-on
cycle with or without a dimmer.
Figure 10: Over-Current Protection Circuit
Thermal Shutdown
To prevent internal temperatures from exceeding
150°C and causing lethal thermal damage, the
MP4030A shuts down the switching cycle and
latches until VCC drops below UVLO before
restarting.
TRIAC-Based Dimming Control
The
MP4030A
implements
TRIAC-based
dimming. The TRIAC dimmer consists of a bidirectional SCR with an adjustable turn-on phase.
Figure 11 shows the leading-edge TRIAC
dimmer waveforms.
Input line
voltage before
TRIAC dimmer
Line voltage
after TRIAC
dimmer
Figure 12: Dimming Turn-On Cycle Detector
If the turn-on cycle decreases to less than 75% of
the line cycle, the internal reference voltage
decreases with the dimming turn-on phase, and
the output current decreases accordingly. As the
dimming turn-on cycle decreases, the COMP
voltage also decreases. Once the COMP voltage
reaches 1.9V, it is clamped so that the output
current decreases slowly to maintain the TRIAC
holding current and avoid random flicker. Figure
13 shows the relationship between the dimming
turn-on phase and output current.
Io
Rectified line
voltage
Dimmer
turn on
phase
V C OM P
Line cycle
Figure 11: TRIAC Dimmer Waveforms
The MP4030A detects the dimming turn-on cycle
through the MULT pin, which is fed into the
control loop to adjust the internal reference
voltage. When VMULT exceeds 0.35V, the device
treats this signal as the turn-on of the dimmer.
When VMULT falls below 0.15V, the system treats
30%
75%
100 %
T R IA C Dimm ing Turn-ON Cycle
Figure 13: Dimming Curve
MP4030A Rev.1.01
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15
MP4030A—PRIMARY-SIDE-CONTROL, OFFLINE, LED CONTROLLER WITH PFC
Dimming Pull-Down MOSFET
The DP MOSFET turns on when VMULT
decreases to 0.25V. Connect a resistor to the D
pin to provide the pull-up current during the
dimming turn-off interval, and to quickly pull down
the rectified line voltage to zero to avoid any misdetection on the MULT pin.
MP4030A Rev.1.01
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9/27/2013
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16
MP4030A—PRIMARY-SIDE-CONTROL, OFFLINE, LED CONTROLLER WITH PFC
RIPPLE SUPPRESSOR
(Innovative Proprietary)
For dimming LED lighting application, a single
stage PFC converter needs large output
capacitor to reduce the ripple whose frequency is
double of the Grid. And in deep dimming situation,
the LED would shimmer caused by the dimming
on duty which is not all the same in every line
cycle. What’s more, the Grid has noise or inrush
which would bring out shimmer even flicker.
Figure 14 shows a ripple suppressor, which can
shrink the LED current ripple obviously.
DO
NS
RO
DM
+ R
CO
C
DZ
+
About the RC filter, it can be selected
by τRC ≥ 50 / fLineCycle . Diode D can select 1N4148,
and the Zener voltage of DZ is as small as
possible when guarantee VD + VDZ > 0.5 ⋅ VCO _PP .
Optional Protection Circuit
In large output voltage or large LEDs current
application, MOSFET M may be destroyed by
over-voltage or over-current when LED+ shorted
to LED- at working.
Gate-Source (GS) Over-voltage Protection:
DO
NS
D
RO +
R
M
DG
DZ RG
CO
C
+
Figure 15: Gate-Source OVP Circuit
Figure14: Ripple Suppressor
Principle:
Shown in Figure 14, Resister R, capacitor C, and
MOSFET M compose the ripple suppressor.
Through the RC filter, C gets the mean value of
the output voltage VCo to drive the MOSFET M. M
works in variable resistance area. C’s voltage VC
is steady makes the LEDs voltage is steady, so
the LEDs current will be smooth. MOSFET M
holds the ripple voltage vCo of the output.
Diode D and Zener diode DZ are used to restrain
the overshoot at start-up. In the start-up process,
through D and DZ, C is charged up quickly to turn
on M, so the LED current can be built quickly.
When VC rising up to about the steady value, D
and DZ turn off, and C combines R as the filter to
get the mean voltage drop of VCo.
The most important parameter of MOSFET M is
the threshold voltage Vth which decides the
power loss of the ripple suppressor. Lower Vth is
better if the MOSFET can work in variable
resistance area. The BV of the MOSFET can be
selected as double as VCo and the Continues
Drain current level can be selected as decuple as
the LEDs’ current at least.
Figure 15 shows GS over-voltage protection
circuit. Zener diode DG and resistor RG are used
to protect MOSFET M from GS over-voltage
damaged. When LED+ shorted to LED- at normal
operation, the voltage drop on capacitor C is high,
and the voltage drop on Gate-Source is the same
as capacitor C. The Zener diode DG limits the
voltage VGS and RG limits the charging current to
protect DG. RG also can limit the current of DZ at
the moment when LED+ shorted to LED-. VDG
should bigger than Vth.
Drain-Source Over-voltage and Over-current
Protection
As Figure 16 shows, NPN transistor T, resistor
RC and RE are set up to protect MOSFET M from
over-current damaged when output short occurs
at normal operation. When LED+ shorted to LED-,
the voltage vDS of MOSFET is equal to the vCo
which has a high surge caused by the parasitic
parameter. Zener Dioder DDS protects MOSFET
from over-voltage damaged. Transistor T is used
to pull down the VGS of M. When M turns off, the
load is opened, MP4030A detects there is an
OVP happened, so the IC functions in quiescent.
MP4030A Rev.1.01
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9/27/2013
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17
MP4030A—PRIMARY-SIDE-CONTROL, OFFLINE, LED CONTROLLER WITH PFC
The pull down point is set by RC and RE:
MOSFET LIST
In the Table 1, there are some recommended
MOSFET for ripple suppressor.
VC
RE
⋅ O = 0.7 V
RC + RE 2
RC DDS RE
T
DO
NS
RO
D M
+ R
CO
C
DZ
RG
+
Figure 16: Drain-Source OVP and OCP Circuit
Manufacture P/N
Si4446DY
FTD100N10A
P6015CDG
Manufacture
Vishay
IPS
NIKO-SEM
Table 1: MOSFET LIST
VDS/ID
Vth(VDS=VGS@TJ=25°C)
40V/3A
0.6-1.6V@ Id=250μA
100V/17A
1.0-2.0V@ Id=250μA
150V/20A
0.45-1.20V@ Id=250μA
MP4030A Rev.1.01
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9/27/2013
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Power Stage
<10W
5-15W
10-20W
18
MP4030A—PRIMARY-SIDE-CONTROL, OFFLINE, LED CONTROLLER WITH PFC
TYPICAL APPLICATION CIRCUIT
Figure 17: 108-132VAC Input, TRIAC dimmable, Isolated Flyback Converter, Drive 7 LEDs in Series,
350mA LED Current for LED Lighting, EVB Model: EV4030A-S-00A
R1 5.1k
L1
1mH/0.42A
DB1
DF06S
600V/1.5A
D1
1N4148WS
1
C11 GND
R5 10 470pF/1kV/1206
C3
220nF/400V
CX1
22nF/275V
Q3
MMBT3906LT1
D4
BZT52C15
R6
470k/1W
L3
2.2mH/0.3A
L2
2.2mH/0.3A
T1
145Ts
7
D2
MBRS3200T3G
200V/3A
LED+
3
GND
GND
R14
5.1k/1206
1
R22
200/1206
Q2
CEF04N7G
700V/4A
R12
330/2W
R2
499k/1206
D3
WSGC10MH
1kV/1A
Q1
SSNIN45BTA
450V/0.5A
C4
33nF/50V
R7
510/2W
C2
22nF/630V
C1
110nF/630
R4
510/2W
29Ts
6
11
19Ts
R11
51/1206
R9
30k/1206
LED-
4
CY1
1
D6
BZT52C16 D5
1N4148WS
2.2nF/250V
GND
D7
BAV21W 200V/0.2A
R13
5.1k/1206
RV1
U1
TVR10431
1
C9
2.2nF/50V
F1
250V/2A
N
185-265VAC
1
L
2
3
MULT
COMP
ZCD
8
GND 7
6
VCC
D
DP
S5
GND
GND
GND
4
D10
BZT52C27
MP4030A
GND
R19
357/1206
GND
Figure 18: 198-265VAC Input, TRIAC dimmable, Isolated Flyback Converter, Drive 10 LEDs in Series,
530mA LED Current for LED Lighting, EVB Model: EV4030A-S-00B
MP4030A Rev.1.01
www.MonolithicPower.com
9/27/2013
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19
MP4030A—PRIMARY-SIDE-CONTROL, OFFLINE, LED CONTROLLER WITH PFC
PACKAGE INFORMATION
SOIC8
0.189(4.80)
0.197(5.00)
8
0.050(1.27)
0.024(0.61)
5
0.063(1.60)
0.150(3.80)
0.157(4.00)
PIN 1 ID
1
0.228(5.80)
0.244(6.20)
0.213(5.40)
4
TOP VIEW
RECOMMENDED LAND PATTERN
0.053(1.35)
0.069(1.75)
SEATING PLANE
0.004(0.10)
0.010(0.25)
0.013(0.33)
0.020(0.51)
0.0075(0.19)
0.0098(0.25)
SEE DETAIL "A"
0.050(1.27)
BSC
SIDE VIEW
FRONT VIEW
0.010(0.25)
x 45o
0.020(0.50)
GAUGE PLANE
0.010(0.25) BSC
0o-8o
0.016(0.41)
0.050(1.27)
DETAIL "A"
NOTE:
1) CONTROL DIMENSION IS IN INCHES. DIMENSION IN
BRACKET IS IN MILLIMETERS.
2) PACKAGE LENGTH DOES NOT INCLUDE MOLD FLASH,
PROTRUSIONS OR GATE BURRS.
3) PACKAGE WIDTH DOES NOT INCLUDE INTERLEAD FLASH
OR PROTRUSIONS.
4) LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING)
SHALL BE 0.004" INCHES MAX.
5) DRAWING CONFORMS TO JEDEC MS-012, VARIATION AA.
6) DRAWING IS NOT TO SCALE.
NOTICE: The information in this document is subject to change without notice. Users should warrant and guarantee that third
party Intellectual Property rights are not infringed upon when integrating MPS products into any application. MPS will not
assume any legal responsibility for any said applications.
MP4030A Rev. 1.01
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9/27/2013
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20