ON MC74VHC1GT32DFT1 2-input or gate/cmos logic level shifter Datasheet

MC74VHC1GT32
2-Input OR Gate/CMOS
Logic Level Shifter
The MC74VHC1GT32 is an advanced high speed CMOS 2–input OR
gate fabricated with silicon gate CMOS technology. It achieves high speed
operation similar to equivalent Bipolar Schottky TTL while maintaining
CMOS low power dissipation.
The internal circuit is composed of three stages, including a buffer
output which provides high noise immunity and stable output.
The device input is compatible with TTL–type input thresholds and the
output has a full 5 V CMOS level output swing. The input protection
circuitry on this device allows overvoltage tolerance on the input,
allowing the device to be used as a logic–level translator from 3.0 V
CMOS logic to 5.0 V CMOS Logic or from 1.8 V CMOS logic to 3.0 V
CMOS Logic while operating at the high–voltage power supply.
The MC74VHC1GT32 input structure provides protection when
voltages up to 7 V are applied, regardless of the supply voltage. This
allows the MC74VHC1GT32 to be used to interface 5 V circuits to 3 V
circuits. The output structures also provide protection when VCC = 0 V.
These input and output structures help prevent device destruction caused
by supply voltage – input/output voltage mismatch, battery backup, hot
insertion, etc.
•
•
•
•
•
•
•
•
High Speed: tPD = 3.5 ns (Typ) at VCC = 5 V
Low Power Dissipation: ICC = 2 µA (Max) at TA = 25°C
TTL–Compatible Inputs: VIL = 0.8 V; VIH = 2.0 V
CMOS–Compatible Outputs: VOH > 0.8 VCC; VOL < 0.1 VCC @Load
Power Down Protection Provided on Inputs and Outputs
Balanced Propagation Delays
Pin and Function Compatible with Other Standard Logic Families
Chip Complexity: FETs = 65; Equivalent Gates = 15
IN B
5
1
IN A
2
GND
3
4
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MARKING
DIAGRAMS
SC–88A / SOT–353/SC–70
DF SUFFIX
CASE 419A
VNd
Pin 1
d = Date Code
TSOP–5/SOT–23/SC–59
DT SUFFIX
CASE 483
VNd
Pin 1
d = Date Code
PIN ASSIGNMENT
1
IN B
2
IN A
3
GND
4
OUT Y
5
VCC
FUNCTION TABLE
VCC
Inputs
OUT Y
Output
A
B
Y
L
L
H
H
L
H
L
H
L
H
H
H
Figure 1. Pinout (Top View)
ORDERING INFORMATION
≥1
IN A
IN B
See detailed ordering and shipping information in the package
dimensions section on page 4 of this data sheet.
OUT Y
Figure 2. Logic Symbol
 Semiconductor Components Industries, LLC, 2001
November, 2001 – Rev. 4
1
Publication Order Number:
MC74VHC1GT32/D
MC74VHC1GT32
MAXIMUM RATINGS (Note 1)
Symbol
Value
Unit
VCC
DC Supply Voltage
Characteristics
–0.5 to +7.0
V
VIN
DC Input Voltage
–0.5 to +7.0
V
VOUT
DC Output Voltage
–0.5 to 7.0
–0.5 to VCC + 0.5
V
IIK
Input Diode Current
IOK
Output Diode Current
IOUT
VCC = 0
High or Low State
–20
mA
+20
mA
DC Output Current, per Pin
+25
mA
ICC
DC Supply Current, VCC and GND
+50
mA
PD
Power dissipation in still air
SC–88A, TSOP–5
200
mW
JA
Thermal resistance
SC–88A, TSOP–5
333
C/W
TL
Lead temperature, 1 mm from case for 10 s
260
°C
TJ
Junction temperature under bias
+150
°C
Tstg
Storage temperature
–65 to +150
°C
VESD
ESD Withstand Voltage
> 2000
> 200
N/A
V
VOUT < GND; VOUT > VCC
Human Body Model (Note 2)
Machine Model (Note 3)
Charged Device Model (Note 4)
ILatch–Up Latch–Up Performance
Above VCC and Below GND at 125°C (Note 5)
±500
mA
1. Maximum Ratings are those values beyond which damage to the device may occur. Exposure to these conditions or conditions beyond those
indicated may adversely affect device reliability. Functional operation under absolute–maximum–rated conditions is not implied. Functional
operation should be restricted to the Recommended Operating Conditions.
2. Tested to EIA/JESD22–A114–A
3. Tested to EIA/JESD22–A115–A
4. Tested to JESD22–C101–A
5. Tested to EIA/JESD78
RECOMMENDED OPERATING CONDITIONS
Symbol
Characteristics
Min
Max
Unit
VCC
DC Supply Voltage
3.0
5.5
V
VIN
DC Input Voltage
0.0
5.5
V
VOUT
DC Output Voltage
0.0
0.0
5.5
VCC
V
TA
Operating Temperature Range
–55
+125
°C
tr , tf
Input Rise and Fall Time
0
0
100
20
ns/V
VCC = 0
High or Low State
VCC = 3.3 V ± 0.3 V
VCC = 5.0 V ± 0.5 V
47.9
100
178,700
20.4
110
79,600
9.4
120
37,000
4.2
130
17,800
2.0
140
8,900
1.0
TJ = 80 ° C
117.8
419,300
TJ = 90 ° C
1,032,200
90
TJ = 100 ° C
80
FAILURE RATE OF PLASTIC = CERAMIC
UNTIL INTERMETALLICS OCCUR
TJ = 110° C
Time, Years
TJ = 120° C
Time, Hours
TJ = 130 ° C
Junction
Temperature °C
NORMALIZED FAILURE RATE
DEVICE JUNCTION TEMPERATURE VERSUS
TIME TO 0.1% BOND FAILURES
1
1
10
100
TIME, YEARS
Figure 3. Failure Rate vs. Time Junction
Temperature
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2
1000
MC74VHC1GT32
DC ELECTRICAL CHARACTERISTICS
VCC
Symbol
Parameter
Test Conditions
(V)
Min
1.4
2.0
2.0
VIH
Minimum High–Level
Input Voltage
3.0
4.5
5.5
VIL
Maximum Low–Level
Input Voltage
3.0
4.5
5.5
VOH
Minimum High–Level
Output Voltage
g
VIN = VIH or VIL
VOL
Maximum Low–Level
Output Voltage
g
VIN = VIH or VIL
TA ≤ 85°C
TA = 25°C
Typ
Max
Min
1.4
2.0
2.0
0.53
0.8
0.8
VIN = VIH or VIL
IOH = –50 µA
3.0
4.5
2.9
4.4
VIN = VIH or VIL
IOH = –4 mA
IOH = –8 mA
3.0
4.5
2.58
3.94
VIN = VIH or VIL
IOL = 50 µA
3.0
4.5
VIN = VIH or VIL
IOL = 4 mA
IOL = 8 mA
Max
3.0
4.5
–55 ≤ TA ≤ 125°C
Min
Max
1.4
2.0
2.0
0.53
0.8
0.8
V
0.53
0.8
0.8
2.9
4.4
2.9
4.4
2.48
3.80
2.34
3.66
Unit
V
V
V
0.0
0.0
0.1
0.1
0.1
0.1
0.1
0.1
3.0
4.5
0.36
0.36
0.44
0.44
0.52
0.52
V
V
IIN
Maximum Input
Leakage Current
VIN = 5.5 V or GND
0 to
5.5
±0.1
±1.0
±1.0
µA
ICC
Maximum Quiescent
Supply Current
VIN = VCC or GND
5.5
2.0
20
40
µA
ICCT
Quiescent Supply
Current
Input: VIN = 3.4 V
5.5
1.35
1.50
1.65
mA
IOPD
Output Leakage
Current
VOUT = 5.5 V
0.0
0.5
5.0
10
µA
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AC ELECTRICAL CHARACTERISTICS (Cload = 50 pF, Input tr = tf = 3.0ns)
TA ≤ 85°C
TA = 25°C
Symbol
tPLH,
tPHL
CIN
Parameter
Maximum
Propogation
Delay,
g
y
I
Input
t A or B to
t Y
Min
Test Conditions
Typ
Max
Min
Max
–55 ≤ TA ≤ 125°C
Min
Max
Unit
ns
VCC = 3.3 ± 0.3 V
CL = 15 pF
CL = 50 pF
4.8
6.1
7.9
11.4
9.5
13.0
11.5
15.5
VCC = 5.0 ± 0.5 V
CL = 15 pF
CL = 50 pF
3.7
4.4
5.5
7.5
6.5
8.5
8.0
10.0
5.5
10
10
10
Maximum Input
Capacitance
pF
Typical @ 25°C, VCC = 5.0 V
11
CPD
Power Dissipation Capacitance (Note 6)
pF
6. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load.
Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no–load dynamic
power consumption; PD = CPD VCC2 fin + ICC VCC.
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3
MC74VHC1GT32
TEST POINT
Input A or B
50%
OUTPUT
50% VCC
DEVICE
UNDER
TEST
GND
tPLH
tPHL
CL*
VOH
Output Y
50% VCC
VOL
*Includes all probe and jig capacitance
Figure 4. Switching Waveforms
Figure 5. Test Circuit
DEVICE ORDERING INFORMATION
Device Nomenclature
Device Order Number
MC74VHC1GT32DFT1
MC74VHC1GT32DFT2
MC74VHC1GT32DTT1
Circuit
Indicator
MC
MC
MC
Temp
Range
Identifier
74
74
74
Device
Function
Technology
VHC1G
T32
VHC1G
T32
VHC1G
T32
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4
Package
Suffix
DF
DF
DT
Tape &
Reel
Suffix
Package
Type
Tape and Reel
Size
T1
SC–88A /
SOT–353
/ SC–70
178 mm (7”)
3000 Unit
T2
SC–88A /
SOT–353
/ SC–70
178 mm (7”)
3000 Unit
T1
TSOPS /
SOT–23
/ SC–59
178 mm (7”)
3000 Unit
MC74VHC1GT32
CAVITY
TAPE
TAPE TRAILER
(Connected to Reel Hub)
NO COMPONENTS
160 mm MIN
TOP TAPE
COMPONENTS
TAPE LEADER
NO COMPONENTS
400 mm MIN
DIRECTION OF FEED
Figure 6. Tape Ends for Finished Goods
TAPE DIMENSIONS mm
4.00
1.50 TYP
4.00
2.00
1.75
3.50 0.50
8.00 0.30
1
1.00 MIN
DIRECTION OF FEED
Figure 7. SC–70–5/SC–88A/SOT–353 DFT1 Reel Configuration/Orientation
TAPE DIMENSIONS mm
4.00
1.50 TYP
4.00
2.00
1.75
3.50 0.50
8.00 0.30
1
1.00 MIN
DIRECTION OF FEED
Figure 8. SC–70/SC–88A/SOT–353 DFT2 and SOT23–5/TSOP–5/SC59–5 DTT1 Reel Configuration/Orientation
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5
MC74VHC1GT32
t MAX
1.5 mm MIN
(0.06 in)
A
13.0 mm 0.2 mm
(0.512 in 0.008 in)
50 mm MIN
(1.969 in)
20.2 mm MIN
(0.795 in)
FULL RADIUS
G
Figure 9. Reel Dimensions
REEL DIMENSIONS
Tape Size
T and R Suffix
A Max
G
t Max
8 mm
T1, T2
178 mm
(7 in)
8.4 mm, + 1.5 mm, –0.0
(0.33 in + 0.059 in, –0.00)
14.4 mm
(0.56 in)
DIRECTION OF FEED
BARCODE LABEL
POCKET
Figure 10. Reel Winding Direction
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6
HOLE
MC74VHC1GT32
PACKAGE DIMENSIONS
SC–88A/SOT–353/SC–70
DF SUFFIX
5–LEAD PACKAGE
CASE 419A–01
ISSUE E
A
G
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
V
5
DIM
A
B
C
D
G
H
J
K
N
S
V
4
–B–
S
1
2
3
D 5 PL
0.2 (0.008)
M
B
M
N
INCHES
MIN
MAX
0.071
0.087
0.045
0.053
0.031
0.043
0.004
0.012
0.026 BSC
--0.004
0.004
0.010
0.004
0.012
0.008 REF
0.079
0.087
0.012
0.016
J
C
0.4 mm (min)
0.5 mm (min)
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
1.9 mm
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
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7
0.65 mm 0.65 mm
K
H
MILLIMETERS
MIN
MAX
1.80
2.20
1.15
1.35
0.80
1.10
0.10
0.30
0.65 BSC
--0.10
0.10
0.25
0.10
0.30
0.20 REF
2.00
2.20
0.30
0.40
MC74VHC1GT32
PACKAGE DIMENSIONS
TSOP–5/SOT–23/SC–59
DT SUFFIX
5–LEAD PACKAGE
CASE 483–01
ISSUE A
D
S
5
4
1
2
3
B
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD
FINISH THICKNESS. MINIMUM LEAD THICKNESS
IS THE MINIMUM THICKNESS OF BASE
MATERIAL.
L
DIM
A
B
C
D
G
H
J
K
L
M
S
G
A
J
C
0.05 (0.002)
H
M
K
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
ÉÉÉÉ
0.094
2.4
0.037
0.95
0.074
1.9
0.037
0.95
MILLIMETERS
MIN
MAX
2.90
3.10
1.30
1.70
0.90
1.10
0.25
0.50
0.85
1.00
0.013
0.100
0.10
0.26
0.20
0.60
1.25
1.55
0
10 2.50
3.00
INCHES
MIN
MAX
0.1142 0.1220
0.0512 0.0669
0.0354 0.0433
0.0098 0.0197
0.0335 0.0413
0.0005 0.0040
0.0040 0.0102
0.0079 0.0236
0.0493 0.0610
0
10 0.0985 0.1181
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
ÉÉÉ
0.039
1.0
0.028
0.7
inches
mm
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8
MC74VHC1GT32/D
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