ON NCP160AFCS180T2G 250 ma, ultra-low noise and high psrr ldo regulator for rf and analog circuit Datasheet

NCP160
250 mA, Ultra-Low Noise
and High PSRR LDO
Regulator for RF and
Analog Circuits
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The NCP160 is a linear regulator capable of supplying 250 mA
output current. Designed to meet the requirements of RF and analog
circuits, the NCP160 device provides low noise, high PSRR, low
quiescent current, and very good load/line transients. The device is
designed to work with a 1 mF input and a 1 mF output ceramic
capacitor. It is available in two thickness ultra−small 0.35P, 0.65 mm x
0.65 mm Chip Scale Package (CSP) and XDFN−4 0.65P, 1 mm x
1 mm.
MARKING
DIAGRAMS
A1
X
A1
X
WLCSP4
CASE 567KA
Features
•
•
•
•
•
•
•
•
•
•
•
Operating Input Voltage Range: 1.9 V to 5.5 V
Available in Fixed Voltage Option: 1.8 V to 5.14 V
±2% Accuracy Over Load/Temperature
Ultra Low Quiescent Current Typ. 18 mA
Standby Current: Typ. 0.1 mA
Very Low Dropout: 80 mV at 250 mA
Ultra High PSRR: Typ. 98 dB at 20 mA, f = 1 kHz
Ultra Low Noise: 10 mVRMS
Stable with a 1 mF Small Case Size Ceramic Capacitors
Available in −WLCSP4 0.65 mm x 0.65 mm x 0.4 mm CASE 567KA
−WLCSP4 0.65 mm x 0.65 mm x 0.33 mm CASE 567JZ
−XDFN4 1 mm x 1 mm x 0.4 mm
These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS
Compliant
WLCSP4
CASE 567JZ
1
XDFN4
CASE 711AJ
XX M
1
X or XX = Specific Device Code
M
= Date Code
PIN CONNECTIONS
IN
OUT
A1
A2
B1
B2
EN
GND
Typical Applications
•
•
•
•
Battery−powered Equipment
Wireless LAN Devices
Smartphones, Tablets
Cameras, DVRs, STB and Camcorders
(Top View)
VOUT
VIN
IN
OUT
NCP160
CIN
1 mF
Ceramic
EN
COUT
1 mF
Ceramic
ON
OFF
GND
(Top View)
ORDERING INFORMATION
See detailed ordering and shipping information on page 16 of
this data sheet.
Figure 1. Typical Application Schematics
© Semiconductor Components Industries, LLC, 2015
May, 2015 − Rev. 6
1
Publication Order Number:
NCP160/D
NCP160
IN
EN
ENABLE
THERMAL
LOGIC
SHUTDOWN
BANDGAP
MOSFET
REFERENCE
INTEGRATED
DRIVER WITH
SOFT−START
CURRENT LIMIT
OUT
* ACTIVE DISCHARGE
Version A only
EN
GND
Figure 2. Simplified Schematic Block Diagram
PIN FUNCTION DESCRIPTION
Pin No.
CSP4
Pin No.
XDFN4
Pin
Name
A1
4
IN
A2
1
OUT
B1
3
EN
B2
2
GND
Common ground connection
−
EPAD
EPAD
Expose pad can be tied to ground plane for better power dissipation
Description
Input voltage supply pin
Regulated output voltage. The output should be bypassed with small 1 mF ceramic capacitor.
Chip enable: Applying VEN < 0.4 V disables the regulator, Pulling VEN > 1.2 V enables the LDO.
ABSOLUTE MAXIMUM RATINGS
Rating
Symbol
Value
Unit
VIN
−0.3 V to 6
V
Output Voltage
VOUT
−0.3 to VIN + 0.3, max. 6 V
V
Chip Enable Input
VCE
−0.3 to VIN + 0.3, max. 6 V
V
Output Short Circuit Duration
tSC
unlimited
s
Maximum Junction Temperature
TJ
150
°C
TSTG
−55 to 150
°C
ESD Capability, Human Body Model (Note 2)
ESDHBM
2000
V
ESD Capability, Machine Model (Note 2)
ESDMM
200
V
Input Voltage (Note 1)
Storage Temperature
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. Refer to ELECTRICAL CHARACTERISTIS and APPLICATION INFORMATION for Safe Operating Area.
2. This device series incorporates ESD protection and is tested by the following methods:
ESD Human Body Model tested per EIA/JESD22−A114
ESD Machine Model tested per EIA/JESD22−A115
Latchup Current Maximum Rating tested per JEDEC standard: JESD78.
THERMAL CHARACTERISTICS
Rating
Symbol
Thermal Characteristics, CSP4 (Note 3)
Thermal Resistance, Junction−to−Air
Value
Unit
108
°C/W
RqJA
Thermal Characteristics, XDFN4 (Note 3)
Thermal Resistance, Junction−to−Air
198.1
3. Measured according to JEDEC board specification. Detailed description of the board can be found in JESD51−7
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2
NCP160
ELECTRICAL CHARACTERISTICS −40°C ≤ TJ ≤ 125°C; VIN = VOUT(NOM) + 1 V; IOUT = 1 mA, CIN = COUT = 1 mF, unless otherwise
noted. VEN = 1.2 V. Typical values are at TJ = +25°C (Note 4).
Parameter
Test Conditions
Symbol
Min
VIN
VIN = VOUT(NOM) + 1 V
0 mA ≤ IOUT ≤ 250 mA
VOUT
Line Regulation
VOUT(NOM) + 1 V ≤ VIN ≤ 5.5 V
LineReg
0.02
%/V
Load Regulation
IOUT = 1 mA to 250 mA
LoadReg
0.001
%/mA
Operating Input Voltage
Output Voltage Accuracy
Dropout Voltage (Note 5)
Max
Unit
1.9
5.5
V
−2
+2
%
VOUT(NOM) = 1.8 V
180
250
VOUT(NOM) = 2.5 V
110
175
VOUT(NOM) = 2.8 V
95
160
VOUT(NOM) = 2.85 V
95
160
90
155
80
145
VOUT(NOM) = 3.5 V
75
140
VOUT(NOM) = 4.5 V
65
120
VOUT(NOM) = 5.0 V
75
105
VOUT(NOM) = 5.14 V
60
105
VOUT(NOM) = 3.0 V
IOUT = 250 mA
Typ
VOUT(NOM) = 3.3 V
VDO
Output Current Limit
VOUT = 90% VOUT(NOM)
ICL
Short Circuit Current
VOUT = 0 V
ISC
690
Quiescent Current
IOUT = 0 mA
IQ
18
23
mA
Shutdown Current
VEN ≤ 0.4 V, VIN = 4.8 V
IDIS
0.01
1
mA
EN Input Voltage “H”
VENH
EN Input Voltage “L”
VENL
VEN = 4.8 V
IEN
EN Pin Threshold Voltage
EN Pull Down Current
Turn−On Time
Power Supply Rejection Ratio
Output Voltage Noise
Thermal Shutdown Threshold
Active Output Discharge Resistance
Line Transient (Note 6)
IOUT = 20 mA
700
mA
1.2
0.4
0.2
COUT = 1 mF, From assertion of VEN to
VOUT = 95% VOUT(NOM)
0.5
V
mA
120
ms
dB
f = 100 Hz
f = 1 kHz
f = 10 kHz
f = 100 kHz
PSRR
91
98
82
48
IOUT = 1 mA
IOUT = 250 mA
VN
14
10
mVRMS
Temperature rising
TSDH
160
°C
Temperature falling
TSDL
140
°C
VEN < 0.4 V, Version A only
RDIS
280
W
f = 10 Hz to 100 kHz
VIN = (VOUT(NOM) + 1 V) to (VOUT(NOM) +
1.6 V) in 30 ms, IOUT = 1 mA
VIN = (VOUT(NOM) + 1.6 V) to (VOUT(NOM) +
1 V) in 30 ms, IOUT = 1 mA
Load Transient (Note 6)
250
mV
IOUT = 1 mA to 200 mA in 10 ms
IOUT = 200 mA to 1mA in 10 ms
−1
TranLINE
mV
+1
−40
TranLOAD
+40
mV
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
4. Performance guaranteed over the indicated operating temperature range by design and/or characterization. Production tested at TA = 25°C.
Low duty cycle pulse techniques are used during the testing to maintain the junction temperature as close to ambient as possible.
5. Dropout voltage is characterized when VOUT falls 100 mV below VOUT(NOM).
6. Guaranteed by design.
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3
NCP160
TYPICAL CHARACTERISTICS
2.520
1.820
1.815
VOUT, OUTPUT VOLTAGE (V)
VOUT, OUTPUT VOLTAGE (V)
IOUT = 10 mA
1.810
1.805
IOUT = 250 mA
1.800
1.795
VIN = 2.8 V
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
1.790
1.785
0
20
40
60
80
100
120
2.505
IOUT = 250 mA
2.500
2.495
VIN = 3.5 V
VOUT = 2.5 V
CIN = 1 mF
COUT = 1 mF
2.490
2.485
2.480
−40 −20
140
0
20
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 3. Output Voltage vs. Temperature −
VOUT = 1.8 V − XDFN Package
Figure 4. Output Voltage vs. Temperature −
VOUT = 2.5 V − XDFN Package
3.33
3.35
3.32
3.34
3.31
IOUT = 10 mA
3.30
3.29
IOUT = 250 mA
3.28
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
3.27
3.26
3.25
−40 −20
0
20
40
60
80
100
120
3.33
IOUT = 10 mA and 250 mA
3.32
3.31
3.30
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
3.29
3.28
3.27
−40 −20
140
0
20
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 5. Output Voltage vs. Temperature −
VOUT = 3.3 V − XDFN Package
Figure 6. Output Voltage vs. Temperature −
VOUT = 3.3 V − CSP Package
0.010
REGLINE, LINE REGULATION (%/V)
5.19
VOUT, OUTPUT VOLTAGE (V)
IOUT = 10 mA
2.510
VOUT, OUTPUT VOLTAGE (V)
VOUT, OUTPUT VOLTAGE (V)
1.780
−40 −20
2.515
5.18
5.17
IOUT = 10 mA
5.16
5.15
IOUT = 250 mA
5.14
VIN = 5.5 V
VOUT = 5.14 V
CIN = 1 mF
COUT = 1 mF
5.13
5.12
5.11
−40 −20
0
20
40
60
80
100
120
140
0.009
0.008
0.007
0.006
0.005
0.004
VIN = 2.8 V
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
0.003
0.002
0.001
0
−40 −20
0
20
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 7. Output Voltage vs. Temperature −
VOUT = 5.14 V − XDFN Package
Figure 8. Line Regulation vs. Temperature −
VOUT = 1.8 V
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NCP160
TYPICAL CHARACTERISTICS
REGLINE, LINE REGULATION (%/V)
0.020
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
0.009
0.008
0.007
0.006
0.005
0.004
0.003
0.002
0.001
0
−40 −20
0
20
40
60
80
100
120
140
0.016
0.014
0.012
0.010
0.008
0.006
0.004
0.002
0
−40 −20
60
80
100
120 140
0.0014
0.0012
0.0010
0.0008
VIN = 2.8 V
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
0.0006
0.0004
0.0002
0
−40 −20
0
20
40
60
80
100
120
0.0020
0.0018
0.0016
0.0014
0.0012
0.0010
0.0008
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
0.0006
0.0004
0.0002
0
140
−40 −20
0
20
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 11. Load Regulation vs. Temperature −
VOUT = 1.8 V
Figure 12. Load Regulation vs. Temperature −
VOUT = 3.3 V
0.0020
1.50
VIN = 5.5 V
VOUT = 5.14 V
CIN = 1 mF
COUT = 1 mF
IGND, GROUND CURRENT (mA)
REGLOAD, LOAD REGULATION (%/mA)
40
Figure 10. Line Regulation vs. Temperature −
VOUT = 5.14 V
0.0016
0.0014
20
Figure 9. Line Regulation vs. Temperature −
VOUT = 3.3 V
0.0018
0.0018
0
TJ, JUNCTION TEMPERATURE (°C)
0.0020
0.0016
VIN = 5.5 V
VOUT = 5.14 V
CIN = 1 mF
COUT = 1 mF
0.018
TJ, JUNCTION TEMPERATURE (°C)
REGLOAD, LOAD REGULATION (%/mA)
REGLOAD, LOAD REGULATION (%/mA)
REGLINE, LINE REGULATION (%/V)
0.010
0.0012
0.0010
0.0008
0.0006
0.0004
0.0002
0
−40 −20
0
20
40
60
80
100
120
140
1.35
1.20
TJ = 125°C
1.05
TJ = 25°C
0.90
0.75
0.60
TJ = −40°C
0.45
VIN = 2.8 V
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
0.30
0.15
0
0
25
50
75
100 125 150 175 200 225 250
TJ, JUNCTION TEMPERATURE (°C)
IOUT, OUTPUT CURRENT (mA)
Figure 13. Load Regulation vs. Temperature −
VOUT = 5.14 V
Figure 14. Ground Current vs. Load Current −
VOUT = 1.8 V
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NCP160
1.50
1.50
1.35
1.35
IGND, GROUND CURRENT (mA)
IGND, GROUND CURRENT (mA)
TYPICAL CHARACTERISTICS
1.20
TJ = 125°C
1.05
TJ = 25°C
0.90
0.75
0.60
TJ = −40°C
0.45
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
0.30
0.15
0
0
25
50
75
100 125 150 175 200
TJ = 25°C
0.90
0.75
0.60
TJ = −40°C
0.45
VIN = 5.5 V
VOUT = 5.14 V
CIN = 1 mF
COUT = 1 mF
0.30
0.15
0
0
25
50
75
100 125 150 175 200 225 250
IOUT, OUTPUT CURRENT (mA)
IOUT, OUTPUT CURRENT (mA)
Figure 15. Ground Current vs. Load Current −
VOUT = 3.3 V
Figure 16. Ground Current vs. Load Current −
VOUT = 5.14 V
150
VDROP, DROPOUT VOLTAGE (mV)
VDROP, DROPOUT VOLTAGE (mV)
1.05
225 250
250
225
200
TJ = 125°C
175
TJ = 25°C
150
125
100
TJ = −40°C
75
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
50
25
0
0
25
50
75
100 125 150 175 200
135
120
105
90
TJ = 125°C
75
60
TJ = 25°C
45
TJ = −40°C
30
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
15
0
0
225 250
25
50
75
100 125 150 175 200 225 250
IOUT, OUTPUT CURRENT (mA)
IOUT, OUTPUT CURRENT (mA)
Figure 17. Dropout Voltage vs. Load Current −
VOUT = 1.8 V
Figure 18. Dropout Voltage vs. Load Current −
VOUT = 3.3 V
250
VDROP, DROPOUT VOLTAGE (mV)
150
VDROP, DROPOUT VOLTAGE (mV)
TJ = 125°C
1.20
135
120
105
90
75
TJ = 125°C
60
TJ = 25°C
45
TJ = −40°C
30
VOUT = 5.14 V
CIN = 1 mF
COUT = 1 mF
15
0
0
25
50
75
100 125 150 175 200
225 250
225
200
175
IOUT = 250 mA
150
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
125
100
75
IOUT = 0 mA
50
25
0
−40 −20
0
20
40
60
80
100
120 140
IOUT, OUTPUT CURRENT (mA)
TJ, JUNCTION TEMPERATURE (°C)
Figure 19. Dropout Voltage vs. Load Current −
VOUT = 5.14 V
Figure 20. Dropout Voltage vs. Temperature−
VOUT = 1.8 V
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NCP160
TYPICAL CHARACTERISTICS
VDROP, DROPOUT VOLTAGE (mV)
150
180
160
XDFN
140
120
CSP4
Package
100
80
60
40
20
135
120
105
90
XDFN
75
60
CSP4
Package
45
30
15
0
0
0
25
50
75
100 125 150 175 200
225 250
0
25
50
75
100 125 150 175 200
225 250
IOUT, OUTPUT CURRENT (mA)
IOUT, OUTPUT CURRENT (mA)
Figure 21. Comparison Dropout for XDFN and
CSP – 1.8 V
Figure 22. Comparison Dropout for XDFN and
CSP – 3.3 V
100
VDROP, DROPOUT VOLTAGE (mV)
VDROP, DROPOUT VOLTAGE (mV)
200
80
XDFN
60
CSP4
Package
40
20
0
0
25
50
75
100 125 150 175 200
225 250
IOUT, OUTPUT CURRENT (mA)
Figure 23. Comparison Dropout for XDFN and
CSP – 5.14 V
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NCP160
TYPICAL CHARACTERISTICS
100
VDROP, DROPOUT VOLTAGE (mV)
VDROP, DROPOUT VOLTAGE (mV)
150
135
120
IOUT = 250 mA
105
90
75
60
IOUT = 0 mA
45
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
30
15
0
−40 −20
0
20
40
60
80
100
120
140
70
60
IOUT = 0 mA
50
40
30
VOUT = 5.14 V
CIN = 1 mF
COUT = 1 mF
20
10
0
−40 −20
0
20
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (°C)
Figure 24. Dropout Voltage vs. Temperature−
VOUT = 3.3 V
Figure 25. Dropout Voltage vs. Temperature−
VOUT = 5.14 V
ICL, SHORT CIRCUIT CURRENT (mA)
740
730
720
710
700
690
680
VIN = 4.3 V
VOUT = 90% VOUT(nom)
CIN = 1 mF
COUT = 1 mF
670
660
650
−40 −20
0
20
40
60
80
100
120
140
700
690
680
670
660
650
640
VIN = 4.3 V
VOUT = 0 V (Short)
CIN = 1 mF
COUT = 1 mF
630
620
610
600
−40 −20
0
20
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 26. Current Limit vs. Temperature
Figure 27. Short Circuit Current vs.
Temperature
1.0
0.50
0.9
IEN, ENABLE PIN CURRENT (mA)
ICL, CURRENT LIMIT (mA)
IOUT = 250 mA
80
TJ, JUNCTION TEMPERATURE (°C)
750
VEN, ENABLE VOLTAGE THRESHOLD (V)
90
0.8
OFF −> ON
0.7
0.6
ON −> OFF
0.5
0.4
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
0.3
0.2
0.1
0
−40 −20
0
20
40
60
80
100
120
140
0.45
0.40
0.35
0.30
0.25
0.20
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
0.15
0.10
0.05
0
−40 −20
0
20
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 28. Enable Threshold Voltage vs.
Temperature
Figure 29. Enable Current Temperature
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NCP160
TYPICAL CHARACTERISTICS
300
90
80
70
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
RDIS, DISCHARGE RESISTIVITY
IDIS, DISABLE CURRENT (nA)
100
60
50
40
30
20
10
0
−40 −20
0
20
40
60
80
100
120 140
290
280
270
260
250
240
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
230
220
210
200
−40 −20
0
20
40
60
80
100
120 140
TJ, JUNCTION TEMPERATURE (°C)
TJ, JUNCTION TEMPERATURE (°C)
Figure 30. Disable Current vs. Temperature
Figure 31. Discharge Resistivity vs.
Temperature
OUTPUT VOLTAGE NOISE (nV/√Hz)
10,000
IOUT = 250 mA
1000
IOUT = 10 mA
RMS Output Noise (mV)
IOUT = 1 mA
100
10
VIN = 2.8 V
VOUT = 1.8 V
CIN = 1 mF
COUT = 1 mF
IOUT
10 Hz − 100 kHz
100 Hz − 100 kHz
1 mA
14.62
14.10
10 mA
11.12
10.48
250 mA
10.37
9.82
1
0.01
0.1
1
10
100
1000
FREQUENCY (kHz)
Figure 32. Output Voltage Noise Spectral Density − VOUT = 1.8 V
OUTPUT VOLTAGE NOISE (nV/√Hz)
10,000
IOUT = 250 mA
1000
IOUT = 10 mA
RMS Output Noise (mV)
IOUT = 1 mA
100
10
VIN = 4.3 V
VOUT = 3.3 V
CIN = 1 mF
COUT = 1 mF
IOUT
10 Hz − 100 kHz
100 Hz − 100 kHz
1 mA
16.9
15.79
10 mA
12.64
11.13
250 mA
11.96
10.64
1
0.01
0.1
1
10
100
1000
FREQUENCY (kHz)
Figure 33. Output Voltage Noise Spectral Density − VOUT = 3.3 V
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NCP160
TYPICAL CHARACTERISTICS
120
120
IOUT = 10 mA
VIN = 2.5 V
VOUT = 1.8 V
COUT = 1 mF
100
RR, RIPPLE REJECTION (dB)
80
60
IOUT = 20 mA
40
20
IOUT = 100 mA
IOUT = 250 mA
0
0.1
1
10
100
1k
40
IOUT = 100 mA
20
IOUT = 250 mA
0.01
0.1
1
10
100
1k
FREQUENCY (kHz)
Figure 34. Power Supply Rejection Ratio,
VOUT = 1.8 V
Figure 35. Power Supply Rejection Ratio,
VOUT = 3.3 V
10k
100
IOUT = 10 mA
VIN = 5.5 V
VOUT = 5.14 V
COUT = 1 mF
Unstable Operation
70
10
50
ESR (W)
60
IOUT = 20 mA
40
30
1
IOUT = 100 mA
Stable Operation
20
IOUT = 250 mA
0.1
0.01
0.1
1
10
100
1k
10k
0
50
100
150
200
IOUT, OUTPUT CURRENT (mA)
Figure 36. Power Supply Rejection Ratio,
VOUT = 5.14 V
Figure 37. Stability vs. ESR
VEN
1 V/div
IINPUT
VOUT
500 mV/div
FREQUENCY (kHz)
200 mA/div
RR, RIPPLE REJECTION (dB)
IOUT = 20 mA
FREQUENCY (kHz)
80
10
0
500 mV/div
60
10k
100
1 V/div
80
0
0.01
90
VIN = 3.6 V
VOUT = 3.3 V
COUT = 1 mF
100
VIN = 2.8 V, VOUT = 1.8 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
250
VEN
IINPUT
VOUT
VIN = 2.8 V, VOUT = 1.8 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
100 ms/div
100 ms/div
Figure 38. Enable Turn−on Response −
COUT = 1 mF, IOUT = 10 mA
Figure 39. Enable Turn−on Response −
COUT = 1 mF, IOUT = 250 mA
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10
300
200 mA/div
RR, RIPPLE REJECTION (dB)
IOUT = 10 mA
NCP160
TYPICAL CHARACTERISTICS
500 mV/div
10 mV/div
2.3 V
VIN
VOUT
VOUT = 1.8 V, IOUT = 10 mA
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
3.8 V
VIN
VOUT
VOUT = 3.3 V, IOUT = 10 mA
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
20 ms/div
20 ms/div
Figure 40. Line Transient Response −
VOUT = 1.8 V
Figure 41. Line Transient Response −
VOUT = 3.3 V
5.5 V
VIN
VIN
5.3 V
VOUT
1 V/div
VOUT
VOUT = 5.14 V, IOUT = 10 mA
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
VOUT = 2.8 V, CIN = 1 mF (MLCC),
IOUT = 10 mA, COUT = 1 mF (MLCC)
4 ms/div
Figure 43. Turn−on/off − Slow Rising VIN
IOUT
100 mA/div
20 ms/div
Figure 42. Line Transient Response −
VOUT = 5.14 V
tRISE = 1 ms
50 mV/div
50 mV/div
100 mA/div
10 mV/div
200 mV/div
10 mV/div
500 mV/div
4.8 V
3.3 V
VOUT
VIN = 2.8 V, VOUT = 1.8 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
IOUT
tFALL = 1 ms
VOUT
VIN = 2.8 V, VOUT = 1.8 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
4 ms/div
20 ms/div
Figure 44. Load Transient Response −
1 mA to 250 mA − VOUT = 1.8 V
Figure 45. Load Transient Response −
250 mA to 1 mA − VOUT = 1.8 V
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11
NCP160
TYPICAL CHARACTERISTICS
100 mA/div
IOUT
tRISE = 1 ms
50 mV/div
50 mV/div
100 mA/div
IOUT
VOUT
VIN = 4.3 V, VOUT = 3.3 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
tFALL = 1 ms
VOUT
VIN = 4.3 V, VOUT = 3.3 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
4 ms/div
20 ms/div
Figure 46. Load Transient Response −
1 mA to 250 mA − VOUT = 3.3 V
Figure 47. Load Transient Response −
250 mA to 1 mA − VOUT = 3.3 V
VOUT
VIN = 5.5 V, VOUT = 5.14 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
VOUT
VIN = 5.5 V, VOUT = 5.14 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
20 ms/div
Figure 48. Load Transient Response −
1 mA to 250 mA − VOUT = 5.14 V
Figure 49. Load Transient Response −
250 mA to 1 mA − VOUT = 5.14 V
TSD Cycling
500 mV/div
500 mA/div
tFALL = 1 ms
4 ms/div
Short Circuit Event
Overheating
1 V/div
100 mA/div
tRISE = 1 ms
50 mV/div
IOUT
VEN
IOUT
VOUT
VOUT
Thermal Shutdown
VIN = 5.5 V, VOUT = 3.3 V
CIN = 1 mF (MLCC)
COUT = 1 mF (MLCC)
COUT = 4.7 mF
1 V/div
50 mV/div
100 mA/div
IOUT
VIN = 3.8 V
VOUT = 2.8 V
CIN = 1 mF (MLCC)
COUT = 1 mF
10 ms/div
400 ms/div
Figure 50. Short Circuit and Thermal
Shutdown
Figure 51. Enable Turn−off
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12
NCP160
APPLICATIONS INFORMATION
General
transient response or high frequency PSRR. It is not
recommended to use tantalum capacitors on the output due
to their large ESR. The equivalent series resistance of
tantalum capacitors is also strongly dependent on the
temperature, increasing at low temperature.
The NCP160 is an ultra−low noise 250 mA low dropout
regulator designed to meet the requirements of RF
applications and high performance analog circuits. The
NCP160 device provides very high PSRR and excellent
dynamic response. In connection with low quiescent current
this device is well suitable for battery powered application
such as cell phones, tablets and other. The NCP160 is fully
protected in case of current overload, output short circuit and
overheating.
Enable Operation
Input capacitor connected as close as possible is necessary
for ensure device stability. The X7R or X5R capacitor
should be used for reliable performance over temperature
range. The value of the input capacitor should be 1 mF or
greater to ensure the best dynamic performance. This
capacitor will provide a low impedance path for unwanted
AC signals or noise modulated onto constant input voltage.
There is no requirement for the ESR of the input capacitor
but it is recommended to use ceramic capacitors for their low
ESR and ESL. A good input capacitor will limit the
influence of input trace inductance and source resistance
during sudden load current changes.
The NCP160 uses the EN pin to enable/disable its device
and to deactivate/activate the active discharge function.
If the EN pin voltage is <0.4 V the device is guaranteed to
be disabled. The pass transistor is turned−off so that there is
virtually no current flow between the IN and OUT. The
active discharge transistor is active so that the output voltage
VOUT is pulled to GND through a 280 Ω resistor. In the
disable state the device consumes as low as typ. 10 nA from
the VIN.
If the EN pin voltage >1.2 V the device is guaranteed to
be enabled. The NCP160 regulates the output voltage and
the active discharge transistor is turned−off.
The EN pin has internal pull−down current source with
typ. value of 200 nA which assures that the device is
turned−off when the EN pin is not connected. In the case
where the EN function isn’t required the EN should be tied
directly to IN.
Output Decoupling (COUT)
Output Current Limit
The NCP160 requires an output capacitor connected as
close as possible to the output pin of the regulator. The
recommended capacitor value is 1 mF and X7R or X5R
dielectric due to its low capacitance variations over the
specified temperature range. The NCP160 is designed to
remain stable with minimum effective capacitance of 0.7 mF
to account for changes with temperature, DC bias and
package size. Especially for small package size capacitors
such as 0201 the effective capacitance drops rapidly with the
applied DC bias. Please refer Figure 52.
Output Current is internally limited within the IC to a
typical 700 mA. The NCP60 will source this amount of
current measured with a voltage drops on the 90% of the
nominal VOUT. If the Output Voltage is directly shorted to
ground (VOUT = 0 V), the short circuit protection will limit
the output current to 690 mA (typ). The current limit and
short circuit protection will work properly over whole
temperature range and also input voltage range. There is no
limitation for the short circuit duration.
Input Capacitor Selection (CIN)
Thermal Shutdown
When the die temperature exceeds the Thermal Shutdown
threshold (TSD * 160°C typical), Thermal Shutdown event
is detected and the device is disabled. The IC will remain in
this state until the die temperature decreases below the
Thermal Shutdown Reset threshold (TSDU − 140°C typical).
Once the IC temperature falls below the 140°C the LDO is
enabled again. The thermal shutdown feature provides the
protection from a catastrophic device failure due to
accidental overheating. This protection is not intended to be
used as a substitute for proper heat sinking.
Power Dissipation
As power dissipated in the NCP160 increases, it might
become necessary to provide some thermal relief. The
maximum power dissipation supported by the device is
dependent upon board design and layout. Mounting pad
configuration on the PCB, the board material, and the
ambient temperature affect the rate of junction temperature
rise for the part.
Figure 52. Capacity vs DC Bias Voltage
There is no requirement for the minimum value of
Equivalent Series Resistance (ESR) for the COUT but the
maximum value of ESR should be less than 2 W. Larger
output capacitors and lower ESR could improve the load
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13
NCP160
The maximum power dissipation the NCP160 can handle
is given by:
ƪ125oC * T Aƫ
P D [ V IN @ I GND ) I OUTǒV IN * V OUTǓ
(eq. 1)
q JA
160
1.6
PD(MAX), TA = 25°C, 2 oz Cu
150
PD(MAX), TA = 25°C, 1 oz Cu
140
1.4
1.2
130
1.0
120
0.8
qJA, 1 oz Cu
110
0.6
0.4
100
qJA, 2 oz Cu
90
0.2
80
0
100
200
300
400
500
600
PD(MAX), MAXIMUM POWER DISSIPATION (W)
qJA, JUNCTION TO AMBIENT THERMAL RESISTANCE (°C/W)
P D(MAX) +
The power dissipated by the NCP160 for given
application conditions can be calculated from the following
equations:
0
700
PCB COPPER AREA (mm2)
1.0
220
qJA, 2 oz Cu
210
0.9
200
0.8
qJA, 1 oz Cu
190
0.7
PD(MAX), TA = 25°C, 2 oz Cu
PD(MAX), TA = 25°C, 1 oz Cu
180
0.6
170
0.5
160
0.4
150
0
100
200
300
400
PCB COPPER AREA (mm2)
500
600
Figure 54. qJA and PD (MAX) vs. Copper Area (XDFN44)
www.onsemi.com
14
0.3
700
PD(MAX), MAXIMUM POWER DISSIPATION (W)
qJA, JUNCTION TO AMBIENT THERMAL RESISTANCE (°C/W)
Figure 53. qJA and PD (MAX) vs. Copper Area (CSP4)
(eq. 2)
NCP160
Reverse Current
Turn−On Time
The PMOS pass transistor has an inherent body diode
which will be forward biased in the case that VOUT > VIN.
Due to this fact in cases, where the extended reverse current
condition can be anticipated the device may require
additional external protection.
The turn−on time is defined as the time period from EN
assertion to the point in which VOUT will reach 98% of its
nominal value. This time is dependent on various
application conditions such as VOUT(NOM), COUT, TA.
Power Supply Rejection Ratio
To obtain good transient performance and good regulation
characteristics place CIN and COUT capacitors close to the
device pins and make the PCB traces wide. In order to
minimize the solution size, use 0402 or 0201 capacitors with
appropriate capacity. Larger copper area connected to the
pins will also improve the device thermal resistance. The
actual power dissipation can be calculated from the equation
above (Equation 2). Expose pad can be tied to the GND pin
for improvement power dissipation and lower device
temperature.
PCB Layout Recommendations
The NCP160 features very high Power Supply Rejection
ratio. If desired the PSRR at higher frequencies in the range
100 kHz – 10 MHz can be tuned by the selection of COUT
capacitor and proper PCB layout.
www.onsemi.com
15
NCP160
ORDERING INFORMATION
Device
Nominal
Output
Voltage
Description
Marking
Rotation
NCP160AFCS180T2G
1.8 V
A
0°
NCP160AFCS250T2G
2.5 V
D
0°
NCP160AFCS280T2G
2.8 V
E
0°
NCP160AFCS285T2G
2.85 V
F
0°
NCP160AFCS300T2G
3.0 V
J
0°
NCP160AFCS320T2G
3.2 V
V
0°
NCP160AFCS330T2G
3.3 V
K
0°
NCP160AFCS350T2G
3.5 V
L
0°
NCP160AFCS450T2G
4.5 V
P
0°
NCP160AFCS500T2G
5.0 V
R
0°
NCP160AFCS514T2G
5.14 V
Q
0°
NCP160BFCS180T2G
1.8 V
A
90°
NCP160BFCS250T2G
2.5 V
D
90°
NCP160BFCS280T2G
2.8 V
E
90°
NCP160BFCS285T2G
2.85 V
F
90°
NCP160BFCS300T2G
3.0 V
J
90°
NCP160BFCS330T2G
3.3 V
K
90°
NCP160BFCS350T2G
3.5 V
L
90°
NCP160BFCS450T2G
4.5 V
P
90°
NCP160BFCS500T2G
5.0 V
R
90°
NCP160BFCS514T2G
5.14 V
Q
90°
NCP160AFCT180T2G
1.8 V
A
0°
NCP160AFCT250T2G
2.5 V
D
0°
NCP160AFCT280T2G
2.8 V
E
0°
NCP160AFCT285T2G
2.85 V
F
0°
NCP160AFCT300T2G
3.0 V
J
0°
K
0°
L
0°
250 mA, Active Discharge
250 mA, Non-Active
Discharge
250 mA, Active Discharge
NCP160AFCT330T2G
3.3 V
NCP160AFCT350T2G
3.5 V
NCP160AFCT450T2G
4.5 V
P
0°
NCP160AFCT500T2G
5.0 V
R
0°
NCP160AFCT514T2G
5.14 V
Q
0°
NCP160BFCT180T2G
1.8 V
A
90°
NCP160BFCT210T2G
2.1 V
T
90°
NCP160BFCT250T2G
2.5 V
D
90°
NCP160BFCT280T2G
2.8 V
E
90°
NCP160BFCT285T2G
2.85 V
F
90°
NCP160BFCT300T2G
3.0 V
J
90°
NCP160BFCT330T2G
3.3 V
K
90°
NCP160BFCT350T2G
3.5 V
L
90°
NCP160BFCT450T2G
4.5 V
P
90°
250 mA, Non-Active
Discharge
NCP160BFCT500T2G
5.0 V
R
90°
NCP160BFCT514T2G
5.14 V
Q
90°
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16
Package
Shipping†
WLCSP4
CASE 567KA
(Pb-Free)
5000 /
Tape &
Reel
WLCSP4
CASE 567KA
(Pb-Free)
5000 /
Tape &
Reel
WLCSP4
CASE 567JZ
(Pb-Free)
5000 /
Tape &
Reel
WLCSP4
CASE 567JZ
(Pb-Free)
5000 /
Tape &
Reel
NCP160
ORDERING INFORMATION
Device
Nominal Output Voltage
Description
Marking
NCP160AMX180TBG
1.8 V
DF
NCP160AMX250TBG
2.5 V
DG
NCP160AMX280TBG
2.8 V
DH
NCP160AMX285TBG
2.85 V
DJ
NCP160AMX300TBG
3.0 V
DK
NCP160AMX320TBG
3.2 V
NCP160AMX330TBG
3.3 V
DA
NCP160AMX350TBG
3.5 V
DL
NCP160AMX450TBG
4.5 V
DM
NCP160AMX500TBG
5.0 V
DW
NCP160AMX514TBG
5.14 V
DC
NCP160BMX180TBG
1.8 V
EF
NCP160BMX250TBG
2.5 V
EG
NCP160BMX280TBG
2.8 V
EH
NCP160BMX285TBG
2.85 V
EJ
NCP160BMX300TBG
3.0 V
EK
NCP160BMX330TBG
3.3 V
NCP160BMX350TBG
3.5 V
EL
NCP160BMX450TBG
4.5 V
EM
NCP160BMX500TBG
5.0 V
EW
NCP160BMX514TBG
5.14 V
EC
250 mA, Active Discharge
250 mA, Non-Active Discharge
DY
EA
Package
Shipping
XDFN-4
(Pb-Free)
3000 /
Tape &
Reel
(Available
Soon)
XDFN-4
(Pb-Free)
3000 /
Tape &
Reel
(Available
Soon)
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
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17
NCP160
PACKAGE DIMENSIONS
WLCSP4, 0.64x0.64
CASE 567KA
ISSUE O
A
D
È
PIN A1
REFERENCE
0.05 C
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
B
E
DIM
A
A1
A2
b
D
E
e
0.05 C TOP VIEW
2X
A2
0.05 C
A
RECOMMENDED
SOLDERING FOOTPRINT*
0.05 C
A1
NOTE 3
C
SIDE VIEW
SEATING
PLANE
A1
4X
0.03 C
PACKAGE
OUTLINE
e
b
0.05 C A B
MILLIMETERS
MIN
MAX
0.35
0.45
0.14
0.18
0.25 REF
0.185
0.215
0.64 BSC
0.64 BSC
0.35 BSC
e
0.35
PITCH
B
A
1
4X
0.20
0.35
PITCH
DIMENSIONS: MILLIMETERS
2
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
BOTTOM VIEW
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18
NCP160
PACKAGE DIMENSIONS
XDFN4 1.0x1.0, 0.65P
CASE 711AJ
ISSUE O
PIN ONE
REFERENCE
0.05 C
2X
4X
A
B
D
ÉÉ
ÉÉ
E
4X
L2
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. DIMENSION b APPLIES TO PLATED TERMINAL
AND IS MEASURED BETWEEN 0.15 AND
0.20 mm FROM THE TERMINAL TIPS.
4. COPLANARITY APPLIES TO THE EXPOSED
PAD AS WELL AS THE TERMINALS.
b2
DETAIL A
DIM
A
A1
A3
b
b2
D
D2
E
e
L
L2
0.05 C
2X
TOP VIEW
(A3)
0.05 C
A
0.05 C
NOTE 4
A1
SIDE VIEW
C
SEATING
PLANE
MILLIMETERS
MIN
MAX
0.33
0.43
0.00
0.05
0.10 REF
0.15
0.25
0.02
0.12
1.00 BSC
0.43
0.53
1.00 BSC
0.65 BSC
0.20
0.30
0.07
0.17
e
RECOMMENDED
MOUNTING FOOTPRINT*
e/2
DETAIL A
1
4X
2
L
0.65
PITCH
D2
45 5
PACKAGE
OUTLINE
D2
4
3
4X
4X
BOTTOM VIEW
2X
0.52
b
0.05
4X
M
0.11
0.39
1.20
C A B
NOTE 3
4X
0.24
4X
0.26
DIMENSIONS: MILLIMETERS
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
19
NCP160
PACKAGE DIMENSIONS
WLCSP4, 0.64x0.64
CASE 567JZ
ISSUE O
A
D
È
PIN A1
REFERENCE
0.05 C
2X
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. COPLANARITY APPLIES TO SPHERICAL
CROWNS OF SOLDER BALLS.
B
E
DIM
A
A1
A2
b
D
E
e
0.05 C TOP VIEW
2X
A2
0.05 C
A
RECOMMENDED
SOLDERING FOOTPRINT*
0.05 C
A1
NOTE 3
C
SIDE VIEW
SEATING
PLANE
A1
4X
PACKAGE
OUTLINE
e
b
0.03 C A B
MILLIMETERS
MIN
MAX
−−−
0.33
0.04
0.08
0.23 REF
0.195
0.225
0.64 BSC
0.64 BSC
0.35 BSC
e
0.35
PITCH
B
A
1
4X
0.20
0.35
PITCH
DIMENSIONS: MILLIMETERS
2
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
BOTTOM VIEW
ON Semiconductor and the
are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries.
SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed
at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation
or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and
specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets
and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each
customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended,
or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which
the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or
unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and
expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim
alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable
copyright laws and is not for resale in any manner.
PUBLICATION ORDERING INFORMATION
LITERATURE FULFILLMENT:
Literature Distribution Center for ON Semiconductor
P.O. Box 5163, Denver, Colorado 80217 USA
Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada
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Email: [email protected]
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20
ON Semiconductor Website: www.onsemi.com
Order Literature: http://www.onsemi.com/orderlit
For additional information, please contact your local
Sales Representative
NCP160/D
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