Kersemi IRF3704ZS High frequency synchronous buck converters for computer processor power Datasheet

IRF3704ZS
D2Pak
IRF3704ZS
Applications
l High Frequency Synchronous Buck
Converters for Computer Processor Power
Benefits
l Low RDS(on) at 4.5V VGS
l Ultra-Low Gate Impedance
l Fully Characterized Avalanche Voltage
and Current
VDSS RDS(on) max
7.9m:
20V
Qg
8.7nC
Absolute Maximum Ratings
Max.
Units
20
V
Gate-to-Source Voltage
Continuous Drain Current, VGS @ 10V
± 20
67
A
47
IDM
Continuous Drain Current, VGS @ 10V
Pulsed Drain Current
PD @TC = 25°C
Maximum Power Dissipation
57
PD @TC = 100°C
Maximum Power Dissipation
28
TJ
Linear Derating Factor
Operating Junction and
TSTG
Storage Temperature Range
Parameter
VDS
Drain-to-Source Voltage
VGS
ID @ TC = 25°C
ID @ TC = 100°C
c
Mounting Torque, 6-32 or M3 screw
Thermal Resistance
f
Parameter
Junction-to-Case
i
RθCS
Case-to-Sink, Flat Greased Surface
RθJA
Junction-to-Ambient
RθJA
Junction-to-Ambient (PCB Mount)
2014-8-13
fi
260
W
0.38
-55 to + 175
Soldering Temperature, for 10 seconds
RθJC
h
h
f
gi
1
W/°C
°C
300 (1.6mm from case)
y
y
10 lbf in (1.1N m)
Typ.
Max.
Units
–––
2.65
°C/W
0.50
–––
–––
62
–––
40
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IRF3704ZS
Static @ TJ = 25°C (unless otherwise specified)
Min. Typ. Max. Units
Parameter
BVDSS
Drain-to-Source Breakdown Voltage
20
–––
–––
∆ΒVDSS/∆TJ
Breakdown Voltage Temp. Coefficient
–––
0.014
–––
RDS(on)
Static Drain-to-Source On-Resistance
–––
6.5
7.9
–––
9.1
11.1
V
V/°C Reference to 25°C, ID = 1mA
mΩ VGS = 10V, ID = 21A
VGS = 4.5V, ID = 17A
VGS(th)
Gate Threshold Voltage
1.65
2.1
2.55
V
∆VGS(th)/∆TJ
Gate Threshold Voltage Coefficient
–––
-5.6
–––
mV/°C
IDSS
Drain-to-Source Leakage Current
µA
IGSS
gfs
Qg
–––
–––
1.0
–––
–––
150
Gate-to-Source Forward Leakage
–––
–––
100
Gate-to-Source Reverse Leakage
–––
–––
-100
Forward Transconductance
48
–––
–––
Total Gate Charge
–––
8.7
13
Conditions
VGS = 0V, ID = 250µA
e
e
VDS = VGS, ID = 250µA
VDS = 16V, VGS = 0V
VDS = 16V, VGS = 0V, TJ = 125°C
nA
VGS = 20V
VGS = -20V
S
VDS = 10V, ID = 17A
nC
VGS = 4.5V
Qgs1
Pre-Vth Gate-to-Source Charge
–––
2.9
–––
Qgs2
Post-Vth Gate-to-Source Charge
–––
1.1
–––
Qgd
Gate-to-Drain Charge
–––
2.3
–––
ID = 17A
Qgodr
–––
2.4
–––
See Fig. 16
Qsw
Gate Charge Overdrive
Switch Charge (Qgs2 + Qgd)
–––
3.4
–––
VDS = 10V
Qoss
Output Charge
–––
5.6
–––
td(on)
Turn-On Delay Time
–––
8.9
–––
VDD = 10V, VGS = 4.5V
tr
Rise Time
–––
38
–––
ID = 17A
td(off)
Turn-Off Delay Time
–––
11
–––
tf
Fall Time
–––
4.2
–––
Ciss
Input Capacitance
–––
1220
–––
Coss
Output Capacitance
–––
390
–––
Crss
Reverse Transfer Capacitance
–––
190
–––
nC
VDS = 10V, VGS = 0V
e
ns
Clamped Inductive Load
pF
VDS = 10V
VGS = 0V
ƒ = 1.0MHz
Avalanche Characteristics
EAS
Parameter
Single Pulse Avalanche Energy
IAR
Avalanche Current
EAR
Repetitive Avalanche Energy
c
Typ.
–––
d
c
Max.
36
Units
mJ
–––
17
A
–––
5.7
mJ
Diode Characteristics
Parameter
Min. Typ. Max. Units
IS
Continuous Source Current
–––
–––
ISM
(Body Diode)
Pulsed Source Current
–––
–––
VSD
(Body Diode)
Diode Forward Voltage
–––
trr
Reverse Recovery Time
–––
Qrr
Reverse Recovery Charge
–––
2014-8-13
67
h
2
D
260
showing the
integral reverse
–––
1.0
V
p-n junction diode.
TJ = 25°C, IS = 17A, VGS = 0V
11
17
ns
2.3
3.5
nC
A
c
Conditions
MOSFET symbol
G
S
e
TJ = 25°C, IF = 17A, VDD = 10V
di/dt = 100A/µs
e
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IRF3704ZS
1000
1000
VGS
10V
9.0V
7.0V
5.0V
4.5V
4.0V
3.5V
BOTTOM 3.0V
10
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
100
VGS
10V
9.0V
7.0V
5.0V
4.5V
4.0V
3.5V
BOTTOM 3.0V
TOP
TOP
3.0V
60µs PULSE WIDTH
Tj = 25°C
100
3.0V
10
60µs PULSE WIDTH
Tj = 175°C
1
1
0.1
1
0.1
10
1
10
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
Fig 2. Typical Output Characteristics
2.0
T J = 25°C
T J = 175°C
100.0
VDS = 10V
60µs PULSE WIDTH
10.0
3.0
4.0
5.0
6.0
7.0
1.5
1.0
0.5
8.0
-60 -40 -20
VGS, Gate-to-Source Voltage (V)
0
20 40 60 80 100 120 140 160 180
T J , Junction Temperature (°C)
Fig 3. Typical Transfer Characteristics
2014-8-13
ID = 42A
VGS = 10V
(Normalized)
RDS(on) , Drain-to-Source On Resistance
ID, Drain-to-Source Current (Α)
1000.0
Fig 4. Normalized On-Resistance
vs. Temperature
3
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IRF3704ZS
12
10000
f = 1 MHZ
VGS = 0V,
C iss = C gs + C gd, C ds SHORTED
C rss = C gd
VGS, Gate-to-Source Voltage (V)
ID= 17A
C, Capacitance (pF)
C oss = C ds + C gd
Ciss
1000
Coss
Crss
VDS= 16V
VDS= 10V
10
8
6
4
2
0
100
1
10
0
100
5
10
15
20
25
QG Total Gate Charge (nC)
VDS, Drain-to-Source Voltage (V)
Fig 6. Typical Gate Charge vs.
Gate-to-Source Voltage
Fig 5. Typical Capacitance vs.
Drain-to-Source Voltage
1000.0
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100.0
100
T J = 175°C
10.0
T J = 25°C
1.0
100µsec
10
VGS = 0V
1
0.1
0.0
0.5
1.0
1.5
2.0
0
10msec
1
10
100
VDS , Drain-toSource Voltage (V)
VSD, Source-toDrain Voltage (V)
Fig 8. Maximum Safe Operating Area
Fig 7. Typical Source-Drain Diode
Forward Voltage
2014-8-13
1msec
Tc = 25°C
Tj = 175°C
Single Pulse
4
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IRF3704ZS
70
2.6
VGS(th) Gate threshold Voltage (V)
LIMITED BY PACKAGE
ID , Drain Current (A)
60
50
40
30
20
10
0
25
50
75
100
125
150
2.2
ID = 250µA
1.8
1.4
1.0
0.6
175
-75 -50 -25
T C , Case Temperature (°C)
0
25
50
75 100 125 150 175 200
T J , Temperature ( °C )
Fig 9. Maximum Drain Current vs.
Case Temperature
Fig 10. Threshold Voltage vs. Temperature
Thermal Response ( Z thJC )
10
1
D = 0.50
0.20
0.10
0.05
0.1
τJ
0.02
0.01
0.01
R1
R1
τJ
τ1
τ1
R2
R2
τ2
τ2
R3
R3
τ3
τC
τ
τ3
Ci= τi/Ri
Ci= τi/Ri
SINGLE PULSE
( THERMAL RESPONSE )
Ri (°C/W) τi (sec)
0.920
0.000139
0.194
0.000602
0.538
0.001567
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.001
1E-006
1E-005
0.0001
0.001
0.01
t1 , Rectangular Pulse Duration (sec)
Fig 11. Maximum Effective Transient Thermal Impedance, Junction-to-Case
2014-8-13
5
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IRF3704ZS
15V
D.U.T
RG
+
V
- DD
IAS
VGS
20V
EAS, Single Pulse Avalanche Energy (mJ)
DRIVER
L
VDS
140
A
0.01Ω
tp
Fig 12a. Unclamped Inductive Test Circuit
V(BR)DSS
tp
ID
5.6A
8.5A
BOTTOM 17A
TOP
120
100
80
60
40
20
0
25
50
75
100
125
150
175
Starting T J, Junction Temperature (°C)
Fig 12c. Maximum Avalanche Energy
vs. Drain Current
I AS
LD
VDS
Fig 12b. Unclamped Inductive Waveforms
+
VDD D.U.T
Current Regulator
Same Type as D.U.T.
VGS
Pulse Width < 1µs
Duty Factor < 0.1%
50KΩ
12V
.2µF
.3µF
Fig 14a. Switching Time Test Circuit
D.U.T.
+
V
- DS
VDS
90%
VGS
3mA
10%
IG
VGS
ID
Current Sampling Resistors
td(on)
Fig 13. Gate Charge Test Circuit
tr
td(off)
tf
Fig 14b. Switching Time Waveforms
2014-8-13
6
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IRF3704ZS
D.U.T
Driver Gate Drive
+
ƒ
+
P.W.
-
-
„
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+

RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
‚
D=
Period
VDD
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
+
-
Body Diode
VDD
Forward Drop
Inductor Curent
ISD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 15. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
Id
Vds
Vgs
Vgs(th)
Qgs1 Qgs2
Qgd
Qgodr
Fig 16. Gate Charge Waveform
2014-8-13
7
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IRF3704ZS
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
10.54 (.415)
10.29 (.405)
2.87 (.113)
2.62 (.103)
-B-
3.78 (.149)
3.54 (.139)
4.69 (.185)
4.20 (.165)
-A-
1.32 (.052)
1.22 (.048)
6.47 (.255)
6.10 (.240)
4
15.24 (.600)
14.84 (.584)
1.15 (.045)
MIN
1
2
3
14.09 (.555)
13.47 (.530)
4.06 (.160)
3.55 (.140)
3X
3X
LEAD ASSIGNMENTS
1 - GATE
2 - DRAIN
3 - SOURCE
4 - DRAIN
1.40 (.055)
1.15 (.045)
0.93 (.037)
0.69 (.027)
0.36 (.014)
3X
M
B A M
0.55 (.022)
0.46 (.018)
2.92 (.115)
2.64 (.104)
2.54 (.100)
2X
NOTES:
1 DIMENSIONING & TOLERANCING PER ANSI Y14.5M, 1982.
2 CONTROLLING DIMENSION : INCH
3 OUTLINE CONFORMS TO JEDEC OUTLINE TO-220AB.
4 HEATSINK & LEAD MEASUREMENTS DO NOT INCLUDE BURRS.
TO-220AB Part Marking Information
EXAMPLE: THIS IS AN IRF1010
LOT CODE 1789
AS S EMBLED ON WW 19, 1997
IN T HE AS S EMBLY LINE "C"
INTERNATIONAL
RECTIFIER
LOGO
AS S EMBLY
LOT CODE
PART NUMBER
DAT E CODE
YEAR 7 = 1997
WEEK 19
LINE C
For GB Production
EXAMPLE: T HIS IS AN IRF1010
LOT CODE 1789
AS S EMBLED ON WW 19, 1997
IN T HE AS S EMBLY LINE "C"
INTERNATIONAL
RECT IFIER
LOGO
LOT CODE
2014-8-13
8
PART NUMBER
DAT E CODE
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IRF3704ZS
D2Pak Package Outline
Dimensions are shown in millimeters (inches)
D2Pak Part Marking Information
T HIS IS AN IRF530S WIT H
LOT CODE 8024
AS S EMBLED ON WW 02, 2000
IN T HE AS S EMBLY LINE "L"
INT ERNAT IONAL
RECT IFIER
LOGO
PART NUMBER
F530S
DAT E CODE
YEAR 0 = 2000
WEEK 02
LINE L
AS S EMBLY
LOT CODE
For GB Production
T HIS IS AN IRF530S WIT H
LOT CODE 8024
AS S EMBLED ON WW 02, 2000
IN T HE AS S EMBLY LINE "L"
INT ERNAT IONAL
RECT IFIER
LOGO
LOT CODE
2014-8-13
9
PART NUMBER
F530S
DAT E CODE
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IRF3704ZS
TO-262 Package Outline
Dimensions are shown in millimeters (inches)
IGBT
1- GATE
2- COLLECTOR
TO-262 Part Marking Information
EXAMPLE: THIS IS AN IRL3103L
LOT CODE 1789
AS SEMBLED ON WW 19, 1997
IN T HE AS S EMBLY LINE "C"
INT ERNAT IONAL
RECTIFIER
LOGO
AS SEMBLY
LOT CODE
2014-8-13
10
PART NUMBER
DAT E CODE
YEAR 7 = 1997
WEEK 19
LINE C
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IRF3704ZS
D2Pak Tape & Reel Information
TRR
1.60 (.063)
1.50 (.059)
1.60 (.063)
1.50 (.059)
4.10 (.161)
3.90 (.153)
FEED DIRECTION 1.85 (.073)
11.60 (.457)
11.40 (.449)
1.65 (.065)
0.368 (.0145)
0.342 (.0135)
15.42 (.609)
15.22 (.601)
24.30 (.957)
23.90 (.941)
TRL
1.75 (.069)
1.25 (.049)
10.90 (.429)
10.70 (.421)
4.72 (.136)
4.52 (.178)
16.10 (.634)
15.90 (.626)
FEED DIRECTION
13.50 (.532)
12.80 (.504)
27.40 (1.079)
23.90 (.941)
4
330.00
(14.173)
MAX.
60.00 (2.362)
MIN.
NOTES :
1. COMFORMS TO EIA-418.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION MEASURED @ HUB.
4. INCLUDES FLANGE DISTORTION @ OUTER EDGE.
Notes:
 Repetitive rating; pulse width limited by
max. junction temperature.
‚ Starting TJ = 25°C, L = 0.25mH, RG = 25Ω,
IAS = 17A.
ƒ Pulse width ≤ 400µs; duty cycle ≤ 2%.
„ This is only applied to TO-220AB pakcage.
2014-8-13
26.40 (1.039)
24.40 (.961)
3
30.40 (1.197)
MAX.
4
This is applied to D2Pak, when mounted on 1" square PCB (FR4 or G-10 Material). For recommended footprint and soldering
techniques refer to application note #AN-994.
† Calculated continuous current based on maximum allowable
junction temperature. Package limitation current is 42A.
‡ Rθ is measured at TJ approximately 90°C
11
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