FAN4860 3MHz, 5V Output Synchronous TinyBoost™ Regulator Features Description Operates with Very Small External Components: 1μH Inductor and 0402 Case Size Input and Output Capacitors Input Voltage Range from 2.3V to 4.5V The FAN4860 is a low-power boost regulator designed to provide a regulated 5V output from a single cell Li-Ion battery. The output voltage is fixed at 5.0V with a guaranteed maximum load current of 200mA at VIN=2.3V and 300mA at VIN=3.3V. Input current in shut-down mode is less than 1µA, which maximizes battery life. Internal Synchronous Rectifier (No External Diode Needed) Thermal Shutdown and Overload Protection Fixed 5.0V Output Voltage Maximum Load Current 200mA at VIN=2.3V Maximum Load Current 300mA at VIN=3.3V Up to 92% Efficient Light-load PFM operation is automatic and “glitch-free”. The regulator maintains output regulation at no-load with 37µA quiescent current. The combination of built-in power transistors, synchronous rectification, and low supply current make the FAN4860 ideal for battery powered applications. Low Operating Quiescent Current True Load Disconnect During Shutdown Variable On-time Pulse Frequency Modulation (PFM) with Light-Load Power-Saving Mode The FAN4860 is available in 6-bump 0.4mm pitch WaferLevel Chip Scale Package (WLCSP) and a 6-lead 2x2mm ultra-thin MLP package. 6-Pin 2 x 2mm UMLP 6-Bump WLCSP, 0.4mm Pitch Applications USB “On the Go” 5V Supply HDMI 5V Supply 5V Supply for H-Bridge Motor Drivers Powering 5V Peripherals Figure 1. Typical Application Supply Source for WLED Torch and Flash Lighting PDAs, Portable Media Players Cell Phones, Smart Phones, Portable Instruments Ordering Information Part Number Operating Temperature Range Package Packing Method FAN4860UC5X -40°C to 85°C WLCSP, 0.4mm Pitch Tape and Reel FAN4860UMP5X -40°C to 85°C UMLP-6, 2 x 2mm Tape and Reel Please refer to tape and reel specifications at http://www.fairchildsemi.com/packaging. © 2009 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.0.3 www.fairchildsemi.com FAN4860 — 3MHz, 5V Output Synchronous TinyBoost™ Regulator April 2010 FAN4860 — 3MHz, 5V Output Synchronous TinyBoost™ Regulator Block Diagrams Figure 2. IC Block Diagram Pin Configuration Figure 3. WLCSP (Top View) Figure 4. WLCSP (Bottom View) Figure 5. 2X2mm UMLP (Top View) Pin Definitions Pin # Name Description WLCSP UMLP A1 6 VIN Input Voltage. Connect to Li-Ion battery input power source and input capacitor (CIN). B1 5 SW Switching Node. Connect to inductor. C1 4 EN Enable. When this pin is HIGH, the circuit is enabled. This pin should not be left floating. Feedback. Output voltage sense point for VOUT. Connect to output capacitor (COUT). C2 3 FB B2 2 VOUT Output Voltage. This pin is both the output voltage terminal as well as an IC bias supply. A2 1, P1 GND Ground. Power and signal ground reference for the IC. All voltages are measured with respect to this pin. © 2009 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.0.3 www.fairchildsemi.com 2 Stresses exceeding the absolute maximum ratings may damage the device. The device may not function or be operable above the recommended operating conditions and stressing the parts to these levels is not recommended. In addition, extended exposure to stresses above the recommended operating conditions may affect device reliability. The absolute maximum ratings are stress ratings only. Symbol VIN Parameter VIN Pin Min. Max. Units -0.3 5.5 V VOUT VOUT Pin –2 6 V VFB FB Pin –2 14 V VSW SW Node DC -0.3 5.5 Transient: 10ns, 3MHz -1.0 6.5 VEN EN Pin -0.3 5.5 ESD Electrostatic Discharge Protection Level TJ Junction Temperature –40 +150 °C TSTG Storage Temperature –65 +150 °C +260 °C TL Human Body Model per JESD22-A114 2.0 Charged Device Model per JESD22-C101 1.0 Lead Soldering Temperature, 10 Seconds V V kV Recommended Operating Conditions The Recommended Operating Conditions table defines the conditions for actual device operation. Recommended operating conditions are specified to ensure optimal performance to the datasheet specifications. Fairchild does not recommend exceeding them or designing to absolute maximum ratings. Symbol Parameter VIN Supply Voltage IOUT Output Current Min. Max. Units 2.3 4.5 V 200 mA TA Ambient Temperature –40 +85 °C TJ Junction Temperature –40 +125 °C Thermal Properties Junction-to-ambient thermal resistance is a function of application and board layout. This data is measured with four-layer 2s2p boards in accordance to JEDEC standard JESD51. Special attention must be paid not to exceed junction temperature TJ(max) at a given ambient temperate TA. Symbol Parameter θJA Junction-to-Ambient Thermal Resistance © 2009 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.0.3 Typical Units WLCSP 130 °C/W UMLP 57 °C/W www.fairchildsemi.com 3 FAN4860 — 3MHz, 5V Output Synchronous TinyBoost™ Regulator Absolute Maximum Ratings Minimum and maximum values are at VIN=VEN=2.3V to 4.5V, TA=-40°C to +85°C; circuit of Figure 1, unless otherwise noted. Typical values are at TA=25°C, VIN=VEN=3.6V. Symbol IIN Parameter Conditions VIN Input Current 45 Shutdown: EN=0, VIN=3.6V 0.5 1.5 10 VOUT=0, EN=0, VIN=4.2V ILK_RVSR VOUT to VIN Reverse Leakage VOUT=5V, VIN=3.6V, EN=0 Under-Voltage Lockout VIN Rising VENL Enable LOW Voltage ILK_EN Enable Input Leakage Current VOUT (1) V mV 0.01 1 μA VIN from 2.7V to 4.5V, IOUT≤200mA 4.85 5.05 5.15 VIN from 3.3V to 4.5V, IOUT≤300mA 4.85 5.05 5.15 4.975 5.050 5.125 V 240 265 ns VIN=3.6V, IOUT=200mA 195 VIN=2.3V, VOUT=5V 200 VIN=3.3V, VOUT=5V 300 VIN=3.6V, VOUT=5V VIN=3.6V, VOUT>VIN (2) V 5.15 Off Time SW Peak Current Limit 0.4 5.05 tOFF (2) V 4.80 Referred to VOUT ISW 2.3 VIN from 2.3V to 4.5V, IOUT≤200mA Reference Accuracy Maximum Output Current μA 1.05 VREF IOUT 2.5 190 VOUT Output Voltage Accuracy μA nA 2.2 VUVLO_HYS Under-Voltage Lockout Hysteresis Enable HIGH Voltage Max. Units 37 VOUT Leakage Current VENH Typ. Quiescent: VIN=3.6V, IOUT=0, EN=VIN ILK_OUT VUVLO Min. V mA 400 930 1100 1320 mA ISS Soft-Start Input Peak Current Limit VIN=3.6V, VOUT < VIN 850 tSS Soft-Start Time VIN=3.6V, IOUT=200mA Time=Rising EN until Regulated VOUT 100 N-Channel Boost Switch VIN=3.6V 300 P-Channel Sync Rectifier VIN=3.6V 400 Thermal Shutdown ILOAD=10mA 150 °C 30 °C RDS(ON) TTSD TTSD_HYS Thermal Shutdown Hysteresis mA 300 μs mΩ Notes: 1. ILOAD from 0 to IOUT; also includes load transient response. VOUT measured from mid-point of output voltage ripple. Effective capacitance of COUT > 1.5μF. 2. Guaranteed by design and characterization; not tested in production. © 2009 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.0.3 www.fairchildsemi.com 4 FAN4860 — 3MHz, 5V Output Synchronous TinyBoost™ Regulator Electrical Specifications Unless otherwise specified, circuit per Figure 1, 3.6VIN, TA=25°C. 95 100 92 Efficiency (%) Efficiency (%) 95 90 89 86 85 83 2.5 Vin 3.3 Vin 3.6 Vin 4.5 Vin 80 -40C +25C +85C 80 75 0 0 50 100 150 200 250 50 300 100 150 200 250 300 Load Current (mA) Load Current (mA) Figure 6 Efficiency vs. VIN Figure 7 Efficiency vs. Temperature, 3.6VIN 50 -40C +25C 25 VOUT - 5.05V (mV) 25 VOUT - 5.05V (mV) 50 2.5 Vin 3.3 Vin 3.6 Vin 4.5 Vin 0 -25 -50 +85C 0 -25 -50 -75 -75 -100 -100 0 50 100 150 200 250 0 300 50 100 150 200 250 300 Load Current (mA) Load Current (mA) Figure 8 Line and Load Regulation Figure 9 Load Regulation vs. Temperature, 3.6VIN 4000 Frequency (KHz) 3200 2400 1600 2.5 Vin 800 3.6 Vin 4.5 Vin 0 0 50 100 150 200 250 300 Load Current (mA) Figure 10 Switching Frequency © 2009 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.0.3 Figure 11 Quiescent Current www.fairchildsemi.com 5 FAN4860 — 3MHz, 5V Output Synchronous TinyBoost™ Regulator Typical Characteristics Unless otherwise specified, circuit per Figure 1, 3.6VIN, TA=25°C. Figure 12 Maximum DC Load Current Figure 13 Peak Inductor Current Figure 14 Output Ripple, 10mA PFM Load Figure 15 Output Ripple, 200mA PWM Load Figure 16 0-50mA Load Transient, 100ns Step Figure 17 50-200mA Load Transient, 100ns Step © 2009 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.0.3 www.fairchildsemi.com 6 FAN4860 — 3MHz, 5V Output Synchronous TinyBoost™ Regulator Typical Characteristics Unless otherwise specified, circuit per Figure 1, 3.6VIN, TA=25°C. Figure 18 Line Transient, 5mA Load, 10µs Step Figure 19 Line Transient, 200mA Load, 10µs Step Figure 20 Startup, No Load Figure 21 Startup, 33Ω Load Figure 22 Shutdown, 1KΩ Load Figure 23 Shutdown, 33Ω Load © 2009 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.0.3 www.fairchildsemi.com 7 FAN4860 — 3MHz, 5V Output Synchronous TinyBoost™ Regulator Typical Characteristics Unless otherwise specified, circuit per Figure 1, 3.6VIN, TA=25°C. Figure 24 Overload Protection © 2009 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.0.3 Figure 25 Short-Circuit Response www.fairchildsemi.com 8 FAN4860 — 3MHz, 5V Output Synchronous TinyBoost™ Regulator Typical Characteristics Circuit Description PFM Mode FAN4860 is a synchronous boost regulator, typically operating at 3MHz in continuous conduction mode (CCM), which occurs at moderate to heavy load current and low VIN voltages. If VOUT > VREF when the minimum off-time has ended, the regulator enters PFM mode. Boost pulses are inhibited until VOUT < VREF. The minimum on-time is increased to enable the output to pump up sufficiently with each PFM boost pulse. Therefore, the regulator behaves like a constant ontime regulator, with the bottom of its output voltage ripple at 5.05V in PFM mode. At light-load currents, the converter switches automatically to power-saving PFM mode. The regulator automatically and smoothly transitions between quasi-fixed-frequency continuous conduction PWM mode and variable-frequency PFM mode to maintain the highest possible efficiency over the full range of load current and input voltage. Table 1. PWM Mode Regulation The FAN4860 uses a minimum on-time and computed minimum off-time to regulate VOUT. The regulator achieves excellent transient response by employing current mode modulation. This technique causes the regulator output to exhibit a load line. During PWM mode, the output voltage drops slightly as the input current rises. With a constant VIN, this appears as a constant output resistance. Operating States Mode Description Invoked When: LIN Linear Startup VIN > VOUT SS Boost Soft-Start VOUT < VREG BST Boost Operating Mode VOUT=VREG Shutdown and Startup If EN is LOW, all bias circuits are off and the regulator is in shutdown mode. During shutdown, true load disconnect between battery and load prevents current flow from VIN to VOUT, as well as reverse flow from VOUT to VIN. The “droop” caused by the output resistance when a load is applied allows the regulator to respond smoothly to load transients with negligible overshoot. LIN State When EN rises, if VIN > UVLO, the regulator first attempts to bring VOUT within about 1V of VIN by using the internal fixed current source from VIN (ILIN1). The current is limited to about 630mA during LIN1 mode. If VOUT reaches VIN-1V during LIN1 mode, the SS state is initiated. Otherwise, LIN1 times out after 16 CLK counts and the LIN2 mode is entered. In LIN2 mode, the current source is incremented to 850mA. If VOUT fails to reach VIN-1V after 64 CLK counts, a fault condition is declared. SS State Figure 26 Output Resistance (ROUT) Upon the successful completion of the LIN state (VOUT>VIN1V), the regulator begins switching with boost pulses current limited to about 50% of nominal level, incrementing to full scale over a period of 32 CLK counts. VOUT as a function of ILOAD can be computed when the regulator is in PWM mode (continuous conduction) as: If the output fails to achieve 90% of its setpoint within 96 CLK counts at full-scale current limit, a fault condition is declared. VOUT = 5.05 − R OUT • ILOAD BST State EQ. 1 This is the normal operating mode of the regulator. The regulator uses a minimum tOFF-minimum tON modulation For example, at VIN=3.3V, and ILOAD=200mA, VOUT would drop to: VOUT = 5.05 − 0.38 • 0.2 = 4.974 V VIN scheme. Minimum tOFF is proportional to VOUT , which keeps the regulator’s switching frequency reasonably constant in CCM. tON(MIN) is proportional to VIN and is higher if the inductor current reaches 0 before tOFF(MIN) during the prior cycle. EQ. 1A At VIN=2.3V, and ILOAD=200mA, VOUT would drop to: VOUT = 5.05 − 0.68 • 0.2 = 4.914 V © 2009 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.0.3 EQ. 1B www.fairchildsemi.com 9 FAN4860 — 3MHz, 5V Output Synchronous TinyBoost™ Regulator Functional Description The fault clock period as a function of VIN is shown in Figure 28. Fault State The regulator enters the FAULT state under any of the following conditions: VOUT fails to achieve the voltage required to advance from LIN state to SS state. VOUT fails to achieve the voltage required to advance from SS state to BST state. Sustained (32 CLK counts) pulse-by-pulse current limit during the BST state. The regulator moves from BST to LIN state due to a short circuit or output overload (VOUT < VIN-1V). Once a fault is triggered, the regulator stops switching and presents a high-impedance path between VIN and VOUT. After waiting 480 CLK counts, a re-start is attempted. Figure 28. Fault Clock Period vs. VIN The VIN-dependent LIN mode charging current is illustrated in Figure 29. Soft-Start and Fault Timing The soft-start timing for each state, and the fault times, are determined by the fault clock, whose period is inversely proportional to VIN. This allows the regulator more time to charge larger values of COUT when VIN is lower. With higher VIN, this also reduces power delivered to VOUT during each cycle in current limit. The number of clock counts for each state is illustrated in Figure 27. Figure 29. LIN Mode Current vs. VIN Over-Temperature Protection (OTP) The regulator shuts down when the thermal shutdown threshold is reached. Restart, with soft-start, occurs when the IC has cooled by about 30°C. Figure 27. Fault Response into Short Circuit Over-Current Protection (OCP) During boost-mode operation, the FAN4860 employs a cycle-by-cycle peak current limit to protect switching elements. Sustained current limit, for 32 consecutive fault CLK counts, initiates a fault condition. During an overload condition, as VOUT collapses to approximately VIN-1V, the synchronous rectifier is immediately switched off and a fault condition is declared. Automatic restart occurs once the overload/short is removed and the fault timer completes counting. © 2009 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.0.3 www.fairchildsemi.com 10 FAN4860 — 3MHz, 5V Output Synchronous TinyBoost™ Regulator To ensure that VOUT does not pump significantly above the regulation point, the boost switch remains off as long as FB > VREF. External Component Selection Table 3. Table 2 shows the recommended external components for the FAN4860: Table 2. Operating Conditions External Components REF Description Manufacturer L1 1.0µH, 0.8A, 190mΩ, 0805 Murata LQM21PN1R0MC0, or equivalent CIN 2.2µF, 6.3V, X5R, 0402 Murata GRM155R60J225M COUT 4.7µF, 10V, X5R, (3) 0603 Kemet C0603C475K8PAC Minimum CEFF Required for Stability CEFF(MIN) (μF) VIN (V) ILOAD (mA) 2.3 to 4.5 0 to 200 1.5 2.7 to 4.5 0 to 200 1.0 2.3 to 4.5 0 to 150 1.0 CEFF varies with manufacturer, dielectric material, case size, and temperature. Some manufacturers may be able to provide an X5R capacitor in 0402 case size that retains CEFF >1.5μF with 5V bias; others may not. If this CEFF cannot be economically obtained and 0402 case size is required, the IC can work with the 0402 capacitor as long as the minimum VIN is restricted to >2.7V. For best performance, a 10V-rated 0603 output capacitor is recommended (Kemet C0603C475K8PAC, or equivalent). Since it retains greater CEFF under bias and over temperature, ouptut ripple can is reduced and transient capability enhanced. TDK C1005X5R0J225M TDK C1608X5R1A475K Note: 3. A 6.3V-rated 0603 capacitor may be used for COUT, such as Murata GRM188R60J225M. All datasheet parameters are valid with the 6.3V-rated capacitor. Due to DC bias effects, the 10V capacitor offers a performance enhancement; particularly output ripple and transient response, without any size increase. Output Voltage Ripple Output Capacitance (COUT) Output voltage ripple is inversely proportional to COUT. During tON, when the boost switch is on, all load current is supplied by COUT. Stability The effective capacitance (CEFF) of small, high-value, ceramic capacitors decrease as their bias voltage increases, as shown in Figure 30. VRIPPLE(P −P) = t ON • ILOAD COUT EQ. 2 and ⎛ V t ON = t SW • D = t SW • ⎜⎜1 − IN V OUT ⎝ Therefore: ⎞ ⎟ ⎟ ⎠ ⎛ V VRIPPLE (P − P ) = t SW • ⎜⎜ 1 − IN V OUT ⎝ ⎞ ILOAD ⎟• ⎟ C OUT ⎠ EQ. 3 EQ. 4 where: t SW = 1 fSW EQ. 5 As can be seen from EQ. 4, the maximum VRIPPLE occurs when VIN is minimum and ILOAD is maximum. Startup Figure 30. CEFF for 4.7μF, 0603, X5R, 6.3V (Murata GRM188R60J475K) Input current limiting is in effect during soft-start, which limits the current available to charge COUT. If the output fails to achieve regulation within the time period described in the soft-start section above; a FAULT occurs, causing the circuit to shut down, then restart after a significant time period. If COUT is a very high value, the circuit may not start on the first attempt, but eventually achieves regulation if no load is present. If a high-current load and high capacitance are both present during soft-start, the circuit may fail to achieve FAN4860 is guaranteed for stable operation with the minimum value of CEFF (CEFF(MIN)) outlined in Table 3. © 2009 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.0.3 www.fairchildsemi.com 11 FAN4860 — 3MHz, 5V Output Synchronous TinyBoost™ Regulator Application Information I ⎛ ⎞ V IOUT = ⎜ ILIM(PK ) − RIPPLE ⎟ • IN 2 ⎠ VOUT ⎝ EQ. 6 Generally, the limitation occurs in BST mode. The FAN4860 starts on the first pass (without triggering a FAULT) under the following conditions for CEFF(MAX): Table 4. The maximum DC output current available is reduced with this circuit, due to the additional dissipation of D1. Maximum CEFF for First-Pass Startup Operating Conditions CEFF(MAX) (μF) VIN (V) RLOAD(MIN) 2.3 to 4.5 25Ω 10 2.7 to 4.5 25Ω 15 2.7 to 4.5 33Ω 22 Layout Guideline CEFF values shown in Table 4 typically apply to the lowest VIN. The presence of higher VIN enhances ability to start into larger CEFF at full load. Transient Protection To protect against external voltage transients caused by ESD discharge events, or improper external connections, some applications employ an external transient voltage suppressor (TVS) and Schottky diode (D1 in Figure 31). Figure 32 WLCSP Suggested Layout (Top View) Figure 31 FAN4860 with External Transient Protection The TVS is designed to clamp the FB line (system VOUT) to +10V or –2V during external transient events. The Schottky diode protects the output devices from the positive excursion. The FB pin can tolerate up to 14V of positive excursion, while both the FB and VOUT pins can tolerate negative voltages. The FAN4860 includes a circuit to detect a missing or defective D1 by comparing VOUT to FB. If VOUT – FB > about 0.7V, the IC shuts down. The IC remains shut down until VOUT < UVLO and VIN < UVLO+0.7 or EN is toggled. © 2009 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.0.3 Figure 33 UMLP Suggested Layout (Top View) www.fairchildsemi.com 12 FAN4860 — 3MHz, 5V Output Synchronous TinyBoost™ Regulator COUT2 may be necessary to preserve load transient response when the Schottky is used. When a load is applied at the FB pin, the forward voltage of the D1 rapidly increases before the regulator can respond or the inductor current can change. This causes an immediate drop of up to 300mV, depending on D1’s characteristics if COUT2 is absent. COUT2 supplies instantaneous current to the load while the regulator adjusts the inductor current. A value of at least half of the minimum value of COUT should be used for COUT2. COUT2 needs to withstand the maximum voltage at the FB pin as the TVS is clamping. regulation and continually attempt soft-start, only to have COUT discharged by the load when in the FAULT state. The circuit can start with higher values of COUT under full load if VIN is higher, since: FAN4860 — 3MHz, 5V Output Synchronous TinyBoost™ Regulator Physical Dimensions 0.03 C F E 2X A B BALL A1 INDEX AREA 0.40 A1 D (Ø0.20) Cu Pad 0.40 F (Ø0.30) Solder Mask Opening 0.03 C 2X TOP VIEW RECOMMENDED LAND PATTERN (NSMD PAD TYPE) 0.06 C 0.625 0.547 0.05 C 0.378±0.018 0.208±0.021 E SEATING PLANE C D SIDE VIEWS Ø0.260±0.010 6X 0.40 0.005 C A B A. NO JEDEC REGISTRATION APPLIES. B. DIMENSIONS ARE IN MILLIMETERS. C B A 0.40 NOTES: C. DIMENSIONS AND TOLERANCES PER ASMEY14.5M, 1994. (Y) +/-0.018 D. DATUM C, THE SEATING PLANE IS DEFINED BY THE SPHERICAL CROWNS OF THE BALLS. F 1 2 (X) +/-0.018 E. PACKAGE TYPICAL HEIGHT IS 586 MICRONS ±39 MICRONS (547-625 MICRONS). BOTTOM VIEW F. FOR DIMENSIONS D, E, X, AND Y SEE PRODUCT DATASHEET. G. DRAWING FILENAME: UC006ACrev4. Figure 33. 6-Lead, 0.4mm Pitch, WLCSP Package Product-Specific Dimensions Product D E X Y FAN4860UC5X 1.230mm +/-0.030mm 0.880mm +/-0.030mm 0.240mm 0.215mm Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2009 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.0.3 www.fairchildsemi.com 13 0.10 C A 2.0 2X B 1.45 2.0 PIN1 IDENT (0.25) 0.10 C 0.80 1.80 2X 6X 0.50 TOP VIEW 6X 0.35 0.55 MAX 0.65 A 0.10 C RECOMMENDED LAND PATTERN (0.15) 0.08 C 0.05 0.00 C SEATING PLANE SIDE VIEW NOTES: A. PACKAGE CONFORMS TO JEDEC MO-229 EXCEPT WHERE NOTED. 1.35 1.45 PIN1 IDENT 1 3 B. DIMENSIONS ARE IN MILLIMETERS. 6X 0.35 0.25 0.10 C A B 0.05 C C. DIMENSIONS AND TOLERANCES PER ASME Y14.5M, 1994. 0.70 0.80 6 D. LANDPATTERN RECOMMENDATION IS BASED ON FSC DESIGN ONLY. E. DRAWING FILENAME: MKT-UMLP06Erev2. 4 0.65 0.35 6X 0.25 BOTTOM VIEW Figure 34. 6-Lead UMLP Package Package drawings are provided as a service to customers considering Fairchild components. Drawings may change in any manner without notice. Please note the revision and/or date on the drawing and contact a Fairchild Semiconductor representative to verify or obtain the most recent revision. Package specifications do not expand the terms of Fairchild’s worldwide terms and conditions, specifically the warranty therein, which covers Fairchild products. Always visit Fairchild Semiconductor’s online packaging area for the most recent package drawings: http://www.fairchildsemi.com/packaging/. © 2009 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.0.3 www.fairchildsemi.com 14 FAN4860 — 3MHz, 5V Output Synchronous TinyBoost™ Regulator Physical Dimensions FAN4860 — 3MHz, 5V Output Synchronous TinyBoost™ Regulator © 2009 Fairchild Semiconductor Corporation FAN4860 • Rev. 1.0.3 www.fairchildsemi.com 15