NDF60N360U1, NDD60N360U1 N-Channel Power MOSFET 600 V, 360 mW Features http://onsemi.com • 100% Avalanche Tested • These Devices are Pb-Free, Halogen Free/BFR Free and are RoHS Compliant ABSOLUTE MAXIMUM RATINGS (TJ = 25°C unless otherwise noted) Parameter Symbol NDF NDD VDSS 600 V Gate−to−Source Voltage VGS ±25 V Steady State Power Dissipation – RqJC Steady State TC = 25°C ID 13 (Note 1) 11 8.1 (Note 1) 6.9 PD 30 114 IDM 51 TC = 100°C Pulsed Drain Current TC = 25°C tp = 10 ms Operating Junction and Storage Temperature TJ, TSTG 600 V 360 mW @ 10 V N−Channel MOSFET D (2) A G (1) W S (3) 44 A −55 to +150 °C 13 A Source Current (Body Diode) IS Single Pulse Drain−to−Source Avalanche Energy EAS RMS Isolation Voltage (t = 0.3 sec., R.H. ≤ 30%, TA = 25°C) (Figure 15) VISO Peak Diode Recovery (Note 2) dv/dt 15 V/ns Lead Temperature for Soldering Leads TL 260 °C 11 64 4500 mJ − 4 1 1 2 3 TO−220FP CASE 221AH 2 3 IPAK CASE 369D V Stresses exceeding Maximum Ratings may damage the device. Maximum Ratings are stress ratings only. Functional operation above the Recommended Operating Conditions is not implied. Extended exposure to stresses above the Recommended Operating Conditions may affect device reliability. 1. Limited by maximum junction temperature 2. ISD ≤ 11 A, di/dt ≤ 400 A/ms, VDS peak ≤ V(BR)DSS, VDD = 80% V(BR)DSS 4 4 1 2 3 DPAK CASE 369C 1 2 3 IPAK CASE 369AD MARKING AND ORDERING INFORMATION See detailed ordering and shipping information in the package dimensions section on page 3 of this data sheet. THERMAL RESISTANCE Parameter Symbol Value Unit NDF60N360U1 NDD60N360U1 RqJC 4.1 1.1 °C/W Junction−to−Ambient Steady State (Note 3) NDF60N360U1 (Note 4) NDD60N360U1 (Note 3) NDD60N360U1−1 (Note 3) NDD60N360U1−35G RqJA Junction−to−Case (Drain) RDS(ON) MAX Unit Drain−to−Source Voltage Continuous Drain Current RqJC V(BR)DSS °C/W 50 47 98 95 3. Insertion mounted 4. Surface mounted on FR4 board using 1″ sq. pad size (Cu area = 1.127 in sq [2 oz] including traces) © Semiconductor Components Industries, LLC, 2013 May, 2013 − Rev. 0 1 Publication Order Number: NDF60N360U1/D NDF60N360U1, NDD60N360U1 ELECTRICAL CHARACTERISTICS (TJ = 25°C unless otherwise noted) Symbol Test Conditions Min Drain−to−Source Breakdown Voltage V(BR)DSS VGS = 0 V, ID = 1 mA 600 Drain−to−Source Breakdown Voltage Temperature Coefficient V(BR)DSS/TJ Reference to 25°C, ID = 1 mA Characteristic Typ Max Unit OFF CHARACTERISTICS Drain−to−Source Leakage Current Gate−to−Source Leakage Current IDSS VDS = 600 V, VGS = 0 V IGSS V 560 mV/°C TJ = 25°C 1 TJ = 125°C 100 VGS = ±25 V ±100 mA nA ON CHARACTERISTICS (Note 5) Gate Threshold Voltage Negative Threshold Temperature Coefficient Static Drain-to-Source On Resistance Forward Transconductance VGS(TH) VDS = VGS, ID = 250 mA VGS(TH)/TJ Reference to 25°C, ID = 250 mA 2 3.2 8.6 4 V RDS(on) VGS = 10 V, ID = 5.5 A 320 gFS VDS = 15 V, ID = 5.5 A 10 S 790 pF mV/°C 360 mW DYNAMIC CHARACTERISTICS Input Capacitance Ciss Output Capacitance Coss Reverse Transfer Capacitance Crss Effective output capacitance, energy related (Note 7) Co(er) Effective output capacitance, time related (Note 8) Co(tr) VDS = 50 V, VGS = 0 V, f = 1 MHz 47 3.0 VGS = 0 V, VDS = 0 to 480 V ID = constant, VGS = 0 V, VDS = 0 to 480 V 38.9 135 nC Total Gate Charge Qg 26 Gate-to-Source Charge Qgs 4.7 Gate-to-Drain Charge Qgd Plateau Voltage VGP 5.6 V Gate Resistance Rg 4.5 W 10 ns VDS = 300 V, ID = 13 A, VGS = 10 V 12.9 RESISTIVE SWITCHING CHARACTERISTICS (Note 6) Turn-on Delay Time Rise Time Turn-off Delay Time Fall Time td(on) tr td(off) VDD = 300 V, ID = 13 A, VGS = 10 V, RG = 0 W tf 20 26 22 SOURCE−DRAIN DIODE CHARACTERISTICS Diode Forward Voltage VSD Reverse Recovery Time trr Charge Time ta Discharge Time tb Reverse Recovery Charge Qrr 5. 6. 7. 8. IS = 13 A, VGS = 0 V TJ = 25°C 0.93 TJ = 100°C 0.86 303 VGS = 0 V, VDD = 30 V IS = 13 A, di/dt = 100 A/ms ns 97 Pulse Width ≤ 300 ms, Duty Cycle ≤ 2%. Switching characteristics are independent of operating junction temperatures. Co(er) is a fixed capacitance that gives the same stored energy as Coss while VDS is rising from 0 to 80% V(BR)DSS Co(tr) is a fixed capacitance that gives the same charging time as Coss while VDS is rising from 0 to 80% V(BR)DSS 2 V 206 3.6 http://onsemi.com 1.6 mC NDF60N360U1, NDD60N360U1 MARKING DIAGRAMS 1 2 3 Gate Drain Source IPAK 4 Drain YWW 60N 360U1G 4 Drain YWW 60N 360U1G YWW 60N 360U1G 4 Drain 1 2 3 Gate Drain Source 2 1 Drain 3 Gate Source IPAK DPAK A Y WW G 60N360U1G AYWW Gate Source Drain TO−220FP = Assembly Location = Year = Work Week = Pb−Free Package ORDERING INFORMATION Package Shipping† NDF60N360U1G TO−220FP (Pb-Free, Halogen-Free) 50 Units / Rail (In Development) NDD60N360U1−1G IPAK (Pb-Free, Halogen-Free) 75 Units / Rail NDD60N360U1−35G IPAK (Pb-Free, Halogen-Free) 75 Units / Rail NDD60N360U1T4G DPAK (Pb-Free, Halogen-Free) 2500 / Tape & Reel Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. http://onsemi.com 3 NDF60N360U1, NDD60N360U1 TYPICAL CHARACTERISTICS ID, DRAIN CURRENT (A) VGS = 10 V to 6.5 V VGS = 6.0 V VGS = 5.5 V VGS = 5.0 V VGS = 4.5 V VGS = 4.0 V 5 10 15 20 25 30 0.65 0.60 0.55 0.50 0.45 0.40 0.35 5 6 7 8 9 10 VGS, GATE VOLTAGE (V) Figure 3. On−Resistance vs. Gate−to−Source Voltage RDS(on), NORMALIZED DRAIN−TO− SOURCE RESISTANCE 2.7 2.3 ID = 5.5 A VGS = 10 V 2.1 1.9 1.7 1.5 1.3 1.1 0.9 0.7 0.5 −50 VDS = 15 V TJ = 150°C 0 2 4 6 8 10 Figure 2. Transfer Characteristics TJ = 25°C ID = 5.5 A 2.5 TJ = 25°C Figure 1. On−Region Characteristics 0.70 4 TJ = −55°C VGS, GATE−TO−SOURCE VOLTAGE (V) 0.75 0.30 0.25 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 0 VDS, DRAIN−TO−SOURCE VOLTAGE (V) RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) 0 −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) 150 BVDSS, NORMALIZED BREAKDOWN VOLTAGE RDS(on), DRAIN−TO−SOURCE RESISTANCE (W) ID, DRAIN CURRENT (A) 30 28 26 24 22 20 18 16 14 12 10 8 6 4 2 0 0.75 0.70 TJ = 25°C VGS = 10 V 0.65 0.60 0.55 0.50 0.45 0.40 0.35 0.30 0.25 0 2 4 6 8 10 12 14 16 18 20 22 24 26 28 30 ID, DRAIN CURRENT (A) Figure 4. On−Resistance vs. Drain Current and Gate Voltage 1.125 1.100 ID = 1 mA 1.075 1.050 1.025 1.000 0.975 0.950 0.925 −50 Figure 5. On−Resistance Variation with Temperature −25 0 25 50 75 100 125 TJ, JUNCTION TEMPERATURE (°C) Figure 6. Breakdown Voltage Variation with Temperature http://onsemi.com 4 150 NDF60N360U1, NDD60N360U1 1.15 100,000 ID = 250 mA IDSS, LEAKAGE (nA) 1.05 1.00 0.95 0.90 0.85 0.80 0.70 0.65 −50 −25 0 25 50 75 100 100 TJ = 100°C 0 100 200 300 400 500 Figure 7. Threshold Voltage Variation with Temperature Figure 8. Drain−to−Source Leakage Current vs. Voltage COSS VGS = 0 V TJ = 25°C f = 1 MHz 100 10 0.1 14 350 QT 12 300 10 CRSS 1 10 100 1000 250 VDS 8 VGS QGS 150 4 100 VDS = 300 V TJ = 25°C ID = 13 A 2 0 200 QGD 6 0 4 8 12 16 20 24 50 28 0 VDS, DRAIN−TO−SOURCE VOLTAGE (V) QG, TOTAL GATE CHARGE (nC) Figure 9. Capacitance Variation Figure 10. Gate−to−Source and Drain−to−Source Voltage vs. Total Charge 1000 100 VGS = 10 V VDD = 300 V td(off) 10 t, TIME (ns) TJ = 150°C TJ = 125°C TJ = 100°C TJ = 25°C 1 0.1 600 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 1000 1 10 TJ, JUNCTION TEMPERATURE (°C) CISS IS, SOURCE CURRENT (A) TJ = 125°C 150 125 TJ = 150°C 1000 0.75 10,000 C, CAPACITANCE (pF) 10,000 VDS, DRAIN−TO−SOURCE VOLTAGE (V) 1.10 VGS, GATE−TO−SOURCE VOLTAGE (V) VGS(th), NORMALIZED THRESHOLD VOLTAGE TYPICAL CHARACTERISTICS TJ = −55°C 0.4 0.5 0.6 0.7 0.8 0.9 1.0 1.1 100 tr td(on) 10 1 1.2 tf 0.1 1 10 100 VSD, SOURCE−TO−DRAIN VOLTAGE (V) RG, GATE RESISTANCE (W) Figure 11. Diode Forward Voltage vs. Current Figure 12. Resistive Switching Time Variation vs. Gate Resistance http://onsemi.com 5 NDF60N360U1, NDD60N360U1 TYPICAL CHARACTERISTICS ID, DRAIN CURRENT (A) 100 VGS ≤ 25 V Single Pulse TC = 25°C 10 10 ms 100 ms 1 1 ms 10 ms dc 0.1 0.01 RDS(on) Limit Thermal Limit Package Limit 0.1 1 10 100 1000 R(t), EFFECTIVE TRANSIENT THERMAL RESPONSE VDS, DRAIN−TO−SOURCE VOLTAGE (V) Figure 13. Maximum Rated Forward Biased Safe Operating Area NDD60N360U1 10 1 0.1 RqJC steady state = 1.1°C/W Duty Cycle = 0.5 0.20 0.10 0.05 0.02 Single Pulse 0.01 0.001 0.01 1E−06 1E−05 1E−04 1E−03 1E−02 1E−01 1E+00 1E+01 t, TIME (s) Figure 14. Thermal Impedance (Junction−to−Case) for NDD60N360U1 Leads Heatsink 0.130″ Min Figure 15. Mounting Position for Isolation Test Measurement made between leads and heatsink with all leads shorted together. *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. http://onsemi.com 6 1E+02 1E+03 NDF60N360U1, NDD60N360U1 PACKAGE DIMENSIONS TO−220 FULLPACK, 3−LEAD CASE 221AH ISSUE E A E B P E/2 0.14 Q D B A M M A H1 A1 C NOTE 3 1 2 3 L b2 c b 0.25 M B A M C NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS. 3. CONTOUR UNCONTROLLED IN THIS AREA. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH AND GATE PROTRUSIONS. MOLD FLASH AND GATE PROTRUSIONS NOT TO EXCEED 0.13 PER SIDE. THESE DIMENSIONS ARE TO BE MEASURED AT OUTERMOST EXTREME OF THE PLASTIC BODY. 5. DIMENSION b2 DOES NOT INCLUDE DAMBAR PROTRUSION. LEAD WIDTH INCLUDING PROTRUSION SHALL NOT EXCEED 2.00. DIM A A1 A2 b b2 c D E e H1 L L1 P Q L1 3X 3X SEATING PLANE A2 e MILLIMETERS MIN MAX 4.30 4.70 2.50 2.90 2.50 2.90 0.54 0.84 1.10 1.40 0.49 0.79 14.70 15.30 9.70 10.30 2.54 BSC 6.70 7.10 12.70 14.73 --2.10 3.00 3.40 2.80 3.20 IPAK CASE 369D−01 ISSUE C C B V NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. E R 4 Z A S 1 2 3 −T− SEATING PLANE K J F D G H 3 PL 0.13 (0.005) M DIM A B C D E F G H J K R S V Z INCHES MIN MAX 0.235 0.245 0.250 0.265 0.086 0.094 0.027 0.035 0.018 0.023 0.037 0.045 0.090 BSC 0.034 0.040 0.018 0.023 0.350 0.380 0.180 0.215 0.025 0.040 0.035 0.050 0.155 −−− STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN T http://onsemi.com 7 MILLIMETERS MIN MAX 5.97 6.35 6.35 6.73 2.19 2.38 0.69 0.88 0.46 0.58 0.94 1.14 2.29 BSC 0.87 1.01 0.46 0.58 8.89 9.65 4.45 5.45 0.63 1.01 0.89 1.27 3.93 −−− NDF60N360U1, NDD60N360U1 PACKAGE DIMENSIONS 3.5 MM IPAK, STRAIGHT LEAD CASE 369AD ISSUE B E E3 L2 E2 A1 D2 D L1 L T SEATING PLANE A A1 b1 2X e A2 3X E2 b 0.13 M T D2 OPTIONAL CONSTRUCTION http://onsemi.com 8 NOTES: 1.. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2.. CONTROLLING DIMENSION: MILLIMETERS. 3. DIMENSION b APPLIES TO PLATED TERMINAL AND IS MEASURED BETWEEN 0.15 AND 0.30mm FROM TERMINAL TIP. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD GATE OR MOLD FLASH. DIM A A1 A2 b b1 D D2 E E2 E3 e L L1 L2 MILLIMETERS MIN MAX 2.19 2.38 0.46 0.60 0.87 1.10 0.69 0.89 0.77 1.10 5.97 6.22 4.80 −−− 6.35 6.73 4.57 5.45 4.45 5.46 2.28 BSC 3.40 3.60 −−− 2.10 0.89 1.27 STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN NDF60N360U1, NDD60N360U1 PACKAGE DIMENSIONS DPAK (SINGLE GAUGE) CASE 369C−01 ISSUE D A E b3 c2 B Z D 1 L4 A 4 L3 b2 e 2 NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: INCHES. 3. THERMAL PAD CONTOUR OPTIONAL WITHIN DIMENSIONS b3, L3 and Z. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR BURRS. MOLD FLASH, PROTRUSIONS, OR GATE BURRS SHALL NOT EXCEED 0.006 INCHES PER SIDE. 5. DIMENSIONS D AND E ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY. 6. DATUMS A AND B ARE DETERMINED AT DATUM PLANE H. C H DETAIL A 3 c b 0.005 (0.13) H C M L2 GAUGE PLANE C L SEATING PLANE A1 L1 DETAIL A ROTATED 905 CW 2.58 0.102 5.80 0.228 3.00 0.118 1.60 0.063 MILLIMETERS MIN MAX 2.18 2.38 0.00 0.13 0.63 0.89 0.76 1.14 4.57 5.46 0.46 0.61 0.46 0.61 5.97 6.22 6.35 6.73 2.29 BSC 9.40 10.41 1.40 1.78 2.74 REF 0.51 BSC 0.89 1.27 −−− 1.01 3.93 −−− STYLE 2: PIN 1. GATE 2. DRAIN 3. SOURCE 4. DRAIN SOLDERING FOOTPRINT* 6.20 0.244 INCHES MIN MAX 0.086 0.094 0.000 0.005 0.025 0.035 0.030 0.045 0.180 0.215 0.018 0.024 0.018 0.024 0.235 0.245 0.250 0.265 0.090 BSC 0.370 0.410 0.055 0.070 0.108 REF 0.020 BSC 0.035 0.050 −−− 0.040 0.155 −−− DIM A A1 b b2 b3 c c2 D E e H L L1 L2 L3 L4 Z 6.17 0.243 SCALE 3:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and are registered trademarks of Semiconductor Components Industries, LLC (SCILLC). SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. 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