LINER LT6119-1 Current sense amplifier Datasheet

LT6119-1/LT6119-2
Current Sense Amplifier,
Reference and Comparators
with POR
Description
Features
n
n
n
n
n
n
n
Current Sense Amplifier
– Fast Step Response: 500ns
– Low Offset Voltage: 200µV Maximum
– Low Gain Error: 0.2% Maximum
Internal 400mV Precision Reference
Internal Latching Comparators
– Power-On Reset Capability
– Fast Response Time: 500ns
– Total Threshold Error: ±1.25% Maximum
– Two Comparator Polarity Options
Wide Supply Range: 2.7V to 60V
Supply Current: 550µA
Specified for –40°C to 125°C Temperature Range
Available in 10-Lead MSOP Package
The LT®6119 is a complete high side current sense device
that incorporates a precision current sense amplifier, an
integrated voltage reference and two latching comparators.
Two versions of the LT6119 are available. The LT6119-1
has the comparators connected in opposing polarity and
the LT6119-2 has the comparators connected in the same
polarity. The comparator latch functionality can be enabled
or disabled and the comparators can be configured to reset
upon power-on. The input and the open-drain outputs of
the comparators are independent from the current sense
amplifier. The comparator trip points and amplifier gain
are configured with external resistors.
The overall propagation delay of the LT6119 is typically
only 1.4µs, allowing for quick reaction to overcurrent and
undercurrent conditions. The 1MHz bandwidth allows the
LT6119 to be used for error detection in critical applications such as motor control. The high threshold accuracy
of the comparators, combined with the ability to latch
both comparators, ensures the LT6119 can capture high
speed events.
Applications
n
n
n
n
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Overcurrent, Undercurrent and Fault Detection
Current Shunt Measurement
Battery Monitoring
Motor Control
Automotive Monitoring and Control
Industrial Control
L, LT, LTC, LTM, TimerBlox, Linear Technology and the Linear logo are registered trademarks of
Linear Technology Corporation. All other trademarks are the property of their respective owners.
The LT6119 is fully specified for operation from –40°C
to 125°C, making it suitable for industrial and automotive applications. The LT6119 is available in a small
10-lead MSOP.
Typical Application
Response to Overcurrent Event
Fast Acting Fault Protection with Power-On Reset and Early Warning
0.1Ω
12V
6.2V*
1k
3.3V
10k
1.62k
24.9k
SENSEHI SENSELO
V+
100k
LE
*CMH25234B
250mA DISCONNECT
VOUT
OUTA
LT6119-2
100nF
100mA WARNING
TO LOAD
0.1µF
100Ω
1k
2N2700
IRF9640
6.04k
INC2
2.37k
OUTC2
OUTC1
V–
INC1
1.6k
611912 TA01a
VLOAD
10V/DIV
0V
ILOAD
200mA/DIV
0mA
VOUTC1
5V/DIV 0V
VOUTC2
5V/DIV 0V
250mA DISCONNECT
100mA WARNING
5µs/DIV
611912 TA01b
611912f
For more information www.linear.com/LT6119-1
1
LT6119-1/LT6119-2
Absolute Maximum Ratings
(Note 1)
Pin Configuration
Total Supply Voltage (V+ to V–)..................................60V
Maximum Voltage
(SENSELO, SENSEHI, OUTA)................................ V+ + 1V
Maximum V+ – (SENSELO or SENSEHI).....................33V
Maximum LE Voltage.................................................60V
Maximum Comparator Input Voltage.........................60V
Maximum Comparator Output Voltage......................60V
Input Current (Note 2)...........................................–10mA
SENSEHI, SENSELO Input Current........................ ±10mA
Differential SENSEHI or SENSELO Input Current....±2.5mA
Amplifier Output Short-Circuit Duration (to V–)... Indefinite
Operating Temperature Range (Note 3)
LT6119I.................................................–40°C to 85°C
LT6119H.............................................. –40°C to 125°C
Specified Temperature Range (Note 3)
LT6119I.................................................–40°C to 85°C
LT6119H.............................................. –40°C to 125°C
Maximum Junction Temperature........................... 150°C
Storage Temperature Range................... –65°C to 150°C
Lead Temperature (Soldering, 10 sec).................... 300°C
TOP VIEW
SENSELO
LE
OUTC2
OUTC1
V–
1
2
3
4
5
10
9
8
7
6
SENSEHI
V+
OUTA
INC2
INC1
MS PACKAGE
10-LEAD PLASTIC MSOP
θJA = 160°C/W, θJC = 45°C/W
Order Information
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
SPECIFIED TEMPERATURE RANGE
LT6119IMS-1#PBF
LT6119IMS-1#TRPBF
LTGNV
10-Lead Plastic MSOP
–40°C to 85°C
LT6119HMS-1#PBF
LT6119HMS-1#TRPBF
LTGNV
10-Lead Plastic MSOP
–40°C to 125°C
LT6119IMS-2#PBF
LT6119IMS-2#TRPBF
LTGNW
10-Lead Plastic MSOP
–40°C to 85°C
LT6119HMS-2#PBF
LT6119HMS-2#TRPBF
LTGNW
10-Lead Plastic MSOP
–40°C to 125°C
Consult LTC Marketing for parts specified with wider operating temperature ranges. *The temperature grade is identified by a label on the shipping container.
Consult LTC Marketing for information on non-standard lead based finish parts.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
611912f
2
For more information www.linear.com/LT6119-1
LT6119-1/LT6119-2
Electrical Characteristics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 12V, VPULLUP = V+, VLE = 2.7V, RIN = 100Ω,
ROUT = R1 + R2 + R3 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless otherwise noted. (See Figure 3)
SYMBOL
PARAMETER
V+
Supply Voltage Range
IS
Supply Current (Note 4)
CONDITIONS
MIN
l
TYP
2.7
V+ = 2.7V, RIN = 1k, VSENSE = 5mV
V+ = 60V, RIN = 1k, VSENSE = 5mV
VIL
LE Pin Current
VLE = 0V, V+ = 60V
LE Pin Input High
V+ = 2.7V to 60V
l
LE Pin Input Low
V+ = 2.7V to 60V
l
VSENSE = 5mV
VSENSE = 5mV
l
l
UNITS
60
V
700
1000
µA
µA
475
600
l
VIH
MAX
µA
–100
nA
1.5
V
0.5
V
200
300
µV
µV
Current Sense Amplifier
VOS
Input Offset Voltage
∆VOS/∆T
Input Offset Voltage Drift
VSENSE = 5mV
IB
Input Bias Current
(SENSELO, SENSEHI)
V+ = 2.7V to 60V
IOS
Input Offset Current
V+ = 2.7V to 60V
IOUTA
Output Current (Note 5)
PSRR
Power Supply Rejection Ratio
(Note 6)
V+ = 2.7V to 60V
Common Mode Rejection Ratio
V+ = 36V, VSENSE = 5mV, VICM = 2.7V to 36V
CMRR
–200
–300
±0.8
60
l
±5
l
1
l
120
114
V+ = 60V, V
SENSE = 5mV, VICM = 27V to 60V
l
110
103
RIN = 500Ω
l
500
V+ = 2.7V to 12V
V+ = 12V to 60V, VSENSE = 5mV to 100mV
l
–0.2
SENSELO Voltage (Note 8)
V+ = 2.7V, VSENSE = 100mV, ROUT = 2k
V+ = 60V, VSENSE = 100mV
l
l
2.5
27
Output Swing High (V+ to VOUTA)
V+ = 2.7V, VSENSE = 27mV
l
V+ = 12V, V
l
VSENSE(MAX) Full-Scale Input Sense Voltage
(Note 5)
Gain Error (Note 7)
SENSE = 120mV
µV/°C
300
350
nA
nA
nA
mA
127
dB
dB
125
dB
125
dB
dB
mV
–0.08
0
%
%
V
V
0.2
0.5
V
V
BW
Signal Bandwidth
IOUT = 1mA
IOUT = 100µA
1
140
MHz
kHz
tr
Input Step Response (to 50% of
Final Output Voltage)
V+ = 2.7V, VSENSE = 24mV Step, Output Rising Edge
V+ = 12V to 60V, VSENSE = 100mV Step, Output Rising Edge
500
500
ns
ns
tSETTLE
Settling Time to 1%
VSENSE = 10mV to 100mV, ROUT = 2k
2
µs
Reference and Comparator
VTH(R)
(Note 9)
Rising Input Threshold Voltage
(LT6119-1 Comparator 1
LT6119-2 Both Comparators)
V+ = 2.7V to 60V
l
395
400
405
mV
VTH(F)
(Note 9)
Falling Input Threshold Voltage
(LT6119-1 Comparator 2)
V+ = 2.7V to 60V
l
395
400
405
mV
VHYS
VHYS = VTH(R) – VTH(F)
V+ = 2.7V to 60V
3
10
15
mV
Comparator Input Bias Current
VOL
Output Low Voltage
VINC1,2
= 0V, V+ = 60V
IOUTC1,C2
l
= 500µA, V+ = 2.7V
–50
nA
60
l
High to Low Propagation Delay
5mV Overdrive
100mV Overdrive
3
0.5
150
220
mV
mV
µs
µs
611912f
For more information www.linear.com/LT6119-1
3
LT6119-1/LT6119-2
Electrical Characteristics
The l denotes the specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. V+ = 12V, VPULLUP = V+, VLE = 2.7V, RIN = 100Ω,
ROUT = R1 + R2 + R3 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless otherwise noted. (See Figure 3)
SYMBOL
PARAMETER
CONDITIONS
MIN
Output Fall Time
tRESET
Reset Time
tRPW
Minimum LE Reset Pulse Width
TYP
0.08
0.5
l
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: Input and output pins have ESD diodes connected to ground. The
SENSEHI and SENSELO pins have additional current handling capability
specified as SENSEHI, SENSELO input current.
Note 3: The LT6119I is guaranteed to meet specified performance from
–40°C to 85°C. LT6119H is guaranteed to meet specified performance
from –40°C to 125°C.
Note 4: Supply current is specified with the comparator outputs high.
When the comparator outputs go low the supply current will increase by
75µA typically per comparator.
2
MAX
UNITS
µs
µs
µs
Note 5: The full-scale input sense voltage and the maximum output
current must be considered to achieve the specified performance.
Note 6: Supply voltage and input common mode voltage are varied while
amplifier input offset voltage is monitored.
Note 7: Specified gain error does not include the effects of external
resistors RIN and ROUT. Although gain error is only guaranteed between
12V and 60V, similar performance is expected for V+ < 12V, as well.
Note 8: Refer to SENSELO, SENSEHI Range in the Applications
Information section for more information.
Note 9: The input threshold voltage which causes the output voltage of the
comparator to transition from high to low is specified. The input voltage
which causes the comparator output to transition from low to high is
the magnitude of the difference between the specified threshold and the
hysteresis.
611912f
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For more information www.linear.com/LT6119-1
LT6119-1/LT6119-2
Typical
Performance
Characteristics Performance characteristics taken at TA = 25°C,
+
+
V = 12V, VPULLUP = V , VLE = 2.7V, RIN = 100Ω, ROUT = R1 + R2 + R3 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless otherwise
noted. (See Figure 3)
Supply Current vs Supply Voltage
Input Offset Voltage
vs Temperature
Start-Up Supply Current
300
700
500
0V
400
300
200
IS
500µA/DIV
100
0µA
0
0
10
40
30
20
SUPPLY VOLTAGE (V)
50
100
100
0
–200
10µs/DIV
–300
–40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
611912 G03
611912 G02
611912 G01
Amplifier Gain Error
vs Temperature
Offset Voltage Drift Distribution
12
5 TYPICAL UNITS
80
200
–100
60
Amplifier Offset Voltage
vs Supply Voltage
PERCENTAGE OF UNITS (%)
60
OFFSET VOLTAGE (µV)
INPUT OFFSET VOLTAGE (µV)
V+
5V/DIV
40
20
0
–20
–40
–60
5 TYPICAL UNITS
0.05
10
VSENSE = 5mV TO 100mV
0
8
RIN = 1k
GAIN ERROR (%)
SUPPLY CURRENT (µA)
600
–0.05
6
RIN = 100Ω
–0.10
4
–0.15
2
–80
10
30
40
20
SUPPLY VOLTAGE (V)
50
60
611912 G04
0
–2 –1.5 –1 –0.5 0 0.5 1 1.5 2
OFFSET VOLTAGE DRIFT (µV/°C)
–25
611912 G05
50
0
75
25
TEMPERATURE (°C)
100
125
611912 G06
Amplifier Output Swing
vs Temperature
Amplifier Gain Error Distribution
25
–0.20
–50
0.50
VSENSE = 5mV TO 100mV
0.45
0.40
20
V+ = 12V
VSENSE = 120mV
0.35
V+ – VOUTA (V)
0
PERCENTAGE OF UNITS (%)
–100
0.30
15
0.25
0.20
10
V+ = 2.7V
VSENSE = 27mV
0.15
0.10
5
0.05
0
–0.048 –0.052 –0.056 –0.060 –0.064 –0.68
GAIN ERROR (%)
0
–50
–25
611912 G07
50
25
0
75
TEMPERATURE (°C)
100
125
611912 G08
611912f
For more information www.linear.com/LT6119-1
5
LT6119-1/LT6119-2
Typical
Performance
Characteristics Performance characteristics taken at TA = 25°C,
+
+
V = 12V, VPULLUP = V , VLE = 2.7V, RIN = 100Ω, ROUT = R1 + R2 + R3 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless otherwise
noted. (See Figure 3)
Common Mode Rejection Ratio
vs Frequency
Power Supply Rejection Ratio
vs Frequency
120
100
80
60
40
20
1
10
100 1k 10k 100k
FREQUENCY (Hz)
1M
120
100
80
60
28
G = 20, ROUT = 2k
22
20
611912 G09
1
10
100 1k 10k 100k
FREQUENCY (Hz)
1M
10M
16
611912 G10
IOUTA = 1mA
IOUTA = 100µA
1k
10k
100k
1M
FREQUENCY (Hz)
100
VSENSE
100mV/DIV
0V
RIN = 100Ω
G = 100V/V
INPUT BIAS CURRENT (nA)
90
VOUTA
1V/DIV
0V
VOUTC1
2V/DIV
0V
ROUT = 2k,100mV INC1 OVERDRIVE
2µs/DIV
611912 G12
80
70
SENSEHI
60
50
SENSELO
40
30
VOUTA
2V/DIV
0V
20
VSENSE
50mV/DIV
10
0V
0
–40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
611912 G13
Amplifier Step Response
(VSENSE = 10mV to 100mV)
2µs/DIV
RIN = 100Ω
G = 100V/V
611912 G14
Amplifier Step Response
(VSENSE = 10mV to 100mV)
Amplifier Step Response
(VSENSE = 0mV to 100mV)
VOUTA
2V/DIV
10M
611912 G11
Amplifier Step Response
(VSENSE = 0mV to 100mV)
Amplifier Input Bias Current
vs Temperature
System Step Response
VLE
5V/DIV
0V
G = 50, ROUT = 5k
34
40
0
10M
G = 100
40
GAIN (dB)
COMMON MODE REJECTION RATIO (dB)
POWER SUPPLY REJECTION RATIO (dB)
140
0
Amplifier Gain vs Frequency
46
140
160
RIN = 1k
ROUT = 20k
G = 20V/V
RIN = 1k
ROUT = 20k
G = 20V/V
VOUTA
1V/DIV
VOUTA
1V/DIV
0V
0V
VSENSE
100mV/DIV
0V
VSENSE
100mV/DIV
0V
0V
VSENSE
50mV/DIV
0V
2µs/DIV
2µs/DIV
2µs/DIV
611912 G15
611912 G17
611912 G16
611912f
6
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LT6119-1/LT6119-2
Typical
Performance
Characteristics Performance characteristics taken at TA = 25°C,
+
+
V = 12V, VPULLUP = V , VLE = 2.7V, RIN = 100Ω, ROUT = R1 + R2 + R3 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless otherwise
noted. (See Figure 3)
Comparator Threshold
vs Temperature
Comparator Threshold
Distribution
408
20
15
10
5
396
397.6 399.2 400.8 402.8
COMPARATOR THRESHOLD (mV)
402
400
398
396
394
14
14
12
10
8
6
4
5 TYPICAL PARTS
5
4
–50
–75
0
10
20
30
V+ (V)
40
60
50
–125
COMPARATOR INPUT BIAS CURRENT (nA)
0
–5
–10
125°C
25°C
–40°C
1.00
60
611912 G24
0
–5
–10
–20
125°C
25°C
–40°C
0
0.2
0.4
0.6
0.8
COMPARATOR INPUT VOLTAGE (V)
20
30
40
LE VOLTAGE (V)
50
60
611912 G23
125°C
25°C
–40°C
5
–15
10
Comparator Output Low Voltage
vs Output Sink Current
10
5
0
611912 G22
Comparator Input Bias Current
vs Input Voltage
10
20
40
COMPARATOR INPUT VOLTAGE (V)
–25
–100
2
0
V+ = 12V
0
6
Comparator Input Bias Current
vs Input Voltage
0
10
LE Current vs Voltage
8
0
–40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
611912 G21
–15
15
25
10
2
125°C
610912 G20
LE CURRENT (nA)
16
25°C
0
3.0 4.6 6.2 7.7 9.3 10.9 12.5 14.1 15.7 17.3
COMPARATOR HYSTERESIS (mV)
12
COMPARATOR HYSTERESIS (mV)
COMPARATOR HYSTERESIS (mV)
18
–40°C
20
Hysteresis vs Supply Voltage
Hysteresis vs Temperature
20
COMPARATOR INPUT BIAS CURRENT (nA)
25
404
392
–40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
611912 G19
404
611912 G18
–20
5 TYPICAL PARTS
406
VOLOUTC1, OUTC2 (V)
0
Hysteresis Distribution
30
PERCENTAGE OF UNITS (%)
COMPARATOR THRESHOLD (mV)
PERCENTAGE OF UNITS (%)
25
1.0
611912 G25
0.75
0.50
0.25
0
0
2
1
IOUTC (mA)
3
611912 G26
611912f
For more information www.linear.com/LT6119-1
7
LT6119-1/LT6119-2
Typical
Performance
Characteristics Performance characteristics taken at TA = 25°C,
+
+
V = 12V, VPULLUP = V , VLE = 2.7V, RIN = 100Ω, ROUT = R1 + R2 + R3 = 10k, gain = 100, RC = 25.5k, CL = CLC = 2pF, unless otherwise
noted. (See Figure 3)
5.0
18
125°C
13
8
–2
–40°C AND 25°C
0
50
60
20
30
40
10
COMPARATOR OUTPUT PULL-UP VOLTAGE (V)
10000
4.0
3.5
3.0
2.5
2.0
H TO L
1.5
1000
FALL TIME
100
L TO H
0.5
0
0
40
120
160
200
80
COMPARATOR INPUT OVERDRIVE (mV)
10
611912 G28
Comparator Step Response
(5mV INC1 Overdrive)
Comparator Step Response
(100mV INC1 Overdrive)
1
10
100
RC PULL-UP RESISTOR (kΩ)
1000
611912 G29
Comparator Reset Response
VINC
0.5V/DIV
0V
VOUTC
5V/DIV
0V
VOUTC
2V/DIV
VOUTC
2V/DIV
0V
RISE TIME
1.0
611912 G27
VINC
0.5V/DIV
0V
VOH = 0.9 • VPULLUP
VOL = 0.1 • VPULLUP
100mV INC1 OVERDRIVE
CL = 2pF
4.5
RISE/FALL TIME (ns)
COMPARATOR PROPAGATION DELAY (µs)
OUTC1, OUTC2 LEAKAGE CURRENT (nA)
23
3
Comparator Rise/Fall Time
vs Pull-Up Resistor
Comparator Propagation Delay
vs Input Overdrive
Comparator Output Leakage
Current vs Pull-Up Voltage
0V
VLE
5V/DIV
0V
VLE
2V/DIV
VLE
5V/DIV
0V
5µs/DIV
611912 G30
0V
5µs/DIV
611912 G31
5µs/DIV
611912 G32
611912f
8
For more information www.linear.com/LT6119-1
LT6119-1/LT6119-2
Pin Functions
SENSELO (Pin 1): Sense Amplifier Input. This pin must
be tied to the load end of the sense resistor.
LE (Pin 2): Latch Control Pin. When high, the comparator
latch is enabled. With the comparator latch enabled, the
comparator output will latch at a low level once tripped.
When the LE input is low, the comparator latch is disabled
and the comparator functions transparently.
OUTC2 (Pin 3): Open-Drain Comparator 2 Output. Offstate voltage may be as high as 60V above V–, regardless
of V+ used.
OUTC1 (Pin 4): Open-Drain Comparator 1 Output. Offstate voltage may be as high as 60V above V–, regardless
of V+ used.
V– (Pin 5): Negative Supply Pin. This pin is normally connected to ground.
INC1 (Pin 6): Inverting Input of Comparator 1. The second
input of this comparator is internally connected to the
400mV reference.
INC2 (Pin 7): Input of Comparator 2. For the LT6119-1
this is the noninverting input of comparator 2. For the
LT6119-2 this is the inverting input of comparator 2. The
second input of each of these comparators is internally
connected to the 400mV reference.
OUTA (Pin 8): Current Output of the Sense Amplifier. This
pin will source a current that is equal to the sense voltage
divided by the external gain setting resistor, RIN.
V+ (Pin 9): Positive Supply Pin. The V+ pin can be connected directly to either side of the sense resistor, RSENSE.
When V+ is tied to the load end of the sense resistor, the
SENSEHI pin can go up to 0.2V above V+. Supply current
is drawn through this pin.
SENSEHI (Pin 10): Sense Amplifier Input. The internal
sense amplifier will drive SENSEHI to the same potential
as SENSELO. A resistor (typically RIN) tied from supply
to SENSEHI sets the output current, IOUT = VSENSE/RIN,
where VSENSE is the voltage developed across RSENSE.
611912f
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9
LT6119-1/LT6119-2
Block Diagrams
9
V+
LT6119-1
100Ω
10
1
SENSEHI
3k
SENSELO
3k
V–
34V
–
6V
+
OUTA
V+
8
V–
V–
100nA
2
LE
V+
INC2
+
3
OUTC2
UNDERCURRENT FLAG
7
–
V–
400mV
REFERENCE
V+
OUTC1
+
4
OVERCURRENT FLAG
INC1
6
–
V–
5
611912 F01
Figure 1. LT6119-1 Block Diagram (Comparators with Opposing Polarity)
611912f
10
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LT6119-1/LT6119-2
Block DiagramS
9
V+
LT6119-2
100Ω
10
1
SENSEHI
3k
SENSELO
3k
V–
34V
–
6V
+
OUTA
V+
8
V–
V–
100nA
2
LE
V+
INC2
–
3
OUTC2
OVERCURRENT FLAG
7
+
V–
400mV
REFERENCE
V+
OUTC1
+
OVERCURRENT FLAG
–
4
INC1
6
V–
5
611912 F02
Figure 2. LT6119-2 Block Diagram (Comparators with the Same Polarity)
611912f
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LT6119-1/LT6119-2
Applications Information
The LT6119 high side current sense amplifier provides
accurate monitoring of currents through an external sense
resistor. The input sense voltage is level-shifted from
the sensed power supply to a ground referenced output
and is amplified by a user-selected gain to the output.
The output voltage is directly proportional to the current
flowing through the sense resistor.
The LT6119 comparators have a threshold set with a
built-in 400mV precision reference and have 10mV of
hysteresis. The open-drain outputs can be easily used to
level shift to digital supplies.
Amplifier Theory of Operation
An internal sense amplifier loop forces SENSEHI to have
the same potential as SENSELO, as shown in Figure 3.
Connecting an external resistor, RIN, between SENSEHI
and VSUPPLY forces a potential, VSENSE, across RIN. A
corresponding current, IOUTA, equal to VSENSE/RIN, will
flow through RIN. The high impedance inputs of the sense
amplifier do not load this current, so it will flow through
an internal MOSFET to the output pin, OUTA.
The output current can be transformed back into a voltage
by adding a resistor from OUTA to V–(typically ground).
The output voltage is then:
VOUT = V– + IOUTA • ROUT
where ROUT = R1 + R2 + R3, as shown in Figure 3.
Table 1. Example Gain Configurations
GAIN
RIN
ROUT
VSENSE FOR VOUT = 5V
IOUTA AT VOUT = 5V
20
499Ω
10k
250mV
500µA
50
200Ω
10k
100mV
500µA
100
100Ω
10k
50mV
500µA
Useful Equations
Input Voltage: VSENSE = I SENSE • RSENSE
Voltage Gain:
VOUT ROUT
=
VSENSE RIN
Current Gain:
IOUTA RSENSE
=
ISENSE
RIN
Note that VSENSE(MAX) can be exceeded without damaging
the amplifier, however, output accuracy will degrade as
VSENSE exceeds VSENSE(MAX), resulting in increased output
current, IOUTA.
Selection of External Current Sense Resistor
The external sense resistor, RSENSE, has a significant effect
on the function of a current sensing system and must be
chosen with care.
First, the power dissipation in the resistor should be
considered. The measured load current will cause power
dissipation as well as a voltage drop in RSENSE. As a
result, the sense resistor should be as small as possible
while still providing the input dynamic range required by
the measurement. Note that the input dynamic range is
the difference between the maximum input signal and the
minimum accurately reproduced signal, and is limited primarily by input DC offset of the internal sense amplifier of
the LT6119. To ensure the specified performance, RSENSE
should be small enough that VSENSE does not exceed
VSENSE(MAX) under peak load conditions. As an example,
an application may require the maximum sense voltage
be 100mV. If this application is expected to draw 2A at
peak load, RSENSE should be set to 50mΩ.
Once the maximum RSENSE value is determined, the minimum sense resistor value will be set by the resolution or
dynamic range required. The minimum signal that can be
accurately represented by this sense amplifier is limited by
the input offset. As an example, the LT6119 has a maximum
input offset of 200µV. If the minimum current is 20mA, a
sense resistor of 10mΩ will set VSENSE to 200µV. This is
the same value as the input offset. A larger sense resistor will reduce the error due to offset by increasing the
sense voltage for a given load current. Choosing a 50mΩ
RSENSE will maximize the dynamic range and provide a
system that has 100mV across the sense resistor at peak
load (2A), while input offset causes an error equivalent to
only 4mA of load current.
In the previous example, the peak dissipation in RSENSE
is 200mW. If a 5mΩ sense resistor is employed, then
the effective current error is 40mA, while the peak sense
voltage is reduced to 10mV at 2A, dissipating only 20mW.
611912f
12
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Applications Information
The low offset and corresponding large dynamic range of
the LT6119 make it more flexible than other solutions in this
respect. The 200µV maximum offset gives 68dB of dynamic
range for a sense voltage that is limited to 500mV max.
resistances. One 10mm × 10mm square trace of 1oz copper
is approximately 0.5mΩ. A 1mV error can be caused by as
little as 2A flowing through this small interconnect. This
will cause a 1% error for a full-scale VSENSE of 100mV. A
10A load current in the same interconnect will cause a 5%
error for the same 100mV signal. By isolating the sense
traces from the high current paths, this error can be reduced
by orders of magnitude. A sense resistor with integrated
Kelvin sense terminals will give the best results. Figure 3
illustrates the recommended method for connecting the
SENSEHI and SENSELO pins to the sense resistor.
Sense Resistor Connection
Kelvin connection of the SENSEHI and SENSELO inputs
to the sense resistor should be used in all but the lowest
power applications. Solder connections and PC board
interconnections that carry high currents can cause significant error in measurement due to their relatively large
VSUPPLY
+
RIN
VSENSE
–
LT6119-1
+
LOAD
V
ISENSE = SENSE
RSENSE
VLE
VPULLUP
RC
–
V–
V+
2 LE
9
C1
OUTA 8
V+
3 OUTC2
CLC
IOUTA
V–
RC
INC2 7
VOUT
R3*
CL
4 OUTC1
5
V–
–
CLC
400mV
REFERENCE
V+
R2*
+
OVERCURRENT
FLAG
V+
–
UNDERCURRENT
FLAG
SENSEHI 10
1 SENSELO
+
RSENSE
V–
*ROUT = R1 + R2 + R3
INC1 6
R1*
611912 F03
Figure 3. LT6119-1 Typical Connection
611912f
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Applications Information
Selection of External Input Gain Resistor, RIN
RIN should be chosen to allow the required speed and
resolution while limiting the output current to 1mA. The
maximum value for RIN is 1k to maintain good loop stability. For a given VSENSE, larger values of RIN will lower
power dissipation in the LT6119 due to the reduction
in IOUT while smaller values of RIN will result in faster
response time due to the increase in IOUT . If low sense
currents must be resolved accurately in a system that has
a very wide dynamic range, a smaller RIN may be used
if the maximum IOUTA current is limited in another way,
such as with a Schottky diode across RSENSE (Figure 4).
This will reduce the high current measurement accuracy
by limiting the result, while increasing the low current
measurement resolution.
V+
RSENSE
LOAD
DSENSE
as a resistor divider which has voltage taps going to the
comparator inputs to set the comparator thresholds.
In choosing an output resistor, the maximum output voltage must first be considered. If the subsequent circuit is a
buffer or ADC with limited input range, then ROUT must be
chosen so that IOUTA(MAX) • ROUT is less than the allowed
maximum input range of this circuit.
In addition, the output impedance is determined by ROUT .
If another circuit is being driven, then the input impedance of that circuit must be considered. If the subsequent
circuit has high enough input impedance, then almost any
useful output impedance will be acceptable. However, if
the subsequent circuit has relatively low input impedance,
or draws spikes of current such as an ADC load, then a
lower output impedance may be required to preserve the
accuracy of the output. More information can be found
in the Output Filtering section. As an example, if the input
impedance of the driven circuit, RIN(DRIVEN), is 100 times
ROUT, then the accuracy of VOUT will be reduced by 1%
since:
611912 F04
Figure 4. Shunt Diode Limits Maximum Input Voltage to Allow
Better Low Input Resolution Without Overranging
VOUT = IOUTA •
ROUT • RIN(DRIVEN)
ROUT + RIN(DRIVEN)
This approach can be helpful in cases where occasional
bursts of high currents can be ignored.
= IOUTA • ROUT •
Care should be taken when designing the board layout for
RIN, especially for small RIN values. All trace and interconnect resistances will increase the effective RIN value,
causing a gain error.
Amplifier Error Sources
The power dissipated in the sense resistor can create a
thermal gradient across a printed circuit board and consequently a gain error if RIN and ROUT are placed such
that they operate at different temperatures. If significant
power is being dissipated in the sense resistor then care
should be taken to place RIN and ROUT such that the gain
error due to the thermal gradient is minimized.
Selection of External Output Gain Resistor, ROUT
The output resistor, ROUT , determines how the output current is converted to voltage. VOUT is simply IOUTA • ROUT .
Typically, ROUT is a combination of resistors configured
100
= 0.99 •IOUTA • ROUT
101
The current sense system uses an amplifier and resistors
to apply gain and level-shift the result. Consequently, the
output is dependent on the characteristics of the amplifier,
such as gain error and input offset, as well as the matching
of the external resistors.
Ideally, the circuit output is:
VOUT = VSENSE •
ROUT
; VSENSE = RSENSE • ISENSE
RIN
In this case, the only error is due to external resistor
mismatch, which provides an error in gain only. However,
offset voltage, input bias current and finite gain in the
amplifier can cause additional errors:
611912f
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Applications Information
Output Voltage Error, ∆VOUT(VOS), Due to the Amplifier
DC Offset Voltage, VOS
∆ VOUT(VOS) = VOS •
ROUT
RIN
The DC offset voltage of the amplifier adds directly to the
value of the sense voltage, VSENSE. As VSENSE is increased,
accuracy improves. This is the dominant error of the system
and it limits the available dynamic range.
Output Voltage Error, ∆VOUT(IBIAS), Due to the Bias
Currents IB+ and IB–
The amplifier bias current IB+ flows into the SENSELO pin
while IB– flows into the SENSEHI pin. The error due to IB
is the following:


R
∆VOUT(IBIAS) = ROUT  IB + • SENSE – IB – 
RIN


Since IB+ ≈ IB– = IBIAS, if RSENSE << RIN then,
For instance, if IBIAS is 100nA and RIN is 1k, the input referred error is 100µV. This error becomes less significant
as the value of RIN decreases. The bias current error can
be reduced if an external resistor, RIN+, is connected as
shown in Figure 5, the error is then reduced to:
VOUT(IBIAS) = ±ROUT • IOS; IOS = IB+ – IB–
Minimizing low current errors will maximize the dynamic
range of the circuit.
Output Voltage Error, ∆VOUT(GAIN ERROR), Due to
External Resistors
The LT6119 exhibits a very low gain error. As a result,
the gain error is only significant when low tolerance
resistors are used to set the gain. Note the gain error is
systematically negative. For instance, if 0.1% resistors
are used for RIN and ROUT then the resulting worst-case
gain error is –0.4% with RIN = 100Ω. Figure 6 is a graph
of the maximum gain error which can be expected versus
the external resistor tolerance.
∆VOUT(IBIAS) = –ROUT (IBIAS)
10
RESULTING GAIN ERROR (%)
It is useful to refer the error to the input:
∆VVIN(IBIAS) = –RIN (IBIAS)
V+
9
V+
LT6119
VBATT
RIN 10 SENSEHI
RSENSE
RIN+
ISENSE
1 SENSELO
1
RIN = 100Ω
0.1
RIN = 1k
–
+
OUTA 8
VOUT
ROUT
V–
5
0.01
0.01
611912 F05
0.1
1
RESISTOR TOLERANCE (%)
10
611912 F06
Figure 6. Gain Error vs Resistor Tolerance
Figure 5. RIN+ Reduces Error Due to IB
611912f
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Applications Information
Output Current Limitations Due to Power Dissipation
The LT6119 can deliver a continuous current of 1mA to the
OUTA pin. This current flows through RIN and enters the
current sense amplifier via the SENSEHI pin. The power
dissipated in the LT6119 due to the output signal is:
POUT = (VSENSEHI – VOUTA) • IOUTA
Since VSENSEHI ≈ V+, POUTA ≈ (V+ – VOUTA) • IOUTA
There is also power dissipated due to the quiescent power
supply current:
PS = IS • V+
The comparator output current flows into the comparator
output pin and out of the V– pin. The power dissipated in
the LT6119 due to each comparator is often insignificant
and can be calculated as follows:
POUTC1,C2 = (VOUTC1,C2 – V–) • IOUTC1,C2
The total power dissipated is the sum of these
dissipations:
PTOTAL = POUTA + POUTC1 + POUTC2 + PS
At maximum supply and maximum output currents, the
total power dissipation can exceed 100mW. This will
cause significant heating of the LT6119 die. In order to
prevent damage to the LT6119, the maximum expected
dissipation in each application should be calculated. This
number can be multiplied by the θJA value, 160°C/W, to
find the maximum expected die temperature. Proper heat
sinking and thermal relief should be used to ensure that
the die temperature does not exceed the maximum rating.
LE Pin
The LE pin is used to enable the comparator’s output latch.
When the LE pin is high, the output latch is enabled and
the comparator outputs will stay low once tripped. When
LE is low, the comparator output latches are disabled and
the comparators operate transparently. To continuously
operate the comparators transparently, the LE pin should
be grounded. Do not leave the LE pin floating.
Power-On Reset
During start-up, the state of the comparator outputs cannot be guaranteed. To guarantee the correct state of the
comparators outputs on start-up, a power-on reset (POR) is
required. A POR can be implemented by holding the LE pin
low until the LT6119 is in such a state that the comparator
outputs are stable. This can be achieved by using an RC
network between the LE, V+ and GND, as shown in Figure 7.
When power is applied to the LT6119, the RC network
causes the voltage on the LE pin to remain below the VIL
(0.5V) threshold long enough for the comparator outputs
to settle into the correct state. The LE pin should remain
below 0.5V for at least 100µs after power-up in order to
60V
V+
R
110k
VLE
LE
LT6119
C
0.1µF
611912 F07
Figure 7. RC Network Achieves Power-On Reset
611912f
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LT6119-1/LT6119-2
Applications Information
guarantee a valid comparator outputs. The RC value can
be determined with the following equation:
RC =
t


V+
ln  +

 V − 0.5V 
; t ≥ 100µS
The RC will need to be chosen based on the supply voltage
of the circuit. Figure 8 can be used to easily determine an
appropriate RC combination for an applications supply
voltage range.
100,000,000
RESISTOR VALUE (Ω)
10,000,000
C = 1nF
SENSELO, SENSEHI Range
The difference between VBATT (see Figure 9) and V+, as
well as the maximum value of VSENSE, must be considered to ensure that the SENSELO pin does not exceed
the range listed in the Electrical Characteristics table. The
SENSELO and SENSEHI pins of the LT6119 can function
from 0.2V above the positive supply to 33V below it. These
operating voltages are limited by internal diode clamps
shown in Figures 1 and 2. On supplies less than 35.5V,
the lower range is limited by V– + 2.5V. This allows the
monitored supply, VBATT , to be separate from the LT6119
positive supply, as shown in Figure 9. Figure 10 shows
the range of operating voltages for the SENSELO and
SENSEHI inputs, for different supply voltage inputs (V+).
V+
1,000,000
9
C = 10nF
100,000
VBATT
C = 100nF
RSENSE
1
10
SUPPLY VOLTAGE (V)
–
RIN 10 SENSEHI
10,000
1000
V+
LT6119
100
1 SENSELO
+
ISENSE
VOUT
ROUT
V–
611912 F08
Figure 8. Minimum Resistance for Three
Typical Capacitor Values
OUTA 8
5
611912 F09
Figure 9. V+ Powered Separately from Load Supply (VBATT)
Output Filtering
f –3dB =
1
2 • π •ROUT •CL
60
ALLOWABLE OPERATING VOLTAGES ON
SENSELO AND SENSEHI INPUTS (V)
The AC output voltage, VOUT, is simply IOUTA • ZOUT. This
makes filtering straightforward. Any circuit may be used
which generates the required ZOUT to get the desired filter
response. For example, a capacitor in parallel with ROUT
will give a lowpass response. This will reduce noise at the
output, and may also be useful as a charge reservoir to
keep the output steady while driving a switching circuit
such as a MUX or ADC. This output capacitor in parallel
with ROUT will create an output pole at:
50
40.2V
40
VALID SENSELO/
SENSEHI RANGE
30
27
20.2V
20
10
2.8V
2.5V
2.7
10
20
30 35.5 40
V + (V)
50
60
611912 F10
Figure 10. Allowable SENSELO, SENSEHI Voltage Range
611912f
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Applications Information
Response Time
The SENSELO and SENSEHI range has been designed to
allow the LT6119 to monitor its own supply current (in
addition to the load), as long as VSENSE is less than 200mV.
This is shown in Figure 11.
The LT6119 amplifier is designed to exhibit fast response
to inputs for the purpose of circuit protection or current
monitoring. This response time will be affected by the
external components in two ways, delay and speed.
Minimum Output Voltage
If the output current is very low and an input transient
occurs, there may be an increased delay before the
output voltage begins to change. The Typical Performance
Characteristics show that this delay is short and it can
be improved by increasing the minimum output current,
either by increasing RSENSE or decreasing RIN. Note that
the Typical Performance Characteristics are labeled with
respect to the initial sense voltage.
The output of the LT6119 current sense amplifier can
produce a non-zero output voltage when the sense voltage
is zero. This is a result of the sense amplifier VOS being
forced across RIN as discussed in the Output Voltage Error, ∆VOUT(VOS) section. Figure 12 shows the effect of the
input offset voltage on the transfer function for parts at the
VOS limits. With a negative offset voltage, zero input sense
voltage produces an output voltage. With a positive offset
voltage, the output voltage is zero until the input sense
voltage exceeds the input offset voltage. Neglecting VOS,
the output circuit is not limited by saturation of pull-down
circuitry and can reach 0V.
The speed is also affected by the external components.
Using a larger ROUT will decrease the response time, since
VOUT = IOUTA • ZOUT where ZOUT is the parallel combination
9
V+
LT6119
VBATT
RIN 10 SENSEHI
RSENSE
1 SENSELO
–
+
OUTA 8
V–
ISENSE
5
VOUT
ROUT
611912 F11
Figure 11. LT6119 Supply Current Monitored with Load
120
G = 100
OUTPUT VOLTAGE (mV)
100
80
VOS = –200µV
60
40
VOS = 200µV
20
0
0 100 200 300 400 500 600 700 800 900 1000
INPUT SENSE VOLTAGE (µV)
611912 F12
Figure 12. Amplifier Output Voltage vs Input Sense Voltage
611912f
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LT6119-1/LT6119-2
Applications Information
of ROUT and any parasitic and/or load capacitance. Note
that reducing RIN or increasing ROUT will both have the
effect of increasing the voltage gain of the circuit. If the
output capacitance is limiting the speed of the system, RIN
and ROUT can be decreased together in order to maintain
the desired gain and provide more current to charge the
output capacitance.
The response time of the comparators is the sum of the
propagation delay and the fall time. The propagation delay is a function of the overdrive voltage on the input of
the comparators. A larger overdrive will result in a lower
propagation delay. This helps achieve a fast system response time to fault events. The fall time is affected by
the load on the output of the comparator as well as the
pull-up voltage.
The LT6119 amplifier has a typical response time of 500ns
and the comparators have a typical response time of 500ns.
When configured as a system, the amplifier output drives
the comparator input causing a total system response
time which is typically greater than that implied by the
individually specified response times. This is due to the
overdrive on the comparator input being determined by
the speed of the amplifier output.
Internal Reference and Comparators
The integrated precision reference and comparators
combined with the high precision current sense allow
for rapid and easy detection of abnormal load currents.
This is often critical in systems that require high levels of
safety and reliability. The LT6119 comparators are optimized for fault detection and are designed with latching
outputs. Latching outputs prevent faults from clearing
themselves and require a separate system or user to
reset the outputs. In applications where the comparator output can intervene and disconnect loads from the
supply, latched outputs are required to avoid oscillation.
Latching outputs are also useful for detecting problems
that are intermittent. The comparator outputs on the
LT6119 are always latching and there is no way to disable
this feature.
Each of the comparators has one input available externally,
with the two versions of the part differing by the polarity
of those available inputs. The other comparator inputs are
connected internally to the 400mV precision reference.
The input threshold (the voltage which causes the output
to transition from high to low) is designed to be equal to
that of the reference. The reference voltage is established
with respect to the device V– connection.
Comparator Inputs
The comparator inputs can swing from V– to 60V regardless
of the supply voltage used. The input current for inputs
well above the threshold is just a few pAs. With decreasing input voltage, a small bias current begins to be drawn
out of the input near the threshold, reaching 50nA max
when at ground potential. Note that this change in input
bias current can cause a small nonlinearity in the OUTA
transfer function if the comparator inputs are coupled to
the amplifier output with a voltage divider. For example,
if the maximum comparator input current is 50nA, and
the resistance seen looking out of the comparator input
is 1k, then a change in output voltage of 50µV will be
seen on the analog output when the comparator input
voltage passes through its threshold. If both comparator inputs are connected to the output then they must
both be considered.
Setting Comparator Thresholds
The comparators have an internal precision 400mV reference. In order to set the trip points of the LT6119-1 comparators, the output currents, IOVER and IUNDER, as well as
the maximum output current, IMAX, must be calculated:
I OVER =
IMAX =
VSENSE(OVER)
RIN
, IUNDER =
VSENSE(UNDER)
RIN
,
VSENSE(MAX)
RIN
where IOVER and IUNDER are the over and under currents
through the sense resistor which cause the comparators
to trip. IMAX is the maximum current through the sense
resistor.
611912f
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Applications Information
Depending on the desired maximum amplifier output voltage (VMAX) the three output resistors, R1, R2 and R3, can
be configured in two ways. If:
R1=
 400mV 400mV – IUNDER (R1) 
VMAX > 
+
 IMAX
IUNDER
 I OVER

R2 =
R3 =
then use the configuration shown in Figure 3. The desired
trip points and full-scale analog output voltage for the
circuit in Figure 3 can then be achieved using the following equations:
If:
400mV
IOVER
400mV – IUNDER (R1)
IUNDER
VMAX –IMAX (R1+R2)
IMAX
 400mV 400mV – IUNDER (R1) 
VMAX < 
+
 IMAX
IUNDER
 IOVER

then use the configuration shown in Figure 13.
VSUPPLY
+
RIN
VSENSE
–
LT6119-1
1 SENSELO
+
LOAD
V
ISENSE = SENSE
RSENSE
VLE
VPULLUP
RC
–
V–
V+
2 LE
9
C1
OUTA 8
V+
3 OUTC2
CLC
IOUTA
CL
INC2 7
400mV
REFERENCE
V+
V–
R2
–
5
VOUT
+
4 OUTC1
CLC
R3
V–
RC
OVERCURRENT
FLAG
V+
–
UNDERCURRENT
FLAG
SENSEHI 10
+
RSENSE
INC1 6
V–
R1
611912 F13
Figure 13. Typical Configuration with Alternative ROUT Configuration
611912f
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LT6119-1/LT6119-2
Applications Information
The desired trip points and full-scale analog output voltage
for the circuit in Figure 15 can be achieved as follows:
R1=
OUTC1
(LT6119-1/LT6119-2)
OUTC2
(LT6119-2)
400mV
IOVER
OUTC2
(LT6119-1)
VHYS VHYS
–I
V
(R1)
R2 = MAX MAX
IMAX
R3 =
INCREASING
VINC1,2
611912 F14
VTH
Figure 14. Comparator Output Transfer Characteristics
400mV – IUNDER (R1+R2)
External positive feedback circuitry can be employed
to increase the effective hysteresis if desired, but such
circuitry will have an effect on both the rising and falling input thresholds, VTH (the actual internal threshold
remains unaffected).
IUNDER
Trip points for the LT6119-2 can be set by replacing IUNDER
with a second overcurrent, IOVER2.
Hysteresis
Figure 15 shows how to add additional hysteresis to a
noninverting comparator.
Each comparator has a typical built-in hysteresis of 10mV
to simplify design, ensure stable operation in the presence of noise at the inputs, and to reject supply noise that
might be induced by state change load transients. The
hysteresis is designed such that the threshold voltage is
altered when the output is transitioning from low to high
as is shown in Figure 14.
R6 can be calculated from the extra hysteresis being added,
VHYS(EXTRA) and the amplifier output current which you
want to cause the comparator output to trip, IUNDER. Note
that the hysteresis being added, VHYS(EXTRA), is in addition
to the typical 10mV of built-in hysteresis.
R6 =
V+
400mV – VHYS(EXTRA)
IUNDER
9
V+
LT6119-1
V+
10 SENSEHI
–
1 SENSELO
+
RSENSE
ILOAD
V–
V+
V+
R5
3 OUTC2
–
R3
OUTA 8
INC2 7
+
RIN
R1 VTH
R6
400mV
REFERENCE
V–
R2
5
611912 F15
Figure 15. Noninverting Comparator with Added Hysteresis
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LT6119-1/LT6119-2
Applications Information
R1 should be chosen such that R1 >> R6 so that VOUTA
does not change significantly when the comparator
trips.
have (R1 + R2 + R3) >> R6. The maximum VOUTA error
caused by this can be calculated as:
R6


∆VOUTA = V + • 
 R1+R2+R3+R6 
R3 should be chosen to allow sufficient VOL and comparator output rise time due to capacitive loading.
In the previous example, this is an error of 4.3mV at the
output of the amplifier or 43µV at the input of the amplifier
assuming a gain of 100.
R2 can be calculated:
R2 =
(
)(
R1• V + – 400mV – VHYS(EXTRA) • R3
VHYS(EXTRA)
)
When using the comparators with their inputs decoupled
from the output of the amplifier, they may be driven directly
by a voltage source. It is useful to know the threshold
voltage equations with the additional hysteresis. The input
falling edge threshold which causes the output to transition
from high to low is:
For very large values of R2 PCB related leakage may
become an issue. A tee network can be implemented to
reduce the required resistor values.
The approximate total hysteresis will be:
1   V + • R1
 1
VTH(F) = 400mV •R1•  +
–
 R1 R2+R3   R2+R3 
 V + – 400mV 
VHYS = 10mV +R1• 

 R2+R3 
For example, to achieve IUNDER = 100µA with 50mV of
total hysteresis, R6 = 3.57k. Choosing R1 = 35.7k, R3 =
10k and V+ = 5V results in R2 = 4.12M.
The input rising edge threshold which causes the output
to transition from low to high is:
 1 1
VTH(R) = 410mV • R1•  + 
 R1 R2 
The analog output voltage will also be affected when the
comparator trips due to the current injected into R6 by
the positive feedback. Because of this, it is desirable to
V+
Figure 16 shows how to add additional hysteresis to an
inverting comparator.
9
V+
LT6119-1
V+
10 SENSEHI
–
1 SENSELO
+
RSENSE
ILOAD
V–
V+
R3
OUTA 8
V+
R6
INC1 6
–
RIN
4 OUTC1
R1 VTH
R7
400mV
REFERENCE
+
V–
VDD
5
R2
611912 F16
Figure 16. Inverting Comparator with Added Hysteresis
611912f
22
For more information www.linear.com/LT6119-1
LT6119-1/LT6119-2
Applications Information
R7 can be calculated from the amplifier output current which
is required to cause the comparator output to trip, IOVER.
R7 =
400mV
, Assuming (R1+ R2) >> R7
I OVER
To ensure (R1 + R2) >> R7, R1 should be chosen such
that R1 >> R7 so that VOUTA does not change significantly
when the comparator trips.
R3 should be chosen to allow sufficient VOL and comparator output rise time due to capacitive loading.
R2 can be calculated:
In the previous example, this is an error of 4.3mV at the
output of the amplifier or 43µV at the input of the amplifier
assuming a gain of 100.
Since the comparators can be used independently of the
current sense amplifier, it is useful to know the threshold
voltage equations with additional hysteresis. The input
rising edge threshold which causes the output to transition from high to low is:
 R1
VTH(R) = 400mV •  1+ 
 R2 
The input falling edge threshold which causes the output
to transition from low to high is:
 V – 390mV 
R2 = R1•  DD

 VHYS(EXTRA) 
Note that the hysteresis being added, VHYS(EXTRA), is in
addition to the typical 10mV of built-in hysteresis. For very
large values of R2 PCB related leakage may become an
issue. A tee network can be implemented to reduce the
required resistor values.
The approximate total hysteresis is:
 V – 390mV 
VHYS = 10mV + R1•  DD


R2
For example, to achieve IOVER = 900µA with 50mV of total
hysteresis, R7 = 442Ω. Choosing R1 = 4.42k, R3 = 10k
and VDD = 5V results in R2 = 513k.
The analog output voltage will also be affected when the
comparator trips due to the current injected into R7 by
the positive feedback. Because of this, it is desirable to
have (R1 + R2) >> R7. The maximum VOUTA error caused
by this can be calculated as:
 R1
 R1
VTH(F) = 390mV •  1+  – VDD  
 R2 
 R2 
Comparator Outputs
The comparator outputs can maintain a logic low level of
150mV while sinking 500µA. The outputs can sink higher
currents at elevated VOL levels, as shown in the Typical
Performance Characteristics. Load currents are conducted
to the V– pin. The output off-state voltage may range
between 0V and 60V with respect to V–, regardless of the
supply voltage used. As with any open-drain device, the
outputs may be tied together to implement wire-OR logic
functions. The LT6119-1 can be used as a single-output
window comparator in this way.
R7


∆VOUTA = VDD • 
 R1+R2+R7 
611912f
For more information www.linear.com/LT6119-1
23
LT6119-1/LT6119-2
Applications Information
Reverse-Supply Protection
order to preserve the precision of the reference and to
avoid driving the comparator inputs below V–, R2 must
connect to the V– pin. This will shift the amplifier output
voltage up by VD. VOUTA can be accurately measured differentially across R1 and R2. The comparator output low
voltage will also be shifted up by VD. The LE pin threshold is referenced to the V– pin. In order to provide valid
input levels to the LT6119 and avoid driving LE below
V– the negative supply of the driving circuit should be
tied to V–.
The LT6119 is not protected internally from external reversal of supply polarity. To prevent damage that may occur
during this condition, a Schottky diode should be added
in series with V– (Figure 17). This will limit the reverse
current through the LT6119. Note that this diode will limit
the low voltage operation of the LT6119 by effectively
reducing the supply voltage to the part by VD.
Also note that the comparator reference, comparator
output and LE input are referenced to the V– pin. In
V+
9
V+
LT6119-1
RIN
V+
10 SENSEHI
–
1 SENSELO
+
RSENSE
VDD
ILOAD
R3
OUTA 8
V–
+
V+
R1
4 OUTC
INC 6
–
VDD
VOUTA
R2
+
VDD
2
LE
400mV
REFERENCE
–
V–
5
+
611912 F17
VD
–
Figure 17. Schottky Prevents Damage During Supply Reversal
611912f
24
For more information www.linear.com/LT6119-1
LT6119-1/LT6119-2
Typical Applications
Electronic Fuse and Undervoltage Detector with Power-On Reset
IRF9640
0.1Ω
40V
10µF
1M
0.1µF
50k
100k
R10
100Ω
INC2
10
13.3k
9
SENSEHI SENSELO
+
OUTA
V
5V
6.2V*
1
8
VOUT
LT6119-1
10k
2
100nF
TO
LOAD
4
3
LE
INC1
OUTC1
OUTC2
V–
5
INC2
0.8A
OVERCURRENT
6 DETECTION
7
9.53k
100k
475Ω
2N7000
30V
UNDERVOLTAGE
DETECTION
611912 TA02
*CMH25234B
The electronic fuse can be reset either by pulling the LE
line low or by cycling the power to the system. The circuit
is designed to have a 100µS power-on period. After power,
while LE is still below the threshold, the comparator is kept
transparent to allow for initial inrush current.
The comparators monitor for overcurrent and undervoltage conditions. If either fault condition is detected the
battery will immediately be disconnected from the load.
The latching comparator outputs ensure the battery stays
disconnected from the load until an outside source resets
the LT6119 comparator outputs.
611912f
For more information www.linear.com/LT6119-1
25
LT6119-1/LT6119-2
Typical Applications
MCU Interfacing with Hardware Interrupts
Example:
0.1Ω
V+
TO LOAD
5V
100Ω
10
9
AtMega1280
5
PB0
6
PB1
7
PCINT2
2
PCINT3
3
ADC2
1
PB5
SENSEHI SENSELO
V+
5V
8
LT6119-1
10k
LE 2
3
4
5V
VOUT/ADC IN
OUTA
LE
INC2
OUTC2
OUTC1
10k
V–
INC1
5
7
6
OUTC2 GOES LOW
0V
1
VOUT
ADC IN
MCU INTERUPT
2k
6.65k
UNDERCURRENT ROUTINE
1.33k
RESET COMPARATORS
611912 TA03
The comparators are set to have a 50mA undercurrent
threshold and a 300mA overcurrent threshold. The MCU
611912 TA03b
will receive the comparator outputs as hardware interrupts
and immediately run an appropriate fault routine.
Simplified DC Motor Torque Control
VMOTOR
100µF
1k
SENSEHI SENSELO
V+
OUTA
LT6119
LE
LE
CURRENT SET POINT (0V TO 5V)
VOUT
0.47µF
100k
5.62k
1µF
5V
INC2
3.4k
OUTC2
OUTC1
0.1Ω
V–
2
INC1
3
–
+
4
7
1k
6
1
LTC6246
78.7k
BRUSHED
DC MOTOR
(0A TO 5A)
MABUCHI
RS-540SH
5
V+
6
MOD OUT
LTC6992-1
3
1N5818
SET DIV
GND
2
4
IRF640
100k
1M
280k
5V
611912 TA04
The figure shows a simplified DC motor control circuit.
The circuit controls motor current, which is proportional
to motor torque; the LT6119 is used to provide current
feedback to a difference amplifier that controls the current
in the motor. The LTC®6992 is used to convert the output
of the difference amp to the motors PWM control signal.
611912f
26
For more information www.linear.com/LT6119-1
LT6119-1/LT6119-2
Package Description
Please refer to http://www.linear.com/designtools/packaging/ for the most recent package drawings.
MS Package
10-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1661 Rev E)
0.889 ± 0.127
(.035 ± .005)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
3.00 ± 0.102
(.118 ± .004)
(NOTE 3)
0.50
0.305 ± 0.038
(.0197)
(.0120 ± .0015)
BSC
TYP
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
10 9 8 7 6
3.00 ± 0.102
(.118 ± .004)
(NOTE 4)
4.90 ± 0.152
(.193 ± .006)
DETAIL “A”
0.497 ± 0.076
(.0196 ± .003)
REF
0° – 6° TYP
GAUGE PLANE
1 2 3 4 5
0.53 ± 0.152
(.021 ± .006)
DETAIL “A”
0.18
(.007)
SEATING
PLANE
1.10
(.043)
MAX
0.86
(.034)
REF
0.17 – 0.27
(.007 – .011)
TYP
0.50
(.0197)
NOTE:
BSC
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
0.1016 ± 0.0508
(.004 ± .002)
MSOP (MS) 0307 REV E
611912f
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection
of its circuits
as described
herein will not infringe on existing patent rights.
For more
information
www.linear.com/LT6119-1
27
LT6119-1/LT6119-2
Typical Application
ADC Driving Application
IN
SENSE
HIGH
SENSE
LOW
0.1Ω
0.1µF
OUT
VCC
VREF
100Ω
10
9
SENSEHI SENSELO
V+
VCC
VCC
10k
OUTA
8
LT6119-1
LE 2
3
10k
4
LE
INC2
OUTC2
OUTC1
V–
INC1
COMP
1
7
6
5
IN+
LTC2470
TO
MCU
0.1µF
2k
6.65k
1.33k
OVERCURRENT
611912 TA05
UNDERCURRENT
The low sampling current of the LTC2470 16-bit delta
sigma ADC is ideal for the LT6119.
Related Parts
PART NUMBER DESCRIPTION
COMMENTS
LT1787
Bidirectional High Side Current Sense Amplifier
2.7V to 60V, 75µV Offset, 60µA Quiescent, 8V/V Gain
LTC4150
Coulomb Counter/Battery Gas Gauge
Indicates Charge Quantity and Polarity
LT6100
Gain-Selectable High Side Current Sense Amplifier
4.1V to 48V, Gain Settings: 10, 12.5, 20, 25, 40, 50V/V
LTC6101
High Voltage High Side Current Sense Amplifier
Up to 100V, Resistor Set Gain, 300µV Offset, SOT-23
LTC6102
Zero-Drift High Side Current Sense Amplifier
Up to 100V, Resistor Set Gain, 10µV Offset, MSOP8/DFN
LTC6103
Dual High Side Current Sense Amplifier
4V to 60V, Resistor Set Gain, 2 Independent Amps, MSOP8
LTC6104
Bidirectional High Side Current Sense Amplifier
4V to 60V, Separate Gain Control for Each Direction, MSOP8
LT6105
Precision Rail-to-Rail Input Current Sense Amplifier
–0.3V to 44V Input Range, 300µV Offset, 1% Gain Error
LT6106
Low Cost High Side Current Sense Amplifier
2.7V to 36V, 250µV Offset, Resistor Set Gain, SOT-23
LT6107
High Temperature High Side Current Sense Amplifier
2.7V to 36V, –55°C to 150°C, Fully Tested: –55°C, 25°C, 150°C
LT6108
High Side Current Sense Amplifier with Reference and
Comparator with Shutdown
2.7V to 60V, 125µV Offset, Resistor Set Gain, ±1.25% Threshold Error
LT6700
Dual Comparator with 400mV Reference
1.4V to 18V, 6.5µA Supply Current
LT6109
High Side Current Sense Amplifier with Reference
and Comparators with Shutdown
2.7V to 60V, 125µV Offset, Resistor Set Gain, ±1.25% Threshold Error
LT6118
LT6108 without Shutdown and POR Capability
2.7V to 60V, 200µV, Resistor Set Gain, ±1.25% Threshold Error
611912f
28 Linear Technology Corporation
1630 McCarthy Blvd., Milpitas, CA 95035-7417
For more information www.linear.com/LT6119-1
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com/LT6119-1
LT 0314 • PRINTED IN USA
 LINEAR TECHNOLOGY CORPORATION 2014