TI CY74FCT191TSOIC 4-bit up/down binary counter Datasheet

Data sheet acquired from Cypress Semiconductor Corporation.
Data sheet modified to remove devices not offered.
CY74FCT191T
4-Bit Up/Down Binary Counter
SCCS016 - May 1994 - Revised February 2000
Features
Functional Description
• Function, pinout, and drive compatible with FCT and F
logic
• FCT-C speed at 6.2 ns max,
FCT-A speed at 7.8 ns max.
• Reduced VOH (typically = 3.3V) versions of equivalent
FCT functions
• Edge-rate control circuitry for significantly improved
noise characteristics
• Power-off disable permits live insertion
• ESD > 2000V
• Matched rise and fall times
• Sink current
64 mA
Source current
32 mA
The FCT191T is a reversible modulo-16 binary counter,
featuring synchronous counting and asynchronous presetting.
The preset allows the FCT191T to be used in programmable
dividers. The count enable input, terminal count output, and ripple
clock output make possible a variety of methods of implementing
multiusage counters. In the counting modes, state changes are
initiated by the rising edge of the clock.
The outputs are designed with a power-off disable feature to
allow for live insertion of boards.
Logic Block Diagram
CP
U/D
P0
CE
Pin Configurations
P1
P2
P3
PL
SOIC/QSOP
Top View
J CLOCK K
PRESET
CLEAR
Q
Q
RC TC
J CLOCK K
PRESET
CLEAR
Q
Q
Q1
Q0
Pin Description
Name
J CLOCK K
PRESET
CLEAR
Q
Q
P1
1
16
VCC
Q1
2
15
P0
Q0
3
14
CP
CE
4
13
RC
U/D
5
12
TC
Q2
6
11
PL
Q3
7
10
P2
GND
8
9
P3
J CLOCK K
PRESET
CLEAR
Q
Q
Q2
Q3
RC Function Table[1]
Description
CE
Count Enable Input (Active LOW)
CP
Clock Pulse Input (Active Rising Edge)
P
Parallel Data Inputs
PL
Asynchronous Parallel Load Input (Active LOW)
U/D
Up/Down Count Control Input
Q
Flip-Flop Outputs
RC
Ripple Clock Output (Active LOW)
TC
Terminal Count Output
Inputs
CE
L
H
X
Outputs
CP
T[2]
RC
X
X
H
X
L
H
H
Copyright
© 2000, Texas Instruments Incorporated
CY74FCT191T
RC Function Table[1]
Ambient Temperature with
Power Applied............................................. –65°C to +135°C
Inputs
Outputs
CE
CP
T
[2]
Supply Voltage to Ground Potential ............... –0.5V to +7.0V
RC
DC Input Voltage ........................................... –0.5V to +7.0V
Notes:
1. H = HIGH Voltage Level, L = LOW Voltage Level, X = Don‘t Care,
= LOW-to-HIGH clock transition.
=Low Pulse.
2. TC is generated internally.
DC Output Voltage......................................... –0.5V to +7.0V
DC Output Current (Maximum Sink Current/Pin) ...... 120 mA
Power Dissipation .......................................................... 0.5W
Mode Select[1]
Static Discharge Voltage............................................>2001V
(per MIL-STD-883, Method 3015)
Inputs
PL
CE
U/D
H
H
L
H
L
L
X
H
L
H
X
X
CP
X
X
Mode
Operating Range
Count Up
Count Down
Preset (Asynchronous)
No Change (Hold)
Ambient
Temperature
VCC
–40°C to +85°C
5V ± 5%
Range
Commercial
Maximum Ratings[3, 4]
(Above which the useful life may be impaired. For user guidelines, not tested.)
Storage Temperature .................................–65°C to +150°C
Electrical Characteristics Over the Operating Range
Parameter
VOH
Description
Output HIGH Voltage
Test Conditions
Min.
VCC=Min., IOH=–32 mA
2.0
VCC=Min., IOH=–15 mA
2.4
Max.
Unit
V
3.3
Output LOW Voltage
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
VH
Hysteresis[6]
All inputs
0.2
VIK
Input Clamp Diode Voltage
VCC=Min., IIN=–18 mA
–0.7
–1.2
V
II
Input HIGH Current
VCC=Max., VIN=VCC
5
µA
IIH
Input HIGH Current
VCC=Max., VIN=2.7V
±1
µA
IIL
Input LOW Current
VCC=Max., VIN=0.5V
±1
µA
–225
mA
±1
µA
Output Short Circuit
IOFF
Power-Off Disable
0.3
V
VOL
IOS
VCC=Min., IOL=64 mA
Typ.[5]
0.55
V
2.0
V
0.8
Current[7]
VCC=Max., VOUT=0.0V
–60
–120
VCC=0V, VOUT=4.5V
V
V
Capacitance[6]
Parameter
Description
Typ.[5]
Max.
Unit
CIN
Input Capacitance
5
10
pF
COUT
Output Capacitance
9
12
pF
Notes:
3. Unless otherwise noted, these limits are over the operating free-air temperature range.
4. Unused inputs must always be connected to an appropriate logic voltage level, preferably either VCC or ground.
5. Typical values are at VCC=5.0V, TA=+25˚C ambient.
6. This parameter is specified but not tested.
7. Not more than one output should be shorted at a time. Duration of short should not exceed one second. The use of high-speed test apparatus and/or sample
and hold techniques are preferable in order to minimize internal chip heating and more accurately reflect operational values. Otherwise prolonged shorting of
a high output may raise the chip temperature well above normal and thereby cause invalid readings in other parametric tests. In any sequence of parameter
tests, IOS tests should be performed last.
2
CY74FCT191T
Power Supply Characteristics
Parameter
Description
Test Conditions
Typ.[5]
Max.
Unit
ICC
Quiescent Power Supply Current
VCC=Max., VIN < 0.2V,
VIN > VCC–0.2V
0.1
0.2
mA
∆ICC
Quiescent Power Supply Current
(TTL inputs HIGH)
VCC=Max., VIN=3.4V,[8]
f1=0, Outputs Open
0.5
2.0
mA
ICCD
Dynamic Power Supply Current[9]
VCC=Max., One Bit Toggling, Preset Mode,
50% Duty Cycle, Outputs Open,
MR=VCC=SR,
PL=CE=U/D=CP=GND,
VIN < 0.2V or VIN > VCC–0.2V
0.06
0.12
mA/MHz
IC
Total Power Supply Current[10]
VCC=Max., Preset Mode,
50% Duty Cycle, Outputs Open,
One Bit Toggling at f1=5 MHz,
PL=CE=U/D=CP=GND,
VIN=VCC, VIN=GND
0.4
0.8
mA
VCC=Max., Preset Mode,
50% Duty Cycle, Outputs Open,
One Bit Toggling at f1=5 MHz,
VIN=3.4V or VIN=GND
0.7
1.8
mA
VCC=Max., Preset Mode,
50% Duty Cycle, Outputs Open,
Four Bits Toggling at f1=5 MHz,
PL=CE=U/D=CP=GND,
VIN=VCC, VIN=GND
1.3
2.6[11]
mA
VCC=Max., Preset Mode,
50% Duty Cycle, Outputs Open,
Four Bits Toggling at f1=5 MHz,
PL=CE=U/D=CP=GND,
VIN=3.4V or VIN=GND
2.3
6.6[11]
mA
Notes:
8. Per TTL driven input (VIN=3.4V); all other inputs at VCC or GND.
9. This parameter is not directly testable, but is derived for use in Total Power Supply calculations.
= IQUIESCENT + IINPUTS + IDYNAMIC
10. IC
IC
= ICC+∆ICCDHNT+ICCD(f0/2 + f1N1)
ICC = Quiescent Current with CMOS input levels
∆ICC = Power Supply Current for a TTL HIGH input (VIN=3.4V)
DH = Duty Cycle for TTL inputs HIGH
NT = Number of TTL inputs at DH
ICCD = Dynamic Current caused by an input transition pair
(HLH or LHL)
= Clock frequency for registered devices, otherwise zero
f0
= Input signal frequency
f1
N1 = Number of inputs changing at f1
All currents are in milliamps and all frequencies are in megahertz.
11. Values for these conditions are examples of the ICC formula. These limits are specified but not tested.
3
CY74FCT191T
Switching Characteristics Over the Operating Range
CY74FCT191AT
Parameter
Description
[12]
Min.
CY74FCT191CT
Max.
Min.[12]
Max.
Unit
Fig. No.[13]
tPLH
tPHL
Propagation Delay
CP to Qn
1.5
7.8
1.5
6.2
ns
1, 5
tPLH
tPHL
Propagation Delay
CP to TC
1.5
11.8
1.5
9.4
ns
1, 5
tPLH
tPHL
Propagation Delay
CP to RC
1.5
8.5
1.5
6.8
ns
1, 5
tPLH
tPHL
Propagation Delay
CE to RC
1.5
7.2
1.5
6.0
ns
1, 5
tPLH
tPHL
Propagation Delay
U/D to RC
1.5
13.0
1.5
11.0
ns
1, 5
tPLH
tPHL
Propagation Delay
U/D to TC
1.5
7.2
1.5
6.1
ns
1, 5
tPLH
tPHL
Propagation Delay
Pn to Qn
1.5
9.1
1.5
7.7
ns
1, 5
tPLH
tPHL
Propagation Delay
PL to Qn
2.0
8.5
2.0
7.2
ns
1, 5
tSU
Set-Up Time
HIGH or LOW Pn to PL
4.0
3.5
ns
4
tH
Hold Time
HIGH or LOW Pn to PL
1.5
1.0
ns
4
tSU
Set-Up Time LOW
CE to CP
9.0
7.2
ns
4
tH
Hold Time
LOW CE to CP
0
0
ns
4
tSU
Set-Up Time
HIGH or LOW U/D to CP
10.0
8.0
ns
4
tH
Hold Time
HIGH or LOW U/D to CP
0
0
ns
4
tW
PL Pulse Width LOW
5.5
5.0
ns
5
Width[6]
tW
Clock Pulse
HIGH or LOW
4.0
4.0
ns
5
tREM
Recovery Time
PL to CP
5.0
4.5
ns
6
Notes:
12. Minimum limits are specified but not tested on Propagation Delays.
13. See “Parameter Measurement Information” in the General Information section.
Ordering Information
Speed
(ns)
6.2
7.8
Ordering Code
Package
Name
Package Type
CY74FCT191CTQCT
Q1
16-Lead (150-Mil) QSOP
CY74FCT191CTSOC/SOCT
S1
16-Lead (300-Mil) Molded SOIC
CY74FCT191ATSOC/SOCT
S1
16-Lead (300-Mil) Molded SOIC
Document #: 38-00286-B
4
Operating
Range
Commercial
Commercial
CY74FCT191T
Package Diagrams
16-Lead Quarter Size Outline Q1
16-Lead Molded SOIC S1
5
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