Maxim DS1124U-25+T 5.0v 8-bit programmable timing element Datasheet

Rev 1; 4/09
5.0V 8-Bit Programmable
Timing Element
Features
The DS1124 is an 8-bit programmable timing element
similar in function to the DS1021-25. The 256-delay
intervals are programmed by using a 3-wire serial interface. With a 0.25ns step size, the DS1124 can provide
a delay time from 20ns up to 84ns with an integral nonlinearity of ±3ns.
♦ 0.25ns Step Size
♦ Leading- and Trailing-Edge Accuracy
♦ CMOS/TTL Compatible
♦ Can Delay Signals by a Full Period or More
♦ 3-Wire Serial Programming Interface
Applications
♦ Single 5.0V Power Supply
LCD Televisions
♦ 10-pin µSOP Package
Telecommunications
Digital Test Equipment
Digital Video Projection
Signal Generators and Analyzers
Ordering Information
Pin Configuration
PART
TOP VIEW
+
IN 1
E
2
10 VCC
9
VCC
Q
3
8
D
GND
4
7
CLK
GND
5
6
OUT
DS1124
TEMP RANGE
PIN-PACKAGE
DS1124U-25+
-40°C to +85°C
10 μSOP
DS1124U-25+T
-40°C to +85°C
10 μSOP
+Denotes a lead(Pb)-free/RoHS-compliant package.
T = Tape and reel.
µSOP
Typical Operating Circuit
VCC
SYSTEM CLOCK
OPTIONAL
IN
VCC
E
OUT
Q
MICROPROCESSOR
VARIABLE DELAY
DS1124
CLK
D
GND
________________________________________________________________ Maxim Integrated Products
For pricing, delivery, and ordering information, please contact Maxim Direct at 1-888-629-4642,
or visit Maxim’s website at www.maxim-ic.com.
1
DS1124
General Description
DS1124
5.0V 8-Bit Programmable
Timing Element
ABSOLUTE MAXIMUM RATINGS
Voltage Range on VCC Pin Relative to Ground .....-0.5V to +6.0V
Voltage Range on IN, E, D, and CLK
Relative to Ground* ................................-0.5V to (VCC + 0.5V)
Operating Temperature Range ...........................-40°C to +85°C
Storage Temperature Range .............................-55°C to +125°C
Short-Circuit Output Current ..........................50mA for 1 second
Soldering Temperature...................See J-STD-020 Specification
*Not to exceed +6.0V.
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. These are stress ratings only, and functional
operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to
absolute maximum rating conditions for extended periods may affect device reliability.
RECOMMENDED OPERATING CONDITIONS
(TA = -40°C to +85°C)
PARAMETER
SYMBOL
MAX
UNITS
4.75
5.25
V
VIH
2.2
VCC +
0.3
V
VIL
-0.3
+0.8
V
TYP
MAX
UNITS
15
30
mA
mA
Supply Voltage
VCC
Input Logic 1
Input Logic 0
CONDITIONS
(Note 1)
MIN
TYP
DC ELECTRICAL CHARACTERISTICS
(VCC = +4.75V to +5.25V, TA = -40°C to +85°C, unless otherwise noted.)
PARAMETER
SYMBOL
Active Current
ICCA
High-Level Output Current
I OH
Low-Level Output Current
Input Leakage
IOL
CONDITIONS
MIN
VCC = min, V OH = 2.3V
-1.0
Q pin, VCC = min, VOL = 0.5V
4.0
OUT pin, VCC = min, V OL = 0.5V
8.0
IL
-1.0
mA
+1.0
μA
MAX
UNITS
10
MHz
AC ELECTRICAL CHARACTERISTICS
(VCC = +4.75V to +5.25V, TA = -40°C to +85°C, unless otherwise noted.)
PARAMETER
Serial Clock Frequency
Input Pulse Width (E, CLK)
SYMBOL
CONDITIONS
MIN
TYP
fCLK
t EW, tCW
50
ns
Data Setup to Clock
tDSC
30
ns
Data Hold from Clock
tDHC
0
ns
Data Setup to Enable
tDSE
30
ns
Data Hold to Enable
tDHE
0
ns
tES
0
ns
tEH
30
Enable Setup to Clock
Enable Hold from Clock
E to Q Valid
t EQV
E to Q High Impedance
t EQZ
CLK to Q Valid
tCQV
CLK to Q Invalid
tCQX
2
0
0
_______________________________________________________________________________________
ns
50
ns
50
ns
50
ns
ns
5.0V 8-Bit Programmable
Timing Element
(VCC = +4.75V to +5.25V, TA = -40°C to +85°C, unless otherwise noted.)
PARAMETER
SYMBOL
E to Delay Valid
t EDV
E to Delay Invalid
t EDX
Power-Up Time
t PU
Delay Step Size
t STEP
Step 0 Delay
CONDITIONS
MIN
MAX
UNITS
50
μs
0
ns
100
TA = +25°C
tD0
(Note 2)
Step 0 Delay Initial Accuracy
VCC = 5V, TA = +25°C
Step 0 Voltage Variation
Step 0 Temperature Variation
0°C to +70°C
Step 0 Temperature Variation
Step 255 Delay
TYP
tD255
Step 255 Delay Initial Accuracy
+0.25
+1
ns
17
20
23
ns
-0.6
+0.6
ns
-0.4
+0.4
ns
-1
+1
ns
-40°C to +85°C
-1
(Note 2)
77
VCC = 5V, TA = +25°C
Step 255 Voltage Variation
ms
-0.75
+1
ns
88
ns
-0.6
+0.6
ns
83.75
-0.4
+0.4
ns
Step 255 Temperature Variation
0°C to +70°C
-3
+3
ns
Step 255 Temperature Variation
-40°C to +85°C
-5
+5
ns
VCC = 5V, TA = +25°C (Note 3)
-2
+2
ns
Integral Nonlinearity
(Deviation from Straight Line)
t ERR
Minimum Input Pulse Width
0
tWI
(Note 4)
40
ns
Minimum Input Period
t PER
(Note 5)
80
ns
Input Rise and Fall Times
tR, tF
(Note 6)
0
1
μs
Note 1: All voltages are referenced to ground.
Note 2: Measured from rising edge of the input to the rising edge of the output. The programmed delay, tD, can be programmed
with values from 0 to 255. See Figure 1.
Note 3: See the Integral Nonlinearity section and Figure 5.
Note 4: This is the minimum allowable interval between transitions on the input to ensure accurate device operation. This parameter
can be violated but timing accuracy may be impaired and ultimately very narrow pulse widths will result in no output from
the device. See Figure 1.
Note 5: When a 50% duty cycle input clock is used, this defines the highest usable clock frequency. When asymmetrical clock
inputs are used, the maximum usable clock frequency must be reduced to conform to the minimum input pulse-width
requirement. See Figure 1.
Note 6: Faster rise and fall times give the greatest accuracy in measured delay. Slow edges (outside the specification maximum)
can result in erratic operations.
tWI
tWI
IN
IN
OUT
tD
DS1124
tD0
tD0
OUT
TIMING REFERENCED TO 1.5V.
tD
Figure 1. Delay Timing Diagram
_______________________________________________________________________________________
3
DS1124
AC ELECTRICAL CHARACTERISTICS (continued)
Typical Operating Characteristics
(VCC = +5.0V, TA = +25°C, unless otherwise noted.)
0.4
PROGRAMMED DELAY (ns)
70
60
50
40
30
20
STEP 255
1.5
PROGRAMMED DELAY (ns)
80
2.0
DS1124 toc02
0.6
DS1124 toc01
90
0.2
0
STEP 0
-0.2
-0.4
25 50 75 100 125 150 175 200 225 250
STEP 0
-0.5
-1.0
4.75
4.85
4.95
5.05
5.15
-40
5.25
-20
0
20
40
60
PROGRAMMED STEP (dec)
SUPPLY VOLTAGE (V)
TEMPERATURE (°C)
ACTIVE SUPPLY CURRENT
vs. INPUT FREQUENCY
STANDBY SUPPLY CURRENT
vs. TEMPERATURE
OUTPUT VOLTAGE LOW
vs. OUTPUT CURRENT
18.5
18.0
17.5
17.0
23
VCC = 4.75V
0.25
OUTPUT VOLTAGE (V)
19.0
VCC = 5.25V
24
0.30
DS1124 toc05
19.5
25
STANDBY SUPPLY CURRENT (mA)
DS1124 toc04
20.0
22
21
20
19
18
17
80
0.20
0.15
0.10
0.05
16
16.5
0
15
1
10
100
1000
10000
INPUT (IN) FREQUENCY (kHz)
4
0
-2.0
-0.6
0
0.5
-1.5
10
0
STEP 255
1.0
DS1124 toc06
TYPICAL DELAY (ns)
CHANGE FROM NOMINAL DELAY
vs. TEMPERATURE
CHANGE FROM NOMINAL DELAY
vs. SUPPLY VOLTAGE
DS1124 toc03
TYPICAL DELAY
vs. PROGRAMMED STEP
ACTIVE SUPPLY CURRENT (mA)
DS1124
5.0V 8-Bit Programmable
Timing Element
100000
-40
-20
0
20
40
TEMPERATURE (°C)
60
80
0
2
4
6
OUTPUT CURRENT (mA)
_______________________________________________________________________________________
8
10
5.0V 8-Bit Programmable
Timing Element
4.70
4.65
4.60
4.55
4.50
0.5
0
-0.5
-8
-6
-4
-2
0
0.5
0
-0.5
-1.0
-1.0
-10
1.0
DS1124 toc09
DS1124 toc08
4.75
1.0
DELAY INTEGRAL NONLINEARITY (ns)
DS1124 toc07
4.80
OUTPUT VOLTAGE (V)
DELAY DIFFERENTIAL NONLINEARITY
vs. STEP
DELAY INTEGRAL NONLINEARITY
vs. STEP
DELAY DIFFERENTIAL NONLINEARITY (ns)
OUTPUT VOLTAGE HIGH
vs. OUTPUT CURRENT
0
OUTPUT CURRENT (mA)
25 50 75 100 125 150 175 200 225 250
0
25 50 75 100 125 150 175 200 225 250
STEP (dec)
STEP (dec)
Pin Description
PIN
NAME
1
IN
Delay Input Signal
FUNCTION
2
E
Input Enable
3
Q
4, 5
GND
Serial Data Output
6
OUT
Delay Output Signal
7
CLK
Serial Clock Input
8
D
Serial Data Input
9, 10
VCC
Ground. Both grounds must be connected.
Power Supply. Both supplies must be connected.
_______________________________________________________________________________________
5
DS1124
Typical Operating Characteristics (continued)
(VCC = +5.0V, TA = +25°C, unless otherwise noted.)
5.0V 8-Bit Programmable
Timing Element
DS1124
Block Diagram
PROGRAMMABLE
DELAY
IN
OUT
8
8-BIT LATCH
E
8
8-BIT SHIFT
REGISTER
Q
CLK
DS1124
D
Detailed Description
The DS1124 is an 8-bit programmable delay line that
can be adjusted between 256 different delay intervals.
The DS1124 architecture (see Figure 2) allows some
signals to be delayed by more than one period, which
lets the phase of the signal to be adjusted up to a full
360°. Programming is performed by a 3-wire serial
interface. Using the 3-wire interface, it is possible to
cascade multiple devices together for systems requiring multiple programmable delays without using additional I/O resources.
Using the Serial Programming Interface
Serial mode operates similar to a shift register. When the
E pin is set at a high logic level, it enables the shift register and CLK clocks the data, D, into the register one bit at
a time starting with the most significant bit. After all 8 bits
are shifted into the DS1124, E must be pulled low to end
the data transfer and activate the new value. A settling
time (tEDV) is required after E is pulled low before the
signal delay will meet its specified accuracy. A timing
diagram for the serial interface is shown in Figure 3.
The 3-wire interface also has an output (Q) that can be
used to cascade multiple 3-wire devices, and it can be
used to read the current value of the devices on the
bus. To read the current values stored by the 3-wire
device(s), the latch must be enabled and the value of Q
must be read and then written back to D before the register is clocked. This causes the current value of the
register to be written back into the DS1124 as it is
being read. This can be accomplished in a couple of
different ways. If the microprocessor has an I/O pin that
is high impedance when set as an input, a feedback
resistor (RFB, generally between 1kΩ and 10kΩ) can be
used to write the data on Q back to D as the value is
read, see Figure 4A. If the microprocessor has an internal pullup on its I/O pins, or only offers separate input
and output pins, the value in the register can still be
read. The circuit shown in Figure 4B allows the Q values to read by the microprocessor, which must write
the Q value to D before it can clock the bus to read the
next bit. If the Q values are read without writing them to
D (with the pullup or otherwise), the read will be
destructive. A destructive read cycle likely results in an
undesirable change in the delay setting.
IN
OUT
tSTEP
256 CONTROL LINES
256 LINE DECODER
8-BIT LATCH VALUE
tSTEP
tSTEP
tSTEP
255 UNIT DELAY CELLS
DS1124
Figure 2. Conceptual Design
6
_______________________________________________________________________________________
5.0V 8-Bit Programmable
Timing Element
DS1124
tEW
ENABLE
(E)
tES
tCW
tEH
tCW
CLOCK
(CLK)
tDSC
SERIAL
INPUT
(D)
tDHC
NEW BIT 7
tCQV
tEQV
SERIAL
OUTPUT
(Q)
NEW BIT 6
OLD BIT 7
NEW BIT 0
tEQZ
tCQX
OLD BIT 6
OLD BIT 0
tEDV
tEDX
DELAY
TIME
PREVIOUS VALUE
NEW VALUE
Figure 3. Serial Interface Timing Diagram
Figure 4C shows how to cascade multiple DS1124s onto
the same 3-wire bus. One important detail of writing
software for cascaded 3-wire devices is that all the
devices on the bus must be written to or read from
during each read or write cycle. Attempting to write to
only the first device (U1) would cause the data stored in
U1 to be shifted to U2, U2’s data would be shifted to U3,
etc. As shown, the microprocessor would have to shift
24 bits during each read or write cycle to avoid inadvertently changing the settings in any of the 3-wire devices.
Also note that the feedback resistor or a separate input
(not shown) can still be used to read the 3-wire device
settings when multiple devices are cascaded.
Integral Nonlinearity
Integral nonlinearity (INL) is defined as the deviation
from a straight line response drawn between the measured step zero delay (tD0) and the measured step 255
delay (tD255) with respect to the step 0 delay. Figure 5
shows INL’s effect on delay performance graphically.
Application Information
Power-Supply Decoupling
To achieve the best results when using the DS1124,
decouple the power supply with a 0.01µF and a 0.1µF
capacitor. Use high-quality, ceramic, surface mount
capacitors, and mount the capacitors as close as possible to the VCC and GND pins of the DS1124 to minimize
lead inductance. The DS1124 may not perform as specified if good decoupling practices are not followed.
_______________________________________________________________________________________
7
DS1124
5.0V 8-Bit Programmable
Timing Element
MICROPROCESSOR
MICROPROCESSOR
OUTPUT
E
OUTPUT
CLK
I/O PIN
DS1124
D
Q
OUTPUT
E
OUTPUT
CLK
OUTPUT
D
DS1124
Q
INPUT
RFB
A) USING A FEEDBACK RESISTOR WITH AN I/O PIN FOR READING THE DS1124.
B) USING A SEPARATE INPUT PIN TO READ THE DS1124.
MICROPROCESSOR
OUTPUT
OUTPUT
I/O PIN
E
DS1124
U1
E
CLK
D
DS1124
U2
E
CLK
Q
DS1124
U3
CLK
D
Q
D
Q
RFB
C) CASCADING MULTIPLE DS1124s ON A 3-WIRE BUS.
Figure 4. Examples Using the Serial Interface
Test Conditions
Input:
Ambient Temperature:
Supply Voltage (VCC):
25°C ±3°C
Input Pulse:
5.0V ±0.1V
High = 3.0V ±0.1V
Source Impedance:
Low = 0.0V ±0.1V
50Ω max
Rise and Fall Times:
Pulse Width:
Period:
3.0ns max (measured between 0.6V and 2.4V)
250ns
10µs
Output: The outputs are loaded with 15pF. Delay is measured between the 1.5V level of the rising or falling edge of
the input signal and the corresponding edge of the output signal.
Note: Above conditions are for test only and do not restrict the operation of the device under other data sheet conditions.
8
_______________________________________________________________________________________
5.0V 8-Bit Programmable
Timing Element
DELAY
DS1124
MEASURED tD255
MEASURED DELAY
FOR ALL STEPS
INL
LINE FIT BETWEEN
MEASURED MAX
AND MIN DELAY
EXAGGERATED
MEASURED tD0
STEP
0
64
128
192
255
Figure 5. Integral Nonlinearity
Package Information
For the latest package outline information and land patterns, go to www.maxim-ic.com/packages.
PACKAGE TYPE
PACKAGE CODE
DOCUMENT NO.
10 µSOP
—
21-0061
_______________________________________________________________________________________
9
DS1124
5.0V 8-Bit Programmable
Timing Element
Revision History
PAGES
CHANGED
REVISION
NUMBER
REVISION
DATE
0
7/07
Initial release.
—
1
4/09
Added VCC = 5V to the t ERR specification in the Electrical Characteristics table,
indicating that it is only tested at TA = 25°C and VCC = 5V.
3
DESCRIPTION
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are
implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
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