AD ADP195 Logic controlled, high-side power switch with reverse current blocking Datasheet

Logic Controlled, High-Side Power Switch
with Reverse Current Blocking
ADP195
Low RDSON of 65 mΩ @ 1.8 V
Low input voltage range: 1.1 V to 3.6 V
>1 A continuous operating current @ 85°C
Built-in level shift for control logic that can be operated by
1.2 V logic
Low 10 μA (maximum) ground current @ 3.6 V
Low 1 μA (typical) ground current @ 1.8 V
Low 4 μA (maximum) reverse current @ 3.6 V
Reverse current blocking
Ultralow shutdown current: <0.7 μA
Ultrasmall 1.0 mm × 1.0 mm, 4-ball, 0.5 mm pitch WLCSP
TYPICAL APPLICATIONS CIRCUIT
REVERSE
POLARITY
PROTECTION
ADP195
VIN
+
–
VOUT
GND
ON
EN OFF
LEVEL SHIFT
AND SLEW
RATE CONTROL
LOAD
08679-001
FEATURES
Figure 1.
GENERAL DESCRIPTION
APPLICATIONS
Mobile phones
Digital cameras and audio devices
Portable and battery-powered equipment
The ADP195 is a high-side load switch designed for operation
between 1.1 V to 3.6 V and protected against reverse current flow
from output to input. This load switch provides power domain
isolation helping extended power domain isolation. The device
contains a low on-resistance, P-channel MOSFET that supports
over 500 mA of continuous current and minimizes power loss. The
low 10 μA of quiescent current and ultralow shutdown current
make the ADP195 ideal for battery-operated portable equipment.
The built-in level shifter for enable logic makes the ADP195
compatible with many processors and GPIO controllers.
In addition to operating performance, the ADP195 occupies
minimal printed circuit board (PCB) space with an area of less
than 1.0 mm2 and a height of 0.60 mm.
It is available in an ultrasmall 1 mm × 1 mm, 4-ball, 0.5 mm
pitch WLCSP.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no
responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other
rights of third parties that may result from its use. Specifications subject to change without notice. No
license is granted by implication or otherwise under any patent or patent rights of Analog Devices.
Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781.329.4700
www.analog.com
Fax: 781.461.3113
©2010 Analog Devices, Inc. All rights reserved.
ADP195
TABLE OF CONTENTS
Features .............................................................................................. 1
Typical Performance Characteristics ..............................................6
Applications ....................................................................................... 1
Theory of Operation .........................................................................9
Typical Applications Circuit............................................................ 1
Applications Information .............................................................. 10
General Description ......................................................................... 1
Ground Current .......................................................................... 10
Revision History ............................................................................... 2
Enable Feature ............................................................................ 10
Specifications..................................................................................... 3
Timing ......................................................................................... 11
Timing Diagram ........................................................................... 3
Outline Dimensions ....................................................................... 12
Absolute Maximum Ratings............................................................ 4
Ordering Guide .......................................................................... 12
ESD Caution .................................................................................. 4
Pin Configuration and Function Descriptions ............................. 5
REVISION HISTORY
3/10—Revision 0: Initial Version
Rev. 0 | Page 2 of 12
ADP195
SPECIFICATIONS
VIN = 1.8 V, VEN = VIN, IOUT = 200 mA, TA = 25°C, unless otherwise noted.
Table 1.
Parameter
INPUT VOLTAGE RANGE
EN INPUT
EN Input Threshold
Symbol
VIN
Conditions
TJ = −40°C to +85°C
Min
1.1
VIH
0.29
0.45
EN Input Pull-Down Current
VIN Shutdown Current
REVERSE BLOCKING
VOUT Current
Hysteresis
CURRENT
Ground Current
IEN
1.1 V ≤ VIN < 1.8 V, TJ = −40°C to +85°C
1.8 V ≤ VIN ≤ 3.6 V, TJ = −40°C to +85°C
VIN = 1.8 V
VEN = 0 V, VIN = 0 V, VOUT = 3.6 V
Off State Current
VIN to VOUT RESISTANCE
VOUT TURN-ON DELAY TIME
Turn-On Delay Time
VEN = 0 V, VIN = 0 V, VOUT = 3.6 V
|VIN − VOUT|
IGND
VOUT = 0, includes VEN pull-down and reverse blocking
bias current, VIN = 3.6 V, TJ = −40°C to +85°C
VOUT = 0, includes VEN pull-down and reverse blocking
bias current, VIN = 1.8 V
VEN = GND (includes reverse blocking bias current), VOUT = 0 V
VEN = GND, TJ = −40°C to +85°C, VOUT = 0 V
IOFF
Typ
Max
3.6
Unit
V
1.0
1.2
V
500
−10
nA
nA
4
75
μA
mV
10
1
μA
μA
0.7
5
μA
μA
RDSON
tON_DLY
VIN = 3.6 V, ILOAD = 200 mA, VEN = 3.6 V
VIN = 2.5 V, ILOAD = 200 mA, VEN = 2.5 V
VIN = 1.8 V, ILOAD = 200 mA, VEN = 1.8 V
VIN = 1.8 V, ILOAD = 200 mA, VEN = 1.8 V, TJ = −40°C to +85°C
VIN = 1.5 V, ILOAD = 200 mA, VEN = 1.5 V
VIN = 1.2 V, ILOAD = 200 mA, VEN = 1.2 V
0.050
0.055
0.065
0.075
0.100
Ω
Ω
Ω
Ω
Ω
Ω
VIN = 1.8 V, ILOAD = 200 mA, VEN = 1.8 V, CLOAD = 1 μF
VIN = 3.6 V, ILOAD = 200 mA, VEN = 3.6 V, CLOAD = 1 μF
5
1.5
μs
μs
TIMING DIAGRAM
VEN
TURN-ON
DELAY
90%
TURN-OFF
DELAY
VOUT
TURN-ON
RISE
TURN-OFF
FALL
Figure 2. Timing Diagram
Rev. 0 | Page 3 of 12
08679-002
10%
0.095
ADP195
ABSOLUTE MAXIMUM RATINGS
Table 3. Typical ΨJB Values
Table 2.
Parameter
VIN to GND
VOUT to GND
EN to GND
Continuous Drain Current
TA = 25°C
TA = 85°C
Continuous Diode Current
Storage Temperature Range
Operating Junction Temperature Range
Soldering Conditions
Rating
−0.3 V to +4.0 V
−0.3 V to VIN
−0.3 V to +4.0 V
Package
4-Ball WLCSP
ESD CAUTION
±2 A
±1.1 A
−50 mA
−65°C to +150°C
−40°C to +125°C
JEDEC J-STD-020
Stresses above those listed under Absolute Maximum Ratings
may cause permanent damage to the device. This is a stress
rating only; functional operation of the device at these or any
other conditions above those indicated in the operational
section of this specification is not implied. Exposure to absolute
maximum rating conditions for extended periods may affect
device reliability.
Rev. 0 | Page 4 of 12
ΨJB
58.4
Unit
°C/W
ADP195
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
A
1
2
VIN
VOUT
B
EN
GND
08679-003
TOP VIEW
(Not to Scale)
Figure 3. 4-Ball WLCSP Pin Configuration
Table 4. Pin Function Descriptions
Pin No.
A1
A2
B1
B2
Mnemonic
VIN
VOUT
EN
GND
Description
Input Voltage.
Output Voltage.
Enable Input. Drive EN high to turn on the switch and drive EN low to turn off the switch.
Ground.
Rev. 0 | Page 5 of 12
ADP195
TYPICAL PERFORMANCE CHARACTERISTICS
VIN = 1.8 V, VEN = VIN, CIN = COUT = 1 μF, TA = 25°C, unless otherwise noted.
0.12
0.10
IOUT = 10mA
IOUT = 100mA
IOUT = 200mA
IOUT = 500mA
IOUT = 1000mA
VEN
VOUT
1
RDSON (Ω)
0.08
2
0.06
0.04
LOAD CURRENT
0.02
0
25
85
125
TEMPERATURE (°C)
CH1 2V BW
CH3 1A Ω BW
IOUT = 10mA
IOUT = 100mA
IOUT = 200mA
IOUT = 500mA
IOUT = 1000mA
0.18
0.16
BW
M4µs
T 10%
A CH1
2.32V
Figure 7. Typical Rise Time and Inrush Current,
VIN = 3.6 V, No Load
Figure 4. RDSON vs. Temperature
0.20
CH2 2V
08679-007
–40
08679-004
0
3
VEN
VOUT
1
RDSON (Ω)
0.14
0.12
2
0.10
0.08
0.06
LOAD CURRENT
0.04
1.6
2.0
2.4
2.8
3.2
3.6
VIN (V)
CH1 2V BW
CH3 1A Ω BW
08679-005
0
1.2
Figure 5. RDSON vs. Input Voltage (VIN)
0.12
0.10
0.08
M4µs
T 10%
A CH1
2.32V
VEN
1
VOUT
0.07
2
0.06
0.05
0.04
0.03
0.02
3
LOAD CURRENT
0
0
100
200
300
400
500
600
700
800
LOAD (mA)
900
1000
CH1 2V BW
CH2 1V
CH3 100mA Ω BW
BW
M10µs
T 10%
A CH1
Figure 9. Typical Rise Time and Inrush Current,
VIN = 1.2 V, No Load
Figure 6. Voltage Drop vs. Load Current
Rev. 0 | Page 6 of 12
2.32V
08679-010
0.01
08679-006
VOLTAGE DROP (V)
0.09
BW
Figure 8. Typical Rise Time and Inrush Current,
VIN = 3.6 V, Load = 200 mA
VIN = 1.2
VIN = 1.6
VIN = 1.8
VIN = 2.2
VIN = 2.4
VIN = 2.6
VIN = 3.0
VIN = 3.6
0.11
CH2 2V
08679-009
3
0.02
ADP195
5
VIN = 1.2V
VIN = 1.4V
VIN = 2.0V
VIN = 2.4V
VIN = 2.8V
VIN = 3.2V
VIN = 3.4V
VIN = 3.6V
VEN
4
SHUTDOWN CURRENT (µA)
1
VOUT
2
LOAD CURRENT
3
2
1
BW
M10µs
T 10%
A CH1
2.32V
–1
–40
08679-011
CH1 2V BW
CH2 1V
CH3 100mA Ω BW
3.5
IOUT = 10mA
IOUT = 100mA
IOUT = 200mA
IOUT = 300mA
IOUT = 500mA
3.0
4
3
2
1
0
25
85
125
110
2.0
VIN = 1.2V
VIN = 1.4V
VIN = 2.0V
VIN = 2.4V
VIN = 2.8V
VIN = 3.2V
VIN = 3.4V
VIN = 3.6V
1.5
1.0
0.5
–15
10
35
60
85
110
TEMPERATURE (°C)
Figure 14. Reverse Input Shutdown Current vs. Temperature
9
IOUT = 10mA
IOUT = 100mA
IOUT = 200mA
IOUT = 500mA
IOUT = 1000mA
SHUTDOWN CURRENT (µA)
8
12
8
4
7
6
5
VIN = 1.2V
VIN = 1.4V
VIN = 1.6V
VIN = 1.8V
VIN = 2.0V
VIN = 2.2V
VIN = 2.6V
VIN = 3.0V
VIN = 3.2V
VIN = 3.6V
4
3
2
0
1.2
1.6
2.0
2.4
2.8
3.2
VIN (V)
3.6
0
–40
–15
10
35
60
85
110
TEMPERATURE (°C)
Figure 15. Reverse Output Shutdown Current vs. Temperature
Figure 12. Ground Current vs. Input Voltage (VIN)
Rev. 0 | Page 7 of 12
08679-015
1
08679-012
GROUND CURRENT (µA)
2.5
–0.5
–40
Figure 11. Ground Current vs. Temperature
16
85
08679-014
–40
TEMPERATURE (°C)
20
60
0
08679-008
0
35
Figure 13. Shutdown Current vs. Temperature
SHUTDOWN CURRENT (µA)
GROUND CURRENT (µA)
5
10
TEMPERATURE (°C)
Figure 10. Typical Rise Time and Inrush Current,
VIN = 1.2 V, Load = 200 mA
6
–15
08679-013
0
3
ADP195
4.0
VIN = 1.2V
VIN = 1.4V
VIN = 2.0V
VIN = 2.4V
VIN = 2.8V
VIN = 3.2V
VIN = 3.4V
VIN = 3.6V
3.0
2.5
2.0
1.5
1.0
0.5
0
–40
–15
10
35
60
85
110
TEMPERATURE (°C)
08679-016
SHUTDOWN CURRENT (µA)
3.5
Figure 16. Reverse Shutdown Current vs. Temperature
Rev. 0 | Page 8 of 12
ADP195
THEORY OF OPERATION
ADP195
REVERSE
POLARITY
PROTECTION
VIN
VOUT
GND
LEVEL SHIFT
AND SLEW
RATE CONTROL
08679-025
EN
The ADP195 is a high-side PMOS load switch. It is designed for
supply operation between 1.1 V to 3.6 V. The PMOS load switch is
designed for low on resistance, 65 mΩ at VIN = 1.8 V and supports
greater than 1 A of continuous current. It is a low quiescent current
device with a nominal 4 MΩ pull-down resistor on its enable pin
(EN). The packaging is a space-saving 1.0 mm × 1.0 mm, 4-ball
WLCSP.
Figure 17. Functional Block Diagram
Rev. 0 | Page 9 of 12
ADP195
APPLICATIONS INFORMATION
GROUND CURRENT
ENABLE FEATURE
The major source for ground current in the ADP195 is an internal
4 MΩ pull-down on the enable pin. Figure 18 shows the typical
ground current when VEN = VIN and varies from 1.2 V to 3.6 V.
The ADP195 uses the EN pin to enable and disable the VOUT
pin under normal operating conditions. As shown in Figure 20,
when a rising voltage on VEN crosses the active threshold, VOUT
turns on. When a falling voltage on VEN crosses the inactive
threshold, VOUT turns off.
10
VIN = 1.2V
VIN = 1.6V
VIN = 2.0V
VIN = 2.4V
2.0
1.8
1.6
6
1.4
VOUT (V)
GROUND CURRENT (µA)
8
VIN = 2.8V
VIN = 3.2V
VIN = 3.4V
VIN = 3.6V
4
2
1.2
1.0
0.8
0.6
50
100
150
200
250
300
350
400
450
500
LOAD (mA)
0.2
0
Figure 18. Ground Current vs. Load Current
As shown in Figure 19, an increase in quiescent current can occur
when VEN ≠ VIN. This is caused by the CMOS logic nature of the
level shift circuitry as it translates an VEN signal ≥ 1.2 V to a
logic high. This increase is a function of the VIN − VEN delta.
16
VIN = 1.2V
VIN = 1.5V
VIN = 1.8V
VIN = 2.5V
VIN = 3.6V
14
12
0.1
0.2
0.3
0.4
0.5
0.6 0.7
VEN (V)
0.8
0.9
1.0
1.1
1.2
Figure 20. Typical EN Operation
As shown in Figure 20, the EN pin has hysteresis built in. This
prevents on/off oscillations that can occur due to noise on the
EN pin as it passes through the threshold points.
The EN pin active/inactive thresholds derive from the VIN voltage;
therefore, these thresholds vary with the changing input voltage.
Figure 21 shows the typical EN active/inactive thresholds when
the input voltage varies from 1.2 V to 3.6 V.
10
1.15
6
4
2
0.65
EN INACTIVE
0.55
VIN (V)
Figure 21. Typical EN Thresholds vs. Input Voltage (VIN)
Rev. 0 | Page 10 of 12
3.60
08679-020
3.45
3.30
3.15
3.00
0.35
2.85
0.45
2.70
Figure 19. Typical Ground Current when VEN ≠ VIN
3.6
2.55
3.2
2.25
2.8
2.40
2.4
2.10
2.0
VEN (V)
1.95
1.6
1.80
1.2
0.75
1.65
0.8
EN ACTIVE
0.85
1.50
0.4
0.95
1.35
0
1.05
1.20
0
TYPICAL EN THRESHOLDS (V)
8
08679-018
IGND (µA)
0
08679-019
0
08679-017
0.4
0
ADP195
TIMING
VEN
Turn-on delay is defined as the delta between the time that VEN
reaches >1.2 V until VOUT rises to ~10% of its final value. The
ADP195 includes circuitry to have typical 5 μs turn-on delay at
3.6 V VIN to limit the VIN inrush current. As shown in Figure 22,
the turn-on delay is dependent on the input voltage.
5.0
2
VEN
VIN = 1.2V
VIN = 1.8V
VIN = 2.5V
VIN = 3.6V
4.5
4.0
LOAD CURRENT
3
3.5
CH1 2V BW
CH2 1V
CH3 200mA Ω BW
2.5
2.0
A CH1
2.32V
Figure 24. Typical Rise Time and Inrush Current,
CLOAD = 1 μF, VIN = 1.8 V, Load = 200 mA
1.5
The turn-off time is defined as the delta between the time from
90% to 10% of VOUT reaching its final value. It is also dependent on
the RC time constant.
1.0
0
5
10
15
20
25
30
35
40
TIME (µs)
08679-021
0.5
0
M4µs
T 10%
08679-023
3.0
5.0
VEN
VOUT AT 200mA
VOUT AT 100mA
4.5
Figure 22. Typical Turn-On Delay Time with Varying Input Voltage
4.0
3.5
VOLTAGE (V)
The rise time is defined as the delta between the time from
10% to 90% of VOUT reaching its final value. It is dependent on
the RC time constant where C = load capacitance (CLOAD) and
R = RDSON||RLOAD. Because RDSON is usually smaller than RLOAD,
an adequate approximation for RC is RDSON × CLOAD. An input
or load capacitor is not needed for the ADP195; however, capacitors
can be used to suppress noise on the board. If significant load
capacitance is connected, inrush current is a concern.
3.0
2.5
2.0
1.5
1.0
0.5
0
VEN
0
20
40
60
TIME (µs)
VOUT
1
Figure 25. Typical Turn-Off Time
2
LOAD CURRENT
CH1 2V BW
CH2 1V
CH3 200mA Ω BW
BW
M4µs
T 10%
A CH1
2.32V
08679-022
3
Figure 23. Typical Rise Time and Inrush Current,
CLOAD = 1 μF, VIN = 1.8 V, No Load
Rev. 0 | Page 11 of 12
80
100
08679-024
VOLTAGE (V)
VOUT
1
ADP195
OUTLINE DIMENSIONS
0.640
0.595
0.550
SEATING
PLANE
1
A
0.340
0.320
0.300
1.065
1.025
0.985
BALL A1
IDENTIFIER
2
B
0.50
REF
TOP VIEW
(BALL SIDE DOWN)
0.270
0.240
0.210
BOTTOM VIEW
(BALL SIDE UP)
0.05 NOM
COPLANARITY
110309-A
0.370
0.355
0.340
0.990
0.950
0.910
Figure 26. 4-Ball Wafer Level Chip Scale Package [WLCSP]
(CB-4-4)
Dimensions shown in millimeters
ORDERING GUIDE
Model 1
ADP195ACBZ-R7
1
Temperature Range
−40°C to +85°C
Package Description
4-Ball Wafer Level Chip Scale Package [WLCSP]
Z = RoHS Compliant Part.
©2010 Analog Devices, Inc. All rights reserved. Trademarks and
registered trademarks are the property of their respective owners.
D08679-0-3/10(0)
Rev. 0 | Page 12 of 12
Package Option
CB-4-4
Branding
5Y