MCP1804 150 mA, 28V LDO Regulator With Shutdown Features Description • 150 mA Output Current • Low Drop Out Voltage, 260 mV typical @ 20 mA, VR = 3.3V • 50 µA Typical Quiescent Current • 0.01 µA Typical Shutdown Current • Input Operating Voltage Range: 2.0V to 28.0V • Standard Output Voltage Options (1.8V, 2.5V, 3.0V, 3.3V, 5.0V, 10.0V, 12.0V) • Output Voltage Accuracy: ±2% • Output voltages from 1.8V to 18.0V in 0.1V increments are available upon request • Stable with Ceramic output capacitors • Current Limit Protection With Current Foldback • Shutdown pin • High PSRR: 50 dB typical @ 1 kHz The MCP1804 is a family of CMOS low dropout (LDO) voltage regulators that can deliver up to 150 mA of current while consuming only 50 µA of quiescent current (typical, 1.8V ≤ VOUT ≤ 5.0V). The input operating range is specified from 2.0V to 28.0V. Applications • • • • • • Cordless Phones, Wireless Communications PDAs, Notebook and Netbook Computers Digital Cameras Microcontroller Power Car Audio and Navigation Systems Home Appliances Related Literature • AN765, “Using Microchip’s Micropower LDOs”, DS00765, Microchip Technology Inc., ©2002 • AN766, “Pin-Compatible CMOS Upgrades to BiPolar LDOs”, DS00766, Microchip Technology Inc., ©2002 • AN792, “A Method to Determine How Much Power a SOT23 Can Dissipate in an Application”, DS00792, Microchip Technology Inc., ©2001 The MCP1804 is capable of delivering 100 mA with only 1300 mV (typical) of input to output voltage differential (VOUT = 3.3V). The output voltage tolerance of the MCP1804 at +25°C is a maximum of ±2%. Line regulation is ±0.15% typical at +25°C. The LDO input and output is stable with 0.1 µF of input and output capacitance. Ceramic, tantalum or aluminum electrolytic capacitors can all be used for input and output. Overcurrent limit with current foldback to 40 mA (typical) provides short-circuit protection. A shutdown (SHDN) function allows the output to be enabled or disabled. When disabled, the MCP1804 draws only 0.01 µA of current (typical). Package options include the SOT-23-5 (SOT-25), SOT89-3, SOT-89-5, and SOT-223-3. Package Types SOT-23-5 VOUT SHDN VIN NC 5 4 5 4 (Top View) 1 2 3 VIN GND NC 1 1 2 3 VOUT GND SHDN SOT-223 SOT-89-3 (Top View) (Top View) 2 VOUT GND © 2009 Microchip Technology Inc. SOT-89-5 3 1 2 3 VIN VOUT VSS VIN DS22200A-page 1 MCP1804 Functional Block Diagram VOUT VIN * Thermal Protection SHDN Shutdown Control Voltage Reference + Current Limiter Error Amplifier *5-Pin Versions Only GND Typical Application Circuit MCP1804 VIN 1 VIN VOUT 5 5.0V @ 30 mA COUT 1 µF Ceramic SOT-25 12V Battery GND 3 NC SHDN + CIN 1 µF Ceramic DS22200A-page 2 2 VOUT 4 © 2009 Microchip Technology Inc. MCP1804 1.0 ELECTRICAL CHARACTERISTICS † Notice: Stresses above those listed under “Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at those or any other conditions above those indicated in the operational listings of this specification is not implied. Exposure to maximum rating conditions for extended periods may affect device reliability. Absolute Maximum Ratings † Input Voltage ...................................................... +30V Output Current (Continuous)........... PD/(VIN-VOUT)mA Output Current (Peak)...................................... 300 mA Output Voltage ..................... (VSS-0.3V) to (VIN+0.3V) SHDN Voltage ................................(VSS-0.3V) to +30V Continuous Power Dissipation: SOT-25......................................................... 250 mW SOT-89......................................................... 500 mW SOT-223....................................................... 300 mW ELECTRICAL CHARACTERISTICS Electrical Specifications: Unless otherwise specified, all limits are established for VIN = VR + 2.0V, Note 1, COUT = 1 µF (X7R), CIN = 1 µF (X7R), VSHDN = VIN, TA = +25°C Parameters Sym Min Typ Max Units 2.0 — 28.0 V — 50 105 µA Conditions Input / Output Characteristics Input Operating Voltage VIN Input Quiescent Current Iq Shutdown Current ISHDN Maximum Output Current IOUT_mA Current Limiter Output Short Circuit Current Output Voltage Regulation VOUT Temperature Coefficient Line Regulation Note 1: 2: 3: 4: 5: IL = 0 mA 1.8V ≤ VOUT ≤ 5.0V — 60 115 µA 5.1V ≤ VOUT ≤ 12.0V — 65 125 µA 12.1V ≤ VOUT ≤ 18.0V — 0.01 0.10 µA SHDN = 0V VIN = VR + 3.0V 100 — — mA VOUT < 3.0V 150 — — mA VOUT ≥ 3.0V ILIMIT — 200 — mA IOUT_SC — 40 — mA VOUT VR-2.0% VR VR+2.0% V TCVOUT — ±100 — ppm/°C ΔVOUT/ (VOUTXΔVIN) Note 1 IOUT = 10 mA, Note 2 IOUT = 20 mA, -40°C ≤ TA ≤ +85°C, Note 3 (VR + 2V) ≤ VIN ≤ 28V, Note 1 — 0.05 0.10 %/V IOUT = 5 mA — 0.15 0.30 %/V IOUT = 13 mA The minimum VIN must meet one condition: VIN ≥ (VR + 2.0V). VR is the nominal regulator output voltage with an input voltage of VIN = VR + 2.0V. For example: VR = 1.8V, 2.5V, 3.0V, 3.3V, etc. TCVOUT = (VOUT-HIGH - VOUT-LOW) *106 / (VR * ΔTemperature), VOUT-HIGH = highest voltage measured over the temperature range. VOUT-LOW = lowest voltage measured over the temperature range. Load regulation is measured at a constant junction temperature using low duty cycle pulse testing. Changes in output voltage due to heating effects are determined using thermal regulation specification TCVOUT. Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its measured value with an applied input voltage of VR + 2.0V. © 2009 Microchip Technology Inc. DS22200A-page 3 MCP1804 ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise specified, all limits are established for VIN = VR + 2.0V, Note 1, COUT = 1 µF (X7R), CIN = 1 µF (X7R), VSHDN = VIN, TA = +25°C Parameters Load Regulation Dropout Voltage Note 1, Note 5 Sym Min Typ Max Units — 50 90 mV ΔVOUT/VOUT Conditions IL = 1.0 mA to 50 mA, Note 4 1.8V ≤ VOUT ≤ 5.0V — 110 175 mV 5.1V ≤ VOUT ≤ 12.0V — 180 275 mV 12.1V ≤ VOUT ≤ 18.0V VDROPOUT IL = 20 mA — 550 710 V 1.8V ≤ VR ≤ 1.9V — 450 600 V 2.0V ≤ VR ≤ 2.1V — 390 520 V 2.2V ≤ VR ≤ 2.4V — 310 450 V 2.5V ≤ VR ≤ 2.9V — 260 360 V 3.0V ≤ VR ≤ 3.9V — 220 320 V 4.0V ≤ VR ≤ 4.9V — 190 280 V 5.0V ≤ VR ≤ 6.4V — 170 230 V 6.5V ≤ VR ≤ 8.0V — 130 190 V 8.1V ≤ VR ≤ 10.0V — 120 170 V 10.1V ≤ VR ≤ 18.0V IL = 100 mA — 2200 2700 V 1.8V ≤ VR ≤ 1.9V — 1900 2600 V 2.0V ≤ VR ≤ 2.1V — 1700 2200 V 2.2V ≤ VR ≤ 2.4V — 1500 1900 V 2.5V ≤ VR ≤ 2.9V — 1300 1700 V 3.0V ≤ VR ≤ 3.9V — 1100 1500 V 4.0V ≤ VR ≤ 4.9V — 1000 1300 V 5.0V ≤ VR ≤ 6.4V — 800 1150 V 6.5V ≤ VR ≤ 8.0V — 700 950 V 8.1V ≤ VR ≤ 10.0V — 650 850 V 10.1V ≤ VR ≤ 18.0V SHDN “H” Voltage VSHDN_H 1.1 — VIN V VIN = 28V SHDN “H” Voltage VSHDN_L 0 — 0.35 V VIN = 28V ISHDN -0.1 — 0.1 µA VIN = 28V, VSHDN = GND or VIN SHDN Current Note 1: 2: 3: 4: 5: The minimum VIN must meet one condition: VIN ≥ (VR + 2.0V). VR is the nominal regulator output voltage with an input voltage of VIN = VR + 2.0V. For example: VR = 1.8V, 2.5V, 3.0V, 3.3V, etc. TCVOUT = (VOUT-HIGH - VOUT-LOW) *106 / (VR * ΔTemperature), VOUT-HIGH = highest voltage measured over the temperature range. VOUT-LOW = lowest voltage measured over the temperature range. Load regulation is measured at a constant junction temperature using low duty cycle pulse testing. Changes in output voltage due to heating effects are determined using thermal regulation specification TCVOUT. Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its measured value with an applied input voltage of VR + 2.0V. DS22200A-page 4 © 2009 Microchip Technology Inc. MCP1804 ELECTRICAL CHARACTERISTICS (CONTINUED) Electrical Specifications: Unless otherwise specified, all limits are established for VIN = VR + 2.0V, Note 1, COUT = 1 µF (X7R), CIN = 1 µF (X7R), VSHDN = VIN, TA = +25°C Parameters Sym Min Typ Max Units Conditions PSRR — 50 — dB f = 1 kHz, IL = 20 mA, VINAC = 0.5V pk-pk, CIN = 0 µF Thermal Shutdown Protection TSD — 150 — °C TJ Thermal Shutdown Hysteresis ΔTSD — 25 — °C Power Supply Ripple Rejection Ratio Note 1: 2: 3: 4: 5: The minimum VIN must meet one condition: VIN ≥ (VR + 2.0V). VR is the nominal regulator output voltage with an input voltage of VIN = VR + 2.0V. For example: VR = 1.8V, 2.5V, 3.0V, 3.3V, etc. TCVOUT = (VOUT-HIGH - VOUT-LOW) *106 / (VR * ΔTemperature), VOUT-HIGH = highest voltage measured over the temperature range. VOUT-LOW = lowest voltage measured over the temperature range. Load regulation is measured at a constant junction temperature using low duty cycle pulse testing. Changes in output voltage due to heating effects are determined using thermal regulation specification TCVOUT. Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its measured value with an applied input voltage of VR + 2.0V. TEMPERATURE SPECIFICATIONS Parameters Sym Min Typ Max Units Conditions Temperature Ranges Operating Temperature Range TA -40 +85 °C Tstg -55 +125 °C Thermal Resistance, SOT-25 θJA θJC — — 256 81 — — °C/W EIA/JEDEC JESD51-7 FR-4 0.063 4-Layer Board Thermal Resistance, SOT-89 θJA θJC — — 180 100 — — °C/W EIA/JEDEC JESD51-7 FR-4 0.063 4-Layer Board Thermal Resistance, SOT-223 θJA θJC — — 62 15 — — °C/W EIA/JEDEC JESD51-7 FR-4 0.063 4-Layer Board Storage Temperature Range Thermal Package Resistance © 2009 Microchip Technology Inc. DS22200A-page 5 MCP1804 NOTES: DS22200A-page 6 © 2009 Microchip Technology Inc. MCP1804 2.0 TYPICAL PERFORMANCE CURVES Note: The graphs and tables provided following this note are a statistical summary based on a limited number of samples and are provided for informational purposes only. The performance characteristics listed herein are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified operating range (e.g., outside specified power supply range) and therefore outside the warranted range. 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 VIN=SHDN=4.8V VR=2.8V Ta=-40℃ Output Voltage (V) Output Voltage (V) Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA = +25°C, VIN = VR + 2.0V. Ta=25℃ Ta=85℃ 0 50 100 150 200 250 2.0 1.8 1.6 1.4 1.2 1.0 0.8 0.6 0.4 0.2 0.0 VR=1.8V VIN=2.8V VIN=3.8V VIN=4.8V 0 300 50 FIGURE 2-1: Current. Output Voltage vs. Output FIGURE 2-4: Current. VIN=SHDN=8.0V 200 250 300 Output Voltage vs. Output VR=5V 5.0 4.0 3.0 2.0 Ta=-40℃ Ta=25℃ Ta=85℃ 1.0 VR=5.0V Output Voltage (V) Output Voltage (V) 150 6.0 6.0 5.0 4.0 3.0 2.0 VIN=6V VIN=7V VIN=8V 1.0 0.0 0.0 0 50 100 150 200 250 300 0 50 14.0 Output Voltage vs. Output FIGURE 2-5: Current. 150 200 250 300 Output Voltage vs. Output 14.0 VIN=SHDN=15V VR=12V 12.0 10.0 8.0 6.0 4.0 Ta=-40℃ Ta=25℃ Ta=85℃ 2.0 0.0 VR=12V Output Voltage (V) FIGURE 2-2: Current. 100 Output Current (mA) Output Current (mA) Output Voltage (V) 100 Output Current (mA) Output Current (mA) 12.0 10.0 VIN=13V VIN=14V VIN=15V 8.0 6.0 4.0 2.0 0.0 0 50 100 150 200 250 300 0 Output Current (mA) FIGURE 2-3: Current. Output Voltage vs. Output © 2009 Microchip Technology Inc. 50 100 150 200 250 300 Output Current (mA) FIGURE 2-6: Current. Output Voltage vs. Output DS22200A-page 7 MCP1804 Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA = +25°C, VIN = VR + 2.0V. 2.1 2.1 VR=1.8V 2.0 Output Voltage (V) Output Voltage (V) VR=1.8V IOUT=1mA IOUT=10mA 1.9 IOUT=30mA 1.8 1.7 2.0 1.9 1.8 1.7 1.6 1.6 1.5 1.5 IOUT=1mA IOUT=10mA IOUT=30mA 0.8 1.3 1.8 2.3 2.8 3.3 3.8 4 8 Input Voltage (V) 6.0 5.8 5.6 5.4 5.2 5.0 4.8 4.6 4.4 4.2 4.0 Output Voltage vs. Input FIGURE 2-10: Voltage. VR=5V Output Voltage (V) Output Voltage (V) FIGURE 2-7: Voltage. IOUT=1mA IOUT=10mA IOUT=30mA 4.0 4.5 5.0 16 20 24 5.5 6.0 5.8 5.6 5.4 5.2 5.0 4.8 4.6 4.4 4.2 4.0 VR=5V IOUT=1mA IOUT=10mA IOUT=30mA 8 6.0 12 16 20 24 28 Input Voltage (V) Output Voltage vs. Input FIGURE 2-11: Voltage. Output Voltage vs. Input 15.0 15.0 VR=12V VR=12V 14.0 Output Voltage (V) Output Voltage (V) 28 Output Voltage vs. Input Input Voltage (V) FIGURE 2-8: Voltage. 12 Input Voltage (V) 13.0 12.0 11.0 IOUT=1mA IOUT=10mA 10.0 14.0 13.0 12.0 11.0 IOUT=1mA IOUT=10mA 10.0 IOUT=30mA IOUT=30mA 9.0 9.0 10 11 12 13 14 14 16 FIGURE 2-9: Voltage. DS22200A-page 8 Output Voltage vs. Input 18 20 22 24 26 28 Input Voltage (V) Input Voltage (V) FIGURE 2-12: Voltage. Output Voltage vs. Input © 2009 Microchip Technology Inc. MCP1804 Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA = +25°C, VIN = VR + 2.0V. 70 VR=1.8V VR=1.8V 3.5 Supply Current (µA) Dropout Voltage (V) 4.0 Ta=85℃ 3.0 Ta=25℃ 2.5 Ta=-40℃ 2.0 1.5 1.0 0.5 0.0 60 50 40 30 20 Ta=85℃ Ta=25℃ Ta=-40℃ 10 0 0 25 50 75 100 125 150 0 4 Output Current (mA) FIGURE 2-13: Current. 3.0 Ta=85℃ Ta=25℃ Ta=-40℃ 2.0 20 24 28 1.5 1.0 Supply Current vs. Input VR=5V 60 50 40 30 20 Ta=85℃ Ta=25℃ Ta=-40℃ 10 0.5 0.0 0 0 25 50 75 100 125 150 0 4 Output Current (mA) FIGURE 2-14: Current. FIGURE 2-17: Voltage. 16 20 24 28 Ta=85℃ Ta=25℃ Ta=-40℃ 1.5 1.0 0.5 0.0 Supply Current vs. Input VR=12V Supply Current (µA) 3.0 2.0 12 70 VR=12V 3.5 2.5 8 Input Voltage (V) Dropout Voltage vs. Load 4.0 Dropout Voltage (V) 16 70 Supply Current (µA) Dropout Voltage (V) FIGURE 2-16: Voltage. VR=5V 3.5 2.5 12 Input Voltage (V) Dropout Voltage vs. Load 4.0 8 60 50 40 30 20 Ta=85℃ Ta=25℃ Ta=-40℃ 10 0 0 25 50 75 100 125 150 0 4 Output Current (mA) FIGURE 2-15: Current. Dropout Voltage vs. Load © 2009 Microchip Technology Inc. 8 12 16 20 24 28 Input Voltage (V) FIGURE 2-18: Voltage. Supply Current vs. Input DS22200A-page 9 MCP1804 Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA = +25°C, VIN = VR + 2.0V. 2.00 70 50 40 30 20 1.90 1.85 1.80 1.75 1.70 10 1.65 0 1.60 -40 -20 0 20 40 60 80 VR=1.8V 1.95 60 Output Voltage (V) Supply Current (µA) VR=1.8V IOUT=1mA IOUT=10mA IOUT=20mA -50 100 -25 Ambient Temperature (°C) FIGURE 2-19: Voltage. Supply Current vs. Input FIGURE 2-22: Temperature. 25 50 75 100 Output Voltage vs. Ambient 5.20 VR=5V 60 50 40 30 20 VR=5V 5.15 Output Voltage (V) Supply Current (µA) 70 10 0 5.10 5.05 5.00 4.95 4.90 IOUT=1mA 4.85 IOUT=10mA IOUT=20mA 4.80 -40 -20 0 20 40 60 80 100 -50 Ambient Temperature (°C) FIGURE 2-20: Voltage. Supply Current vs. Input VR=12V Output Voltage (V) 60 50 40 30 20 10 0 -40 -20 0 20 40 60 80 100 DS22200A-page 10 Supply Current vs. Input 100 Output Voltage vs. Ambient 12.5 12.4 12.3 12.2 12.1 12.0 11.9 11.8 11.7 11.6 11.5 VR=12V IOUT=1mA IOUT=10mA IOUT=20mA -50 -25 0 25 50 75 100 Ambient Temperature (°C) Ambient Temperature (°C) FIGURE 2-21: Voltage. -25 0 25 50 75 Ambient Temperature (°C) FIGURE 2-23: Temperature. 70 Supply Current (µA) 0 Ambient Temperature (°C) FIGURE 2-24: Temperature. Output Voltage vs. Ambient © 2009 Microchip Technology Inc. MCP1804 Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA = +25°C, VIN = VR + 2.0V. 3.34 4.3 3.32 VOUT 4.3 2.3 3.28 3.26 1.3 7 VIN 5.04 6 8 5.06 5.02 VOUT Input Voltage (V) Input Voltage (V) VIN 7 6 4.98 4.96 3 FIGURE 2-29: 12.08 Dynamic Line Response. 16 VIN 15 12.06 12.04 12.02 VOUT 12 12.00 11 11.98 10 11.96 Input Voltage (V) VR=12V IOUT=1 mA Output Voltage (V) Input Voltage (V) 4.96 Time (1ms/div) Dynamic Line Response. 14 Dynamic Line Response. VR=12V IOUT=30 mA 12.08 12.06 12.04 13 12.02 VOUT 12 12.00 11 11.98 10 11.96 Time (1ms/div) Time (1ms/div) © 2009 Microchip Technology Inc. 5.02 VOUT Time (1ms/div) FIGURE 2-27: 5.04 4 3 13 5.06 4.98 4 14 5.08 5.00 5.00 15 VR=5V IOUT=30 mA 5 5 VIN Dynamic Line Response. 9 5.08 VR=5V IOUT 1 mA Output Voltage (V) 9 FIGURE 2-28: Output Voltage (V) Dynamic Line Response. 16 3.26 Time (1ms/div) Time (1ms/div) FIGURE 2-26: 3.32 VOUT 3.28 2.3 8 3.34 3.30 3.30 FIGURE 2-25: 3.36 3.3 3.3 1.3 5.3 3.38 Output Voltage (V) 5.3 6.3 3.36 VR=3.3V IOUT =30 mA Output Voltage (V) VIN VIN Input Voltage (V) Input Voltage (V) 6.3 7.3 3.38 VR=3.3V IOUT=1 mA Output Voltage (V) 7.3 FIGURE 2-30: Dynamic Line Response. DS22200A-page 11 MCP1804 Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA = +25°C, VIN = VR + 2.0V. 3.2 90 3.1 3.0 Output Current 2.8 30 2.6 2 0 VOUT 90 4.8 60 Output Current 4.6 30 Input Voltage (V) 120 4.9 4.4 0 6 2 5 0 2 VR=3.3V IOUT=30 mA 90 11.6 60 IOUT 30 Input Voltage (V) VOUT 11.0 Startup Response. 8 10.8 0 4 6 2 0 5 VOUT 4 -2 3 -4 2 VR=5.0V IOUT=1 mA -8 1 0 Time (1ms/div) Time (1ms/div) Dynamic Load Response. 7 VIN -6 10.6 1 0 8 Output Current (mA) Output Voltage (V) 3 -4 FIGURE 2-35: 150 120 11.4 4 VOUT -2 6 11.8 7 Time (1ms/div) VR = 12V 12.2 DS22200A-page 12 8 VIN -8 Dynamic Load Response. 12.4 FIGURE 2-33: Startup Response. 4 Time (1ms/div) 12.6 1 0 -6 4.5 11.2 2 VR=3.3V IOUT=1 mA 8 150 Output Current (mA) Output Voltage (V) FIGURE 2-34: 6 5.0 12.0 3 -4 Output Voltage (V) VR = 5V 5.2 FIGURE 2-32: 4 Time (1ms/div) Dynamic Load Response. 5.3 4.7 5 VOUT -2 Time (1ms/div) 5.1 6 -8 0 5.4 7 4 -6 2.7 FIGURE 2-31: 8 VIN Output Voltage (V) 2.9 60 Input Voltage (V) 3.3 6 120 VOUT Output Current (mA) Output Voltage (V) 3.4 8 150 VR=3.3V 3.5 Output Voltage (V) 3.6 FIGURE 2-36: Startup Response. © 2009 Microchip Technology Inc. MCP1804 Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA = +25°C, VIN = VR + 2.0V. 8 7 6 2 5 VOUT 4 -2 3 -4 2 VR=5.0V IOUT=30 mA -8 6 2 5 VOUT 0 -2 3 -4 1 -6 0 -8 2 VR=3.3V IOUT=1 mA Time (1ms/div) Startup Response. 15 VOUT 0 9 -5 6 VR=12V IOUT=1 mA -10 -15 SHDN Voltage (V) 12 8 6 15 5 3 4 6 2 5 VOUT 0 3 -4 2 VR=5V IOUT=1 mA 0 Time (1ms/div) 15 10 12 0 9 -5 6 VR=12V IOUT=30 mA -15 SHDN Voltage (V) 15 VOUT © 2009 Microchip Technology Inc. 18 SHDN 15 5 12 VOUT 0 9 -5 6 3 -10 0 -15 Time (1ms/div) Startup Response. SHDN Response. 15 Output Voltage (V) Input Voltage (V) FIGURE 2-41: 18 VIN 5 FIGURE 2-39: 1 -8 Startup Response. -10 4 -2 -6 0 10 7 SHDN Time (1ms/div) FIGURE 2-38: SHDN Response. 8 Output Voltage (V) Input Voltage (V) FIGURE 2-40: 18 VIN 10 1 0 Time (1ms/div) FIGURE 2-37: 4 VOUT (V) -6 7 4 VR=12V IOUT=1 mA VOUT (V) 0 8 SHDN 6 SHDN Voltage (V) VIN 4 Output Voltage (V) Input Voltage (V) 6 8 VOUT (V) 8 3 0 Time (1ms/div) FIGURE 2-42: SHDN Response. DS22200A-page 13 MCP1804 8 8 SHDN 7 4 6 2 5 0 4 VOUT -2 3 -4 VOUT (V) SHDN Voltage (V) 6 2 VR=3.3V IOUT=30 mA -6 1 -8 Ripple Rejection Rate: PSRR (dB) Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA = +25°C, VIN = VR + 2.0V. 90 70 60 50 40 30 20 10 0 0.01 0 Time (1ms/div) FIGURE 2-46: SHDN Response. 8 8 7 SHDN 4 6 2 5 VOUT 0 4 -2 3 -4 2 VR=5V IOUT=30 mA -6 VOUT (V) SHDN Voltage (V) 6 1 -8 10 15 5 12 VOUT 0 9 -5 6 VR=12V IOUT=30 mA -15 3 0 Ripple Rejection Rate: PSRR (dB) 18 VOUT (V) SHDN Voltage (V) VOUT=5V CIN=0 IOUT=1 mA VIN_AC=0.5Vp-p 70 60 50 40 30 20 10 0.1 FIGURE 2-47: SHDN Response. SHDN 1 10 100 SHDN Response. PSRR 5.0V @ 1 mA. 90 VOUT=12V CIN=0 IOUT=1 mA VIN_AC=0.5Vp-p 80 70 60 50 40 30 20 10 0 0.01 Time (1ms/div) DS22200A-page 14 100 Ripple Frequency: f (kHz) 15 FIGURE 2-45: 10 PSRR 3.3V @ 1 mA. 80 Time (1ms/div) -10 1 90 0 0.01 0 FIGURE 2-44: 0.1 Ripple Frequency: f (kHz) Ripple Rejection Rate: PSRR (dB) FIGURE 2-43: VOUT=3.3V CIN=0 IOUT=1 mA VIN_AC=0.5Vp-p 80 0.1 1 10 100 Ripple Frequency: f (kHz) FIGURE 2-48: PSRR 12.0V @ 1 mA. © 2009 Microchip Technology Inc. MCP1804 90 Ripple Rejection Rate: PSRR (dB) Ripple Rejection Rate: PSRR (dB) Note: Unless otherwise indicated: COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), TA = +25°C, VIN = VR + 2.0V. VOUT=3.3V CIN=0 IOUT=30 mA VIN_AC=0.5Vp-p 80 70 60 50 40 30 20 10 0 0.01 0.1 1 10 100 90 70 60 50 40 30 20 10 0 0.01 Ripple Rejection Rate: PSRR (dB) 0.1 1 10 100 Ripple Frequency: f (kHz) Ripple Frequency: f (kHz) FIGURE 2-49: VOUT=12V CIN=0 IOUT=30 mA VIN_AC=0.5Vp-p 80 PSRR 3.3V @ 30 mA. FIGURE 2-51: PSRR 12.0V @ 30 mA. 90 VOUT=5V CIN=0 IOUT=30 mA VIN_AC=0.5Vp-p 80 70 60 50 40 30 20 10 0 0.01 0.1 1 10 100 Ripple Frequency: f (kHz) FIGURE 2-50: PSRR 5.0V @ 30 mA. © 2009 Microchip Technology Inc. DS22200A-page 15 MCP1804 NOTES: DS22200A-page 16 © 2009 Microchip Technology Inc. MCP1804 3.0 PIN DESCRIPTIONS The descriptions of the pins are listed in Table 3-1. TABLE 3-1: MCP1804 PIN FUNCTION TABLE MCP1804 3.1 SOT-89-5 SOT-223-3, SOT89-3 Symbol SOT-25 1 5 3 VIN 2 2,TAB 2, TAB GND 3 4 — NC 4 3 — SHDN Shutdown 5 1 1 VOUT Regulated Voltage Output Unregulated Input Voltage (VIN) 3.3 Description Unregulated Supply Voltage Ground Terminal No connection Shutdown Input (SHDN) Connect VIN to the input unregulated source voltage. Like all low dropout linear regulators, low source impedance is necessary for the stable operation of the LDO. The amount of capacitance required to ensure low source impedance will depend on the proximity of the input source capacitors or battery type. For most applications, 0.1 µF to 1.0 µF of capacitance will ensure stable operation of the LDO circuit. The type of capacitor used can be ceramic, tantalum or aluminum electrolytic. The low ESR characteristics of the ceramic will yield better noise and PSRR performance at high-frequency. The SHDN input is used to turn the LDO output voltage on and off. When the SHDN input is at a logic-high level, the LDO output voltage is enabled. When the SHDN input is pulled to a logic-low level, the LDO output voltage is disabled and the LDO enters a low quiescent current shutdown state where the typical quiescent current is 0.01 µA. The SHDN pin does not have an internal pullup or pulldown resistor. The SHDN pin must be connected to either VIN or GND to prevent the device from becoming unstable. 3.2 Connect VOUT to the positive side of the load and the positive terminal of the output capacitor. The positive side of the output capacitor should be physically located as close to the LDO VOUT pin as is practical. The current flowing out of this pin is equal to the DC load current. For most applications, 0.1 µF to 1.0 µF of capacitance will ensure stable operation of the LDO circuit. Larger values may be used to improve dynamic load response. The type of capacitor used can be ceramic, tantalum or aluminum electrolytic. The low ESR characteristics of the ceramic will yield better noise and PSRR performance at high-frequency. Ground Terminal (GND) Regulator ground. Tie GND to the negative side of the output and the negative side of the input capacitor. Only the LDO bias current (50 to 60 µA typical) flows out of this pin; there is no high current. The LDO output regulation is referenced to this pin. Minimize voltage drops between this pin and the negative side of the load. © 2009 Microchip Technology Inc. 3.4 Regulated Output Voltage (VOUT) DS22200A-page 17 MCP1804 NOTES: DS22200A-page 18 © 2009 Microchip Technology Inc. MCP1804 4.0 DETAILED DESCRIPTION 4.1 Output Regulation A portion of the LDO output voltage is fed back to the internal error amplifier and compared with the precision internal bandgap reference. The error amplifier output will adjust the amount of current that flows through the P-Channel pass transistor, thus regulating the output voltage to the desired value. Any changes in input voltage or output current will cause the error amplifier to respond and adjust the output voltage to the target voltage (refer to Figure 4-1). 4.2 Overcurrent The MCP1804 internal circuitry monitors the amount of current flowing through the P-Channel pass transistor. In the event that the load current reaches the current limiter level of 200 mA (typical), the current limiter circuit will operate and the output voltage will drop. As the output voltage drops, the internal current foldback circuit will further reduce the output voltage causing the output current to decrease. When the output is shorted, a typical output current of 50 mA flows. 4.3 Shutdown The SHDN input is used to turn the LDO output voltage on and off. When the SHDN input is at a logic-high level, the LDO output voltage is enabled. When the SHDN input is pulled to a logic-low level, the LDO output voltage is disabled and the LDO enters a low quiescent current shutdown state where the typical quiescent current is 0.01 µA. The SHDN pin does not have an internal pullup or pulldown resistor. Therefore the SHDN pin must be pulled either high or low to prevent the device from becoming unstable. The internal device current will increase when the device is operational and current flows through the pullup or pull-down resistor to the SHDN pin internal logic. The SHDN pin internal logic is equivalent to an inverter input. 4.4 Output Capacitor The MCP1804 requires a minimum output capacitance of 0.1 µF to 1.0 µF for output voltage stability. Ceramic capacitors are recommended because of their size, cost and environmental robustness qualities. Aluminum-electrolytic and tantalum capacitors can be used on the LDO output as well. The output capacitor should be located as close to the LDO output as is practical. Ceramic materials X7R and X5R have low temperature coefficients. Larger LDO output capacitors can be used with the MCP1804 to improve dynamic performance and power supply ripple rejection performance. Aluminumelectrolytic capacitors are not recommended for low temperature applications of < -25°C. 4.5 Input Capacitor Low input source impedance is necessary for the LDO output to operate properly. When operating from batteries, or in applications with long lead length (> 10 inches) between the input source and the LDO, some input capacitance is recommended. A minimum of 0.1 µF to 1.0 µF is recommended for most applications. For applications that have output step load requirements, the input capacitance of the LDO is very important. The input capacitance provides the LDO with a good local low-impedance source to pull the transient currents from in order to respond quickly to the output load step. For good step response performance, the input capacitor should be of equivalent or higher value than the output capacitor. The capacitor should be placed as close to the input of the LDO as is practical. Larger input capacitors will also help reduce any high-frequency noise on the input and output of the LDO and reduce the effects of any inductance that exists between the input source voltage and the input capacitance of the LDO. 4.6 Thermal Shutdown The MCP1804 thermal shutdown circuitry protects the device when the internal junction temperature reaches the typical thermal limit value of +150°C. The thermal limit shuts off the output drive transistor. Device output will resume when the internal junction temperature falls below the thermal limit value by an amount equal to the thermal limit hysteresis value of +25°C. © 2009 Microchip Technology Inc. DS22200A-page 19 MCP1804 VOUT VIN * Thermal Protection SHDN Shutdown Control Voltage Reference + Current Limiter Error Amplifier * 5-Pin Versions Only FIGURE 4-1: DS22200A-page 20 GND Block Diagram. © 2009 Microchip Technology Inc. MCP1804 5.0 FUNCTIONAL DESCRIPTION The MCP1804 CMOS linear regulator is intended for applications that need the low current consumption while maintaining output voltage regulation. The operating continuous load range of the MCP1804 is from 0 mA to 150 mA. The input operating voltage range is from 2.0V to 28.0V, making it capable of operating from a single 12V battery or single and multiple Li-Ion cell batteries. 5.1 5.2 Output The maximum rated continuous output current for the MCP1804 is 150 mA. A minimum output capacitance of 0.1 µF to 1.0 µF is required for small signal stability in applications that have up to 150 mA output current capability. The capacitor type can be ceramic, tantalum or aluminum electrolytic. Input The input of the MCP1804 is connected to the source of the P-Channel PMOS pass transistor. As with all LDO circuits, a relatively low source impedance (< 10Ω) is needed to prevent the input impedance from causing the LDO to become unstable. The size and type of the capacitor needed depends heavily on the input source type (battery, power supply) and the output current range of the application. For most applications a 0.1 µF ceramic capacitor will be sufficient to ensure circuit stability. Larger values can be used to improve circuit AC performance. © 2009 Microchip Technology Inc. DS22200A-page 21 MCP1804 NOTES: DS22200A-page 22 © 2009 Microchip Technology Inc. MCP1804 6.0 APPLICATION CIRCUITS AND ISSUES 6.1 Typical Application The MCP1804 is most commonly used as a voltage regulator. It’s low quiescent current and wide input voltage make it ideal for Li-Ion and 12V battery-powered applications. The maximum continuous operating temperature specified for the MCP1804 is +85°C. To estimate the internal junction temperature of the MCP1804, the total internal power dissipation is multiplied by the thermal resistance from junction to ambient (RθJA). The thermal resistance from junction to ambient for the SOT-25 pin package is estimated at 256°C/W. EQUATION 6-2: T J ( MAX ) = P TOTAL × R θ JA + T AMAX Where: VOUT 1.8V VOUT IOUT 50 mA NC TJ(MAX) = Maximum continuous junction temperature. PTOTAL = Total device power dissipation. RqJA = Thermal resistance from junction to ambient. TAMAX = Maximum ambient temperature. GND VIN COUT 1 µF Ceramic FIGURE 6-1: 6.1.1 MCP1804 SHDN VIN 4.2V CIN 1 µF Ceramic Typical Application Circuit. APPLICATION INPUT CONDITIONS Package Type = SOT25 Input Voltage Range = 3.8V to 4.2V VIN maximum = 4.6V VOUT typical = 1.8V IOUT = 50 mA maximum The maximum power dissipation capability for a package can be calculated given the junctionto-ambient thermal resistance and the maximum ambient temperature for the application. The following equation can be used to determine the package maximum internal power dissipation. EQUATION 6-3: ( T J ( MAX ) – T A ( MAX ) ) P D ( MAX ) = --------------------------------------------------R θ JA Where: 6.2 Power Calculations 6.2.1 POWER DISSIPATION The internal power dissipation of the MCP1804 is a function of input voltage, output voltage and output current. The power dissipation, as a result of the quiescent current draw, is so low, it is insignificant (50.0 µA x VIN). The following equation can be used to calculate the internal power dissipation of the LDO. EQUATION 6-1: P LDO = ( V IN ( MAX ) ) – V OUT ( MIN ) ) × I OUT ( MAX ) ) Where: PLDO = LDO Pass device internal power dissipation VIN(MAX) = Maximum input voltage VOUT(MIN) = LDO minimum output voltage PD(MAX) = Maximum device power dissipation. TJ(MAX) = Maximum continuous junction temperature. TA(MAX) = Maximum ambient temperature. RqJA = Thermal resistance from junction to ambient. EQUATION 6-4: T J ( RISE ) = P D ( MAX ) × R θ JA Where: TJ(RISE) = Rise in device junction temperature over the ambient temperature. PTOTAL = Maximum device power dissipation. RqJA = Thermal resistance from junction to ambient. EQUATION 6-5: T J = T J ( RISE ) + T A Where: © 2009 Microchip Technology Inc. TJ = Junction Temperature. TJ(RISE) = Rise in device junction temperature over the ambient temperature. TA = Ambient temperature. DS22200A-page 23 MCP1804 6.3 Voltage Regulator Internal power dissipation, junction temperature rise, junction temperature and maximum power dissipation are calculated in the following example. The power dissipation, as a result of ground current, is small enough to be neglected. 6.3.1 6.3.1.2 To estimate the internal junction temperature, the calculated temperature rise is added to the ambient or offset temperature. For this example, the worst-case junction temperature is estimated below. TJ = TJRISE + TA(MAX) TJ = 76.3°C POWER DISSIPATION EXAMPLE Package: Package Type = SOT-25 Junction Temperature Estimate Maximum Package Power Dissipation at +25°C Ambient Temperature (minimum PCB footprint) Input Voltage: VIN = 3.8V to 4.6V SOT-25 (256°C/Watt = RθJA): PD(MAX) = (85°C - 25°C) / 256°C/W LDO Output Voltages and Currents: PD(MAX) = 234 milli-Watts VOUT = 1.8V IOUT = 50 mA SOT-89 (180°C/Watt = RθJA): PD(MAX) = (85°C - 25°C) / 180°C/W Maximum Ambient Temperature: PD(MAX) = 333 milli-Watts TA(MAX) = +40°C Internal Power Dissipation: Internal Power dissipation is the product of the LDO output current times the voltage across the LDO (VIN to VOUT). PLDO(MAX) = (VIN(MAX) - VOUT(MIN)) x IOUT(MAX) PLDO = (4.6V - (0.98 x 1.8V)) x 50 mA PLDO = 141.8 milli-Watts 6.3.1.1 Device Junction Temperature Rise The internal junction temperature rise is a function of internal power dissipation and the thermal resistance from junction to ambient for the application. The thermal resistance from junction to ambient (RθJA) is derived from an EIA/JEDEC standard for measuring thermal resistance for small surface mount packages. The EIA/ JEDEC specification is JESD51-7, “High Effective Thermal Conductivity Test Board for Leaded Surface Mount Packages”. The standard describes the test method and board specifications for measuring the thermal resistance from junction to ambient. The actual thermal resistance for a particular application can vary depending on many factors, such as copper area and thickness. Refer to AN792, “A Method to Determine How Much Power a SOT23 Can Dissipate in an Application” (DS00792), for more information regarding this subject. 6.4 Voltage Reference The MCP1804 can be used not only as a regulator, but also as a low quiescent current voltage reference. In many microcontroller applications, the initial accuracy of the reference can be calibrated using production test equipment or by using a ratio measurement. When the initial accuracy is calibrated, the thermal stability and line regulation tolerance are the only errors introduced by the MCP1804 LDO. The low cost, low quiescent current and small ceramic output capacitor are all advantages when using the MCP1804 as a voltage reference. Ratio Metric Reference MCP1804 PICmicro® Microcontroller 50 µA Bias CIN 1 µF VIN VOUT GND COUT 1 µF VREF ADO AD1 Bridge Sensor FIGURE 6-2: voltage reference. Using the MCP1804 as a TJ(RISE) = PTOTAL x RqJA TJRISE = 141.8 milli-Watts x 256.0°C/Watt TJRISE = 36.3°C DS22200A-page 24 © 2009 Microchip Technology Inc. MCP1804 6.5 Pulsed Load Applications For some applications, there are pulsed load current events that may exceed the specified 150 mA maximum specification of the MCP1804. The internal current limit of the MCP1804 will prevent high peak load demands from causing non-recoverable damage. The 150 mA rating is a maximum average continuous rating. As long as the average current does not exceed 150 mA nor the max power dissipation of the packaged device, pulsed higher load currents can be applied to the MCP1804. The typical current limit for the MCP1804 is 200 mA (TA = +25°C). © 2009 Microchip Technology Inc. DS22200A-page 25 MCP1804 NOTES: DS22200A-page 26 © 2009 Microchip Technology Inc. MCP1804 7.0 PACKAGING INFORMATION 7.1 Package Marking Information 5-Lead SOT-23 XXNN 3-Lead SOT-89 XXXYYWW NNN Part Number Code MCP1804T-1802I/OT 80KNN MCP1804T-2502I/OT 80TNN MCP1804T-3002I/OT 80ZNN MCP1804T-3302I/OT 812NN MCP1804T-5002I/OT 81MNN MCP1804T-A002I/OT 839NN MCP1804T-C002I/OT 83ZNN Part Number Code MCP1804T-1802I/MB 84KNN MCP1804T-2502I/MB 84TNN MCP1804T-3002I/MB 84ZNN MCP1804T-3302I/MB 852NN MCP1804T-5002I/MB 85MNN MCP1804T-A002I/MB 879NN MCP1804T-C002I/MB 87ZNN Part Number Code MCP1804T-1802I/MT 80KNN MCP1804T-2502I/MT 80TNN MCP1804T-3002I/MT 80ZNN MCP1804T-3302I/MT 812NN MCP1804T-5002I/MT 81MNN 5-Lead SOT-89 80K25 Example: 84K25 Example: XXXYYWW NNN MCP1804T-A002I/MT 839NN MCP1804T-C002I/MT 83ZNN Part Number Code MCP1804T-1802I/DB 84KNN MCP1804T-2502I/DB 84TNN MCP1804T-3002I/DB 84ZNN MCP1804T-3302I/DB 852NN MCP1804T-5002I/DB 85MNN 80K25 Example: 3-Lead SOT-223 XXXXXXX XXXYYWW NNN Legend: XX...X Y YY WW NNN e3 * Note: Example: MCP1804T-A002I/DB 879NN MCP1804T-C002I/DB 87ZNN 84K25 Customer-specific information Year code (last digit of calendar year) Year code (last 2 digits of calendar year) Week code (week of January 1 is week ‘01’) Alphanumeric traceability code Pb-free JEDEC designator for Matte Tin (Sn) This package is Pb-free. The Pb-free JEDEC designator ( e3 ) can be found on the outer packaging for this package. In the event the full Microchip part number cannot be marked on one line, it will be carried over to the next line, thus limiting the number of available characters for customer-specific information. © 2009 Microchip Technology Inc. DS22200A-page 27 MCP1804 .# #$ # / ## +22--- 2 ! - / 0 # 1 / % # # ! # b N E E1 3 2 1 e e1 D A2 A c φ A1 L L1 3# 4# 5$8 %1 4 44"" 5 5 7 ( !1# 6$# ! 4 56 ()* !1# 6, 9 # ! !1 / / # !%% 6, <!# ! !1 / 6, 4 # <!# )* : ; : ( : ( " : " : ; : .#4 # 4 : = .# # 4 ( : ; .# > : > 4 ; : = !/ 4 !<!# 8 : ( !"!#$! !% #$ !% #$ # & ! !# "'( )*+ ) # & #, $ --#$## ! - * ) DS22200A-page 28 © 2009 Microchip Technology Inc. MCP1804 .# #$ # / ## +22--- 2 !"# ! - / 0 # 1 / % # # ! # D D1 E H L 1 N 2 b b1 b1 e E1 e1 A C 3# 4# 5$8 %4 44"" 5 5 !1# )* 1# 6$# ! 4 7 ! ()* 6, 9 # = 6, <!# 9 ( ! !1 / <!# #) " = ! !1 / <!# # " 6, 4 # = 84 # ; .#4 # 4 4 !/ ( 4 !<!# 8 (= 4 ! ?<!# 8 = ; !"!#$! !% #$ !% #$ # & !# "'( )*+ ) # & #, $ --#$## ! ! - * ) © 2009 Microchip Technology Inc. DS22200A-page 29 MCP1804 .# #$ # / ## +22--- 2 "# ! - / 0 # 1 / % # # ! # D1 b2 b1 b1 N L L 1 2 b b1 b1 e e1 H E D A C 3# 4# 5$8 %4 4 44"" 5 5 ( !1# )* !1# 6$# ! 4 7 ! ()* 6, 9 # = 6, <!# 9 ( " = 6, 4 # = 8<!# ; 4 ; ! !1 / <!# .#4 # 4 !/ ( 4 !<!# 8 (= 4 ! 00?(<!# 84 !<!# 8 = ; 8 ; !"!#$! !% #$ !% #$ # & !# "'( )*+ ) # & #, $ --#$## ! ! - * ) DS22200A-page 30 © 2009 Microchip Technology Inc. MCP1804 .# #$ # / ## +22--- 2 $! ! - / 0 # 1 / % # # ! # D b2 E1 E 3 2 1 e e1 A2 A b c φ L A1 3# 4# 5$8 %4 4 ! 5 !1# 44"" 5 7 !1# 6$# ! 4 56 )* =)* 6, 9 # : : ; # !%% : ! !1 / 9 # ( = " = " ( 6, 4 # = =( = 4 !/ ( 4 !<!# 8 = = ; 6, <!# ! !1 / 84 !<!# <!# 8 .#4 # 4 ( : : 4 > : > ! !"!#$! !% #$ !% #$ # & !# "'( )*+ ) # & #, $ --#$## ! ! - * ) © 2009 Microchip Technology Inc. DS22200A-page 31 MCP1804 .# #$ # / ## +22--- 2 DS22200A-page 32 ! - / $! 0 # 1 / % # # ! # © 2009 Microchip Technology Inc. MCP1804 APPENDIX A: REVISION HISTORY Revision A (September 2009) • Original Release of this Document. © 2009 Microchip Technology Inc. DS22200A-page 31 MCP1804 NOTES: DS22200A-page 32 © 2009 Microchip Technology Inc. MCP1804 PRODUCT IDENTIFICATION SYSTEM To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office. PART NO. T -XX XX X /XX Device Tape and Reel Voltage Output Voltage Tolerance Temperature Range Package Device MCP1804T: Voltage Options 18 25 30 33 50 A0 C0 = = = = = = = LDO Voltage Regulator (Tape and Reel) 1.8V 2.5V 3.0V 3.3V 5.0V 10V 12V Output Voltage Tolerance 02 = ±2% Temperature Range I Package DB MB MT OT = -40°C to +85°C (Industrial) = = = = 3-lead Plastic Small OutlineTransistor (SOT-223) 3-lead Plastic Small OutlineTransistor (SOT-89) 5-lead Plastic Small OutlineTransistor (SOT-89) 5-lead Plastic Small OutlineTransistor (SOT-23) © 2009 Microchip Technology Inc. Examples: a) b) c) d) e) f) g) MCP1804T-1802I/OT: MCP1804T-2502I/OT: MCP1804T-3002I/OT: MCP1804T-3302I/OT: MCP1804T-5002I/OT: MCP1804T-A002I/OT: MCP1804T-C002I/OT: 1.8V, 5-LD SOT-23 2.5V, 5-LD SOT-23 3.0V, 5-LD SOT-23 3.3V, 5-LD SOT-23 5.0V, 5-LD SOT-23 10V, 5-LD SOT-23 12V, 5-LD SOT-23 a) b) c) d) e) f) g) MCP1804T-1802I/MB: MCP1804T-2502I/MB: MCP1804T-3002I/MB: MCP1804T-3302I/MB: MCP1804T-5002I/MB: MCP1804T-A002I/MB: MCP1804T-C002I/MB: 1.8V, 5-LD SOT-89 2.5V, 5-LD SOT-89 3.0V, 5-LD SOT-89 3.3V, 5-LD SOT-89 5.0V, 5-LD SOT-89 10V, 5-LD SOT-89 12V, 5-LD SOT-89 a) b) c) d) e) f) g) MCP1804T-1802I/MT: MCP1804T-2502I/MT: MCP1804T-3002I/MT: MCP1804T-3302I/MT: MCP1804T-5002I/MT: MCP1804T-A002I/MT: MCP1804T-C002I/MT: 1.8V, 5-LD SOT-89 2.5V, 5-LD SOT-89 3.0V, 5-LD SOT-89 3.3V, 5-LD SOT-89 5.0V, 5-LD SOT-89 10V, 5-LD SOT-89 12V, 5-LD SOT-89 a) b) c) d) e) f) g) MCP1804T-1802I/DB: MCP1804T-2502I/DB: MCP1804T-3002I/DB: MCP1804T-3302I/DB: MCP1804T-5002I/DB: MCP1804T-A002I/DB: MCP1804T-C002I/DB: 1.8V, 3-LD SOT-223 2.5V, 3-LD SOT-223 3.0V, 3-LD SOT-223 3.3V, 3-LD SOT-223 5.0V, 3-LD SOT-223 10V, 3-LD SOT-223 12V, 3-LD SOT-223 DS22200A-page 33 MCP1804 NOTES: DS22200A-page 34 © 2009 Microchip Technology Inc. Note the following details of the code protection feature on Microchip devices: • Microchip products meet the specification contained in their particular Microchip Data Sheet. • Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the intended manner and under normal conditions. • There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data Sheets. Most likely, the person doing so is engaged in theft of intellectual property. • Microchip is willing to work with the customer who is concerned about the integrity of their code. • Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. 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Analog-for-the-Digital Age, Application Maestro, CodeGuard, dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN, ECONOMONITOR, FanSense, HI-TIDE, In-Circuit Serial Programming, ICSP, Mindi, MiWi, MPASM, MPLAB Certified logo, MPLIB, MPLINK, mTouch, Octopus, Omniscient Code Generation, PICC, PICC-18, PICDEM, PICDEM.net, PICkit, PICtail, PIC32 logo, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. © 2009, Microchip Technology Incorporated, Printed in the U.S.A., All Rights Reserved. Printed on recycled paper. Microchip received ISO/TS-16949:2002 certification for its worldwide headquarters, design and wafer fabrication facilities in Chandler and Tempe, Arizona; Gresham, Oregon and design centers in California and India. The Company’s quality system processes and procedures are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping devices, Serial EEPROMs, microperipherals, nonvolatile memory and analog products. In addition, Microchip’s quality system for the design and manufacture of development systems is ISO 9001:2000 certified. © 2009 Microchip Technology Inc. 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