LINER LT6105 Precision, extended input range current sense amplifi er Datasheet

LT6105
Precision, Extended Input
Range Current Sense Amplifier
FEATURES
DESCRIPTION
n
The LT®6105 is a micropower, precision current sense
amplifier with a very wide input common mode range.
The LT6105 monitors unidirectional current via the voltage across an external sense resistor. The input common
mode range extends from –0.3V to 44V, with respect to
the negative supply voltage (V –). This allows the LT6105
to operate as a high side current sense monitor or a low
side current sense monitor. It also allows the LT6105 to
monitor current on a negative supply voltage, as well as
continuously monitor a battery from full charge to depletion.
The inputs of LT6105 can withstand differential voltages
up to ±44V, which makes it ideal for monitoring a fuse or
MOSFET switch.
n
n
n
n
n
n
n
n
n
n
Very Wide, Over-the-Top®, Input Common Mode Range
- Extends 44V Above V – (Independent of V +)
- Extends –0.3V Below V –
Wide Power Supply Range: 2.85V to 36V
Input Offset Voltage: 300μV Maximum
Gain Accuracy: 1% Max
Gain Configurable with External Resistors
Operating Current: 150μA
Slew Rate: 2V/μs
Sense Input Current When Powered Down: 1nA
Full-Scale Output Current: 1mA Minimum
Operating Temperature Range –40°C to 125°C
Available in 2mm × 3mm DFN and 8-Lead MSOP
Packages
APPLICATIONS
n
n
n
n
n
n
n
High Side or Low Side Current Sensing
Current Monitoring on Positive or Negative Supply
Voltages
Battery Monitoring
Fuse/MOSFET Monitoring
Automotive
Power Management
Portable Test/Measurement Systems
Gain is configured with external resistors from 1V/V to
100V/V. The input common mode rejection and power
supply rejection are in excess of 100dB and the input offset
voltage is less than 300μV. A typical slew rate of 2V/μs
ensures fast response to unexpected current changes.
The LT6105 can operate from an independent power
supply of 2.85V to 36V and draws only 150μA. When
V+ is powered down, the sense pins are biased off. This
prevents loading of the monitored circuit, irrespective of
the sense voltage. The LT6105 is available in a 6-lead DFN
and 8-lead MSOP package.
, LT, LTC, LTM and Over-the-Top are registered trademarks of Linear Technology
Corporation. All other trademarks are the property of their respective owners.
TYPICAL APPLICATION
Gain Error vs Input Voltage
4
V+ = 12V
3 VSENSE = 50mV
RIN = 100Ω
A V = 50V
2
Gain of 50 Current Sense Amplifier
0.02Ω
RIN1
100Ω
VS–
TO LOAD
LT6105
+IN
+
–IN
VOUT
VOUT = 1V/A
–
ROUT
4.99k
V+
2.85V TO 36V
(
V–
)
VOUT = VS + − VS − •
GAIN ERROR (%)
SOURCE
–0.3V TO 44V
RIN2
VS+
100Ω
TA = – 40°C
1
TA = 25°C
0
–1
TA = 125°C
–2
TA = 85°C
–3
6105 TA01
ROUT
R
; A V = OUT ; RIN1 = RIN 2 = RIN
RIN
RIN
–4
0
5
10
15 20 25 30 35
VS+ INPUT VOLTAGE (V)
40
45
6105 TA01b
6105fa
1
LT6105
ABSOLUTE MAXIMUM RATINGS
(Notes 1, 2)
Differential Input Voltage (+IN – –IN) .....................±44V
Input Voltage V(+IN, –IN) to V – ................ –9.5V to 44V
Total V+ Supply Voltage from V – ...............................36V
Output Voltage ......................................V – to (V – + 36V)
Output Short-Circuit Duration (Note 3) ............ Indefinite
Operating Temperature Range (Note 4)
LT6105C...............................................–40°C to 85°C
LT6105I ................................................–40°C to 85°C
LT6105H ............................................–40°C to 125°C
Specified Temperature Range (Note 5)
LT6105C................................................... 0°C to 70°C
LT6105I ................................................–40°C to 85°C
LT6105H ............................................–40°C to 125°C
Maximum Junction Temperature........................... 150°C
Storage Temperature Range...................–65°C to 150°C
Lead Temperature (Soldering, 10 sec)
MSOP ............................................................... 300°C
PIN CONFIGURATION
TOP VIEW
V+ 2
TOP VIEW
6 +IN
–IN 1
7
V– 3
–IN 1
V+ 2
NC 3
V–4
5 NC
4 VOUT
8
7
6
5
+IN
NC
NC
VOUT
MS8 PACKAGE
8-LEAD PLASTIC MSOP
TJMAX = 150°C, θJA = 250°C/W
DCB PACKAGE
6-LEAD (2mm s 3mm) PLASTIC DFN
TJMAX = 150°C, θJA = 64°C/W
EXPOSED PAD (PIN 7) CONNECTED TO V – (PIN 3)
ORDER INFORMATION
LEAD FREE FINISH
TAPE AND REEL
PART MARKING*
PACKAGE DESCRIPTION
SPECIFIED TEMPERATURE RANGE
LT6105CDCB#TRMPBF
LT6105IDCB#TRMPBF
LT6105HDCB#TRMPBF
LT6105CDCB#TRPBF
LT6105IDCB#TRPBF
LT6105HDCB#TRPBF
LCTF
LCTF
LCTF
6-Lead (2mm × 3mm) Plastic DFN
6-Lead (2mm × 3mm) Plastic DFN
6-Lead (2mm × 3mm) Plastic DFN
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
LT6105CMS8#PBF
LT6105IMS8#PBF
LT6105HMS8#PBF
LT6105CMS8#TRPBF
LT6105IMS8#TRPBF
LT6105HMS8#TRPBF
LTCTD
LTCTD
LTCTD
8-Lead Plastic MS8
8-Lead Plastic MS8
8-Lead Plastic MS8
0°C to 70°C
–40°C to 85°C
–40°C to 125°C
TRM = 500 pieces. *Temperature grades are identified by a label on the shipping container.
Consult LTC Marketing for parts specified with wider operating temperature ranges.
Consult LTC Marketing for parts specified with wider operating temperature ranges.
For more information on lead free part marking, go to: http://www.linear.com/leadfree/
For more information on tape and reel specifications, go to: http://www.linear.com/tapeandreel/
6105fa
2
LT6105
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the temperature range
0°C < TA < 70°C (LT6105C), otherwise specifications are at TA = 25°C. V+ = 12V, V – = 0V, VS+ = 12V (see Figure 1), RIN1 = RIN2 = 100Ω,
ROUT = 5k (A V = 50), VSENSE = VS+ – VS–, unless otherwise specified. (Note 5)
SYMBOL
PARAMETER
CONDITIONS
VS+, VS–
MIN
Input Voltage Range
Guaranteed by CMRR
A V Error
Voltage Gain Error (Note 6)
VSENSE = 25mV to 75mV, VS+ = 12V
VSENSE = 25mV to 75mV, VS+ = 0V
VOS
ΔVOS /ΔT
CMRR
V+
PSRR
Input Offset Voltage
MS8 Package
VSENSE = 5mV
Input Offset Voltage
DCB Package
VSENSE = 5mV
Input Offset Voltage
VSENSE = 5mV, VS+ = 0V
Power Supply Voltage Range
Power Supply Rejection Ratio
–0.3
–0.1
l
–1
–1.3
l
–2.5
l
–0.3
–0.6
l
l
+ = 2.8V to 44V
VSENSE = 5mV, VS
MAX
UNITS
44
44
V
V
1
1.3
%
%
2.5
%
–0.1
0.3
0.6
mV
mV
–0.4
–0.7
–0.1
0.4
0.7
mV
mV
–1
–1.3
–0.3
1
1.3
mV
mV
l
Temperature Coefficient of VOS
Input Common Mode
Rejection Ratio
l
TYP
0.1
0.5
μV/°C
120
dB
dB
l
100
95
VSENSE = 5mV, VS+ = –0.3V to 44V
VSENSE = 5mV, VS+ = –0.1V to 44V
l
94
90
Guaranteed by PSRR
l
2.85
l
98
94
120
dB
dB
l
98
94
120
dB
dB
+ = 12V, V + = 2.85V to 36V
VSENSE = 5mV, VS
VSENSE = 5mV, VS+ = 0V, V + = 2.85V to 36V
dB
dB
36
V
I(+IN), I(–IN)
Input Current
VSENSE = 0V, VS+ = 3V
VSENSE = 0V, VS+ = 0V
l
l
15
–0.05
25
μA
μA
I(+IN) – I(–IN)
Input Offset Current
VSENSE = 0V, VS+ = 3V
VSENSE = 0V, VS+ = 0V
l
l
0.05
0.005
0.5
μA
μA
I(+IN) + I(–IN)
Input Current (Power-Down)
V + = 0V, VS+ = 44V, VSENSE = 0V
l
0.03
1
μA
IS
V + Supply Current
l
l
200
240
300
350
μA
μA
VO(MIN)
Minimum Output Voltage
VSENSE = 0V, VS+ = 3V, V+ = 2.85V
VSENSE = 0V, VS+ = 3V, V+ = 36V
VSENSE = 0mV, VS+ = 44V, V+ = 36V
35
mV
VO(MAX)
Output High (Referred to V+)
VSENSE = 120mV, A V = 100, ROUT = 10k
l
1.25
1.5
V
IOUT
Maximum Output Current
Guaranteed by VO(MAX)
l
1
ISC
Short-Circuit Output Current
VS+ = 44V, VS– = 0V, ROUT = 0Ω
l
1.5
BW
–3dB Bandwidth
VSENSE = 50mV, A V = 10V/V
tS
l
mA
mA
100
kHz
Output Settling to 1% of Final Value VSENSE = 5mV to 100mV
5
μs
tr
Input Step Response (Note 7)
VSENSE = 5mV to 100mV
3
μs
SR
Slew Rate (Note 8)
VSENSE = 5mV to 150mV, A V = 50V/V, RIN = 400Ω
1.75
2
V/μs
VREV
Reverse Input Voltage
(Referred to V –)
I(+IN) + I(–IN) = –5mA
–9.5
–12
l
V
6105fa
3
LT6105
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the temperature range
–40°C < TA < 85°C (LT6105I), otherwise specifications are at TA = 25°C. V+ = 12V, V – = 0V, VS+ = 12V (see Figure 1), RIN1 = RIN2 =
100Ω, ROUT = 5k (A V = 50), VSENSE = VS+ – VS–, unless otherwise specified. (Note 5)
SYMBOL
PARAMETER
CONDITIONS
MIN
VS+, VS–
Input Voltage Range
Guaranteed by CMRR
l
–0.3
–0.3
A V Error
Voltage Gain Error (Note 6)
VSENSE = 25mV to 75mV, VS+ = 12V
l
–1
–1.4
l
–3
l
–0.3
–0.65
l
l
VSENSE = 25mV to 75mV, VS+ = 0V
VOS
Input Offset Voltage
MS8 Package
VSENSE = 5mV
Input Offset Voltage
DCB Package
VSENSE = 5mV
Input Offset Voltage
VSENSE = 5mV, VS+ = 0V
ΔVOS /ΔT
Temperature Coefficient of VOS
CMRR
Input Common Mode
Rejection Ratio
MAX
UNITS
44
44
V
V
1
1.4
%
%
3
%
–0.1
0.3
0.65
mV
mV
–0.4
–0.75
–0.1
0.4
0.75
mV
mV
–1
–1.4
–0.3
1
1.4
mV
mV
l
VSENSE = 5mV, VS+ = 2.8V to 44V
TYP
0.1
0.5
μV/°C
120
dB
dB
l
100
95
VSENSE = 5mV, VS+ = –0.3V to 44V
VSENSE = 5mV, VS+ = –0.1V to 44V
l
94
90
l
2.85
l
98
94
120
dB
dB
l
98
94
120
dB
dB
V+
Power Supply Voltage Range
Guaranteed by PSRR
PSRR
Power Supply Rejection Ratio
VSENSE = 5mV, VS+ = 12V, V + = 2.85V to 36V
VSENSE = 5mV, VS+ = 0V, V + = 2.85V to 36V
dB
dB
36
V
I(+IN), I(–IN)
Input Current
VSENSE = 0V, VS+ = 3V
VSENSE = 0V, VS+ = 0V
l
l
16
–0.05
27
μA
μA
I(+IN) – I(–IN)
Input Offset Current
VSENSE = 0V, VS+ = 3V
VSENSE = 0V, VS+ = 0V
l
l
0.08
0.01
0.6
μA
μA
I(+IN) + I(–IN)
Input Current (Power-Down)
V + = 0V, VS+ = 44V, VSENSE = 0V
l
0.035
1
μA
IS
V + Supply Current
l
l
200
250
325
375
μA
μA
VO(MIN)
Minimum Output Voltage
VSENSE = 0V, VS+ = 3V, V+ = 2.85V
VSENSE = 0V, VS+ = 3V, V+ = 36V
VSENSE = 0mV, VS+ = 44V, V+ = 36V
40
mV
VO(MAX)
Output High (Referred to V+)
VSENSE = 120mV, A V = 100, ROUT = 10k
l
IOUT
Maximum Output Current
Guaranteed by VO(MAX)
l
1
mA
ISC
Short-Circuit Output Current
VS+ = 44V, VS– = 0V, ROUT = 0Ω
l
1.5
mA
BW
–3dB Bandwidth
VSENSE = 50mV, A V = 10V/V
100
kHz
tS
Output Settling to 1% of Final Value VSENSE = 5mV to 100mV
5
μs
tr
Input Step Response (Note 7)
VSENSE = 5mV to 100mV
3
μs
SR
Slew Rate (Note 8)
VSENSE = 5mV to 150mV, A V = 50V/V, RIN = 400Ω
1.75
2
V/μs
VREV
Reverse Input Voltage
(Referred to V –)
I(+IN) + I(–IN) = –5mA
–9.5
–12
l
l
1.27
1.6
V
V
6105fa
4
LT6105
ELECTRICAL CHARACTERISTICS
The l denotes the specifications which apply over the temperature range
–40°C < TA < 125°C (LT6105H), otherwise specifications are at TA = 25°C. V+ = 12V, V – = 0V, VS+ = 12V (see Figure 1), RIN1 = RIN2 =
100Ω, ROUT = 5k (A V = 50), VSENSE = VS+ – VS–, unless otherwise specified. (Note 5)
SYMBOL
PARAMETER
CONDITIONS
VS+, VS–
MIN
Input Voltage Range
Guaranteed by CMRR
A V Error
Voltage Gain Error (Note 6)
VSENSE = 25mV to 75mV, VS+ = 12V
VSENSE = 25mV to 75mV, VS+ = 0V
VOS
ΔVOS /ΔT
CMRR
V+
PSRR
Input Offset Voltage
MS8 Package
VSENSE = 5mV
Input Offset Voltage
DCB Package
VSENSE = 5mV
Input Offset Voltage
VSENSE = 5mV, VS+ = 0V
Power Supply Voltage Range
Power Supply Rejection Ratio
–0.3
–0.1
l
–1
–1.5
l
–3.25
l
–0.3
–0.8
l
l
+ = 2.8V to 44V
VSENSE = 5mV, VS
MAX
UNITS
44
44
V
V
1
1.5
%
%
3.25
%
–0.1
0.3
0.8
mV
mV
–0.4
–0.9
–0.1
0.4
0.9
mV
mV
–1
–1.6
–0.3
1
1.6
mV
mV
l
Temperature Coefficient of VOS
Input Common Mode
Rejection Ratio
l
TYP
0.1
0.5
μV/°C
120
dB
dB
l
100
95
VSENSE = 5mV, VS+ = –0.3V to 44V
VSENSE = 5mV, VS+ = –0.1V to 44V
l
94
80
Guaranteed by PSRR
l
2.85
l
98
94
120
dB
dB
l
98
94
120
dB
dB
+ = 12V, V + = 2.85V to 36V
VSENSE = 5mV, VS
VSENSE = 5mV, VS+ = 0V, V + = 2.85V to 36V
dB
dB
36
V
I(+IN), I(–IN)
Input Current
VSENSE = 0V, VS+ = 3V
VSENSE = 0V, VS+ = 0V
l
l
18
–0.05
30
μA
μA
I(+IN) – I(–IN)
Input Offset Current
VSENSE = 0V, VS+ = 3V
VSENSE = 0V, VS+ = 0V
l
l
0.35
0.1
0.8
μA
μA
I(+IN) + I(–IN)
Input Current (Power-Down)
V + = 0V, VS+ = 44V, VSENSE = 0V
l
0.5
2.5
μA
IS
V + Supply Current
VSENSE = 0V, VS+ = 3V, V+ = 2.85V
VSENSE = 0V, VS+ = 3V, V+ = 36V
l
l
240
300
350
450
μA
μA
VO(MIN)
Minimum Output Voltage
VSENSE = 0mV, VS+ = 44V, V+ = 36V
l
45
mV
VO(MAX)
Output High (Referred to V+)
VSENSE = 120mV, A V = 100, ROUT = 10k
l
1.3
1.7
V
IOUT
Maximum Output Current
Guaranteed by VO(MAX)
l
1
l
1.5
ISC
Short-Circuit Output Current
VS+ = 44V, VS– = 0V, ROUT = 0Ω
BW
–3dB Bandwidth
VSENSE = 50mV, A V = 10V/V
tS
mA
mA
100
kHz
Output Settling to 1% of Final Value VSENSE = 5mV to 100mV
5
μs
tr
Input Step Response (Note 7)
VSENSE = 5mV to 100mV
3
μs
SR
Slew Rate (Note 8)
VSENSE = 5mV to 150mV, A V = 50V/V, RIN = 400Ω
1.75
2
V/μs
–9.5
–12
VREV
Reverse Input Voltage
(Referred to V –)
I(+IN) + I(–IN) = –5mA
l
V
6105fa
5
LT6105
ELECTRICAL CHARACTERISTICS
Note 1: Stresses beyond those listed under Absolute Maximum Ratings
may cause permanent damage to the device. Exposure to any Absolute
Maximum Rating condition for extended periods may affect device
reliability and lifetime.
Note 2: ESD (Electrostatic Discharge) sensitive devices. Extensive use
of ESD protection devices are used internal to the LT6105, however, high
electrostatic discharge can damage or degrade the device. Use proper ESD
handling precautions.
Note 3: A heat sink may be required to keep the junction temperature
below absolute maximum ratings.
Note 4: The LT6105C/LT6105I are guaranteed functional over the
operating temperature range of –40°C to 85°C. The LT6105H is
guaranteed functional over the operating temperature range of –40°C
to 125°C.
Note 5: The LT6105C is guaranteed to meet specified performance from
0°C to 70°C. The LT6105C is designed, characterized and expected to
meet specified performance from –40°C to 85°C but is not tested or
QA sampled at these temperatures. The LT6105I is guaranteed to meet
specified performance from –40°C to 85°C. The LT6105H is guaranteed to
meet specified performance from –40°C to 125°C.
Note 6: 0.01% tolerance external resistors are used.
Note 7: tr is measured from the input to the 2.5V point on the 5V output.
Note 8: Slew rate is measured on the output between 1V and 5V.
TYPICAL PERFORMANCE CHARACTERISTICS
Input Offset Voltage
vs Temperature, VS+ = 12V
Input Offset Voltage
vs Temperature, VS+ = 0V
0.80
1000
200
100
0
–100
–200
–300
V+ = 12V
800 VSENSE = 5mV
TYPICAL UNITS
600
INPUT OFFSET VOLTAGE (mV)
V+ = 12V
300 VSENSE = 5mV
TYPICAL UNITS
INPUT OFFSET VOLTAGE (μV)
INPUT OFFSET VOLTAGE (μV)
400
400
200
0
–200
–400
–600
–1000
–40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
6105 G01
0.2
VSENSE = 5mV
–0.20
0.0
TA = –40°C
–0.2
TA = 85°C
–0.4
TA = 125°C
–1.00
0
0
5
10
15
20
25
30
V+ SUPPLY VOLTAGE (V)
35
40
6105 G04
10
15 20 25 30 35
VS+ INPUT VOLTAGE (V)
TA = 25°C
TA = 85°C
–0.6
TA = – 40°C
–0.8
45
40
–0.2
–0.4
40
6105 G03
VSENSE = 5mV
TA = 125°C
–1.0
V+ = 12V
35 VSENSE = 50mV
RIN = 100Ω
A = 50V/V
30 V
500 SAMPLES
25
20
15
10
5
–1.4
–0.8
5
Gain Error Distribution,
VS+ = 12V
–1.2
–0.6
TA = 85°C
–0.60
PERCENT OF UNITS (%)
INPUT OFFSET VOLTAGE (mV)
0.6
TA = 25°C
TA = 125°C
–0.40
0.0
0.2
TA = – 40°C
0
Input Offset Voltage
vs Supply Voltage, VS+ = 0V
0.4
TA = 25°C
0.20
6105 G02
Input Offset Voltage
vs Supply Voltage, VS+ = 12V
0.8
V+ = 12V
0.60 VSENSE = 5mV
A V = 50V/V
0.40
–0.80
–800
–400
–40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
INPUT OFFSET VOLTAGE (mV)
Input Offset Voltage
vs Input Voltage
0
5
10
15
20
25
30
35
40
V+ SUPPLY VOLTAGE (V)
6105 G05
0
–0.5 –0.4 –0.3 –0.2 –0.1 0 0.1 0.2 0.3 0.4 0.5
GAIN ERROR (%)
6105 G06
6105fa
6
LT6105
TYPICAL PERFORMANCE CHARACTERISTICS
Gain Error Distribution,
VS+ = 0V
35
30
0.5
V+ = 12V
V
3 SENSE = 50mV
RIN = 100Ω
A V = 50V
2
GAIN ERROR (%)
40
25
20
15
TA = – 40°C
1
TA = 25°C
0
–1
TA = 125°C
–2
10
TA = 85°C
–3
0
–2.3 –2.2 –2.1 –2.0 –1.9 –1.8 –1.7 –1.6 –1.5 –1.4
GAIN ERROR (%)
–4
0
–0.1
–0.2
5
10
15 20 25 30 35
VS+ INPUT VOLTAGE (V)
–0.8
45
40
2
VIN = 12V
5 V
SENSE = 50mV
4 RIN = 100Ω
3 AV = ROUT/RIN
GAIN ERROR (%)
–1.6
–2.0
–2.4
–2.8
2
1
VS+ = 12V
0
–1
VS+ = 0V
–2
–3
–3.2
–4
–3.6
–5
–6
–25
0
25
50
75
TEMPERATURE (°C)
100
5.0
100.00
TA = 25°C
0.0
–1.0
TA = 125°C
–2.0
TA = 85°C
–4.0
–5.0
40
60
80
VSENSE (mV)
100
120
6105 G13
20
40
60
80
VSENSE (mV)
100
1.00
0.1
TA = 125°C
0.01
2.0
V+ = 12V
R
1.5 IN = 100Ω
A V = 50V/V
TA = – 40°C
TA = 85°C
0
120
Input Current vs Input Voltage,
VSENSE = 50mV
TA = 25°C
–0.01
–0.10
1.0
I(+IN)
0.5
I(–IN)
0.0
–0.5
–1.0
–1.00
–1.5
–2.0
–100.00
20
–1
6105 G12
–10.00
0
TA = – 40°C
TA = 25°C
0
V+ = 3V
VSENSE = 0V
RIN = 100Ω
10.00
INPUT BIAS CURRENT (μA)
1.0
TA = 125°C
0
Input Bias Current
vs Input Voltage
TA = – 40°C
TA = 85°C
6105 G11
Input Referred Voltage Error
vs VSENSE, VS+ = 0V
125
V+ = 12V
RIN = 100Ω
AV = 50V/V
1
10000
4000
2000
6000
8000
ROUT OUTPUT RESISTANCE (Ω)
6105 G10
2.0
100
–2
0
125
V+ = 12V
4.0 RIN = 100Ω
AV = 50V/V
3.0
0
25
50
75
TEMPERATURE (°C)
Input Referred Voltage Error
vs VSENSE, VS+ = 12V
6
–1.2
–4.0
–50
–25
6105 G09
Gain Error vs Output Resistance
V+ = 12V
VSENSE = 50mV
RIN = 100Ω
AV = 50V/V
–0.4
–0.5
–50
INPUT REFERRED ERROR (mV)
0
GAIN ERROR (%)
0.0
6105 G08
Gain Error vs Temperature,
VS+ = 0V
INPUT REFERRED ERROR (mV)
0.1
–0.4
6105 G07
–3.0
V+ = 12V
0.4 VSENSE = 50mV
RIN = 100Ω
0.3 A = 50V/V
V
0.2
–0.3
5
INPUT CURRENT (mA)
PERCENT OF UNITS (%)
4
V+ = 12V
VSENSE = 50mV
RIN = 100Ω
AV = 50V/V
500 SAMPLES
GAIN ERROR (%)
45
Gain Error vs Temperature,
VS+ = 12V
Gain Error vs Input Voltage
0
0.5
1.5
2
2.5
1
VS+ INPUT VOLTAGE (V)
6105 G14
3
0
5
10
15 20 25 30 35
VS+ INPUT VOLTAGE (V)
40
45
6105 G15
6105fa
7
LT6105
TYPICAL PERFORMANCE CHARACTERISTICS
Input Current (V+ Powered
Down) vs Input Voltage
Output Voltage vs VSENSE Voltage,
VS+ = 12V
1000
1.4
1.6
TA = 85°C
1
0.1
TA = 25°C
0.01
TA = –40°C
0.001
0
5
1.0
TA = – 40°C
0.8
TA (25°C, 85°C, 125°C)
0.6
0.4
V+ = 0V
VSENSE = 0V
0.0001
1.2
OUTPUT VOLTAGE (V)
OUTPUT VOLTAGE (V)
100
10
V+ = 3V
R = 100Ω
1.2 A IN= 10V/V
V
V+ = 3V
1.4 RIN = 100Ω
A V = 10V/V
TA = 125°C
INPUT CURRENT (nA)
Output Voltage vs VSENSE Voltage,
VS+ = 0V
TA
0.8 (– 40°C, 25°C, 85°C, 125°C)
0.6
0.4
0.2
0.2
0.0
–10
10 15 20 25 30 35 40 45 50
VS+ INPUT VOLTAGE (V)
1.0
10
30
70
90
VSENSE (mV)
50
110
0.0
–10
130
10
30
6105 G17
70
90
50
VSENSE (mV)
110
130
6105 G18
6105 G16
TA = – 40°C
TA = 25°C
1.4
1.3
TA = 85°C
1.2
TA = 125°C
1.1
OUTPUT SATURATION VOLTAGE = V+ – V
1.0
0.001
V + = 12V
1.3 VSENSE = 0.5V
RIN = 100Ω
1.2
1.1
1.0 TA = 85°C
0.8
TA = – 40°C
0.7
0.6
TA = 25°C
OUTPUT SATURATION VOLTAGE = V+ – V
OUT
0.4
0.001
10
TA = 125°C
0.9
0.5
0.01
0.10
1
OUTPUT CURRENT (mA)
200
TA = 25°C
TA = – 40°C
100
2.4
2.2
6105 G21
Supply Current vs Input Voltage
400
V+ = 3V
V
350 SENSE = 0V
RIN = 100Ω
SUPPLY CURRENT (μA)
TA = 85°C
2.6
2.0
–40 –25 –10 5 20 35 50 65 80 95 110 125
TEMPERATURE (°C)
10
VSENSE = 0V
RIN = 100Ω
A V = 50V/V
400
SUPPLY CURRENT (μA)
SUPPLY CURRENT (μA)
500
TA = 125°C
2.8
Supply Current vs Supply Voltage,
VS+ = 0V
VSENSE = 0V
RIN = 100Ω
A V = 50V/V
300
V + = 5V
VS+ = 5V
3.2 V
SENSE = 5V
RIN = 100Ω
3.0
6105 G20
Supply Current vs Supply Voltage,
VS+ = 12V
400
OUT
0.01
0.10
1
OUTPUT CURRENT (mA)
6105 G19
500
OUTPUT SHORT-CIRCUIT CURRENT (mA)
1.7
1.5
3.4
1.4
V + = 12V
1.9 VSENSE = 0.5V
RIN = 100Ω
1.8
OUTPUT SATURATI0N VOLTAGE (V)
OUTPUT SATURATI0N VOLTAGE (V)
2.0
1.6
Output Short-Circuit
Current vs Temperature
Output Saturation Voltage
vs Output Current, VS+ = 0.5V
Output Saturation Voltage
vs Output Current, VS+ = 12V
TA = 125°C
300
TA = 85°C
200
TA = 25°C
TA = – 40°C
100
300
TA = 125°C
250
TA = 85°C
200
TA = 25°C
150
TA = – 40°C
100
50
0
0
0
0
5
10
15
20
25
30
35
40
0
5
10
15
20
25
30
35
40
V+ SUPPLY VOLTAGE (V)
V+ SUPPLY VOLTAGE (V)
6105 G22
6105 G23
0
5
10
15 20 25 30 35
VS+ INPUT VOLTAGE (V)
40
45
6105 G24
6105fa
8
LT6105
TYPICAL PERFORMANCE CHARACTERISTICS
Common Mode Rejection
Ratio vs Frequency
V+ = VS+ = 12V
VSENSE = 50mV
RIN = 100Ω
AV = 10V/V
30
GAIN (dB)
20
10
0
–10
–20
–30
–40
1k
10k
100k
1M
FREQUENCY (Hz)
10M
140
COMMON MODE REJECTION RATIO (dB)
40
Power Supply Rejection
Ratio vs Frequency
V+ = 12V
VS+ = 12V
RIN = 100Ω
AV = 50V/V
120
100
80
60
40
20
0
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
160
POWER SUPPLY REJECTION RATIO (dB)
Gain vs Frequency
140
V+ = 12V
VSENSE = 5mV
RIN = 100Ω
AV = 10V/V
VS+ = 12V
120
100
VS+ = 0V
80
60
40
20
0
0.1
1
10 100
1k
10k
FREQUENCY (Hz)
100k
6105 G27
6105 G26
6105 G25
Step Response
VSENSE = 0V to 100mV, VS+ = 12V
Slew Rate vs RIN
1M
Step Response
VSENSE = 0V to 100mV, VS+ = 0V
2.5
+SLEW RATE
SLEW RATE (V/μs)
2.0
12V
VS–
100mV/DIV
0V
VS–
100mV/DIV
VOUT
500mV/DIV
VOUT
500mV/DIV
0V
0V
1.5
–SLEW RATE
1.0
V + = 12V
0.5 V + = 12V
S
VOUT = 7.5V
A V = 50V/ V
0
0 100 200 300 400 500 600 700 800 900 1000
RIN (Ω)
50μs/DIV
V + = 12V
RIN = 1k
6105 G29
50μs/DIV
V + = 12V
RIN = 1k
ROUT = 10k
AV = 10V/V
6105 G30
ROUT = 10k
AV = 10V/V
6105 G28
Step Response
VSENSE = 0V to 100mV
Step Response
VSENSE = 0V to 100mV, RIN = 100Ω
12V
VS–
100mV/DIV
Step Response
VSENSE = 5mV to 100mV
11.995V
VS–
100mV/DIV
12V
VS–
100mV/DIV
5V
VOUT 5V
2V/DIV
0V
VOUT
2V/DIV
0V
VOUT
2V/DIV
0V
50μs/DIV
V + = 12V
VS+ = 12V
AV = 50V/ V
6105 G31
5μs/DIV
V + = 12V
VS+ = 12V
RIN = 1k
ROUT = 50k
AV = 50V/ V
6105 G32
5μs/DIV
V+ = 12V
VS+ = 12V
RIN = 1k
6105 G33
ROUT = 50k
AV = 50V/ V
6105fa
9
LT6105
TYPICAL PERFORMANCE CHARACTERISTICS
Step Response
VSENSE = 0V to 10mV, VS+ = 12V
Step Response
VSENSE = 100mV to 5mV
11.995V
VS–
100mV/DIV
Step Response
VSENSE = 0V to 10mV, VS+ = 0V
12V
VS–
10mV/DIV
0V
VS–
10mV/DIV
VOUT
200mV/DIV
VOUT
200mV/DIV
0V
0V
VOUT 5V
2V/DIV
0V
5μs/DIV
V+ = 12V
VS+ = 12V
RIN = 1k
6105 G34
6105 G35
50μs/DIV
V+ = 12V
RIN = 100Ω
ROUT = 50k
AV = 50V/ V
Step Response
VSENSE = 0V to 100mV,
CL = 1000pF, VS+ = 12V
50μs/DIV
V+ = 12V
RIN = 100Ω
ROUT = 5k
AV = 50V/ V
Step Response
VSENSE = 0V to 10mV,
CL = 1000pF, VS+ = 12V
12V
VS–
10mV/DIV
0V
VS–
100mV/DIV
VOUT
2V/DIV
VOUT
200mV/DIV
VOUT
2V/DIV
0V
0V
0V
V+ = 12V
RIN = 100Ω
ROUT = 5k
6105 G37
6105 G38
50μs/DIV
V+ = 12V
RIN = 100Ω
ROUT = 5k
AV = 50V/ V
CL = 1000pF
ROUT = 5k
A V = 50V/ V
Step Response
VSENSE = 0V to 100mV,
CL = 1000pF, VS+ = 0V
12V
VS–
100mV/DIV
50μs/DIV
6105 G36
50μs/DIV
V+ = 12V
RIN = 100Ω
ROUT = 5k
AV = 50V/ V
CL = 1000pF
Step Response
VSENSE = 0V to 10mV,
CL = 1000pF, VS+ = 0V
6105 G39
AV = 50V/ V
CL = 1000pF
Power Supply Start-Up Response
0V
VS–
10mV/DIV
5V
V+
0V
VOUT
200V/DIV
VOUT
1V/DIV
0V
0V
50μs/DIV
V+ = 12V
RIN = 100Ω
ROUT = 5k
AV = 50V/ V
CL = 1000pF
6105 G40
20μs/DIV
VS+ = 12V
VSENSE = 100mV
6105 G41
RIN = 1k
AV = 10V/ V
6105fa
10
LT6105
PIN FUNCTIONS
(DCB/MS8)
–IN (Pin 1/Pin 1): Negative Sense Input Terminal.
Negative sense voltage input will remain functional for
voltages up to 44V, referred to V –. Connect –IN to an
external gain-setting resistor RIN1 (RIN1 = RIN2) to set
the gain.
V+ (Pin 2/Pin 2): Power Supply Voltage. This pin supplies
current to the amplifier and can operate from 2.85V to 36V,
independent of the voltages on the –IN or +IN pins.
V – (Pin 3/Pin 4): Negative Power Supply Voltage or Ground
for Single Supply Operation.
VOUT (Pin 4/Pin 5): Voltage Output:
VOUT = A V • (VSENSE ± VOS)
VOS is the input offset voltage. A V is the gain set by external RIN1, RIN2, ROUT. A V = ROUT/RIN1, for RIN1 = RIN2.
NC (Pin 5/Pins 3, 6, 7): Not Connected Internally.
+IN (Pin 6/Pin 8): Positive Sense Input Terminal.
Connecting a source to VS+ and a load to VS– will allow the
LT6105 to monitor the current through RSENSE , refer to
Figure 1. Connect +IN to an external gain-setting resistor
RIN2 to set the gain. +IN remains functional for voltages
up to 44V, referred to V –.
Exposed Pad (Pin 7) DFN Only: V –. The Exposed Pad is
connected to the V – pin. It should be connected to the
V – trace of the PCB, or left floating.
BLOCK DIAGRAM
VS–
TO LOAD
VSENSE
RSENSE
RIN1
VS+
SOURCE
0V TO 44V
RIN2
–IN
+IN
LT6105
SET RIN1 = RIN2 FOR BEST ACCURACY
ROUT
RIN2
ROUT
V(–IN) < 1.6V: VOUT = VSENSE •
RIN1
V(–IN) > 1.6V: VOUT = VSENSE •
V+
Q2
Q3
+
+
–
–
A1
IF RIN1 ≠ RIN2, THEN
A2
RIN1, RIN2, ROUT ARE EXTERNAL RESISTORS
Q1
V–
VOUT
VOUT = VSENSE •
ROUT
RIN
WHERE RIN = RIN1 = RIN2
ROUT
6105 F01
AV =
ROUT
RIN
Figure 1. Simplified Block Diagram
6105fa
11
LT6105
APPLICATIONS INFORMATION
The LT6105 extended input range current sense amplifier (see Figure 1) provides accurate unidirectional
monitoring of current through a user-selected sense resistor. The LT6105 is fully specified over a –0.3V to 44V input
common mode range. A high PSRR V+ supply (2.85V to
36V) powers the current sense amplifier. The input sense
voltage is level shifted from the sensed power supply to
the ground reference and amplified by a user-selected gain
to the output. The output voltage is directly proportional
to the current flowing through the sense resistor.
THEORY OF OPERATION
(Refer to Figure 1)
Case 1: High Input Voltage (1.6V < V–IN < 44V)
Current from the source at VS+ flows through RSENSE to
the load at VS–, creating a sense voltage, VSENSE. Inputs
VS+ and VS– apply the sense voltage to RIN2. The opposite
ends of resistors RIN1 and RIN2 are forced to be at equal
potentials by the voltage gain of amplifier A2. Thus, the
current through RIN2 is VSENSE/RIN2. The current through
RIN2 is forced to flow through transistor Q1 and into
ROUT, creating an output voltage, VOUT. Under this input
operation range, amplifier A1 is kept off. The base current
of Q1 has been compensated for and will not contribute
to output error. The current from RIN2 flowing through
resistor ROUT gives an output voltage of VOUT = VSENSE •
ROUT/RIN2, producing a gain voltage of A V = VOUT /VSENSE
= ROUT/RIN2.
Case 2: Low Input Voltage (0V < V–IN < 1.6V)
Current from the source at VS+ flows through RSENSE to
the load at VS–, creating a sense voltage, VSENSE. Inputs
VS+ and VS– apply the sense voltage to RIN1. The opposite
ends of resistors RIN1 and RIN2 are forced to be at equal
potentials by the voltage gain of amplifier A1. Thus, the
collector current of Q3 will flow out of the –IN pin through
RIN1. Q2 mirrors this current VSENSE/RIN1 to ROUT, creating an output voltage, VOUT. Under this input operation
range, amplifier A2 is kept off. This current VSENSE/RIN1
flowing through resistor ROUT gives an output voltage of
VOUT = VSENSE • ROUT /RIN1, producing a gain voltage of
A V = VOUT/VSENSE = ROUT /RIN1.
Selection of External Current Sense Resistor
External RSENSE resistor selection is a delicate trade-off
between power dissipation in the resistor and current
measurement accuracy. For high current applications, the
user may want to minimize the sense voltage to minimize
the power dissipation in the sense resistor.
The system load current will cause both heat and voltage
loss in RSENSE. As a result, the sense resistor should be as
small as possible while still providing the input dynamic
range required by the measurement. Note that input dynamic range is the difference between the maximum input
signal and the minimum accurately reproduced signal,
and is limited primarily by input DC offset voltage of the
internal amplifier of the LT6105.
The sense resistor value will be set from the minimum
signal current that can be accurately resolved by this sense
amp. As an example, the LT6105 has a typical input offset
of 100μV. If the minimum current is 20mA, a sense resistor
of 5mΩ will set VSENSE to 100μV, which is the same value
as the input offset. A larger sense resistor will reduce the
error due to offset by increasing the sense voltage for
a given load current, but it will limit the maximum peak
current for a given application.
For a peak current of 2A and a maximum VSENSE of 80mV,
RSENSE should not be more than 40mΩ. The input offset
causes an error equivalent to only 2.5mA of load current.
Peak dissipation is 160mW. If a 20mΩ sense resistor is
employed, then the effective current error is 5mA, while
the peak sense voltage is reduced to 40mV at 2A, dissipating only 80mW.
The LT6105’s low input offset voltage of 100μV allows for
high resolution while limiting the maximum sense voltages.
Coupled with full scale sense voltage as large as 1V for
RIN= 1k, it can achieve 80dB of dynamic range.
Sense Resistor Connection
Kelvin connection of the LT6105’s input resistors to the
sense resistor should be implemented to provide the highest accuracy in high current applications. Solder connections and PC board interconnect resistance (approximately
0.5mΩ per square for 1oz copper) can be a large error
in high current systems. A 5A application might choose
6105fa
12
LT6105
APPLICATIONS INFORMATION
a 20mΩ sense resistor to give a 100mV full-scale input
to the LT6105. Input offset voltage will limit resolution to
5mA. Neglecting contact resistance at solder joints, even
one square of PC board copper at each resistor end will
cause an error of 5%. This error will grow proportionately
higher as monitored current levels rise.
Gain Setting
The gain is set with three external resistors, RIN1, RIN2,
ROUT. The gain, ROUT /RIN, can be selected from 1V/V to
100V/V as long as the maximum current does not exceed
1mA. Select Gain = ROUT/RIN2 for sense input voltage operation greater than 1.6V. Select gain = ROUT/RIN1 for sense
input voltage operation less than 1.6V. The overall system
error will depend on the resistor tolerance chosen for the
application. Set RIN1= RIN2 for best accuracy across the
entire input range. The total error will be gain error of the
resistors plus the gain error of the LT6105 device.
Output Signal Range
The LT6105’s output signal is developed by current
through RIN2 (44V > V–IN > 1.6V) or RIN1 (0V < V–IN <
1.6V) conducted to the output resistor, ROUT. This current
is VSENSE/RIN2 or VSENSE/RIN1. The sense amplifier’s maximum output current before gain error begins to increase
is 1mA. This allows low value output resistors to be used
which helps preserve signal accuracy when the output pin
is connected to other systems.
For zero VSENSE, the internal circuitry gain will force VOUT
to VO(MIN) referred to V –. Depending on output currents,
VOUT may swing positive to within VO(MAX) referred to V +
or a maximum of 36V, a limit set by internal junction breakdown. Within these constraints, an amplified, level shifted
representation of RSENSE voltage is developed at VOUT. The
output is well behaved driving capacitive loads.
CM Input Signal Range
The LT6105 has high CMRR over the full input voltage
range. The minimum operation voltage of the sense amplifier inputs is 0V whether V+ is at 2.7V or 36V. The output
remains accurate even when the sense inputs are driven
to 44V. The graph in Figure 2 shows that VOS changes very
slightly over a wide input range. Furthermore, either sense
inputs VS+ and VS– can collapse to 0V without incurring any
damage to the device. The LT6105 can handle differential
sense voltages up to 44V. For example, VS+ = 44V and VS– =
0V can be a valid condition in a current monitoring application (Figure 3) when an overload protection fuse is blown
and VS– voltage collapses to ground. Under this condition,
the output of the LT6105 goes to the positive rail, VO(MAX).
TO LOAD
V+ = 12V
0.60 VSENSE = 5mV
A V = 50V/V
0.40
FUSE
TA = 25°C
–0.20
+
5V
TA = 125°C
DC SOURCE
(≤ 44V)
V+
C2
0.1MF
–
0
C1
0.1MF
+IN
–IN
TA = – 40°C
VS+
RIN2
RIN1
0.20
–0.40
RSENSE
VS–
+
INPUT OFFSET VOLTAGE (mV)
0.80
TA = 85°C
–0.60
–0.80
V–
–1.00
0
5
10
15
20
25
30
35
VS+ INPUT VOLTAGE (V)
40
45
6105 F02
OUT
LT6105
6105 F03
Figure 2. Input Offset Voltage vs VS
OUTPUT
ROUT
+ Input Voltage
Figure 3. Current Monitoring of a Fuse Protected Circuit
6105fa
13
LT6105
APPLICATIONS INFORMATION
There is no phase inversion. For the opposite case, when
VS+ collapses to ground with VS– held up at some higher
voltage potential, the output will sit at VO(MIN).
The Two Input Stages Crossover Region
The wide common mode input range is achieved with two
input stages. These two input stages consist of a pair of
matched common base PNP input transistors and a pair
of common emitter PNP input transistors. As result of
two input stages, there will be three distinct operating
regions around the transition region as shown in the Input
Bias Current vs Sense Input Voltage curve in the Typical
Performance Characteristics section.
The crossover voltage, the voltage where the gm of one
input stage is transferred to the other, occurs at 1.6V above
V–. Near this region, one input stage is shutting off while
the other is turning on. Increases in temperature will cause
the crossover voltage to decrease. For input operation
between 1.6V and 44V, the common base PNPs are active
(Q2, Q3 of Figure 1). The typical current through each
input at VSENSE = 0V is 15μA. The input offset voltage is
300μV maximum at room temperature. For input operation
between 1.6V to 0V, the other PNP is active. The current
out of the inputs at VSENSE = 0V is 100nA. The input offset
voltage is untrimmed and is typically 300μV.
Selection of External Output Resistor, ROUT
The output resistor, ROUT, determines how the output current is converted to voltage. VOUT is simply IRIN • ROUT.
In choosing an output resistor, the maximum output voltage must first be considered. If the following circuit is a
buffer or ADC with limited input range, then ROUT must be
chosen so that IOUT(MAX) • ROUT is less than the allowed
maximum input range of this circuit. In addition, the output
impedance is determined by ROUT.
If the circuit to be driven has high input impedance, then
almost any useful output impedance will be acceptable.
However, if the driven circuit has relatively low input impedance, or draws spikes of current such as an ADC might
do, then a lower ROUT value may be required in order to
preserve the accuracy of the output. As an example, if the
input impedance of the driven circuit is 100 times ROUT,
then the accuracy of VOUT will be reduced by 1% since:
VOUT = IOUT •
ROUT • RIN(DRIVEN)
ROUT + RIN(DRIVEN)
= IOUT • ROUT •
100
= 0 . 99 • IOUT • ROUT
101
Full-Scale Sense Voltage, Selection of External Input
Resistor, RIN
The external input resistor, RIN, controls the transconductance of the current sense circuit. Since IOUT = VSENSE /RIN,
transconductance gm = 1/RIN. For example, if RIN =100,
then IOUT = VSENSE /100 or IOUT = 1mA for VSENSE =100mV.
RIN should be chosen to allow the required resolution
while limiting the output current. The LT6105 can output
more than 1mA into ROUT without introducing a significant increase in gain error. By setting RIN such that the
largest expected sense voltage gives IOUT = 1mA, then
the maximum output dynamic range is available. Output
dynamic range is limited by both the maximum allowed
output current and the maximum allowed output voltage,
as well as the minimum practical output signal. If less
dynamic range is required, then RIN can be increased
accordingly, reducing the maximum output current and
power dissipation. The LT6105’s performance is optimized
for values of RIN = 100Ω to 1k. Values outside this range
may result in additional errors. The power dissipation
across RIN and ROUT should not exceed the resistors’
recommended ratings.
6105fa
14
LT6105
APPLICATIONS INFORMATION
Error Sources
The current sense system uses an amplifier, current mirrors
and external resistors to apply gain and level shifting. The
output is then dependent on the matching characteristics
of the current mirrors, characteristics of the amplifier such
as gain and input offset, as well as matching of external
resistors. Ideally, the circuit output is:
R
VOUT = VSENSE • OUT ; VSENSE = ISENSE • R SENSE
RIN
In this case, the only error is due to resistor mismatch,
which provides an error in gain only. Mismatch in the
internal current mirror adds to gain error but is trimmed
to less than 0.3%. Offset voltage and sense input current
are the main cause of any additional error.
Error Due to Input Offset Voltage
Dynamic range is inversely proportional to the input offset
voltage. Dynamic range can be thought of as the maximum
VSENSE divided by VOS. The offset voltage of the LT6105
is typically only ±100μV.
Since the current exiting –IN is coming from V+, the voltage
is V+ – V–IN. Taking the worst case V–IN = 0V, the above
equation becomes:
PIN ≅ V+ • IRIN1, for V–IN < 1.6V.
The power dissipated due to internal mirrored currents:
PQ = 2 • IOUT • V+
The factor of 2 is the result of internal current shifting and
1:1 mirroring.
At maximum supply and maximum output current, the
total power dissipation can exceed 100mW. This will
cause significant heating of the LT6105 die. In order to
prevent damage to the LT6105, the maximum expected
dissipation in each application should be calculated. This
number can be multiplied by the θJA value listed in the Pin
Configuration section to find the maximum expected die
temperature. This must not be allowed to exceed 150°C,
or performance may be degraded. As an example, if an
LT6105 in the MSOP package is to be run at VS+ = 44V and
V+ = 36V with 1mA output current at 80°C ambient:
PQ(MAX) = 2 • IOUT(MAX) • V+ = PQ(MAX) = 72mW
Error Due to Sense Input Offset Current
PIN(MAX) = IRIN2(MAX) • V+IN(MAX) = 44mW
Input offset current or mismatches in input bias current will
introduce an additional input offset voltage term. Typical
input offset current is 0.05μA. Lower values of RIN will
keep this error to a minimum. For example, if RIN = 100Ω,
then the additional offset is 5μV.
TRISE = θJA • PTOTAL(MAX)
Output Current Limitations Due to Power Dissipation
The LT6105 can deliver up to 1mA continuous current to
the output pin. This output current, IOUT, is the mirrored
current which flows through RIN2 and enters the current
sense amp via the +IN pin for V–IN > 1.6V, and exits out of
–IN through RIN1 for V–IN < 1.6V. The total power dissipation due to input currents, PIN, and the dissipation due to
internal mirrored currents, PQ:
PTOTAL = PIN + PQ
PIN = (V+IN) • IRIN2 ; V–IN > 1.6V
or
PIN = (V+ – (V–IN)) • IRIN1; V–IN < 1.6V
TMAX = TAMBIENT + TRISE
TMAX must be < 150°C
PTOTAL(MAX) = 116mW and the maximum die temperature
will be 109°C. If this same circuit must run at 125°C ambient, the maximum die temperature will increase to 150°C.
Note that supply current, and therefore PQ, is proportional
to temperature. Refer to the Typical Performance Characteristics section. In this condition, the maximum output
current should be reduced to avoid device damage. The
DCB package, on the other hand, has a lower θJA and
subsequently, a lower die temperature increase than the
MSOP. With the same condition as above, the DCB will
rise only 7.5°C to 87.5°C and 132.5°C, respectively.
It is important to note that the LT6105 has been designed
to provide at least 1mA to the output when required, and
can deliver more under large VSENSE conditions. Care must
be taken to limit the maximum output current by proper
choice of sense resistor and input resistors.
6105fa
15
LT6105
APPLICATIONS INFORMATION
Output Filtering
Response Time
The output voltage, VOUT is simply IOUT • ZOUT. This
makes filtering straightforward. Any circuit may be used
which generates the required ZOUT to get the desired filter
response. For example, a capacitor in parallel with ROUT
will give a low pass response. This will reduce unwanted
noise from the output, and may also be useful as a charge
reservoir to keep the output steady while driving a switching circuit such as a mux or an ADC. This output capacitor
in parallel with an output resistor will create a pole in the
output response at:
1
f – 3db =
2 • π • ROUT • COUT
The LT6105 is designed to exhibit fast response to inputs
for the purpose of circuit protection or signal transmission.
This response time will be affected by the external circuit
in two ways—delay and speed. If the output current is
very low and an input transient occurs, there may be an
increased delay before the output voltage begins changing.
This can be improved by increasing the minimum output
current, either by increasing RSENSE or decreasing RIN. The
effect of increased output current is illustrated in the step
response curves in the Typical Performance Characteristics
section of this data sheet. Note that the curves are labeled
with respect to the initial output currents. The speed is
also affected by the external circuit. In this case, if the
input changes very quickly, the internal amplifier will slew
the base of the internal output PNP (Figure 1) in order to
maintain the internal loop. This results in current flowing
through RIN and the internal PNP. This current slew rate
will be determined by the amplifier and PNP characteristics as well as the input resistor, RIN. See the Slew Rate
vs RIN curve in the Typical Performance Characteristics
section. Using a smaller RIN will allow the output current
to increase more quickly, decreasing the response time
at the output. This will also have the effect of increasing
the maximum output current.
TYPICAL APPLICATIONS
Gain of 20 Current Sense Amplifier with Output Filtering
2.85V TO 36V
SOURCE
0V TO 44V
LT6105
VS+
249Ω
+IN
V+
+
VOUT
0.039Ω
–IN
VS–
–
4.99k
249Ω
V
TO LOAD
VOUT = 780mV/A
0.22μF
–
6105 TA02
6105fa
16
LT6105
TYPICAL APPLICATIONS
Solenoid Monitor
The large input common mode range of the LT6105
makes it suitable for monitoring currents in quarter,
half and full bridge inductive load driving applications.
Figure 4 shows an example of a quarter bridge. The
MOSFET pulls down on the bottom of the solenoid to
increase solenoid current. It lets go to decrease current,
and the solenoid voltage freewheels around the Schottky
diode. Current measurement waveforms are shown in
Figure 5. The small glitches occur due to the action of
the solenoid plunger, and this provides an opportunity for
mechanical system monitoring without an independent
sensor or limit switch.
Figure 6 shows another solenoid driver circuit, this time
with one end of the solenoid grounded and a P-channel
MOSFET pulling up on the other end. In this case, the
inductor freewheels around ground, imposing a negative
input common mode voltage of one Schottky diode drop.
This voltage may exceed the input range of the LT6105.
This does not endanger the device, but it severely degrades
its accuracy. In order to avoid violating the input range,
pull-up resistors may be used as shown.
24VDC
24VDC
–
0V/OFF
5V/ON
+
–IN
LT6105
200Ω
1%
+IN
24V/OFF
1Ω
1%
200Ω
1%
19V/ON
–
200Ω
1%
24V, 3W
SOLENOID
1Ω
1%
200Ω
1%
1N914
24V, 3W
SOLENOID
2k
1%
2N7000
–IN
5VDC
TP0610L
+
1N5818
2k
1%
LT6105
1N5818
+IN
V+
5VDC
V–
VOUT
V+
VOUT = 25mV/mA
4.99k
1%
6105 F04
V–
VOUT
6105 F06
Figure 4. Simplest Form of a Solenoid Driver. The LT6105
Monitors the Current in Both On and Freewheel States. The
Lowest Common Mode Voltage Is 0V, While the Highest Is
24V Plus the Forward Voltage of the Schottky Diode
VOUT = 25mV/mA
4.99k
1%
Figure 6. A Similar Circuit to Figure 4, but with Solenoid
Grounded, so Freewheeling Forces Inputs Negative.
Providing Resistive Pull-Ups Keeps Amplifier Inputs From
Falling Outside of Their Accurate Input Range
VBAT = 3.6V
ICPO = 200μA
5V/DIV CCPO = 2.2ΩF
10V/DIV
2V/DIV
50ms/DIV
6105 F05
Figure 5. Current Measurement Waveforms. The Top Trace Is the
MOSFET Gate with High On. The Middle Trace Is the Bottom of
the Solenoid/ Inductor. The Bottom Trace Is the LT6105 Output,
Representing Solenoid Current at 80mA /DIV. Glitches Are Useful
Indicators of Solenoid Plunger Movement
6105fa
17
LT6105
PACKAGE DESCRIPTION
DCB Package
6-Lead Plastic DFN (2mm × 3mm)
(Reference LTC DWG # 05-08-1715)
0.70 p 0.05
3.55 p 0.05
1.65 p 0.05
(2 SIDES)
2.15 p 0.05
PACKAGE
OUTLINE
0.25 p 0.05
0.50 BSC
1.35 p 0.05
(2 SIDES)
RECOMMENDED SOLDER PAD PITCH AND DIMENSIONS
R = 0.115
TYP
R = 0.05
TYP
2.00 p 0.10
(2 SIDES)
3.00 p 0.10
(2 SIDES)
0.40 p 0.10
4
6
1.65 p 0.10
(2 SIDES)
PIN 1 NOTCH
R0.20 OR 0.25
s 45o CHAMFER
PIN 1 BAR
TOP MARK
(SEE NOTE 6)
3
0.200 REF
0.75 p 0.05
1
(DCB6) DFN 0405
0.25 p 0.05
0.50 BSC
1.35 p 0.10
(2 SIDES)
0.00 – 0.05
BOTTOM VIEW—EXPOSED PAD
NOTE:
1. DRAWING TO BE MADE A JEDEC PACKAGE OUTLINE M0-229 VARIATION OF (TBD)
2. DRAWING NOT TO SCALE
3. ALL DIMENSIONS ARE IN MILLIMETERS
4. DIMENSIONS OF EXPOSED PAD ON BOTTOM OF PACKAGE DO NOT INCLUDE
MOLD FLASH. MOLD FLASH, IF PRESENT, SHALL NOT EXCEED 0.15mm ON ANY SIDE
5. EXPOSED PAD SHALL BE SOLDER PLATED
6. SHADED AREA IS ONLY A REFERENCE FOR PIN 1 LOCATION ON THE
TOP AND BOTTOM OF PACKAGE
6105fa
18
LT6105
PACKAGE DESCRIPTION
MS8 Package
8-Lead Plastic MSOP
(Reference LTC DWG # 05-08-1660)
0.889 p 0.127
(.035 p .005)
5.23
(.206)
MIN
3.20 – 3.45
(.126 – .136)
0.42 p 0.038
(.0165 p .0015)
TYP
3.00 p 0.102
(.118 p .004)
(NOTE 3)
0.65
(.0256)
BSC
8
7 6 5
0.52
(.0205)
REF
RECOMMENDED SOLDER PAD LAYOUT
0.254
(.010)
3.00 p 0.102
(.118 p .004)
(NOTE 4)
4.90 p 0.152
(.193 p .006)
DETAIL “A”
0o – 6o TYP
GAUGE PLANE
1
0.53 p 0.152
(.021 p .006)
DETAIL “A”
2 3
4
1.10
(.043)
MAX
0.86
(.034)
REF
0.18
(.007)
SEATING
PLANE
0.22 – 0.38
(.009 – .015)
TYP
0.65
(.0256)
BSC
0.1016 p 0.0508
(.004 p .002)
MSOP (MS8) 0307 REV F
NOTE:
1. DIMENSIONS IN MILLIMETER/(INCH)
2. DRAWING NOT TO SCALE
3. DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS.
MOLD FLASH, PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
4. DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.152mm (.006") PER SIDE
5. LEAD COPLANARITY (BOTTOM OF LEADS AFTER FORMING) SHALL BE 0.102mm (.004") MAX
6105fa
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
19
LT6105
TYPICAL APPLICATION
VOUT = 1V/A
The input common mode range of the LT6105 also makes
it suitable for monitoring either positive or negative supplies. Figure 7 shows one LT6105 applied as a simple
positive supply monitor, and another LT6105 as a simple
negative supply monitor. Note that the schematics are
practically identical and both have outputs conveniently
referred to ground. The only requirement for negative
supply monitoring, in addition to the usual constraints of
the absolute maximum ratings, is that the negative supply
to that LT6105 be at least as negative as the supply it is
monitoring.
VOUT
LT6105
4.99k
1%
+IN
100Ω
1%
+15V
POSITIVE
SUPPLY
V–
–15V
V+
5VDC
–IN
20mΩ
+ 1%
100Ω
1%
–
TO +15V
LOAD
CURRENT FLOW
CURRENT FLOW
–15V
NEGATIVE
SUPPLY
–
100Ω
1%
–IN
5VDC
V+
–15V
V–
20mΩ
1%
+
Supply Monitoring
LT6105
100Ω
1%
TO –15V
LOAD
+IN
VOUT
6105 F07
VOUT = 1V/A
4.99k
1%
Figure 7. The LT6105 Can Monitor the Current of Either Positive
or Negative Supplies, Without a Schematic Change. Just Ensure
That the Current Flow Is in the Correct Direction
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LT1787/LT1787HV
Precision, Bidirectional, High Side Current Sense Amplifier
2.7V to 60V Operation, 75μV Offset, 60μA Current Draw
LTC4150
Coulomb Counter/Battery Gas Gauge
Indicates Charge Quantity and Polarity
LT6100
Gain-Selectable High Side Current Sense Amplifier
4.1V to 48V Operation, Pin-Selectable Gain: 10V/V, 12.5V/V, 20V/V,
25V/V, 40V/V, 50V/V
LTC6101/
LTC6101HV
High Voltage High Side Current Sense Amplifier
4V to 60V/5V to 100V Operation, External Resistor Set Gain, SOT23
LTC6102/
LTC6102HV
Zero Drift High Side Current Sense Amplifier
4V to 60V/5V to 100V Operation, ±10μV Offset, 1μs Step Response,
MSOP8 / DFN
LTC6103
Dual High Side Precision Current Sense Amplifier
4V to 60V, Gain Configurable, 8-Pin MSOP
LTC6104
Bidirectional High Side Precision Current Sense Amplifier
4V to 60V, Gain Configurable, 8-Pin MSOP
LT6106
Low Cost, High Side Precision Current Sense Amplifier
2.7V to 36V, Gain Configurable, SOT23
6105fa
20 Linear Technology Corporation
LT 0408 REV A • PRINTED IN USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408) 432-1900 ● FAX: (408) 434-0507
●
www.linear.com
© LINEAR TECHNOLOGY CORPORATION 2007