UltraMAX
TM
LX5248/LX5249
9 - L I N E LV D S C S I T E R M I N A T O R
T
H E
I
N F I N I T E
P
O W E R
O F
I
N N O VA T I O N
P
R E L I M I N A R Y
D
DESCRIPTION
The LX5248/49 IC is a Low Voltage Differential (LVD) Terminator designed to
comply with the LVD termination specification in the SPI-2 document. The LX5248/
49 is designed specifically for LVD applications. Because the LX5248/49 supports only
LVD, it has lower output capacitance than
multimode terminators such as the LX5240.
The LX5248/49 Utilizes Linfinity’s
UltraMAX Technology which delivers the
ultimate in SCSI bus performance while
saving component cost and board area.
Elimination of the external capacitors also
mitigates the need for a lengthy capacitor
selection process. The individual high bandwidth drivers also maximize channel separation and reduces channel-to-channel noise
and cross talk. The high-bandwidth
UltraMAX architecture insures ULTRA-2 performance, while providing a clear migration
path to ULTRA-3 and beyond.
A T A
S
H E E T
K E Y F E AT U R E S
■ 2.5pF Typical Disabled Output
Capacitance
■ Fast Response, No External Capacitors
Required
■ 5µA Supply Current In Disconnect Mode
■ 20mA Supply Current During Normal
Operation
■ Logic Command Disconnects All
Termination Lines
■ Diffsense Line Driver
■ Current Limit And Thermal Protection
■ Compatible With The Pending SPI-2 LVD
Specification
■ Pin Compatible With Industry Standard
Multi-Mode Terminators
■ For UCC5240 Pin Compatible LVD ONLY
Terminator (See LX5245/5246)
When The LX5248/49 Is Enabled, The
Differential Sense (DIFFSENSE) Pin Supplies A Voltage Between 1.2V And 1.4V.
In application, the terminator DIFFSENSE
output is connected to the system
DIFFSENSE line. If there are no single ended
or HVD devices attached to the system the
LVD output will be enabled. If the
DIFFSENSE line is LOW, indicating a single
ended device, the LX5248/49 output will be
HiZ. If the DIFFSENSE line is HIGH, indicating a high voltage differential device the
LX5248/49 output will be HiZ.
The LX5248/49 IC Has A TTL Compatible DISCONNECT Pin. The LX5248/49 is
active LOW. During sleep mode, power
dissipation is reduced to a meager 5µA, while
also placing all outputs in a HI Z state. Also
during sleep mode, the DIFFSENSE function
is disabled and is placed in a HI Z state.
NOTE: For current data & package dimensions, visit our web site: http://www.linfinity.com.
PRODUCT HIGHLIGHT
B U S V O LTA G E /
V OD
VOD = V(-) - V(+), Logic = 0
V(+)
NEGATED
VCM
100mV
0V
V(-)
-100mV
LX5248/49
LX5248/49
PA C K A G E O R D E R I N F O R M AT I O N
SSOP
DB Plastic
36-pin
TA (°C)
0 to 70K
LX5249CDBK
TSSOP
PW Plastic
24-pin
LX5249CPWK
TSSOP
PW Plastic
28-pin
LX5248CPW
Note: All surface-mount packages are available in Tape & Reel.
Append the letter "T" to part number. (i.e. LX5249CPWT)
Copyright © 2001
Rev. 0.6 10/00
LINFINITY MICROELECTRONICS INC.
11861 WESTERN AVENUE, GARDEN GROVE, CA. 92841, 714-898-8121, FAX: 714-893-2570
1
PRODUCT DATABOOK 1996/1997
UltraMAX
LX5248/LX5249
9 - L I N E LV D S C S I T E R M I N A T O R
P
R E L I M I N A R Y
A B S O L U T E M A X I M U M R AT I N G S
D
A T A
S
H E E T
PACKAGE PIN OUTS
(Note 1)
TermPwr Voltage .............................................................................................. +6.5V
Signal Line Voltage ................................................................................... 0V to 6.5V
Differential Voltage ................................................................................... 0V to 6.5V
Operating Junction Temperature
Plastic (PW Package) ................................................................................... 150°C
Storage Temperature Range .............................................................. -65°C to 150°C
Lead Temperature (Soldering, 10 seconds) .................................................... 300°C
Note 1. Exceeding these ratings could cause damage to the device. All voltages are with
respect to Ground. Currents are positive into, negative out of the specified
terminal.
T H E R M A L D ATA
DB PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA
50°C/W
PW PACKAGE:
THERMAL RESISTANCE-JUNCTION TO AMBIENT, θJA
100°C/W
Junction Temperature Calculation: TJ = TA + (PD x θJA).
The θJA numbers are guidelines for the thermal performance of the device/pc-board
system. All of the above assume no ambient airflow.
MASTER / SLAVE FUNCTION TABLE
MASTER /
SLAVE
DIFFSENSE
Status
Output
Current
L*
H
Open (Pull-up)
HI Z
1.3V
1.3V
0mA
15mA Source
15mA Source
DIFFSENSE / POWER UP / POWER DOWN FUNCTION TABLE
DIFFSENSE
L
L
L
H
Open
L < 0.5V
0.7V to 1.9V
H > 2.4V
X
X
Outputs
Status
Type
Disable
Enable
Disable
Disable
Disable
HiZ
LVD
HiZ
HiZ
HiZ
1
36
2
35
3
34
4
33
5
32
6
31
7
30
8
29
9
28
10/
27
11/
26
12/
25
13/
24
14/
23
15/
22
16/
21
17/
20
18/
19
VTERM
HVD
LVD
SE
99+
88+
HEATSINK/GND
HEATSINK/GND
HEATSINK/GND
77+
66+
DIFF B
DIFFSENSE
MASTER/SLAVE
LX5249C ("N.C." = No Internal Connection)
DB PACKAGE (Top View)
1+
12+
23+
34+
45+
5DISCONNECT
GND
1
24
2
23
3
22
4
21
5
20
6
19
7
18
8
17
9
16
10/
15
11/
14
12/
13
VTERM
N.C.
99+
88+
77+
66+
DIFFSENSE
MASTER/SLAVE
LX5249CPW ("N.C." = No Internal Connection)
PW PACKAGE (Top View)
* When in Low state, terminator will detect state of DIFFSENSE line.
LX5248/LX5249
DISCONNECT
N.C.
N.C.
N.C.
1+
12+
2HEATSINK/GND
HEATSINK/GND
HEATSINK/GND
3+
34+
45+
5DISCONNECT
GND
Quiescent
Current
2mA
21mA
2mA
10µA
10µA
N.C.
1+
12+
2N.C.
3+
34+
45+
5DISCONNECT
GND
1
28
2
27
3
26
4
25
5
24
6
23
7
22
8
21
9
20
10/
19
11/
18
12/
17
13/
16
14/
15
VTERM
LVD
99+
88+
N.C.
77+
66+
DIFFB
DIFFSENSE
MASTER/SLAVE
LX5248CPW ("N.C." = No Internal Connection)
PW PACKAGE (Top View)
2
Copyright © 2001
Rev. 0.6 1/01
PRODUCT DATABOOK 1996/1997
UltraMAX
LX5248/LX5249
9 - L I N E LV D S C S I T E R M I N A T O R
P
R E L I M I N A R Y
D
A T A
S
H E E T
R E C O M M E N D E D O P E R AT I N G C O N D I T I O N S
Parameter
Symbol
Termpwr Voltage
Signal Line Voltage
Disconnect Input Voltage
Operating Junction Temperature Range
LX5248 / LX5249
(Note 2)
Recommended Operating Conditions
Min.
Typ.
Max.
VTERM
Units
3.0
0
0
5.25
5.0
VTERM
V
V
V
0
70
°C
Note 2. Range over which the device is functional.
ELECTRICAL CHARACTERISTICS
(Unless otherwise specified, these specifications apply over the operating ambient temperature range of 0°C ≤ TA ≤ 70°C. TermPwr = 3.3V,
DISCONNECT: LX5248/49 = L. Low duty cycle pulse testing techniques are used which maintains junction and case temperatures equal to the ambient
temperature.)
Parameter
Symbol
Test Conditions
LX5248 / 5249
Min. Typ.
Max.
Units
21
5
1.25
112
105
200
2.5
0
1
150
25
10
1.375
125
110
300
mA
µA
V
mV
Ω
Ω
pF
µA
µA
ms
1.3
1.4
15.0
200
10
V
mA
µA
µA
0.8
2.0
10
V
µA
0.8
2.0
10
V
µA
LVD Terminator Section
TermPwr Supply Current
LVD ICC
Common Mode Voltage
Offset Voltage (Fail Safe Bias Voltage)
Differential Terminator Impedance
Common Mode Impedance
Output Capacitance
Output Leakage
VCM
VFSB
ZD
ZCM
CO
ILEAK
Mode Change Delay
tDF
All term lines = Open
DISCONNECT: LX5248/49 = H
Open circuit between - and + (see Note 3)
VOD = -1V to 1V
0V to 2.5V
DISCONNECT: LX5248/49 = H
DISCONNECT: LX5248/49 = H, VLINE = 0 to 4V, TA=25°C
DISCONNECT: LX5248/49 = H, VTERM = 0V, VLINE = 2.7V
DIFFSENSE = 1.4V to 0V
1.125
100
100
100
100
2
DIFFSENSE Section
DIFFSENSE Output Voltage
DIFFSENSE Output Source Current
DIFFSENSE Sink Current
DIFFSENSE Output Leakage
VDIFF
IDIFF
ISINK (DIFF)
ISINK (DIFF)
DIFFSENSE = 0V
VIN = 2.75V
DISCONNECT: LX5248/49 = H, TA = 25°C
1.2
5.0
DISCONNECT Section
DISCONNECT Threshold
Input Current
VTH
IIL
DISCONNECT: LX5248/49 = 0V
MASTER / SLAVE Section
MASTER / SLAVE Threshold
Input Current
VTH (MS)
IIL (MS)
MASTER / SLAVE: LX5248/49 = 0V
Note 3. Open circuit failsafe voltage.
Copyright © 2001
Rev. 0.6 1/01
3
PRODUCT DATABOOK 1996/1997
UltraMAX
LX5248/LX5249
9 - L I N E LV D S C S I T E R M I N A T O R
P
D
R E L I M I N A R Y
A T A
S
H E E T
BLOCK DIAGRAM
Power ON
VTERMPWR
1 of 9
1.07mA
Internal VREF
1.30V
HVD
LVD
Zcm
200
LVD
1.25V
ZD(-)
52.5
ZD(+)
52.5
SE
HVD
LVD
M/S
LVD (+)
SE
10mA
DIFFSENSE
1.07mA
HVD
DIFF B
LVD (-)
Window
Comp.
LATCH
LVD
SE
Power ON
HVD
LVD
SE
Power ON
& Mode
Change
Delay
FIGURE 1 — LX5248 / 5249 Block Diagram
4
Copyright © 2001
Rev. 0.6 1/01
PRODUCT DATABOOK 1996/1997
UltraMAX
LX5248/LX5249
9 - L I N E LV D S C S I T E R M I N A T O R
P
R E L I M I N A R Y
D
A T A
S
H E E T
FUNCTIONAL PIN DESCRIPTION
Pin
Designator
1-, 2-, 3-, 4-, 5-, 6-, 8-, 8-, 9-/
Description
Negative signal termination lines.
1+, 2+, 3+, 4+, 5+, 6+, 7+, 8+, 9+/ Positive signal termination lines.
VTERM
DISCONNECT/
GND/
Enables / disables terminator. See Power Down Function Table for logic level per device.
Terminator ground pin. Connect to ground.
MASTER / SLAVE/
Sometimes referred to as M/S pin in this data sheet. Used to select which terminator is the controlling device. MASTER/SLAVE pin High or Open enables the DIFFSENSE output drive. Please see
MASTER/SLAVE Function Table.
DIFFSENSE/
This is a dual function pin. It drives the SCSI bus DIFFSENS line. It is also the sense pin to detect the
SCSI bus mode (LVD, SE or HVD). DIFFSENSE output drive can be disabled with Low level on the
MASTER/SLAVE pin. Please see DIFFSENSE and MASTER/SLAVE Function Tables. Internally
connected to DIFFB pin through 20kOhm resistor.
DIFFB/
SE/
Internally connected to DIFFSENSE pin through 20kOhm resistor. It can be used as a mode sense
pin when the device is a non-controlling terminator (MASTER/SLAVE pin is Low). An RC filter
(20kOhm / 0.1µF) is not required on the LX5249, as it has an internal timer.
Single-ended output; when High, terminator is operating in SE mode.
LVD/
Low Voltage Differential output. When High, terminator is operating in LVD mode.
HVD/
High Voltage Differential output. When High, terminator is operating in HVD mode.
HEATSINK/
Copyright © 2001
Rev. 0.6 1/01
Power supply pin for terminator. Connect to SCSI bus TERMPWR. Must be decoupled by one 4.7µF
low-ESR capacitor for every three terminator devices. It is absolutely necessary to connect this pin to
the decoupling capacitor through a very low impedence (big traces on PCB). Keeping distances
very short from the decoupling capacitors to the VTERM pin is also critical. The value of the
decoupling capacitor is somewhat layout dependant and some applications may benefit from highfrequency decoupling with 0.1µF capacitors right at VTERM pin.
Attached to die mounting pad, but not bonded to GND pin. Pins should be considered a heat sink
only, and not a true groung connection. It is recommended that these pins be connected to ground,
but can be left floating.
5
PRODUCT DATABOOK 1996/1997
UltraMAX
LX5248/LX5249
9 - L I N E LV D S C S I T E R M I N A T O R
P
R E L I M I N A R Y
D
A T A
S
H E E T
A P P L I C AT I O N S C H E M AT I C
H O S T
T E R M P O W E R
V
P E R IP H E R A L
1 1 +
T E R M
9 9 +
9 +
V
4 .7 µ F
1 -
G N D
V
D a ta L in e s ( 9 )
9 -
9 -
9 +
9 +
* D IF F B P in n o t p r e s e n t o n L X 5 2 4 8 C P W
1 -
1 1 +
M /S
V
1 +
C o n tr o l L in e s ( 9 )
9 -
9 -
9 +
9 +
T E R M
L X 5 2 4 8
L X 5 2 4 9
D IS C O N N E C T
D IF F S E N S E
D IF F S E N S E
/ 5 2 4 9 C P W
4 .7 µ F
G N D
D IF F B *
D IS C O N N E C T
G N D
L X 5 2 4 8
L X 5 2 4 9
D IS C O N N E C T
D IF F B *
L X 5 2 4 8
L X 5 2 4 9
T E R M
D IF F S E N S E
D IF F S E N S E
T E R M
M /S
V
1 +
D IS C O N N E C T
M /S
G N D
D IF F B *
1 1 +
L X 5 2 4 8
L X 5 2 4 9
M /S
D IF F S E N S E
D IF F B *
T E R M
D IS C O N N E C T
D IS C O N N E C T
D IF F S E N S E
G N D
T E R M
L X 5 2 4 8
L X 5 2 4 9
9 -
D IS C O N N E C T
M /S
V
1 +
D a ta L in e s ( 9 )
L X 5 2 4 8
L X 5 2 4 9
D IS C O N N E C T
1 -
T E R M P O W E R
D IF F B *
D IF F B *
P a c k a g e s . M u s t c o n n e c t D IF F S E N S s ig n a l to D IF F S E N S E p in o n P W
M /S
G N D
p a c k a g e .
FIGURE 2 — LX5248 / 5249 Application Schematic
UltraMAX is a trademark of Linfinity Microelectronics Inc.
PRELIMINARY DATA - Information contained in this document is pre-production data, and is proprietary to LinFinity. It may
not modified in any way without the express written consent of LinFinity. Product referred to herein is offered in sample form
only, and Linfinity reserves the right to change or discontinue this proposed product at any time.
6
Copyright © 2001
Rev. 0.6 1/01