Quad Line R ecei ver Recei eceiv AS10515F16MIL Austin Semiconductor, Inc. Quad Line Receiver PIN ASSIGNMENT (Top View) AVAILABLE AS MILITARY SPECIFICATIONS 16-Pin FlatPack (F) • Military Equivalent Screening - 883 1.2.2 DIN\ C OUT D OUT VCC2 VCC1 A OUT B OUT AIN\ GENERAL DESCRIPTION The AS10515F16MIL is a quad differential amplifier designed for use in sensing differential signals over long lines. The base bias supply (VBB) is made available at pin 9 to make the device useful as a Schmitt trigger, or in other applications where a stable reference voltage is necessary. Active current sources provide the AS10515F16MIL with excellent common mode noise rejection. If any amplifier in a package is not used, one input of that amplifier must be connected to VBB (pin 9) to prevent upsetting the current source bias network. • PD = 150mW Max/Pkg (No Load) • tpd = 2.0ns typ • tr, tf = 2.0ns type (20% - 80%) FLATS BURN-IN (CONDITION C) VCC1 AOUT BOUT AIN\ AIN BIN BIN\ VEE VBB CIN\ CIN DIN DIN\ COUT DOUT VCC2 5 6 7 8 9 10 11 12 13 14 15 16 1 2 3 4 GND 51 Ω to VTT 51 Ω to VTT VBB AS10515F16MIL Rev. 2.1 07/06 16 15 14 13 12 11 10 9 D IN CIN CIN\ VBB V EE BIN\ BIN A IN BURN-IN CONDITIONS: VTT = -2.0V MAX/ -2.2V MIN VEE = -5.7V MAX/ -5.2V MIN VBB = All pins designated for VBB must be tied together, no external voltage applied. NOTES 1. VBB to be used to supply bias to the AS10515F16MIL only and bypassed (when used) with 0.01 µF to 0.1 µF capacitor. 2. When the input pin with the bubble goes positive, the output goes negative. PIN ASSIGNMENTS FUNCTION 1 2 3 4 5 6 7 8 LOGIC DIAGRAM GND GND VBB VEE VBB VBB GND GND VBB 51 Ω to VTT 51 Ω to VTT GND 4 5 2 6 7 3 10 11 14 12 13 15 VBB 9 For more products and information please visit our web site at www.austinsemiconductor.com Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 1 Quad Line R ecei ver Recei eceiv AS10515F16MIL Austin Semiconductor, Inc. VCC = 2.0V ± 0.005V Channel A Coax A Channel B Coax B 0.1 µF ± 20% 25 µF ± 20% R1 *Pulse Generator Input CL D.U.T. Coax R1 = 50 Ω resistor in series with a 50 Ω coax cable constituting the 100 Ω load. *Pulse Generator must be capable of rise and fall times of 2.0ns ± 0.2ns. 0.1 µF ±20% NOTES: 1. tr = tf = 2.0ns ±0.2ns measured at (20% - 80%) VEE = -3.2V ±0.005V 2. PW > 20ns 3. PRF = 1.0 MHz 4. R1 = 50 Ω resistor in series with 50 Ω coax constituting the 100 Ω load. 5. Unused outputs should be loaded 100 Ω to ground. 6. 2:1 divider may be used. tr VIN 80% 50% 20% tf PS1 80% 50% 20% PS2 > 20ns tTLH VOUT VOUT\ tTHL 80% 50% 20% 80% 50% 20% tPLH tPHL tPHL tPLH 80% 50% 20% 80% 50% 20% tTHL tTLH Figure 1. Switching Test Circuit and Waveforms AS10515F16MIL Rev. 2.1 07/06 Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. 2 AS10515F16MIL Rev. 2.1 07/06 3 Input Leakage Current -1.92 -0.88 TA = -55°C -1.60 -1.23 -1.85 -1.35 -1.0 95 -0.78 -0.845 -0.63 -0.95 -26 -1.62 -1.85 -1.08 -0.88 -0.88 -1.0 -29 -1.24 165 -1.12 -1.5 -29 -1.44 165 -1.32 -1.82 -1.525 -1.92 -1.635 -1.10 -1.82 -1.545 -1.92 -1.655 -0.78 -0.825 -0.63 -0.93 µA µA mA V V V V V VIL1 4, 7, 10, 13 5, 6, 11, 12 4-7 10 - 13 PS1 -1.255 -1.510 +1.01 -1.000 -1.400 +1.24 +0.28 +0.36 +0.31 PS2 -3.2 -3.2 -3.2 VEEL VIL2 4, 7, 10, 13 5, 6, 11, 12 5, 6, 11, 12 4, 7, 10, 13 VIH2 8 8 8 8 8 8 8 8 VEE 1, 16 1, 16 1, 16 1, 16 1, 16 1, 16 1, 16 1, 16 VCC 4-7 10 - 13 *** 4-7 11 - 13 4-7 11 - 13 4-7 11 - 13 4-7 11 - 13 5, 6 11, 12 5, 6 11, 12 P.U.T. -5.2 -5.2 -5.2 VCB 4-7 10 - 13 4-7 10 - 13 8 9 2, 3 ,14, 15 2, 3 ,14, 15 2, 3 ,14, 15 2, 3 ,14, 15 -5.2 -5.2 -5.2 VEE Pinouts referenced are for F package, check Pin Assignments VCC = 0V, Output Load = 100 Ω to -2.0V 5, 6, 11, 12 4, 7, 10, 13 VIH1 -1.82 -0.63 TA = 125°C VIL2 -1.105 -1.475 +1.11 VIH2 Test Voltage Values (Volts) TEST VOLTAGE APPLIED TO PINS BELOW: -1.85 -0.78 TA = 25°C UNITS LIMITS +25°C +125°C -55°C Subgroup 1 Subgroup 2 Subgroup 3 MIN MAX MIN MAX MIN MAX VIL1 VIH1 Test Temperature Austin Semiconductor, Inc. ** Connected to pin 9. *** Measure voltage on pin 9 while it is connected to other pins. ICBO IIH IEE **VBB VOL1 VOH1 VOL VOH High Output Voltage Low Output Voltage High Output Voltage Low Output Voltage Reference Voltage Power Supply Current Input Current High Functional Parameters: SYMBOL PARAMETER * ELECTRICAL CHARACTERISTICS Each MECL 10K series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 100 Ω resistor to -2.0 volts. QUIESCENT LIMIT TABLE* Quad Line R ecei ver Recei eceiv AS10515F16MIL Austin Semiconductor, Inc. reserves the right to change products or specifications without notice. AS10515F16MIL Rev. 2.1 07/06 4 1.1 Fall Time Propagation Delay High to Low Propagation Delay Low to High tTHL tPLH 1.0 1.0 1.1 tPHL -1.85 -1.82 -1.92 -0.78 -0.63 -0.88 TA = 25°C TA = 125°C TA = -55°C 2.90 2.9 3.3 3.3 1.0 1.0 1.0 1.0 4.0 4.0 4.4 4.4 1.0 1.0 1.0 1.0 3.5 3.5 3.9 3.9 ns ns ns ns VIL2 PS1 +0.28 +0.36 +0.31 PS2 -3.2 -3.2 -3.2 VEEL -5.2 -5.2 -5.2 VEE TEST VOLTAGE APPLIED TO PINS BELOW: -1.255 -1.510 +1.01 -1.000 -1.400 +1.24 -1.105 -1.475 +1.11 VIH2 Test Voltage Values (Volts) -5.2 -5.2 -5.2 VCB VOUT 4, 7, 11, 13 2, 3, 14, 15 4, 7, 11, 13 2, 3, 14, 15 4, 7, 11, 13 2, 3, 14, 15 4, 7, 11, 13 2, 3, 14, 15 VIN 1, 16 1, 16 1, 16 1, 16 VCC 8 8 8 8 VEEL 2, 3 ,14, 15 2, 3 ,14, 15 2, 3 ,14, 15 2, 3 ,14, 15 P.U.T. Pinouts referenced are for F package, check Pin Assignments VCC = 2.0V, Output Load = 100 Ω to GND VIL1 VIH1 Test Temperature UNITS LIMITS +125°C -55°C +25°C Subgroup 9 Subgroup 10 Subgroup 11 MIN MAX MIN MAX MIN MAX Rise Time Functional Parameters: PARAMETER tTLH SYMBOL * ELECTRICAL CHARACTERISTICS Each MECL 10K series circuit has been designed to meet the dc specifications shown in the test table, after thermal equilibrium has been established. The circuit is in a test socket or mounted on a printed circuit board and transverse air flow greater than 500 linear fpm is maintained. Outputs are terminated through a 100 Ω resistor to -2.0 volts. QUIESCENT LIMIT TABLE* Quad Line R ecei ver Recei eceiv Austin Semiconductor, Inc. AS10515F16MIL Austin Semiconductor, Inc. reserves the right to change products or specifications without notice.