Sanyo LA75501 For use in tv/vcr applications vif/sif signal processing ic Datasheet

Ordering number : ENA0789
Monolithic Linear IC
LA75501
For Use in TV/VCR Applications
VIF/SIF Signal Processing IC
Overview
The LA75501 is an adjustment free VIF/SIF signal processing IC for PAL TV/VCR. It supports 38MHz, 38.9MHz, and
39.5MHz as the IF frequencies, as well as PAL sound multi-system (M/N,B/G, I, D/K), and contains an on-chip sound
carrier trap and sound carrier BPF. To adjust the VCO circuit, AFT circuit, and sound filter, 4MHz external crystal or
4MHz external signal is needed.
Function
• VIF Block:
VIF Amplifier, PLL Detector, IF AGC, RF AGC, Equalizer, amplifier, Buzz Canceller, SIF Trap,
Digital AFT, FLL, 4MHz X’tal oscillation
• 1st SIF Block: 1st SIF Amplifier, 1st SIF Detector, 1st SIF AGC
• SIF Block:
Limiter Amplifier Down Converter, PLL FM Detector SIF PLL SIF VCO, SIF BPF
• Others:
IF SW (38.9MHz, 38MHz), SIF4 System SW (B/G, I, D/K, M/N), IFAGC 2nd filter
Specifications
Maximum Ratings at Ta = 25°C
Parameter
Symbol
Conditions
Ratings
Unit
Maximum Supply voltage
VCC
7
V
Circuit voltage
V13
VCC
V
V15
VCC
V
Circuit Current
I24
-1
mA
I14
+0.5
mA
I4
-10
mA
I3
Allowable power dissipation
Pd max
Ta≤50°C
-3
mA
470
mW
Operating temperature
Topr
-20 to +70
°C
Storage temperature
Tstg
-55 to +150
°C
Any and all SANYO Semiconductor Co.,Ltd. products described or contained herein are, with regard to
"standard application", intended for the use as general electronics equipment (home appliances, AV equipment,
communication device, office equipment, industrial equipment etc.). The products mentioned herein shall not be
intended for use for any "special application" (medical equipment whose purpose is to sustain life, aerospace
instrument, nuclear control device, burning appliances, transportation machine, traffic signal system, safety
equipment etc.) that shall require extremely high level of reliability and can directly threaten human lives in case
of failure or malfunction of the product or may cause harm to human bodies, nor shall they grant any guarantee
thereof. If you should intend to use our products for applications outside the standard applications of our
customer who is considering such use and/or outside the scope of our intended standard applications, please
consult with us prior to the intended use. If there is no consultation or inquiry before the intended use, our
customer shall be solely responsible for the use.
Specifications of any and all SANYO Semiconductor Co.,Ltd. products described or contained herein stipulate
the performance, characteristics, and functions of the described products in the independent state, and are not
guarantees of the performance, characteristics, and functions of the described products as mounted in the
customer' s products or equipment. To verify symptoms and states that cannot be evaluated in an independent
device, the customer should always evaluate and test devices mounted in the customer' s products or
equipment.
40407 MS PC B8-4907 No.A0789-1/11
LA75501
Operating Ranges at Ta = 25°C
Parameter
Recommended supply voltage
Operating supply voltage
Symbol
Conditions
Ratings
VCC
VCC op
Unit
5.0
V
4.5 to 6.0
V
Electrical Characteristics at Ta = 25°C, VCC = 5V, fp = 38.0MHz
VIF Block
Parameter
Symbol
Ratings
Conditions
min
Circuit current
I17
Maximum RF AGC voltage
V14H
Minimum RF AGC voltage
V14L
Input sensitivity
AGC range
Maximum allowable input
No-signal video output voltage
typ
64.0
Collector load 30kΩ VC2 = 9V
8.5
vi
33
Unit
max
73.6
mA
0.3
0.7
V
39
45
dBµV
9
GR
58
Vi max
92
97
V4
3.3
3.6
V
dB
dBµV
3.9
V
Sync. Signal tip voltage
V4tip
1.0
1.3
1.6
V
Video output amplitude
VO
1.7
2.0
2.3
Vp-p
Video S/N
S/N
B/G
48
52
C-S best
IC-S
P/S = 10dB
26
32
38
Differential gain
DG
VIN = 0dBµ, 87.5% MOD
3
6
%
Differential phase
DP
2
10
deg
Black noise threshold voltage
VBTH
Black noise clamp voltage
dB
0.7
dB
V
VBCL
1.8
VIF input resistance
Ri
2.5
3.0
kΩ
VIF input capacitance
Ci
3
6
PF
Maximum AFT voltage
V16H
4.3
4.7
5.0
Minimum AFT voltage
V16L
0
0.2
0.7
V
AFT tolerance 1
dfa1
±15
±25
KHz
AFT tolerance 2
dfa2
±15
±25
KHz
55
80
mV/kHz
30
60
MHz
ATF detection sensitivity
sf
AFT Dead Zone
fda
AFT leak current
AFTL
f = 38.9MHz
f = 38.0MHz
RL = 100k//100KΩ
30
V
±4.0
V
µA
APC pull-in range (U)
fpu
1.5
2.0
MHz
APC pull-in range (L)
fpl
1.5
2.0
MHz
VCO maximum
dfu
1.5
2.0
MHz
dfl
1.5
2.0
MHz
variable range (U)
VCO maximum
variable range (L)
β
2.0
4.0
N Trap 1 (4.5M)
NT1
-30
-35
dB
N Trap 2 (4.8M)
NT1-1
-19
-24
dB
B/G Trap 1 (5.5M)
BT1
-27
-32
dB
B/G Trap 2 (5.85M)
BT1-1
-20
-25
dB
I Trap 1 (6.0M)
IT1
-25
-30
dB
I Trap 2 (6.55M)
IT1-1
-15
-20
dB
D/K Trap1 (6.5M)
DT1
-25
-30
dB
Group delay 1 NTSC (3.0M)
ngd1
30
60
ngd1-1
160
230
300
ns
bgd2
70
100
130
ns
bgd2-1
160
230
300
ns
ns
VCO control sensitivity
Group delay 1-1 NTSC (3.5M)
Group delay 2 B/G (4M)
Group delay 2-1 B/G (4.4M)
Group delay 3 I (4M)
8.0
90
kHz/mV
ns
bgd3
20
50
80
Group delay 3-1 I (4.4M)
bgd3-1
60
90
120
ns
Group delay 4 D/K (4M)
bgd4
0
30
60
ns
bgd4-1
10
40
70
ns
Group delay 4-1 D/K (4.4M)
Continued on next page.
No.A0789-2/11
LA75501
Continued from preceding page.
Parameter
Symbol
Ratings
Conditions
min
typ
Unit
max
Video f-characteristics MN1
VFMN1
M/N 1 to 2MHz
-1.0
0.0
1.0
dB
Video f-characteristics MN2
VFMN2
M/N 2 to 3MHz
0.0
1.0
2.0
dB
Video f-characteristics MN3
VFMN3
M/N 3.58MHz
0.5
2.0
3.5
dB
Video f-characteristics BG1
VFBG1
B/G 1 to 3MHz
-1.0
0.0
1.5
dB
Video f-characteristics BG2
VFBG2
B/G 3 to 4MHz
0.0
1.5
3.0
dB
Video f-characteristics BG3
VFBG3
B/G 4.43MHz
1.0
2.5
4.0
dB
Video f-characteristics I1
VFI1
I 1 to 3MHz
-1.0
0.0
1.5
dB
Video f-characteristics I2
VFI2
I 3 to 4MHz
0.0
1.0
2.0
dB
Video f-characteristics I3
VFI3
I 4.43Hz
0.5
2.0
3.5
dB
Video f-characteristics DK1
VFDK1
D/K 1 to 3MHz
-1.0
0.0
1.5
dB
Video f-characteristics DK2
VFDK2
D/K 3 to 4MHz
0.0
1.0
2.0
dB
Video f-characteristics DK3
VFDK3
D/K 4.43MHz
0.0
1.5
3.0
dB
1st SIF Block
Parameter
Symbol
Ratings
Conditions
min
typ
26
Unit
max
Conversion gain
VG
fp-5.5MHz,Vi = 500µV
SIF carrier output level
SO
Vi = 10mV
100
32
36
mVrms
dB
1st SIF maximum input
Si max
SO±2dB
106
dBµV
1st SIF input resistance
R is
2.0
2.4
KΩ
1st SIF input capacitance
C is
3
6
PF
SIF Block
Parameter
Symbol
Ratings
Conditions
min
Limiting sensitivity
FM detector output voltage
Vi (lim)
VO (FM)
f = 5.5MHz
∆F = ±30kHz at 400Hz
AM rejection ratio
AMR
AM = 30% at 400Hz
Distortion
THD
f = 5.5MHz ∆F = ±30kHz
FM detector output S/N
BPF 3dB band width
S/N (FM)
typ
Unit
max
46
52
58
dBµV
480
600
750
mVrms
50
60
0.3
DIN. Audio
55
BW
dB
1.0
%
60
dB
±100
kHz
PAL de-emphasis
Pdeem
fm = 3kHz
-3
dB
NTSC de-emphasis
Ndeem
fm = 2kHz
-3
dB
6
dB
PAL/NT Audio voltage gain
GD
difference
Others
Parameter
Symbol
Ratings
Conditions
min
Minimum 4MHz level
X4MIN
Terminal value
typ
80
Unit
max
86
92
dBµ
(at external input)
SIF system SW threshold voltage
V10
1.4
V
V11
IF system SW threshold voltage
V12
Split/Inter SW
V16
270
0.5
KΩ
V
No.A0789-3/11
LA75501
System Changeover
SW/SIF system SW
The SIF system can be changed over by setting A (pin 13) and B (pin 14) to GND and the open state respectively.
A
B
GND
GND
GND
OPEN
OPEN
GND
OPEN
OPEN
B/G
I
D/K
M/N
O
O
O
O
FM DET
LEVEL
De-emphasis
6dB
75µs
0dB
50µs
0dB
50µs
0dB
50µs
Note: ‘O’ indicates that the system is selected.
IF system SW
The IF frequency is selected 38.9MHz mode with the pin 12 (crystal oscillation) open.
The IF frequency is selected 38MHz mode by adding 220KΩ between the pin 12 and GND.
Inter carrier SW
Inter-carrier is selected by setting the 1st SIF input (pin 16) to GND.
No.A0789-4/11
LA75501
Package Dimensions
unit : mm
3067B
13
1
12
(3.25)
0.95
0.51min
3.3 3.9 max
0.9
0.25
6.4
24
7.62
21.0
(0.71)
1.78
0.48
SANYO : DIP24S(300mil)
Pin Assignment
SIF INPUT
1
24 FM DET OUT
FM FILTER
2
23 RF AGC VR
1st SIF OUT 3
22 SIF PLL FILTER
VIDEO DET OUT
4
21 FILTER CONTROL CAPACITOR
SIF AGC FILTER
5
20 VIF INPUT
APC FILTER
6
19 VIF INPUT
LA75501
FLL FILTER
7
18 GND
VCO COIL
8
17 VCC
VCO COIL
9
16 1st SIF INPUT
SYSTEM SW (A) 10
15 IF AGC FILTER
SYSTEM SW (B) 11
14 RF AGC OUT
4MHz OSC 12
13 AFT OUT
No.A0789-5/11
LA75501
Block Diagram and AC Characteristics Test Circuit
VIF IN
VCC(5V)
1st SIF IN
30kΩ
22
19
FIL
CONT
17
15
14
1st
SIF
DET
AFT OUT
Test point B
SYSTEM SW
A B BG I DK MNGAIN
6dB
00
0dB
01
0dB
10
0dB
11
AFT
AMP
AGC
RF AGC OUT
Test point E
0.01µF
120kΩ
13
RF
AGC
1st
AMP
APC
DET
100kΩ
0.02µF
(M)
16
IF
AGC
VIDEO
DET
LIM
AMP
0.01µF
18
VIF
AMP
S
PLL
100µF
0.01µF
20
DEEMPHA
FM
DET
0.01µF
0.01µF
21
51Ω
100kΩ
23
VCC(9V)
+
0.1µF
24
0.01µF
1000pF
0.01µF
10kΩ-B
AUDIO OUT
Test point D
0.01µF
3kΩ
51Ω
AMP
SW
BPF
EQ
AMP
TRAP
4
5
LPF
VCO
PLL
BPF
7
2nd SIF IN
0.01µF
SW1
100kΩ
1µF
+
51Ω
2kΩ
3kΩ
0.01µF
+
8
+
9
10
11
12
4MHz
6
200kΩ
3
0.1µF
2
330Ω 0.47µF
1
PAL SW
OFF:38.9MHz
ON:38MHz
B
A
SYSTEM SW
CARRIER
VIDEO
OUT
OUT
Test oint C Twst point A
Input Impedance Test Circuit
Impedance Analyser
1st SIF IN
VIF IN
21
20
19
18
17
16
15
14
13
8
9
10
11
12
100µF
0.01µF
10kΩ
0.01µF
0.01µF
0.01µF
0.01µF
0.01µF
0.01µF
22
+
10kΩ
23
0.01µF
24
0.01µF
0.01µF
0.01µF
VCC
LA75501
7
0.01µF
6
0.01µF
5
0.01µF
4
1kΩ
3
0.01µF
2
0.01µF
0.01µF
1
No.A0789-6/11
LA75501
Test Conditions
V1. Circuit current [I17]
(1) External AGC (V17 = 1.5V)
(2) RF AGC VR MAX
(3) Connect an ammeter to the VCC and measure the incoming current to pin 17.
V2. V3. Maximum RF AGC voltage, Minimum RF AGC voltage [V14H, V14L]
(1) Internal AGC
(2) Input a 38.0MHz, 10mVrms, continuous wave to the VIF input pin.
(3) Adjust the RF AGC VR (resistance max.) and measure the maximum RF AGC voltage.
(4) Adjust the RF AGC VR (resistance min.) and measure the minimum RF AGC voltage.
(3), (4) Measuring point F
V4. Input sensitivity [Vi]
(1) Internal AGC
(2) fp = 38.0MHz 400Hz 40% AM (VIF input)
(3) Turn off the SW1 and put 100kΩ through.
(4) Measure the VIF input level at which the 400Hz detection output level at test point A becomes 0.7Vp-p.
V5. AGC range [GR]
(1) Apply the VCC voltage to the external AGC, If AGC (pin 15).
(2) In the same manner under the same conditions as for V4 (input sensitivity), measure the VIF input level at which
the detection output level becomes 0.7Vp-p. ····· Vil
(3) GR = 20log
Vil
dB *Vi: Input sensitivity
Vi
V6. Maximum allowable input [Vi max]
(1) Internal AGC
(2) fp = 38.0MHz 15kHz 78% AM (VIF input)
(3) VIF input level at which the detection output level at test point A becomes video output (VO) ±1dB.
V7. No-signal video output voltage [V4]
(1) Apply the VCC voltage to the external AGC, IF AGC (pin 15).
(2) Measure the DC voltage of VIDEO output (A).
V8. Sync. signal tip voltage [V6tip]
(1) Internal AGC
(2) Input a 38.0MHz, 10mVrms, continuous wave to the VIF input pin.
(3) Measure the DC voltage of VIDEO output (A).
V9. Video output level [VO]
(1) Internal AGC
(2) fp = 38.0MHz 15kHz 78% AM
Vi = 10mVrms (VIF input)
(3) Measure the peak value of the detection output level at test point A. (Vp-p)
No.A0789-7/11
LA75501
V10.V11. Black noise threshold and clamp voltage [VBTH, VBCL]
(1) Apply DC voltage (1 to 3V) to the external AGC, IF AGC (pin 15) and adjust the voltage.
(2) fp = 38.0MHz 400Hz 40% AM 10mVrms (VIF input)
(3) Adjust the IF AGC (pin 15) voltage to operate the noise canceller.
Measure the VBTH, VBCL at test point A.
V12. Video S/N [S/N]
(1) Internal AGC
(2) fp = 38.0MHz CW = 10mVrms (VIF input)
(3) Measure the noise voltage at test point A in RMS volts through a HPF: 100kHz, LPF: 5MHz filter.
····· Noise voltage (N)
(4) S/N = 20log Video voltage (Vp-p) = 20log
N (Vrms)
1.3Vp-p
N(Vrms)
(dB)
V13. C/S beat [Ics]
(1) Internal AGC.
(2) fp = 38.0MHz APL50% 87.5% Modulation video signal.
(3) Measure the difference between the levels for 4.43MHz and 1.07MHz components at test point A.
V14.V15. Differential gain, differential phase [DG, DP]
(1) Internal AGC
(2) fp = 38.0MHz APL50% 87.5% Modulation video signal Vi = 10mVrms
(3) Measure the DG and DP at test point A.
No.A0789-8/11
LA75501
V16. V17.V18 Maximum, minimum AFT voltage [V13H, V13L]
(1) Internal AGC
(2) fp = 38.0MHz ±1.5MHz Vi = 10mVrms (VIF input)
(3) Measure maximum and minimum AFT output voltage by changing the input frequency.
(4) Maximum voltage: V13H, minimum voltage: V13L.
V1 ; 4.0V
V13H
V2 ; 3.0V
AFT
output
(V)
fda ; AFT dead zone
f1 f2
V13L
IF frequency (MHz)
V19.V20.V21. AFT detector sensitivity, AFT Dead Zone, AFT tolerance [dfa, Sf, fda]
(1) Measure the frequency deviation when the voltage at the measuring point B changes from V1 to V2. ·····∆f
Sf (mV/kHz) =
V1−V2
∆f
(2) Measure the width in which the voltage at the measuring point B does not change.
(3) Calculate as follows:
fda (kHz) = f2 − f1
(4) Calculate as follows:
IF Center frequency: 38.9MHz, 38MHz
dfa (kHz) = fc−
f1 + f2
2
V23. V24. VIF input resistance, input capacitance [Ri, Ci]
(1) External AGC (V15 = 2V)
(2) Referring to the Input Impedance Test Circuit, measure Ri and Ci with an impedance analyzer.
V25.V26. APC pull-in range [fpu, fpl]
(1) Internal AGC
(2) fp = 33MHz to 44MHz CW;10mVrms
(3) Adjust the SG signal frequency to be higher than fp = 38.0MHz to bring the PLL to unlocked state.
Note; The PLL is taken as in unlocked state when a beat signal appears at test point A.
(4) When the SG signal frequency is lowered, the PLL is brought to locked state again. ····· f1
(5) Lower the SG signal frequency to bring the PLL to unlock state.
(6) When the SG signal frequency is raised, the PLL is brought to locked state again. ····· f2
(7) Calculate as follows:
fpu = f1 − 38.0MHz
fpl = f2 − 38.0MHz
V27.V28. VCO maximum variable range (U, L) [dfu, dfl]
(1) Apply the VCC voltage to the external AGC, IF AGC (pin 15).
(2) fl is taken as the frequency when 1V is applied to the APC pin (pin 7). In the same manner,
fu is taken as the frequency when 5V is applied to the APC pin (pin 7).
dpu = fu − 38.0MHz
dfl = fl − 38.0MHz
No.A0789-9/11
LA75501
V29. VCO control sensitivity [β]
(1) Apply the VCC voltage to the external AGC, IF AGC (pin 15).
(2) Apply the 3V to the external FLL, FLL (pin 10).
(3) Pick up the VCO oscillation frequency from the VIDEO output (A), GND, etc.
And adjust the VCO coil so that the frequency becomes 38.0MHz.
(4) f1 is taken as the frequency when 2.8V is applied to the APC pin (pin 7).
In the same manner, f2 is taken as the frequency when 3.2V is applied to the APC pin (pin 7).
β = f2−
f1 − f2
400
(kHz/mV)
F1. 1st SIF conversion gain [VG]
(1) Internal AGC
(2) fp = 38.0MHz CW;10mV (VIF input)
fs = 32.5MHz CW;500µV (1st SIF input) ····· V1
(3) measure the detection output level at test point C (5.5MHz) ····· V2
(4) VG = 20log
V2
dB
V1
F2. 5.5MHz output level [SO]
(1) Internal AGC
(2) fp = 38.0MHz CW; 10mV (VIF input)
fs = 32.5MHz CW; 10mV (1st SIF input) ····· V1
(3) Measure the detection output level at test point C (5.5MHz). ····· SO (mVrms)
F3. 1st maximum input [Si max]
(1) Internal AGC
(2) fp = 38.0MHz CW; 10mV (VIF input)
fs = 32.5MHz CW; Variable (1st SIF input)
(3) Input level at which the detection output (5.5MHz) at test point C becomes SO ±2dB. ····· Si max
F4.F5. 1st SIF input resistance, input capacitance [Ri (SIF1), Ci (SIF1)]
(1) Referring to the Input Impedance Test Circuit, measure Ri and Ci with an impedance analyzer.
S1. SIF Limiting sensitivity [Vi (lim)]
(1) Apply the VCC voltage to the external AGC, IF AGC (pin 15).
(2) fs = 5.5MHz fm = 400Hz ∆F = ±300kHz (SIF input)
(3) Set the SIF input level to 31.6mVrms and measure the level at test point D. ····· V1
(4) Lower the SIF input level and measure the input level which becomes V1. ····· 3dB.
S2.S4. FM detection output voltage, total harmonics distortion [VO(FM), THD]
(1) Apply the VCC voltage to the external AGC, IF AGC (pin 15).
(2) fs = 5.5MHz fm = 400Hz ∆f = ±30kHz
(SIF input Vi = 31.6mVrms)
(3) Measure the FM detection output voltage, total harmonics distortion at test point D.
S3. AM rejection ratio [AMR]
(1) External AGC (V15 =VCC)
(2) fs = 5.5MHz fm = 400Hz AM = 30%
(SIF input Vi = 31.6mVrms)
(3) Measure the output level at test point D. ····· VAM
V (DET)
(4) AMR = 20log O
dB
VAM
S5. SIF S/N [S/N (FM)]
(1) External AGC (V15 = VCC)
(2) fs = 5.5MHz NO MOD Vi = 31.6mVrms
(3) Measure the output level at test point D. ····· Vn
VO (DET)
(4) S/N = 20log
Vn
dB
No.A0789-10/11
LA75501
S6. PAL/NT Audio voltage gain difference [GD]
(1) External AGC (V15 =VCC)
(2) fs = 4.5MHz fm = 400Hz ∆F = ±30kHz
(SIF input Vi = 31.6mVrms)
(3) Set system switches [A (pin 10) and B (pin 11)] to GND.
(4) Measure the FM detector output voltage at test point D. ····· Vnt
(5) Calculate as follows:
GD (db) = Vnt − VO (FM)
S7.S8. PAL, NT de-emphasis [Pdeem, Ndeem]
(1) External AGC (V15 = VCC)
(2) fs = 5.5MHz fm = 3kHz ∆F = ±30kHz
(SIF input Vi = 31.6mVrms)
(3) Open system switches (A (pin 10) and B (pin 11)). (BG mode)
(4) Measure the FM detector output voltage at test point D. ····· Vp
(5) Calculate as follows:
Pdeem (dB) = Vp − VO (FM)
(6) fs = 4.5MHz fm = 2kHz ∆F = ±30kHz
(SIF input Vi = 31.6mVrms)
(7) Set system switches [A (pin 10) and B (pin 11)] to GND. (NT mode)
(8) Measure the FM detector output voltage at test point D. ····· Vp
(9) Calculate as follows:
Ndeem (dB) = Vnt − VO (FM)
SANYO Semiconductor Co.,Ltd. assumes no responsibility for equipment failures that result from using
products at values that exceed, even momentarily, rated values (such as maximum ratings, operating condition
ranges, or other parameters) listed in products specifications of any and all SANYO Semiconductor Co.,Ltd.
products described or contained herein.
SANYO Semiconductor Co.,Ltd. strives to supply high-quality high-reliability products, however, any and all
semiconductor products fail or malfunction with some probability. It is possible that these probabilistic failures or
malfunction could give rise to accidents or events that could endanger human lives, trouble that could give rise
to smoke or fire, or accidents that could cause damage to other property. When designing equipment, adopt
safety measures so that these kinds of accidents or events cannot occur. Such measures include but are not
limited to protective circuits and error prevention circuits for safe design, redundant design, and structural
design.
In the event that any or all SANYO Semiconductor Co.,Ltd. products described or contained herein are
controlled under any of applicable local export control laws and regulations, such products may require the
export license from the authorities concerned in accordance with the above law.
No part of this publication may be reproduced or transmitted in any form or by any means, electronic or
mechanical, including photocopying and recording, or any information storage or retrieval system, or otherwise,
without the prior written consent of SANYO Semiconductor Co.,Ltd.
Any and all information described or contained herein are subject to change without notice due to
product/technology improvement, etc. When designing equipment, refer to the "Delivery Specification" for the
SANYO Semiconductor Co.,Ltd. product that you intend to use.
Information (including circuit diagrams and circuit parameters) herein is for example only; it is not guaranteed
for volume production.
Upon using the technical information or products described herein, neither warranty nor license shall be granted
with regard to intellectual property rights or any other rights of SANYO Semiconductor Co.,Ltd. or any third
party. SANYO Semiconductor Co.,Ltd. shall not be liable for any claim or suits with regard to a third party's
intellctual property rights which has resulted from the use of the technical information and products mentioned
above.
This catalog provides information as of April, 2007. Specifications and information herein are subject
to change without notice.
PS No.A0789-11/11