NL17SZ17 Single Non-Inverting Buffer with Schmitt Trigger The NL17SZ17 is a single Non−inverting Schmitt Trigger Buffer in three tiny footprint packages. The device performs much as LCX multi−gate products in speed and drive. www.onsemi.com Features • • • • • • Tiny SOT−353, SOT−553 and SOT−953 Packages Source/Sink 24 mA at 3.0 Volts Chip Complexity: FETs = 20 Designed for 1.65 V to 5.5 V VCC Operation NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable These Devices are Pb−Free, Halogen Free/BFR Free and are RoHS Compliant MARKING DIAGRAMS SC−88A (SC−70−5/SOT−353) DF SUFFIX CASE 419A 5 1 5 LX MG G 1 5 1 5 SOT−553 XV5 SUFFIX CASE 463B LX MG G 1 NC 1 VCC A VCC 5 1 5 LX = Specific Device Code M = Date Code* G = Pb−Free Package (Note: Microdot may be in either location) GND A 2 *Date Code orientation and/or position may vary depending upon manufacturing location. 2 GND NC Y 4 3 4 SOT−953 CASE 527AE M 1 A = Specific Device Code (A with 90 degree clockwise rotation) M = Month Code SOT−953 SOT−353/SC70−5/ SC−88A/SOT−553 A 3 Y Figure 1. Pinout (Top View) ORDERING INFORMATION Y A See detailed ordering and shipping information in the package dimensions section on page 5 of this data sheet. Figure 2. Logic Symbol PIN ASSIGNMENT PIN ASSIGNMENT (SOT−953) (SOT−353/SC70−5/SC−88A/SOT−553) FUNCTION TABLE Pin Function Input Output Pin Function 1 IN A A Y 1 NC 2 GND L L 2 A 3 NC H H 3 GND 4 Y 4 Y 5 VCC 5 VCC © Semiconductor Components Industries, LLC, 2016 January, 2016 − Rev. 16 1 Publication Order Number: NL17SZ17/D NL17SZ17 MAXIMUM RATINGS Symbol VCC Parameter Value Unit −0.5 to +7.0 V −0.5 ≤ VI ≤ +7.0 V −0.5 to +7.0 V −0.5 to VCC + 0.5 V VI < GND −50 mA DC Supply Voltage VI DC Input Voltage VO DC Output Voltage Output in High or LOW State (Note 1) (SOT−353/SC70−5/SC−88A/SOT−553 Packages) Power−Down Mode VO DC Output Voltage (SOT−953 Package) IIK DC Input Diode Current IOK DC Output Diode Current (SOT−953 Package) VO < GND, VO > VCC ±50 mA IOK DC Output Diode Current (SOT−353/SC70−5/SC−88A/SOT−553 Packages) VO < GND −50 mA IO DC Output Sink Current ±50 mA ICC DC Supply Current per Supply Pin ±100 mA IGND DC Ground Current per Ground Pin ±100 mA TSTG Storage Temperature Range −65 to +150 °C TL Lead Temperature, 1 mm from Case for 10 Seconds 260 °C TJ Junction Temperature under Bias +150 °C qJA Thermal Resistance SOT−353 (Note 2) SOT−553 350 496 °C/W PD Power Dissipation in Still Air at 85°C SOT−353 SOT−553 186 135 mW MSL Moisture Sensitivity FR Flammability Rating ESD ESD Classification ILatchup Level 1 Oxygen Index: 28 to 34 UL 94 V−0 @ 0.125 in Human Body Model (Note 3) Machine Model (Note 4) Charged Device Model Class 2 Class C N/A ±500 Latchup Performance Above VCC and Below GND at 85°C (Note 5) mA Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. 1. IO absolute maximum rating must be observed. 2. Measured with minimum pad spacing on an FR4 board, using 10 mm−by−1 inch, 2−ounce copper trace with no air flow. 3. Tested to EIA/JESD22−A114−A, rated to EIA/JESD22−A114−B. 4. Tested to EIA/JESD22−A115−A, rated to EIA/JESD22−A115−A. 5. Tested to EIA/JESD78. RECOMMENDED OPERATING CONDITIONS Symbol VCC Parameter Supply Voltage Operating Data Retention Only Min Max Unit 1.65 1.5 5.5 5.5 V 0 5.5 V VI Input Voltage, (Note 6) VO Output Voltage (SOT−353/SC70−5/SC−88A/SOT−553 Packages) (HIGH or LOW State) 0 5.5 V VO Output Voltage (SOT−953 Package) (HIGH or LOW State) 0 VCC V TA Operating Free−Air Temperature −55 +125 °C Dt/DV Input Transition Rise or Fall Rate 0 0 0 No Limit No Limit No Limit ns/V VCC = 2.5 V ±0.2 V VCC = 3.0 V ±0.3 V VCC = 5.0 V ±0.5 V Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond the Recommended Operating Ranges limits may affect device reliability. 6. Unused inputs may not be left open. All inputs must be tied to a high−logic voltage level or a low−logic input voltage level. www.onsemi.com 2 NL17SZ17 DC ELECTRICAL CHARACTERISTICS VCC (V) −555C 3 TA 3 1255C TA = 255C Min Typ Max Min Max Units VT) Positive Input Threshold Voltage 1.65 2.3 2.7 3.0 4.5 5.5 0.6 1.0 1.2 1.3 1.9 2.2 1.0 1.5 1.7 1.9 2.7 3.3 1.4 1.8 2.0 2.2 3.1 3.6 0.6 1.0 1.2 1.3 1.9 2.2 1.4 1.8 2.0 2.2 3.1 3.6 V VT* Negative Input Threshold Voltage 1.65 2.3 2.7 3.0 4.5 5.5 0.2 0.4 0.5 0.6 1.0 1.2 0.5 0.75 0.87 1.0 1.5 1.9 0.8 1.15 1.4 1.5 2.0 2.3 0.2 0.4 0.5 0.6 1.0 1.2 0.8 1.15 1.4 1.5 2.0 2.3 V Input Hysteresis Voltage 1.65 2.3 2.7 3.0 4.5 5.5 0.1 0.25 0.3 0.4 0.6 0.7 0.48 0.75 0.83 0.93 1.2 1.4 0.9 1.1 1.15 1.2 1.5 1.7 0.1 0.25 0.3 0.4 0.6 0.7 0.9 1.1 1.15 1.2 1.5 1.7 V VCC *0.1 1.29 1.9 2.2 2.4 2.3 3.8 VCC 1.52 2.1 2.4 2.7 2.5 4.0 Symbol VH Parameter Condition VOH High−Level Output Voltage VIN = VIH or VIL IOH = −100 mA IOH = −3 mA IOH = *8 mA IOH = *12 mA IOH = *16 mA IOH = *24 mA IOH = *32 mA 1.65 to 5.5 1.65 2.3 2.7 3.0 3.0 4.5 VOL Low−Level Output Voltage VIN = VIH or VIL IOL = 100 mA IOL = 3 mA IOL = 8 mA IOL = 12 mA IOL = 16 mA IOL = 24 mA IOL = 32 mA 1.65 to 5.5 1.65 2.3 2.7 3.0 3.0 4.5 Input Leakage Current VIN = 5.5 V or GND IOFF Power Off Leakage Current (SOT−353/ SC70−5/SC−88A/ SOT−553 Packages) VIN = 5.5 V or VOUT = 5.5 V ICC Quiescent Supply Current VIN = 5.5 V or GND IIN VCC *0.1 1.29 1.9 2.2 2.4 2.3 3.8 V 0.1 0.24 0.3 0.4 0.4 0.55 0.55 0.1 0.24 0.3 0.4 0.4 0.55 0.55 V 0 to 5.5 ±0.1 ±1.0 mA 0 1.0 10 mA 5.5 1.0 10 mA 0.08 0.2 0.22 0.28 0.38 0.42 AC ELECTRICAL CHARACTERISTICS (Input tr = tf = 3.0 ns) Symbol tPLH tPHL Min Typ Max Min Max Units RL = 1 MW, CL = 15 pF 1.65 1.8 2.5 ± 0.2 3.3 ± 0.3 5.0 ± 0.5 2.0 2.0 1.0 1.0 0.5 9.1 7.6 5.0 3.7 3.1 15 12.5 9.0 6.3 5.2 2.0 2.0 1.0 1.0 0.5 15.6 13 9.5 6.5 5.5 ns RL = 500 W, CL = 50 pF 3.3 ± 0.3 5.0 ± 0.5 1.5 0.8 4.4 3.7 7.2 5.9 1.5 0.8 7.5 6.2 Parameter Propagation Delay Input A to Y (Figures 3 and 4) −555C 3 TA 3 1255C TA = 255C VCC (V) Condition CAPACITIVE CHARACTERISTICS Symbol Parameter Condition CIN Input Capacitance VCC = 5.5 V, VI = 0 V or VCC CPD Power Dissipation Capacitance (Note 7) 10 MHz, VCC = 3.3 V, VI = 0 V or VCC 10 MHz, VCC = 5.5 V, VI = 0 V or VCC Typical Units u2.5 pF 9 11 pF 7. CPD is defined as the value of the internal equivalent capacitance which is calculated from the operating current consumption without load. Average operating current can be obtained by the equation: ICC(OPR) = CPD VCC fin + ICC. CPD is used to determine the no−load dynamic power consumption; PD = CPD VCC2 fin + ICC VCC. www.onsemi.com 3 NL17SZ17 INPUT VCC A or B OUTPUT 50% GND tPLH Y RL A 1 MHz square input wave is recommended for propagation delay tests. 50% VCC Figure 4. Test Circuit Figure 3. Switching Waveforms VT , TYPICAL INPUT THRESHOLD VOLTAGE (VOLTS) CL tPHL 4 3 (VT)) 2 VHtyp (VT*) 1 2 3 2.5 3.5 VCC, POWER SUPPLY VOLTAGE (VOLTS) VHtyp = (VT) typ) − (VT* typ) 3.6 Figure 5. Typical Input Threshold, VT), VT* versus Power Supply Voltage VH Vin VCC VH VT) VT* VCC VT) VT* Vin GND GND VOH VOH Vout Vout VOL (a) A Schmitt−Trigger Squares Up Inputs With Slow Rise and Fall Times VOL (b) A Schmitt−Trigger Offers Maximum Noise Immunity Figure 6. Typical Schmitt−Trigger Applications www.onsemi.com 4 NL17SZ17 DEVICE ORDERING INFORMATION Device Order Number Package Type Tape/Reel Size† NL17SZ17DFT2G SC−88A/SC−70−5/SOT−353 (Pb−Free) 3000 Units / Tape & Reel NLV17SZ17DFT2G* SC−88A/SC−70−5/SOT−353 (Pb−Free) 3000 Units / Tape & Reel NL17SZ17XV5T2G SOT−553 (Pb−Free) 4000 Units / Tape & Reel NL17SZ17XV5T2GH SOT−553 (Pb−Free) 4000 Units / Tape & Reel NL17SZ17P5T5G SOT−953 (Pb−Free) 8000 Units / Tape & Reel †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. *NLV Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable. PACKAGE DIMENSIONS SOT−553 XV5 SUFFIX CASE 463B ISSUE B D −X− 5 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF BASE MATERIAL. A L 4 1 2 E −Y− 3 b e HE c 5 PL 0.08 (0.003) DIM A b c D E e L HE M X Y MILLIMETERS NOM MAX 0.55 0.60 0.22 0.27 0.13 0.18 1.60 1.70 1.20 1.30 0.50 BSC 0.10 0.20 0.30 1.50 1.60 1.70 MIN 0.50 0.17 0.08 1.50 1.10 SOLDERING FOOTPRINT* 0.3 0.0118 0.45 0.0177 1.35 0.0531 1.0 0.0394 0.5 0.5 0.0197 0.0197 SCALE 20:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 5 INCHES NOM 0.022 0.009 0.005 0.063 0.047 0.020 BSC 0.004 0.008 0.059 0.063 MIN 0.020 0.007 0.003 0.059 0.043 MAX 0.024 0.011 0.007 0.067 0.051 0.012 0.067 NL17SZ17 PACKAGE DIMENSIONS SC−88A (SC−70−5/SOT−353) CASE 419A−02 ISSUE L A G 5 4 NOTES: 1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 2. CONTROLLING DIMENSION: INCH. 3. 419A−01 OBSOLETE. NEW STANDARD 419A−02. 4. DIMENSIONS A AND B DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. −B− S 1 2 DIM A B C D G H J K N S 3 D 5 PL 0.2 (0.008) B M M N INCHES MIN MAX 0.071 0.087 0.045 0.053 0.031 0.043 0.004 0.012 0.026 BSC --0.004 0.004 0.010 0.004 0.012 0.008 REF 0.079 0.087 J C K H SOLDERING FOOTPRINT* 0.50 0.0197 0.65 0.025 0.65 0.025 0.40 0.0157 1.9 0.0748 SCALE 20:1 mm Ǔ ǒinches *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. www.onsemi.com 6 MILLIMETERS MIN MAX 1.80 2.20 1.15 1.35 0.80 1.10 0.10 0.30 0.65 BSC --0.10 0.10 0.25 0.10 0.30 0.20 REF 2.00 2.20 NL17SZ17 PACKAGE DIMENSIONS SOT−953 CASE 527AE ISSUE E X D NOTES: 1. DIMENSIONING AND TOLERANCING PER ASME Y14.5M, 1994. 2. CONTROLLING DIMENSION: MILLIMETERS 3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH. MINIMUM LEAD THICKNESS IS THE MINIMUM THICKNESS OF THE BASE MATERIAL. 4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH, PROTRUSIONS, OR GATE BURRS. A Y 5 4 PIN ONE INDICATOR HE E 1 2 3 DIM A b C D E e HE L L2 L3 C TOP VIEW SIDE VIEW e L 5X 5X L3 MILLIMETERS MIN NOM MAX 0.34 0.37 0.40 0.10 0.15 0.20 0.07 0.12 0.17 0.95 1.00 1.05 0.75 0.80 0.85 0.35 BSC 0.95 1.00 1.05 0.175 REF 0.05 0.10 0.15 −−− −−− 0.15 SOLDERING FOOTPRINT* 5X 0.35 5X 0.20 5X L2 5X BOTTOM VIEW b PACKAGE OUTLINE 0.08 X Y 1.20 1 0.35 PITCH DIMENSIONS: MILLIMETERS *For additional information on our Pb−Free strategy and soldering details, please download the ON Semiconductor Soldering and Mounting Techniques Reference Manual, SOLDERRM/D. ON Semiconductor and the are registered trademarks of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. SCILLC owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. A listing of SCILLC’s product/patent coverage may be accessed at www.onsemi.com/site/pdf/Patent−Marking.pdf. SCILLC reserves the right to make changes without further notice to any products herein. SCILLC makes no warranty, representation or guarantee regarding the suitability of its products for any particular purpose, nor does SCILLC assume any liability arising out of the application or use of any product or circuit, and specifically disclaims any and all liability, including without limitation special, consequential or incidental damages. “Typical” parameters which may be provided in SCILLC data sheets and/or specifications can and do vary in different applications and actual performance may vary over time. All operating parameters, including “Typicals” must be validated for each customer application by customer’s technical experts. SCILLC does not convey any license under its patent rights nor the rights of others. SCILLC products are not designed, intended, or authorized for use as components in systems intended for surgical implant into the body, or other applications intended to support or sustain life, or for any other application in which the failure of the SCILLC product could create a situation where personal injury or death may occur. Should Buyer purchase or use SCILLC products for any such unintended or unauthorized application, Buyer shall indemnify and hold SCILLC and its officers, employees, subsidiaries, affiliates, and distributors harmless against all claims, costs, damages, and expenses, and reasonable attorney fees arising out of, directly or indirectly, any claim of personal injury or death associated with such unintended or unauthorized use, even if such claim alleges that SCILLC was negligent regarding the design or manufacture of the part. SCILLC is an Equal Opportunity/Affirmative Action Employer. This literature is subject to all applicable copyright laws and is not for resale in any manner. PUBLICATION ORDERING INFORMATION LITERATURE FULFILLMENT: Literature Distribution Center for ON Semiconductor 19521 E. 32nd Pkwy, Aurora, Colorado 80011 USA Phone: 303−675−2175 or 800−344−3860 Toll Free USA/Canada Fax: 303−675−2176 or 800−344−3867 Toll Free USA/Canada Email: [email protected] N. American Technical Support: 800−282−9855 Toll Free USA/Canada Europe, Middle East and Africa Technical Support: Phone: 421 33 790 2910 Japan Customer Focus Center Phone: 81−3−5817−1050 www.onsemi.com 7 ON Semiconductor Website: www.onsemi.com Order Literature: http://www.onsemi.com/orderlit For additional information, please contact your local Sales Representative NL17SZ17/D