IDT IDT5V925QGI Programmable clock generator Datasheet

IDT5V925
PROGRAMMABLE CLOCK GENERATOR
INDUSTRIAL TEMPERATURE RANGE
IDT5V925
PROGRAMMABLE
CLOCK GENERATOR
DESCRIPTION:
FEATURES:
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The IDT5V925 is a high-performance, low skew, low jitter phase-locked
loop (PLL) clock driver. It provides precise phase and frequency alignment
of its clock outputs to an externally applied clock input or internal crystal
oscillator. The IDT5V925 has been specially designed to interface with
Gigabit Ethernet and Fast Ethernet applications by providing a 125MHz
clock from 25MHz input. It can also be programmed to provide output
frequencies ranging from 3.125MHz to 160MHz with input frequencies
ranging from 3.125MHz to 80MHz.
The IDT5V925 includes an internal RC filter that provides excellent jitter
characteristics and eliminates the need for external components. When
using the optional crystal input, the chip accepts a 10-30MHz fundamental
mode crystal with a maximum equivalent series resistance of 50Ω. The onchip crystal oscillator includes the feedback resistor and crystal capacitors
(nominal load capacitance is 15pF).
3V to 3.6V operating voltage
3.125 MHz to 160MHz output frequency range
4 programmable frequency outputs
Input from fundamental crystal oscillator or external source
Balanced Drive Outputs ±12mA
PLL disable mode for low frequency testing
Select inputs (S[1:0]) for divide selection (multiply ratio of 2,
3, 4, 5, 6, 7, and 8)
5V tolerant inputs
Low output skew/jitter
External PLL feedback, internal loop filter
Available in 16-pin QSOP package
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APPLICATIONS:
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Ethernet/fast ethernet
Router
Network switches
SAN
Instrumentation
FUNCTIONAL BLOCK DIAGRAM
S0
S1
SE LEC T
M OD E
FB
C LKIN
PH ASE
DETEC TO R
LOO P
FILTER
VC O
0
1
VC O
DIVIDE
1/N
Q /N
Q0
X2
X1
XTAL
OSC
Q1
OPTION AL
C RYSTAL
Q2
OE
The IDT logo is a registered trademark of Integrated Device Technology, Inc.
INDUSTRIAL TEMPERATURE RANGE
SEPTEMBER 2002
1
c
2004 Integrated Device Technology, Inc.
DSC-5943/2
IDT5V925
PROGRAMMABLE CLOCK GENERATOR
INDUSTRIAL TEMPERATURE RANGE
ABSOLUTE MAXIMUM RATINGS(1)
PIN CONFIGURATION
Symbol
VTERM
S1
S0
1
16
2
15
VDD
Max
Unit
Supply Voltage to Ground
Description
–0.5 to +7
V
DC Output Voltage VOUT
–0.5 to VCC +0.5
V
–0.5 to +7
V
DC Input Voltage VIN
GND
TA = 85°C
Maximum Power Dissipation
TSTG
Storage Temperature
GNDQ
3
14
Q2
VDDQ
4
13
Q1
X1
5
12
Q0
X2
6
11
Q/N
CLKIN
7
10
GND
FB
8
9
.55
W
–65 to +150
°C
NOTE:
1. Stresses greater than those listed under ABSOLUTE MAXIMUM RATINGS may cause
permanent damage to the device. This is a stress rating only and functional operation
of the device at these or any other conditions above those indicated in the operational
sections of this specification is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect reliability.
OE
PIN DESCRIPTION
QSOP
TOP VIEW
Pin Names
I/O
Description
CLKIN
I
Input clock
X1 (1)
I
Crystal oscillator input. Connected to GND if
oscillator not required.
CRYSTAL SPECIFICATION
X2 (1)
O
Crystal oscillator output. Leave unconnected for
clock input.
The crystal oscillators should be fundamental mode quartz crystals:
overtone crystals are not suitable. Crystal frequency should be specified
for parallel resonance with 50Ω maximum equivalent series resonance.
FB
I
PLL feedback input which should be connected to
Q/N output pin only. PLL locks onto positive edge
of FB signal.
S[1:0]
I
Three level divider/mode select pins. Float to MID.
Q[2:0]
O
Output at N*CLKIN frequency
Q/N
O
Programmable divide-by-N clock output
OE
I
Tri-state output enable. When asserted HIGH, clock
outputs are high impedance.
VDD
PWR
Power supply for output buffers
GND
PWR
Ground supply for output buffers
VDDQ
PWR
Power supply for PLL
GNDQ
PWR
Ground supply for PLL
NOTE:
1. For best accuracy, use parallel resonant crystal specified for a load capacitance
of 15pF.
FUNCTION TABLE
Output Used for
Feedback
Q/N
Allowable CLKIN Range (MHz)(1,2)
Minimum
25/N
Output Frequency Relationships
Maximum
160/N
Q/N
CLKIN
Q[2:0]
CLKIN x N
NOTES:
1. Operation in the specified CLKIN frequency range guarantees that the VCO will operate in the optimal range of 25MHz to 160MHz. Operation with CLKIN outside specified
frequency ranges may result in invalid or out-of-lock outputs.
2. Q[2:0] is not allowed to be used as feedback.
2
IDT5V925
PROGRAMMABLE CLOCK GENERATOR
INDUSTRIAL TEMPERATURE RANGE
DIVIDE SELECTION TABLE (1)
S1
S0
L
L
Divide-by-N Value
Mode
L
M
2
PLL
L
H
3
PLL
FACTORY TEST (2)
M
L
4
PLL
M
M
5(3)
PLL
M
H
6
PLL
H
L
7
PLL
H
M
8
PLL
H
H
16
TEST(4)
NOTES:
1. H = HIGH
M = MEDIUM
L = LOW
2. Factory Test Mode: operation not specified,
3. Ethernet mode (use a 25MHz input frequency and Q/N as feedback).
4. Test mode for low frequency testing. In this mode, CLKIN bypasses the VCO (VCO powered down). Frequency must be > 1MHz due to dynamic circuits in the frequency
dividers. Q[2:0] outputs are divided by 2 in test mode.
OPERATING CONDITIONS
Symbol
VDD/VDDQ
TA
CL
CIN
Description
Power Supply Voltage
Operating Temperature
Output Load Capacitance
Input Capacitance, CLKIN, FB, OE, F = 1MHz, VIN = 0V, TA = 25°C
Min.
3
–40
—
—
Typ.
3.3
+25
—
5
Max.
3.6
+85
15
7
Unit
V
°C
pF
pF
DC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: TA = –40°C to +85°C, VCC = 3.3V ±0.3V
Symbol
VIL
VIH
VIHH(1)
VIMM(1)
VILL(1)
IIN
I3
IIH
VOL
VOH
Parameter
Input LOW Voltage
Input HIGH Voltage
Input HIGH Voltage
Input MID Voltage
Input LOW Voltage
Input Leakage Current
(CLKIN, FB Inputs only)
3-Level Input DC Current, S[1:0]
Input HIGH Current
Output LOW Voltage
Output HIGH Voltage
Test Conditions
3-level input only
3-level input only
3-level input only
VIN = VDD or GND, VDD = Max
VIN = VDD
VIN = VDD/2
VIN = GND
VIN = VDD
IOL = 12mA
IOH = -12mA
HIGH Level
MID Level
LOW Level
Min.
—
2
VDD - 0.6
VDD/2 - 0.3
—
-5
Typ.(7)
—
—
—
—
—
—
Max
0.8
—
—
VDD/2 + 0.3
0.6
+5
—
- 50
- 200
-5
—
2.4
—
—
—
0.07
0.15
2.8
+200
+50
—
+5
0.55
—
Unit
V
V
V
V
V
µA
µA
µA
V
V
NOTE:
1. These inputs are normally wired to VCC, GND, or unconnected. If the inputs are switched in real time, the function and timing of the outputs may glitch, and the PLL may require
an additional lock time before all the datasheet limits are achieved.
3
IDT5V925
PROGRAMMABLE CLOCK GENERATOR
INDUSTRIAL TEMPERATURE RANGE
POWER SUPPLY CHARACTERISTICS
Symbol
IDDQ
Parameter
Test Conditions (1)
Min.
Typ.
Max
Unit
Quiescent Supply Current
VDD = Max.
—
0.7
2
mA
CLKIN = FB = X1 = GND
S[1:0] = HH
OE = H
All outputs unloaded
∆IDD
Supply Current per Input
VDD = Max., VIN = 3V
—
1
30
µA
IDD
Dynamic Supply Current
VDD = 3.6V
—
77
130
mA
S[1:0] =LM
OE = GND
FOUT = 60MHz
All outputs unloaded
NOTE:
1. For conditions shown as Min. or Max., use the appropriate values specified under DC Electrical Characteristics.
AC ELECTRICAL CHARACTERISTICS OVER OPERATING RANGE
Following Conditions Apply Unless Otherwise Specified:
Industrial: TA = –40°C to +85°C, VCC = 3.3V ±0.3V
Symbol
tR, tF
dT
Parameter
Test Conditions
Min.
Typ.
Max.
Unit
Rise Time, Fall Time (1)
0.8V to 2V
—
0.7
1.5
ns
Output/Duty Cycle (1)
VT = VDD/2
45
—
55
%
VT = VDD/2
(1)
tPD
CLKIN to FB
tSK
Output to Output Skew (1)
tJ
Cycle - Cycle Jitter (1)
Output Frequency
fOUT
- 300
—
300
ps
VT = VDD/2; Q[2:0]
—
—
100
ps
VT = VDD/2; Q/N - Q[2:0]
—
—
300
—
—
200
ps
25
—
160
MHz
Min.
Max.
Unit
NOTE:
1. This parameter is guaranteed by design but not tested.
INPUT TIMING REQUIREMENTS
Symbol
Description
(1)
tR, tF
Maximum Input Rise and Fall Time, 0.8V to 2V
—
2
ns
DH
Input Duty Cycle (1)
25
75
%
fOSC
XTAL Oscillator Frequency
—
30
MHz
25/N
160/N
MHz
fIN
Input Frequency
NOTE:
1. This parameter is guaranteed by design but not tested.
4
IDT5V925
PROGRAMMABLE CLOCK GENERATOR
INDUSTRIAL TEMPERATURE RANGE
TEST LOADS AND WAVEFORMS
3V
V CC
2V
VT H = V C C /2
0.8
150 Ω
0V
1ns
1ns
OUTPUT
Input Test Waveform
150 Ω
15pF
VC C
2V
VT H = V C C /2
0.8
AC Test Load
0V
tF
tR
Output Waveform
HOW TO USE THE 5V925
By connecting Q/N to FB (see Figure 1), the 5V925 not only becomes
a zero delay buffer, but also a clock multiplier. With proper selection of S0
and S1, the Q0–Q2 outputs will generate two, three, up to eight times the input
clock frequency. Make sure that the input and output frequency specifications are not violated (refer to Function Table). There are some applications
where higher fan-out is required. These kinds of applications could be
addressed by using the 5V925 in conjunction with a clock buffer such as the
49FCT3805. Figure 2 shows how higher fan-out with different clock rates
can be generated.
The 5V925 is a general-purpose phase-locked loop (PLL) that can be
used as a zero delay buffer or a clock multiplier. It generates three outputs
at the VCO frequency and one output at the VCO frequency divided by n,
where n is determined by the Mode/Frequency Select input pins S0 and S1.
The PLL will adjust the VCO frequency (within the limits of the Function
Table) to ensure that the input frequency equals the Q/N frequency.
The 5V925 can accept two types of input signal. The first is a reference
clock generated by another device on the board which needs to be
reproduced with a minimal delay between the incoming clock and output.
The second is an external crystal. When used in the first mode, the crystal
input (X1) should be tied to ground and the crystal output (X2) should be left
unconnected.
FB
FB
INA
Q /N
CLKIN
Q/N
C LKIN
Q0
5V925
5V925
X2
Q1
X2
X1
Q2
X1
S0
5 C O PIES
OF Q /N
Q [2:0]
S0
S1
49FC T3805
INB
S1
Figure 2
Figure 1
5
5 C O PIES
OF Q
IDT5V925
PROGRAMMABLE CLOCK GENERATOR
INDUSTRIAL TEMPERATURE RANGE
By connecting one of the 49FCT3505 outputs to the FB input of the 5V925
, the propagation delay from CLKIN to the output of the 49FCT3505 will be
nearly zero. To ensure PLL stability, only one 49FCT3505 should be
included between Q/N and FB.
The second way to drive the input of the 5V925 is via an external crystal.
When connecting an external crystal to pins 5 and 6, the X2 pin must be
shorted to the CLKIN (pin 7) as shown in Figure 3. For best accuracy, a
parallel resonant crystal with a crystal load capacitance rating of 15pF
should be used. To reduce the parasitic between the external crystal and
the 5V925 , it is recommended to connect the crystal as close as possible
to the X1 and X2 pins.
FB
CLKIN
5V925
Q /N
Q0
X2
XTAL
Q1
OSC
Q2
X1
S0
S1
Figure 3
One of the questions often asked is what is the accuracy of our clock
generators? In applications where clock synthesizers are used, the terms
frequency accuracy and frequency error are used interchangeably.
Here, frequency accuracy (or error) is based on two factors. One is the
input frequency and the other is the multiplication factor. Clock multipliers
(or synthesizers) are governed by the equation:
output frequency error (or accuracy) is merely a function of how accurate
the input is. For instance, 5V925 could accept two forms of input, one from
a crystal oscillator (see Figure 1) and the other from a crystal (see Figure
3). By using a 20MHz clock with a multiplication factor of 5 (with an accuracy
of ±30 parts per million), one can easily have three copies of 100MHz of
clock with ±30PPM of accuracy. Frequency accuracy is defined by the
following equation:
Output Frequency = (M)* Input Frequency
N
Accuracy = (Measured Freq. – Nominal Freq.)
Nominal Frequency
where “M” is the feedback divide and “N” is the reference divide. If the
ratio of M/N is not an integer, then the output frequency will not be an exact
multiple of the input. On the other hand, if the ratio were a whole number,
the output clock would be an exact multiple of the input. In the case of 5V925,
since the reference divide (“N”) is “1”, the equation is a strong function of
the feedback divide (“M”). In addition, since the feedback is an integer, the
where measured frequency is the average frequency over certain
number of cycles (typically 10,000) and the nominal frequency is the
desired frequency.
6
IDT5V925
PROGRAMMABLE CLOCK GENERATOR
INDUSTRIAL TEMPERATURE RANGE
ORDERING INFORMATION
IDT XXXX
Device Type
X
Package
X
Process
CORPORATE HEADQUARTERS
2975 Stender Way
Santa Clara, CA 95054
I
-40°C to +85°C (Industrial)
Q
QG
Quarter Size Outline Package (150 mil.)
QSOP - Green
5V925
Programmable Clock Generator
for SALES:
800-345-7015 or 408-727-6116
fax: 408-492-8674
www.idt.com
7
for Tech Support:
[email protected]
(408) 654-6459
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