White Electronic Designs EDI88257C 256Kx8 Monolithic SRAM FEATURES 256Kx8 CMOS Static Random Access Memory The EDI88257C is a 2 Megabit 256Kx8 bit Monolithic CMOS Static RAM. The 32 pin DIP pinout adheres to the JEDEC standard for the two megabit device, and is a pin replacement for the 256Kx8 module, EDI88257C. The device is upgradeable to the 512Kx8 SRAM, the EDI88512C. Pin 1 becomes the higher order address. • Access Times of 70, 85, 100ns • Data Retention Function (LP Versions) • TTL Compatible Inputs and Outputs • Fully Static, No Clocks A Low Power version, EDI88257LP, offers a data retention function for battery back-up opperation. Military product is available compliant to Appendix A of MIL-PRF-38535. JEDEC Approved Pinout • 32 pin Ceramic DIP, 0.6 mils wide (Package 9) ■ Single +5V (±10%) Supply Operation FIGURE 1 – PIN CONFIGURATION PIN DESCRIPTION 32 DIP TOP VIEW NC A16 A14 A12 A7 A6 A5 A4 A3 A2 A1 A0 DQ0 DQ1 DQ2 VSS 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 32 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 A0-17 W# E# G# DQ0-7 VCC VSS NC VCC A15 A17 W# A13 A8 A9 A11 G# A10 E# I/O7 I/O6 I/O5 I/O4 I/O3 Address Inputs Write Enable Chip Enable Output Enable Data Inputs/Outputs Power (+5V ±10%) Ground Not Connected BLOCK DIAGRAM Memory Array A0-17 Address Buffer Address Decoder I/O Circuits DQ0-7 W# E# G# White Electronic Designs Corp. reserves the right to change products or specifications without notice. September 1999 Rev. 2 1 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs EDI88257C ABSOLUTE MAXIMUM RATINGS Parameter Voltage on any pin relative to Vss Operating Temperature TA (Ambient) Industrial Military Storage Temperature, Plastic Power Dissipation Output Current Junction Temperature, TJ TRUTH TABLE Value -0.5 to 7.0 Unit V -40 to +85 -55 to +125 -65 to +150 1 20 175 °C °C °C W mA °C G# X H L X E# H L L L W# X H H L Mode Standby Output Deselect Read Write Output High Z High Z Data Out Data In Power ICC2, ICC3 ICC1 ICC1 ICC1 RECOMMENDED OPERATING CONDITIONS Parameter Supply Voltage Supply Voltage Input High Voltage Input Low Voltage NOTE: Stress greater than those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and functional operation of the device at these or any other conditions greater than those indicated in the operational sections of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect reliability. Symbol VCC VSS VIH VIL Min 4.5 0 2.2 -0.3 Typ 5.0 0 — — Max 5.5 0 VCC +0.5 +0.8 Unit V V V V CAPACITANCE Parameter Address Lines Data Lines Symbol CI CO Condition VIN = Vcc or Vss, f = 1.0MHz VOUT = Vcc or Vss, f = 1.0MHz Max 30 14 Unit pF pF These parameters are sampled, not 100% tested. DC CHARACTERISTICS VCC = 5V, TA = +25°C Parameter Input Leakage Current Output Leakage Current Operating Power Supply Current Standby (TTL) Power Supply Current Symbol ILI ILO ICC1 ICC2 Full Standby Power Supply Current ICC3 Output Low Voltage Output High Voltage VOL VOH Conditions VIN = 0V to VCC VI/O = 0V to VCC W#, E# = VIL, II/O = 0mA, Min Cycle (70-100ns) E# ≥ VIH, VIN ≤ VIL, VIN ≥ VIH C E# ≥ VCC -0.2V VIN ≥ Vcc -0.2V or VIN ≤ 0.2V LP IOL = 2.1mA IOH = -1.0mA Min — — — — — — — 2.4 Typ — — 45 3 — — — — Max ±10 ±10 75 10 5 1 0.4 — Units µA µA mA mA mA mA V V AC TEST CONDITIONS Figure 1 Figure 2 Vcc 480Ω Q Input Pulse Levels Vcc 480Ω 30pF Input Rise and Fall Times 5ns Input and Output Timing Levels 1.5V Output Load Figure 1 NOTE: For tEHQZ, tGHQZ and tWLQZ, CL = 5pF Figure 2 Q 255Ω VSS to 3.0V 255Ω 5pF White Electronic Designs Corp. reserves the right to change products or specifications without notice. September 1999 Rev. 2 2 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs EDI88257C AC CHARACTERISTICS – READ CYCLE VCC = 5.0V, Vss = 0V, -55°C ≤ TA ≤ +125°C Symbol Parameter Read Cycle Time Address Access Time Chip Enable Access Time Chip Enable to Output in Low Z (1) Chip Disable to Output in High Z (1) Output Hold from Address Change Output Enable to Output Valid Output Enable to Output in Low Z (1) Output Disable to Output in High Z(1) JEDEC tAVAV tAVQV tELQV tELQX tEHQZ tAVQX tGLQV tGLQX tGHQZ 70ns Alt. tRC tAA tACS tCLZ tCHZ tOH tOE tOLZ tOHZ Min 70 85ns Max Min 85 100ns Max 70 70 Max 85 85 10 10 100 100 10 25 30 10 10 30 10 35 5 0 Min 100 45 5 0 25 30 50 5 0 30 Units ns ns ns ns ns ns ns ns ns 1. This parameter is guaranteed by design but not tested. AC CHARACTERISTICS – WRITE CYCLE VCC = 5.0V, VSS = 0V, -55°C≤ TA ≤ +125°C Symbol Parameter Write Cycle Time Chip Enable to End of Write Address Setup Time Address Valid to End of Write Write Pulse Width Write Recovery Time Data Hold Time Write to Output in High Z (1) Data to Write Time Output Active from End of Write (1) 70ns 85ns Max JEDEC tAVAV Alt. tWC Min 70 tELWH tELEH tAVWL tAVEL tAVWH tAVEH tWLWH tWLEH tCW tCW tAS tAS tAW tAW tWP tWP 60 60 0 0 65 65 50 50 70 70 0 0 70 70 55 55 80 80 0 0 80 80 60 60 ns ns ns ns ns ns ns ns tWHAX tEHAX tWHDX tEHDX tWLQZ tDVWH tDVEH tWHQX tWR tWR tDH tDH tWHZ tDW tDW tWLZ 0 0 0 0 0 40 30 5 0 0 0 0 0 40 35 0 0 0 0 0 0 40 40 0 ns ns ns ns ns ns ns ns 25 Min 85 100ns Max 30 Min 100 Max 30 Units ns 1. This parameter is guaranteed by design but not tested. White Electronic Designs Corp. reserves the right to change products or specifications without notice. September 1999 Rev. 2 3 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs EDI88257C FIGURE 2 – TIMING WAVEFORM - READ CYCLE tAVAV ADDRESS tAVQV E# tAVAV ADDRESS ADDRESS 1 ADDRESS 2 tAVQV tAVQX tELQV tELQX tEHQZ tGLQV tGLQX tGHQZ G# DATA I/O DATA 1 DATA OUT DATA 2 READ CYCLE 2 (W# HIGH) READ CYCLE 1 (W# HIGH; G#, E# LOW) FIGURE 3 – WRITE CYCLE - W# CONTROLLED tAVAV ADDRESS tAVWH tELWH tWHAX E# tAVWL tWLWH W# tDVWH DATA IN tWHDX DATA VALID tWLQZ tWHQX HIGH Z DATA OUT WRITE CYCLE 1, W# CONTROLLED FIGURE 4 – WRITE CYCLE - E# CONTROLLED tAVAV ADDRESS tAVEH tELEH tEHAX E# tAVEL tWLEH W# tDVEH DATA IN DATA OUT tEHDX DATA VALID HIGH Z WRITE CYCLE 2, E# CONTROLLED White Electronic Designs Corp. reserves the right to change products or specifications without notice. September 1999 Rev. 2 4 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs EDI88257C DATA RETENTION CHARACTERISTICS (EDI88257LP ONLY) -55°C ≤ TA ≤ +125°C Characteristic Low Power Version only Sym Conditions Min Typ Max Units Data Retention Voltage Data Retention Quiescent Current VCC ICCDR VCC = 2.0V E# ≥ VCC -0.2V 2 – – – – 185 V µA Chip Disable to Data Retention Time Operation Recovery Time tCDR TR VIN ≥ VCC -0.2V or VIN ≤ 0.2V 0 tAVAV – – – – ns ns FIGURE 5 – DATA RETENTION - E# CONTROLLED DATA RETENTION MODE 4.5V VCC VCC 4.5V tCDR E# tR E# = VCC -0.2V DATA RETENTION, E# CONTROLLED White Electronic Designs Corp. reserves the right to change products or specifications without notice. September 1999 Rev. 2 5 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com White Electronic Designs EDI88257C PACKAGE 9: 32 PIN SIDEBRAZED CERAMIC DIP (600MILS WIDE) 1.616 1.584 0.620 0.600 0.060 0.040 Pin 1 Indicator 0.200 0.125 0.061 0.017 0.155 0.115 0.100 TYP 0.020 0.016 0.600 NOM 15 x 0.100 = 1.500 ALL DIMENSIONS ARE IN INCHES ORDERING INFORMATION EDI 8 8 257 C X X X WHITE ELECTRONIC DESIGNS SRAM ORGANIZATION, 256Kx8 TECHNOLOGY: C = CMOS Standard Power LP = Low Power ACCESS TIME (ns) PACKAGE TYPE: C = 32 lead Sidebrazed DIP, 600 mil (Package 9) DEVICE GRADE: B = MIL-STD-883 Compliant M = Military Screened I = Industrial C = Commercial -55°C to +125°C -40°C to +85°C 0°C to +70°C White Electronic Designs Corp. reserves the right to change products or specifications without notice. September 1999 Rev. 2 6 White Electronic Designs Corporation • (602) 437-1520 • www.wedc.com