MC10E452, MC100E452 5V ECL 5‐Bit Differential Register Description The MC10E/100E452 is a 5-bit differential register with differential data (inputs and outputs) and clock. The registers are triggered by a positive transition of the positive clock (CLK) input. A high on the Master Reset (MR) asynchronously resets all registers so that the Q outputs go LOW. The differential input structures are clamped so that the inputs of unused registers can be left open without upsetting the bias network of the device. The clamping action will assert the D and the CLK sides of the inputs. Because of the edge triggered flip-flop nature of the device simultaneously opening both the clock and data inputs will result in an output which reaches an unidentified but valid state. Note that the input clamps only operate when both inputs fall to 2.5 V below VCC. The fully differential design of the device makes it ideal for very high frequency applications where a registered data path is necessary. The VBB pin, an internally generated voltage supply, is available to this device only. For single-ended input conditions, the unused differential input is connected to VBB as a switching reference voltage. VBB may also rebias AC coupled inputs. When used, decouple VBB and VCC via a 0.01 mF capacitor and limit current sourcing or sinking to 0.5 mA. When not used, VBB should be left open. The 100 Series contains temperature compensation. Features • • • • • • • • • • • • Differential D, CLK and Q; VBB Reference Available 1100 MHz Min. Toggle Frequency Asynchronous Master Reset PECL Mode Operating Range: ♦ VCC = 4.2 V to 5.7 V with VEE = 0 V NECL Mode Operating Range: ♦ VCC = 0 V with VEE = −4.2 V to −5.7 V Internal Input 50 kW Pulldown Resistors, Output Q3 will Default to Low State When Inputs Are Left Open ESD Protection: ♦ Human Body Model; > 2 kV ♦ Machine Model; > 200 V ♦ Charged Device Model; > 2 kV Meets or Exceeds JEDEC Spec EIA/JESD78 IC Latchup Test Moisture Sensitivity Level: 3 (Pb-Free) ♦ For Additional Information, see Application Note AND8003/D Flammability Rating: ♦ UL 94 V−0 @ 0.125 in,Oxygen Index: 28 to 34 Transistor Count = 315 devices These Devices are Pb-Free, Halogen Free and are RoHS Compliant © Semiconductor Components Industries, LLC, 2016 July, 2016 − Rev. 12 1 www.onsemi.com PLCC−28 FN SUFFIX CASE 776−02 MARKING DIAGRAM* 1 28 MCxxxE452FNG AWLYYWW xxx A WL YY WW G = 10 or 100 = Assembly Location = Wafer Lot = Year = Work Week = Pb-Free Package *For additional marking information, refer to Application Note AND8002/D. ORDERING INFORMATION Package Shipping† MC10E452FNR2G PLCC−28 (Pb-Free) 500/Tape & Reel MC100E452FNG PLCC−28 (Pb-Free) 37 Units/Tube Device †For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging Specifications Brochure, BRD8011/D. Publication Order Number: MC10E452/D MC10E452, MC100E452 D3 D3 D4 D4 VCCO Q4 Q4 25 24 23 22 19 21 20 Table 1. PIN DESCRIPTION MR 26 18 Q3 CLK 27 17 CLK 28 VEE 1 Q3 MR ECL Master Reset Input 16 VCC CLK, CLK ECL Differential Clock Input 15 Q2 Q[0:4], Q[0:4] ECL Differential Data Outputs VBB Reference Voltage Output VCC, VCCO Positive Supply VEE Negative Supply 2 14 Q2 D2 3 13 Q1 D2 4 12 Q1 6 7 D1 D1 D0 8 9 10 11 D0 VCCO Q0 Q0 FUNCTION ECL Differential Data Inputs VBB 5 PIN D[0:4], D[0:4] * All VCC and VCCO pins are tied together on the die. Warning: All VCC, VCCO, and VEE pins must be externally connected to Power Supply to guarantee proper operation. Figure 1. Pinout: PLCC−28 (Top View) D0 D0 D Q Q0 Q0 R D1 D1 D Q Q1 Q1 R D2 D2 D Q Q2 Q2 Q Q3 Q3 Q Q4 R D3 D3 D R D4 D4 D Q4 CLK CLK R MR VBB Figure 2. Logic Diagram www.onsemi.com 2 MC10E452, MC100E452 Table 2. MAXIMUM RATINGS Symbol Rating Unit VCC PECL Mode Power Supply Parameter VEE = 0 V Condition 1 Condition 2 8 V VEE NECL Mode Power Supply VCC = 0 V −8 V VI PECL Mode Input Voltage NECL Mode Input Voltage VEE = 0 V VCC = 0 V 6 −6 V Iout Output Current Continuous Surge 50 100 mA IBB VBB Sink/Source ± 0.5 mA TA Operating Temperature Range 0 to +85 °C Tstg Storage Temperature Range −65 to +150 °C qJA Thermal Resistance (Junction-to-Ambient) 0 lfpm 500 lfpm PLCC−28 63.5 43.5 °C/W qJC Thermal Resistance (Junction-to-Case) Standard Board PLCC−28 22 to 26 °C/W Tsol Wave Solder (Pb-Free) 265 °C VI ≤ VCC VI ≥ VEE Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality should not be assumed, damage may occur and reliability may be affected. Table 3. 10E SERIES PECL DC CHARACTERISTICS (VCCx = 5.0 V; VEE = 0.0 V (Note 1)) −40°C Symbol Characteristic Min 0°C Typ Max 74 89 Min Typ 25°C Max Min Typ 85°C Max Min Typ Max Unit IEE Power Supply Current 74 89 74 89 74 89 mA VOH Output HIGH Voltage (Note 2) 3980 4070 4160 4020 4105 4190 4090 4185 4280 mV VOL Output LOW Voltage (Note 2) 3050 3210 3370 3050 3210 3370 3050 3227 3405 mV VIH Input HIGH Voltage (Single-Ended) 3830 3995 4160 3870 4030 4190 3940 4110 4280 mV VIL Input LOW Voltage (Single-Ended) 3050 3285 3520 3050 3285 3520 3050 3302 3555 mV VBB Output Voltage Reference 3.62 3.74 3.65 3.75 3.69 3.81 V 2.2 4.6 2.2 4.6 2.2 4.6 V 150 mA VIHCMR 3.57 3.7 Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 3) IIH Input HIGH Current IIL Input LOW Current 150 150 0.5 0.3 150 0.5 0.25 0.3 0.2 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. Input and output parameters vary 1:1 with VCC. VEE can vary −0.46 V / +0.06 V. 2. Outputs are terminated through a 50 W resistor to VCC − 2.0 V. 3. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. www.onsemi.com 3 MC10E452, MC100E452 Table 4. 10E SERIES NECL DC CHARACTERISTICS (VCCx = 0.0 V; VEE = −5.0 V (Note 1)) −40°C Symbol Characteristic Min 0°C Typ Max 74 89 Min 25°C Typ Max 74 89 Min 85°C Typ Max 74 89 Min Typ Max Unit 74 89 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 2) −1020 −930 −840 −980 −895 −810 −910 −815 −720 mV VOL Output LOW Voltage (Note 2) −1950 −1790 −1630 −1950 −1790 −1630 −1950 −1773 −1595 mV VIH Input HIGH Voltage (Single-Ended) −1170 −1005 −840 −1130 −970 −810 −1060 −890 −720 mV VIL Input LOW Voltage (Single-Ended) −1950 −1715 −1480 −1950 −1715 −1480 −1950 −1698 −1445 mV VBB Output Voltage Reference −1.38 −1.27 −1.35 −1.25 −1.31 −1.19 V VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 3) −2.8 −0.4 −2.8 −0.4 −2.8 −0.4 V 150 mA IIH Input HIGH Current IIL Input LOW Current −1.43 −1.3 150 150 0.5 0.3 150 0.5 0.065 0.3 0.2 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. Input and output parameters vary 1:1 with VCC. VEE can vary −0.46 V / +0.06 V. 2. Outputs are terminated through a 50 W resistor to VCC − 2.0 V. 3. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. Table 5. 100E SERIES PECL DC CHARACTERISTICS (VCCx = 5.0 V; VEE = 0.0 V (Note 1)) −40°C Symbol Characteristic Max 74 89 3975 4050 4120 Output LOW Voltage (Note 2) 3190 3295 VIH Input HIGH Voltage (Single-Ended) 3835 VIL Input LOW Voltage (Single-Ended) 3190 VBB Output Voltage Reference VIHCMR Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 3) Power Supply Current VOH Output HIGH Voltage (Note 2) VOL IIH Input HIGH Current IIL Input LOW Current 3.62 Typ Max 74 89 3.74 Min 25°C Typ IEE Min 0°C Typ Max 74 89 3975 4050 4120 3380 3190 3255 3975 4120 3835 3355 3525 3190 3.62 3.74 2.2 4.6 150 Min 85°C Typ Max Unit 85 102 mA 3975 4050 4120 mV 3380 3190 3260 3380 mV 3975 4120 3835 3975 4120 mV 3355 3525 3190 3355 3525 mV 3.62 3.74 3.62 3.74 V 2.2 4.6 2.2 4.6 V 150 mA 150 0.5 0.3 Min 150 0.5 0.25 0.5 0.2 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. Input and output parameters vary 1:1 with VCC. VEE can vary −0.46 V / +0.8 V. 2. Outputs are terminated through a 50ĂW resistor to VCC − 2.0 V. 3. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. www.onsemi.com 4 MC10E452, MC100E452 Table 6. 100E SERIES NECL DC CHARACTERISTICS (VCCx = 0.0 V; VEE = −5.0 V (Note 1)) −40°C Symbol Characteristic Min 0°C Typ Max 74 89 Min 25°C Typ Max 74 89 Min 85°C Typ Max 74 89 Min Typ Max Unit 85 102 mA IEE Power Supply Current VOH Output HIGH Voltage (Note 2) −1025 −950 −880 −1025 −950 −880 −1025 −950 −880 mV VOL Output LOW Voltage (Note 2) −1810 −1705 −1620 −1810 −1745 −1620 −1810 −1740 −1620 mV VIH Input HIGH Voltage (Single-Ended) −1165 −1025 −880 −1165 −1025 −880 −1165 −1025 −880 mV VIL Input LOW Voltage (Single-Ended) −1810 −1645 −1475 −1810 −1645 −1475 −1810 −1645 −1475 mV VBB Output Voltage Reference −1.38 −1.26 −1.38 −1.26 −1.38 −1.26 V −2.8 −0.4 −2.8 −0.4 −2.8 −0.4 V 150 mA VIHCMR −1.38 −1.26 Input HIGH Voltage Common Mode Range (Differential Configuration) (Note 3) IIH Input HIGH Current IIL Input LOW Current 150 150 0.5 150 0.3 0.5 0.25 0.5 0.2 mA NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. Input and output parameters vary 1:1 with VCC. VEE can vary −0.46 V / +0.8 V. 2. Outputs are terminated through a 50 W resistor to VCC − 2.0 V. 3. VIHCMR min varies 1:1 with VEE, max varies 1:1 with VCC. Table 7. AC CHARACTERISTICS (VCCx = 5.0 V; VEE = 0.0 V or VCCx = 0.0 V; VEE = −5.0 V (Note 1)) −40°C Symbol Characteristic Min Typ fMAX Maximum Toggle Frequency 1.1 tPLH tPHL Propagation Delay to Output CLK (Diff) CLK (SE) MR 425 375 375 600 600 625 25°C Max Min Typ 85°C Max 1.1 850 900 900 Min Typ Max 1.1 475 425 425 600 600 625 800 850 900 Unit GHz 475 425 425 600 600 625 800 850 900 ps tS Setup Time D 175 −50 150 −50 150 −50 ps tH Hold Time D 225 50 200 50 200 50 ps tRR Reset Recovery Time 750 450 700 450 700 450 tPW Minimum Pulse Width CLK MR 400 400 tskew Within-Device Skew (Note 2) 400 400 50 tJITTER Random Clock Jitter (RMS) VPP Input Voltage Swing (Differential Configuration) 150 tr/tf Rise/Fall Times 20−80% 250 ps 400 400 50 < 1.0 < 1.0 1000 475 725 150 ps < 1.0 1000 150 275 475 ps 1000 mV 675 ps NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit values are applied individually under normal operating conditions and not valid simultaneously. 1. 10 Series: VEE can vary −0.46 V / +0.06 V. 100 Series: VEE can vary −0.46 V / +0.8 V. 2. Within-device skew is defined as identical transitions on similar paths through a device. www.onsemi.com 5 MC10E452, MC100E452 Q Zo = 50 W D Receiver Device Driver Device Q D Zo = 50 W 50 W 50 W VTT VTT = VCC − 2.0 V Figure 3. Typical Termination for Output Driver and Device Evaluation (See Application Note AND8020/D − Termination of ECL Logic Devices.) Resource Reference of Application Notes AN1405/D − ECL Clock Distribution Techniques AN1406/D − Designing with PECL (ECL at +5.0 V) AN1503/D − ECLinPSt I/O SPiCE Modeling Kit AN1504/D − Metastability and the ECLinPS Family AN1568/D − Interfacing Between LVDS and ECL AN1672/D − The ECL Translator Guide AND8001/D − Odd Number Counters Design AND8002/D − Marking and Date Codes AND8020/D − Termination of ECL Logic Devices AND8066/D − Interfacing with ECLinPS AND8090/D − AC Characteristics of ECL Devices www.onsemi.com 6 MC10E452, MC100E452 PACKAGE DIMENSIONS 28 LEAD PLLC CASE 776−02 ISSUE F B Y BRK −N− 0.007 (0.180) U M T L-M 0.007 (0.180) M N S T L-M S S N S D Z −M− −L− W 28 D X V 1 G1 0.010 (0.250) T L-M S N S S VIEW D−D Z A 0.007 (0.180) R 0.007 (0.180) M M T L-M S T L-M S N N H S 0.007 (0.180) M T L-M N S S S K1 C E 0.004 (0.100) G J S K SEATING PLANE F VIEW S G1 0.010 (0.250) −T− T L-M S N VIEW S S NOTES: 1. DATUMS -L-, -M-, AND -N- DETERMINED WHERE TOP OF LEAD SHOULDER EXITS PLASTIC BODY AT MOLD PARTING LINE. 2. DIMENSION G1, TRUE POSITION TO BE MEASURED AT DATUM -T-, SEATING PLANE. 3. DIMENSIONS R AND U DO NOT INCLUDE MOLD FLASH. ALLOWABLE MOLD FLASH IS 0.010 (0.250) PER SIDE. 4. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982. 5. CONTROLLING DIMENSION: INCH. 6. THE PACKAGE TOP MAY BE SMALLER THAN THE PACKAGE BOTTOM BY UP TO 0.012 (0.300). DIMENSIONS R AND U ARE DETERMINED AT THE OUTERMOST EXTREMES OF THE PLASTIC BODY EXCLUSIVE OF MOLD FLASH, TIE BAR BURRS, GATE BURRS AND INTERLEAD FLASH, BUT INCLUDING ANY MISMATCH BETWEEN THE TOP AND BOTTOM OF THE PLASTIC BODY. 7. DIMENSION H DOES NOT INCLUDE DAMBAR PROTRUSION OR INTRUSION. THE DAMBAR PROTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE GREATER THAN 0.037 (0.940). THE DAMBAR INTRUSION(S) SHALL NOT CAUSE THE H DIMENSION TO BE SMALLER THAN 0.025 (0.635). DIM A B C E F G H J K R U V W X Y Z G1 K1 INCHES MIN MAX 0.485 0.495 0.485 0.495 0.165 0.180 0.090 0.110 0.013 0.021 0.050 BSC 0.026 0.032 0.020 --0.025 --0.450 0.456 0.450 0.456 0.042 0.048 0.042 0.048 0.042 0.056 --0.020 2_ 10_ 0.410 0.430 0.040 --- www.onsemi.com 7 MILLIMETERS MIN MAX 12.32 12.57 12.32 12.57 4.20 4.57 2.29 2.79 0.33 0.53 1.27 BSC 0.66 0.81 0.51 --0.64 --11.43 11.58 11.43 11.58 1.07 1.21 1.07 1.21 1.07 1.42 --0.50 2_ 10_ 10.42 10.92 1.02 --- 0.007 (0.180) M T L-M S N S MC10E452, MC100E452 ECLinPS is a registered trademark of Semiconductor Components Industries, LLC (SCILLC) or its subsidiaries in the United States and/or other countries. ON Semiconductor and are trademarks of Semiconductor Components Industries, LLC dba ON Semiconductor or its subsidiaries in the United States and/or other countries. ON Semiconductor owns the rights to a number of patents, trademarks, copyrights, trade secrets, and other intellectual property. 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