IRF IRFB7437PBF Brushed motor drive application Datasheet

StrongIRFET™
IRFB7437PbF
Applications
l Brushed Motor drive applications
l BLDC Motor drive applications
l Battery powered circuits
l Half-bridge and full-bridge topologies
l Synchronous rectifier applications
l Resonant mode power supplies
l OR-ing and redundant power switches
l DC/DC and AC/DC converters
l DC/AC Inverters
HEXFET® Power MOSFET
D
G
S
VDSS
RDS(on) typ.
max.
ID (Silicon Limited)
40V
1.5mΩ
2.0mΩ
250A
ID (Package Limited)
195A
D
Benefits
l Improved Gate, Avalanche and Dynamic dV/dt Ruggedness
l Fully Characterized Capacitance and Avalanche SOA
l Enhanced body diode dV/dt and dI/dt Capability
l Lead-Free
l RoHS Compliant, Halogen-Free*
Package Type
IRFB7437PbF
TO-220
D
S
TO-220AB
IRFB7437PbF
G
D
S
Gate
Drain
Source
Standard Pack
Form
Quantity
Tube
50
6
Orderable Part Number
IRFB7437PbF
250
LIMITED BY PACKAGE
ID = 100A
5
200
4
3
TJ = 125°C
2
TJ = 25°C
1
0
150
100
50
0
4.0
6.0
8.0
10.0 12.0 14.0 16.0 18.0 20.0
VGS, Gate-to-Source Voltage (V)
Fig 1. Typical On-Resistance vs. Gate Voltage
1
G
ID , Drain Current (A)
( Ω)
RDS (on), Drain-to -Source On Resistance m
Base Part Number
c
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25
50
75
100
125
150
175
TC , Case Temperature (°C)
Fig 2. Maximum Drain Current vs. Case Temperature
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IRFB7437PbF
Absolute Maximum Ratings
Symbol
Max.
Parameter
Units
c
250
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
ID @ TC = 100°C
Continuous Drain Current, VGS @ 10V (Silicon Limited)
180
ID @ TC = 25°C
Continuous Drain Current, VGS @ 10V (Wire Bond Limited)
195
IDM
Pulsed Drain Current
1000
PD @TC = 25°C
Maximum Power Dissipation
d
A
230
W
Linear Derating Factor
1.5
W/°C
VGS
Gate-to-Source Voltage
± 20
V
TJ
Operating Junction and
-55 to + 175
TSTG
Storage Temperature Range
°C
Soldering Temperature, for 10 seconds (1.6mm from case)
x
300
x
10lbf in (1.1N m)
Mounting torque, 6-32 or M3 screw
Avalanche Characteristics
EAS (Thermally limited)
EAS (Thermally limited)
IAR
EAR
Thermal Resistance
Symbol
e
Single Pulse Avalanche Energy k
Avalanche Currentd
Repetitive Avalanche Energy d
350
Single Pulse Avalanche Energy
mJ
802
See Fig. 14, 15, 22a, 22b
A
mJ
Parameter
j
Typ.
Max.
–––
0.65
RθJC
Junction-to-Case
RθCS
Case-to-Sink, Flat Greased Surface
0.50
–––
RθJA
Junction-to-Ambient
–––
62
j
Units
°C/W
Static @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
Typ.
Max.
Units
40
–––
–––
V
Breakdown Voltage Temp. Coefficient
–––
0.029
–––
V/°C
Reference to 25°C, ID = 1mA
Static Drain-to-Source On-Resistance
–––
1.5
2.0
mΩ
VGS = 10V, ID = 100A
–––
1.8
–––
2.2
3.0
3.9
V
VDS = VGS, ID = 150μA
–––
–––
1.0
μA
VDS = 40V, VGS = 0V
–––
–––
150
Gate-to-Source Forward Leakage
–––
–––
100
Gate-to-Source Reverse Leakage
–––
–––
-100
Internal Gate Resistance
–––
2.2
–––
Drain-to-Source Breakdown Voltage
ΔV(BR)DSS/ΔTJ
RDS(on)
VGS(th)
Gate Threshold Voltage
IDSS
Drain-to-Source Leakage Current
IGSS
RG
Notes:
 Calculated continuous current based on maximum allowable junction
temperature. Bond wire current limit is 195A. Note that current
limitations arising from heating of the device leads may occur with
some lead mounting arrangements. (Refer to AN-1140)
‚ Repetitive rating; pulse width limited by max. junction
temperature.
ƒ Limited by TJmax, starting TJ = 25°C, L = 0.069mH
RG = 50Ω, IAS = 100A, VGS =10V.
„ ISD ≤ 100A, di/dt ≤ 1166A/μs, VDD ≤ V(BR)DSS, TJ ≤ 175°C.
2
Conditions
Min.
V(BR)DSS
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VGS = 0V, ID = 250μA
d
VGS = 6.0V, ID = 50A
VDS = 40V, VGS = 0V, TJ = 125°C
nA
VGS = 20V
VGS = -20V
Ω
Pulse width ≤ 400μs; duty cycle ≤ 2%.
† Coss eff. (TR) is a fixed capacitance that gives the same charging time
as Coss while VDS is rising from 0 to 80% VDSS .
‡ Coss eff. (ER) is a fixed capacitance that gives the same energy as
Coss while VDS is rising from 0 to 80% VDSS .
ˆ Rθ is measured at TJ approximately 90°C.
‰ Limited by TJmax starting TJ = 25°C, L= 1mH, RG = 50Ω, IAS = 40A, VGS =10V.
*
Halogen -Free since April 30, 2014
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IRFB7437PbF
Dynamic @ TJ = 25°C (unless otherwise specified)
Symbol
Parameter
gfs
Qg
Qgs
Qgd
Qsync
td(on)
tr
td(off)
tf
Ciss
Coss
Crss
Coss eff. (ER)
Coss eff. (TR)
Min. Typ. Max. Units
Forward Transconductance
Total Gate Charge
Gate-to-Source Charge
Gate-to-Drain ("Miller") Charge
Total Gate Charge Sync. (Qg - Qgd)
Turn-On Delay Time
Rise Time
Turn-Off Delay Time
Fall Time
Input Capacitance
Output Capacitance
Reverse Transfer Capacitance
Effective Output Capacitance (Energy Related)
Effective Output Capacitance (Time Related)
h
i
160
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
150
41
51
99
19
70
78
53
7330
1095
745
1310
1735
–––
225
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
S
nC
Conditions
VDS = 10V, ID = 100A
ID = 100A
VDS =20V
VGS = 10V
ID = 100A, VDS =20V, VGS = 10V
VDD = 20V
ID = 30A
RG = 2.7Ω
VGS = 10V
VGS = 0V
VDS = 25V
ƒ = 1.0 MHz, See Fig. 5
VGS = 0V, VDS = 0V to 32V , See Fig. 11
VGS = 0V, VDS = 0V to 32V
g
ns
pF
g
i
h
Diode Characteristics
Symbol
Parameter
Min. Typ. Max. Units
IS
Continuous Source Current
ISM
(Body Diode)
Pulsed Source Current
d
VSD
(Body Diode)
Diode Forward Voltage
dv/dt
trr
Peak Diode Recovery
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IRRM
Reverse Recovery Current
f
3
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–––
–––
–––
–––
–––
–––
–––
–––
–––
c
A
MOSFET symbol
1000
A
showing the
integral reverse
––– 250
–––
1.0
3.1
30
30
24
25
1.3
Conditions
1.3
–––
–––
–––
–––
–––
–––
D
G
p-n junction diode.
V TJ = 25°C, IS = 100A, VGS = 0V
V/ns TJ = 175°C, IS = 100A, VDS = 40V
VR = 34V,
ns TJ = 25°C
IF = 100A
TJ = 125°C
di/dt = 100A/μs
nC TJ = 25°C
TJ = 125°C
A TJ = 25°C
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S
g
g
g
January 6, 2015
IRFB7437PbF
1000
1000
100
BOTTOM
TOP
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
10
4.5V
BOTTOM
100
4.5V
≤60μs PULSE WIDTH
≤60μs PULSE WIDTH
Tj = 25°C
1
1
10
100
0.1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 3. Typical Output Characteristics
Fig 4. Typical Output Characteristics
2.0
RDS(on) , Drain-to-Source On Resistance
(Normalized)
ID, Drain-to-Source Current(A)
1
VDS, Drain-to-Source Voltage (V)
1000
TJ = 175°C
100
TJ = 25°C
10
VDS = 10V
≤60μs PULSE WIDTH
1.0
3
4
5
6
7
1.2
1.0
0.8
-60 -40 -20 0 20 40 60 80 100120140160180
Fig 6. Normalized On-Resistance vs. Temperature
14
VGS, Gate-to-Source Voltage (V)
Coss = Cds + Cgd
Ciss
Coss
Crss
1000
1.4
TJ , Junction Temperature (°C)
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
10000
1.6
0.6
Fig 5. Typical Transfer Characteristics
100000
ID = 100A
VGS = 10V
1.8
8
VGS, Gate-to-Source Voltage (V)
C, Capacitance (pF)
Tj = 175°C
10
0.1
VGS
15V
10V
8.0V
7.0V
6.0V
5.5V
5.0V
4.5V
ID= 100A
12
VDS = 32V
VDS = 20V
10
8
6
4
2
0
100
0
1
10
100
VDS, Drain-to-Source Voltage (V)
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage
4
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40
80
120
160
200
QG Total Gate Charge (nC)
Fig 8. Typical Gate Charge vs. Gate-to-Source Voltage
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IRFB7437PbF
1000
ID, Drain-to-Source Current (A)
ISD, Reverse Drain Current (A)
1000
TJ = 175°C
100
TJ = 25°C
10
1
100μsec
100
1msec
Limited by Package
10
10msec
OPERATION IN THIS AREA
LIMITED BY R (on)
DS
DC
1
Tc = 25°C
Tj = 175°C
Single Pulse
VGS = 0V
0.1
0.1
0.0
0.5
1.0
1.5
2.0
0.1
2.5
VSD , Source-to-Drain Voltage (V)
10
Fig 10. Maximum Safe Operating Area
Fig 9. Typical Source-Drain Diode
Forward Voltage
1.2
50
Id = 1.0mA
1.0
48
0.8
Energy (μJ)
V(BR)DSS, Drain-to-Source Breakdown Voltage (V)
1
VDS, Drain-toSource Voltage (V)
46
44
0.6
0.4
42
0.2
0.0
40
0
-60 -40 -20 0 20 40 60 80 100120140160180
20
30
40
50
VDS, Drain-to-Source Voltage (V)
TJ , Temperature ( °C )
Fig 11. Drain-to-Source Breakdown Voltage
RDS (on) , Drain-to-Source On Resistance (mΩ)
10
Fig 12. Typical COSS Stored Energy
8
VGS = 5.5V
7
VGS = 6.0V
6
5
VGS = 7.0V
VGS = 8.0V
VGS = 10V
4
3
2
1
0
100
200
300
400
500
ID , Drain Current (A)
Fig 13. Typical On-Resistance vs. Drain Current
5
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IRFB7437PbF
1
Thermal Response ( ZthJC )
D = 0.50
0.20
0.1
0.10
0.05
0.02
0.01
0.01
0.001
SINGLE PULSE
( THERMAL RESPONSE )
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthjc + Tc
0.0001
1E-006
1E-005
0.0001
0.001
0.01
0.1
t1 , Rectangular Pulse Duration (sec)
Fig 14. Maximum Effective Transient Thermal Impedance, Junction-to-Case
Avalanche Current (A)
1000
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔTj = 150°C and
Tstart =25°C (Single Pulse)
100
10
Allowed avalanche Current vs avalanche
pulsewidth, tav, assuming ΔΤ j = 25°C and
Tstart = 150°C. (Single Pulse)
1
1.0E-06
1.0E-05
1.0E-04
1.0E-03
1.0E-02
1.0E-01
tav (sec)
Fig 15. Typical Avalanche Current vs.Pulsewidth
Notes on Repetitive Avalanche Curves , Figures 14, 15:
(For further info, see AN-1005 at www.irf.com)
1. Avalanche failures assumption:
Purely a thermal phenomenon and failure occurs at a temperature far in
excess of Tjmax. This is validated for every part type.
2. Safe operation in Avalanche is allowed as long asTjmax is not exceeded.
3. Equation below based on circuit and waveforms shown in Figures 22a, 22b.
4. PD (ave) = Average power dissipation per single avalanche pulse.
5. BV = Rated breakdown voltage (1.3 factor accounts for voltage increase
during avalanche).
6. Iav = Allowable avalanche current.
7. ΔT = Allowable rise in junction temperature, not to exceed Tjmax (assumed as
25°C in Figure 14, 15).
tav = Average time in avalanche.
D = Duty cycle in avalanche = tav ·f
ZthJC(D, tav) = Transient thermal resistance, see Figures 13)
EAR , Avalanche Energy (mJ)
350
TOP
Single Pulse
BOTTOM 1% Duty Cycle
ID = 100A
300
250
200
150
100
50
0
25
50
75
100
125
150
175
Starting TJ , Junction Temperature (°C)
PD (ave) = 1/2 ( 1.3·BV·Iav) = DT/ ZthJC
Iav = 2DT/ [1.3·BV·Zth]
EAS (AR) = PD (ave)·tav
Fig 16. Maximum Avalanche Energy vs. Temperature
6
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IRFB7437PbF
10
IF = 60A
VR = 34V
4.0
8
TJ = 25°C
TJ = 125°C
3.5
3.0
IRR (A)
VGS(th), Gate threshold Voltage (V)
4.5
ID = 150μA
2.5
ID = 1.0mA
ID = 1.0A
2.0
6
4
2
1.5
1.0
0
-75 -50 -25
0
25 50 75 100 125 150 175
0
200
TJ , Temperature ( °C )
600
800
1000
Fig. 18 - Typical Recovery Current vs. dif/dt
Fig 17. Threshold Voltage vs. Temperature
140
10
8
IF = 100A
VR = 34V
120
IF = 60A
VR = 34V
TJ = 25°C
TJ = 125°C
100
TJ = 25°C
TJ = 125°C
6
QRR (nC)
IRR (A)
400
diF /dt (A/μs)
4
80
60
40
2
20
0
0
0
200
400
600
800
0
1000
200
400
600
800
1000
diF /dt (A/μs)
diF /dt (A/μs)
Fig. 20 - Typical Stored Charge vs. dif/dt
Fig. 19 - Typical Recovery Current vs. dif/dt
QRR (nC)
140
120
IF = 100A
VR = 34V
100
TJ = 25°C
TJ = 125°C
80
60
40
20
0
0
200
400
600
800
1000
diF /dt (A/μs)
Fig. 21 - Typical Stored Charge vs. dif/dt
7
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IRFB7437PbF
Driver Gate Drive
D.U.T
ƒ
-
‚
-
-
„
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+

RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
ISD controlled by Duty Factor "D"
D.U.T. - Device Under Test
V DD
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D=
Period
P.W.
+
+
-
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor
Current
Inductor Curent
ISD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 22. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V(BR)DSS
15V
DRIVER
L
VDS
tp
D.U.T
RG
20V
VGS
+
V
- DD
IAS
A
0.01Ω
tp
I AS
Fig 23a. Unclamped Inductive Test Circuit
RD
VDS
Fig 23b. Unclamped Inductive Waveforms
VDS
90%
VGS
D.U.T.
RG
+
- VDD
V10V
GS
10%
VGS
Pulse Width ≤ 1 µs
Duty Factor ≤ 0.1 %
td(on)
Fig 24a. Switching Time Test Circuit
tr
t d(off)
Fig 24b. Switching Time Waveforms
Id
Current Regulator
Same Type as D.U.T.
Vds
Vgs
50KΩ
12V
tf
.2μF
.3μF
D.U.T.
+
V
- DS
Vgs(th)
VGS
3mA
IG
ID
Current Sampling Resistors
Fig 25a. Gate Charge Test Circuit
8
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Qgs1 Qgs2
Qgd
Qgodr
Fig 25b. Gate Charge Waveform
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IRFB7437PbF
TO-220AB Package Outline
Dimensions are shown in millimeters (inches)
TO-220AB Part Marking Information
TO-220AB packages are not recommended for Surface Mount Application.
Note: For the most current drawing please refer to IR website at: http://www.irf.com/package/
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IRFB7437PbF
Qualification information†
Qualification level
Moisture Sensitivity Level
RoHS compliant
Industrial
(per JEDEC JESD47F††guidelines)
TO-220
Not applicable
Yes
† Qualification standards can be found at International Rectifier’s web site: http://www.irf.com/product-info/reliability/
†† Applicable version of JEDEC standard at the time of product release.
Revision History
Date
Comment
4/22/2014
• Updated data sheet with new IR corporate template.
• Updated typo on the fig.19 and fig.21, unit of y-axis from "A" to "nC" on page7.
• Updated package outline and part marking on page 9.
• Added bullet point in the Benefits "RoHS Compliant, Halogen -Free" on page 1.
1/6/2015
• Updated EAS (L =1mH) = 802mJ on page 2
• Updated note 9 “Limited by TJmax , starting TJ = 25°C, L = 1mH, RG = 50Ω, IAS = 40A, VGS =10V”. on page 2
IR WORLD HEADQUARTERS: 101 N. Sepulveda Blvd., El Segundo, California 90245, USA
To contact International Rectifier, please visit http://www.irf.com/whoto-call/
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