FQD5P10 P-Channel QFET® MOSFET -100 V, -3.6 A, 1.05 Description Features This P-Channel enhancement mode power MOSFET is produced using Fairchild Semiconductor®’s proprietary planar stripe and DMOS technology. This advanced MOSFET technology has been especially tailored to reduce on-state resistance, and to provide superior switching performance and high avalanche energy strength. These devices are suitable for switched mode power supplies, audio amplifier, DC motor control, and variable switching power applications. • -3.6 A, -100 V, RDS(on) = 1.05 (Max.)@ VGS = -10 V, ID = 1.8 A • Low Gate Charge (Typ. 6.3 nC) • Low Crss (Typ. 18 pF) • 100% avalanche tested D D G G D-PAK S S Absolute Maximum Ratings Symbol VDSS ID TC = 25°C unless otherwise noted Parameter Drain-Source Voltage - Continuous (TC = 25°C) Drain Current FQD5P10 -100 - Continuous (TC = 100°C) IDM Drain Current VGSS Gate-Source Voltage EAS Single Pulsed Avalanche Energy IAR Avalanche Current EAR Repetitive Avalanche Energy Peak Diode Recovery dv/dt Power Dissipation (TA = 25°C) * dv/dt PD - Pulsed TL -3.6 A -2.28 A -14.4 A 30 V (Note 2) 55 mJ (Note 1) -3.6 A (Note 1) 2.5 -6.0 2.5 mJ V/ns W 25 0.2 -55 to +150 W W/°C °C 300 °C FQD5P10 5.0 Unit °C/W (Note 1) (Note 3) Power Dissipation (TC = 25°C) TJ, TSTG Unit V - Derate above 25°C Operating and Storage Temperature Range Maximum lead temperature for soldering purposes, 1/8" from case for 5 seconds Thermal Characteristics Symbol RJC Parameter Thermal Resistance, Junction-to-Case, Max. RJA Thermal Resistance, Junction-to-Ambient * 50 °C/W RJA Thermal Resistance, Junction-to-Ambient, Max. 110 °C/W * When mounted on the minimum pad size recommended (PCB Mount) ©2000 Fairchild Semiconductor Corporation FQD5P10 Rev. C0 1 www.fairchildsemi.com FQD5P10 P-Channel QFET® MOSFET April 2013 Symbol TC = 25°C unless otherwise noted Parameter Test Conditions Off Characteristics Min Typ Max Unit -100 -- -- V -- V/°C BVDSS Drain-Source Breakdown Voltage VGS = 0 V, ID = -250 A BVDSS / TJ Breakdown Voltage Temperature Coefficient ID = -250 A, Referenced to 25°C -- -0.1 VDS = -100 V, VGS = 0 V -- -- -1 A VDS = -80 V, TC = 125°C -- -- -10 A Gate-Body Leakage Current, Forward VGS = -30 V, VDS = 0 V -- -- -100 nA IGSSR Gate-Body Leakage Current, Reverse VGS = 30 V, VDS = 0 V -- -- 100 nA IDSS IGSSF Zero Gate Voltage Drain Current On Characteristics VGS(th) Gate Threshold Voltage VDS = VGS, ID = -250 A -2.0 -- -4.0 V RDS(on) Static Drain-Source On-Resistance VGS = -10 V, ID = -1.8 A -- 0.82 1.05 gFS Forward Transconductance VDS = -40 V, ID = -1.8 A -- 2.3 -- S VDS = -25 V, VGS = 0 V, f = 1.0 MHz -- 190 250 pF -- 70 90 pF -- 18 25 pF Dynamic Characteristics Ciss Input Capacitance Coss Output Capacitance Crss Reverse Transfer Capacitance Switching Characteristics td(on) Turn-On Delay Time tr Turn-On Rise Time td(off) Turn-Off Delay Time tf Turn-Off Fall Time Qg Total Gate Charge Qgs Gate-Source Charge Qgd Gate-Drain Charge VDD = -50 V, ID = -4.5 A, RG = 25 (Note 4) VDS = -80 V, ID = -4.5 A, VGS = -10 V (Note 4) -- 9 30 ns -- 70 150 ns -- 12 35 ns -- 30 70 ns -- 6.3 8.2 nC -- 1.7 -- nC -- 3.0 -- nC Drain-Source Diode Characteristics and Maximum Ratings IS Maximum Continuous Drain-Source Diode Forward Current -- -- -3.6 A ISM -- -- -14.4 A VSD Maximum Pulsed Drain-Source Diode Forward Current VGS = 0 V, IS = -3.6 A Drain-Source Diode Forward Voltage -- -- -4.0 V trr Reverse Recovery Time Qrr Reverse Recovery Charge VGS = 0 V, IS = -4.5 A, dIF / dt = 100 A/s -- 85 -- ns -- 0.27 -- C Notes: 1. Repetitive Rating : Pulse width limited by maximum junction temperature 2. L = 6.4mH, IAS = -3.6A, VDD = -25V, RG = 25 Starting TJ = 25°C 3. ISD ≤ -4.5A, di/dt ≤ 300A/s, VDD ≤ BVDSS, Starting TJ = 25°C 4. Essentially independent of operating temperature ©2000 Fairchild Semiconductor Corporation FQD5P10 Rev. C0 2 www.fairchildsemi.com FQD5P10 P-Channel QFET® MOSFET Electrical Characteristics VGS -15.0 V -10.0 V -8.0 V -7.0 V -6.5 V -5.5 V -5.0 V Bottom : -4.5 V 1 1 10 Top : 0 10 -ID , Drain Current [A] -ID, Drain Current [A] 10 -1 10 150℃ 0 10 25℃ ※ Note : 1. 250μ s Pulse Test 2. TC = 25℃ -2 10 ※ Notes : 1. VDS = -40V 2. 250μ s Pulse Test -55℃ -1 -1 0 10 10 1 10 2 10 4 6 8 10 -VGS , Gate-Source Voltage [V] -VDS, Drain-Source Voltage [V] Figure 1. On-Region Characteristics Figure 2. Transfer Characteristics 2.5 1 VGS = - 10V 2.0 -IDR , Reverse Drain Current [A] RDS(on) [], Drain-Source On-Resistance 10 VGS = - 20V 1.5 1.0 0.5 ※ Note : TJ = 25℃ 3 6 25℃ ※ Notes : 1. VGS = 0V 2. 250μ s Pulse Test 9 10 12 0.0 0.5 1.0 1.5 2.0 2.5 3.0 -ID , Drain Current [A] -VSD , Source-Drain Voltage [V] Figure 3. On-Resistance Variation vs. Drain Current and Gate Voltage Figure 4. Body Diode Forward Voltage Variation vs. Source Current and Temperature 500 12 Ciss = Cgs + Cgd (Cds = shorted) Coss = Cds + Cgd Crss = Cgd 450 Capacitance [pF] 150℃ -1 0 400 Coss 350 Ciss 300 -VGS, Gate-Source Voltage [V] 0.0 0 10 ※ Notes : 1. VGS = 0 V 2. f = 1 MHz 250 200 Crss 150 100 50 0 -1 10 0 10 10 VDS = -80V 6 4 2 ※ Note : ID = -4.5 A 0 1 2 3 4 5 6 7 8 QG, Total Gate Charge [nC] -VDS, Drain-Source Voltage [V] Figure 5. Capacitance Characteristics ©2000 Fairchild Semiconductor Corporation FQD5P10 Rev. C0 VDS = -50V 8 0 1 VDS = -20V 10 Figure 6. Gate Charge Characteristics 3 www.fairchildsemi.com FQD5P10 P-Channel QFET® MOSFET Typical Characteristics (Continued) 3.0 RDS(ON), (Normalized) Drain-Source On-Resistance -BVDSS, (Normalized) Drain-Source Breakdown Voltage 1.2 1.1 1.0 ※ Notes : 1. VGS = 0 V 2. ID = -250 μA 0.9 0.8 -100 -50 0 50 100 150 2.5 2.0 1.5 1.0 ※ Notes : 1. VGS = -10 V 2. ID = -1.8 A 0.5 0.0 -100 200 -50 0 50 100 150 200 o o TJ, Junction Temperature [ C] TJ, Junction Temperature [ C] Figure 7. Breakdown Voltage Variation vs. Temperature Figure 8. On-Resistance Variation vs. Temperature 4 1 100 s 10 -ID, Drain Current [A] -ID, Drain Current [A] Operation in This Area is Limited by R DS(on) 1 ms 10 ms DC 0 10 ※ Notes : 3 2 1 o 1. TC = 25 C o 2. TJ = 150 C 3. Single Pulse -1 10 0 1 10 0 25 2 10 10 50 Figure 9. Maximum Safe Operating Area Zθ JC(t), Thermal Response 75 100 125 150 TC, Case Temperature [℃] -VDS, Drain-Source Voltage [V] Figure 10. Maximum Drain Current vs. Case Temperature D = 0 .5 10 ※ N o te s : 1 . Z θ J C ( t) = 5 .0 ℃ /W M a x . 2 . D u ty F a c to r , D = t 1 /t 2 3 . T J M - T C = P D M * Z θ J C ( t) 0 .2 0 0 .1 0 .0 5 0 .0 2 0 .0 1 10 PDM t1 -1 s in g le p u ls e 10 -5 10 -4 10 -3 10 -2 10 -1 t2 10 0 10 1 t 1 , S q u a r e W a v e P u ls e D u r a t io n [ s e c ] Figure 11. Transient Thermal Response Curve ©2000 Fairchild Semiconductor Corporation FQD5P10 Rev. C0 4 www.fairchildsemi.com FQD5P10 P-Channel QFET® MOSFET Typical Characteristics FQD5P10 P-Channel QFET® MOSFET Gate Charge Test Circuit & Waveform VGS Same Type as DUT 50KΩ 200nF 12V Qg -10V 300nF VDS VGS Qgs Qgd DUT -3mA Charge Resistive Switching Test Circuit & Waveforms VDS RG RL t on td(on) VDD VGS VGS t off tr td(off) tf 10% DUT -10V VDS 90% Unclamped Inductive Switching Test Circuit & Waveforms BVDSS 1 EAS = ---- L IAS2 -------------------2 BVDSS - VDD L VDS tp ID RG VDD VDD IAS BVDSS tp ©2000 Fairchild Semiconductor Corporation FQD5P10 Rev. C0 VDS (t) ID (t) DUT -10V Time 5 www.fairchildsemi.com FQD5P10 P-Channel QFET® MOSFET Peak Diode Recovery dv/dt Test Circuit & Waveforms + VDS DUT _ I SD L Driver RG VGS VGS ( Driver ) I SD ( DUT ) Compliment of DUT (N-Channel) VDD • dv/dt controlled by RG • ISD controlled by pulse period Gate Pulse Width D = -------------------------Gate Pulse Period 10V Body Diode Reverse Current IRM di/dt IFM , Body Diode Forward Current VDS ( DUT ) VSD Body Diode Forward Voltage Drop VDD Body Diode Recovery dv/dt ©2000 Fairchild Semiconductor Corporation FQD5P10 Rev. C0 6 www.fairchildsemi.com FQD5P10 P-Channel QFET® MOSFET Package Dimensions D-PAK Dimensions in Millimeters ©2000 Fairchild Semiconductor Corporation FQD5P10 Rev. C0 7 www.fairchildsemi.com tm *Trademarks of System General Corporation, used under license by Fairchild Semiconductor. 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Obsolete Not In Production Datasheet contains specifications on a product that is discontinued by Fairchild Semiconductor. The datasheet is for reference information only. Rev. I64 ©2000 Fairchild Semiconductor Corporation FQD5P10 Rev. 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