TI1 LM139-SP Quad differential comparator Datasheet

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LM139-MIL
SLCS160 – JUNE 2017
LM139-MIL Quad Differential Comparators
1 Features
2 Applications
•
•
•
1
•
•
•
•
•
•
•
•
•
Wide Supply Ranges
– Single Supply: 2 V to 36 V
(Tested to 30 V)
– Dual Supplies: ±1 V to ±18 V
(Tested to ±15 V)
Low Supply-Current Drain Independent of
Supply Voltage: 0.8 mA (Typical)
Low Input Bias Current: 25 nA (Typical)
Low Input Offset Current: 3 nA (Typical)
Low Input Offset Voltage: 2 mV (Typical)
Common-Mode Input Voltage Range
Includes Ground
Differential Input Voltage Range Equal to
Maximum-Rated Supply Voltage: ±36 V
Low Output Saturation Voltage
Output Compatible With TTL, MOS, and CMOS
On Products Compliant to MIL-PRF-38535,
All Parameters Are Tested Unless Otherwise
Noted. On All Other Products, Production
Processing Does Not Necessarily Include Testing
of All Parameters.
•
•
•
•
Industrial
Automotive
– Infotainment and Clusters
– Body Control Modules
Power Supervision
Oscillators
Peak Detectors
Logic Voltage Translation
3 Description
The LM139-MIL device consists of four independent
voltage comparators that are designed to operate
from a single power supply over a wide range of
voltages. Operation from dual supplies also is
possible, as long as the difference between the two
supplies is 2 V to 36 V, and VCC is at least 1.5 V
more positive than the input common-mode voltage.
Current drain is independent of the supply voltage.
The outputs can be connected to other open-collector
outputs to achieve wired-AND relationships.
The LM139-MIL device is characterized for operation
over the full military temperature range of –55°C to
+125°C.
Device Information(1)
PART NUMBER
LM139-MIL
PACKAGE
BODY SIZE (NOM)
CDIP (14)
21.30 mm × 7.60 mm
LCCC (20)
8.90 mm × 8.90 mm
CFP (14)
9.20 mm × 6.29 mm
SOIC (14)
8.70 mm × 3.90 mm
(1) For all available packages, see the orderable addendum at
the end of the data sheet.
Simplified Schematic
IN+
OUT
IN−
1
An IMPORTANT NOTICE at the end of this data sheet addresses availability, warranty, changes, use in safety-critical applications,
intellectual property matters and other important disclaimers. PRODUCTION DATA.
On products compliant to MIL-PRF-38535, all parameters are
tested unless otherwise noted. On all other products, production
processing does not necessarily include testing of all parameters.
LM139-MIL
SLCS160 – JUNE 2017
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Table of Contents
1
2
3
4
5
6
7
Features ..................................................................
Applications ...........................................................
Description .............................................................
Revision History.....................................................
Pin Configuration and Functions .........................
Specifications.........................................................
1
1
1
2
3
4
6.1
6.2
6.3
6.4
6.5
6.6
6.7
4
4
4
4
5
5
6
Absolute Maximum Ratings ......................................
ESD Ratings..............................................................
Recommended Operating Conditions.......................
Thermal Information ..................................................
Electrical Characteristics...........................................
Switching Characteristics ..........................................
Typical Characteristics ..............................................
7.3 Feature Description................................................... 7
7.4 Device Functional Modes.......................................... 7
8
Application and Implementation .......................... 8
8.1 Application Information.............................................. 8
8.2 Typical Application ................................................... 8
9 Power Supply Recommendations...................... 10
10 Layout................................................................... 10
10.1 Layout Guidelines ................................................. 10
10.2 Layout Example .................................................... 10
11 Device and Documentation Support ................. 11
11.1
11.2
11.3
11.4
11.5
Detailed Description .............................................. 7
7.1 Overview ................................................................... 7
7.2 Functional Block Diagram ......................................... 7
Receiving Notification of Documentation Updates
Community Resources..........................................
Trademarks ...........................................................
Electrostatic Discharge Caution ............................
Glossary ................................................................
11
11
11
11
11
12 Mechanical, Packaging, and Orderable
Information ........................................................... 11
4 Revision History
2
DATE
REVISION
NOTES
June 2017
*
Initial release.
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5 Pin Configuration and Functions
D, J, or W Package
SOIC, CDIP, or CFP
Top View
14
2
13
3
12
4
11
5
10
6
9
7
8
2OUT
1OUT
NC
3OUT
4OUT
1
OUT3
OUT4
GND
4IN+
4IN−
3IN+
3IN−
3
VC C
NC
2IN−
NC
2IN+
4
2 1 20 19
18
17
16
5
6
15
7
8
14
9 10 11 12 13
GND
NC
4IN+
NC
4IN−
1IN−
1IN+
NC
3IN−
3IN+
1OUT
2OUT
VC C
2IN−
2IN+
1IN−
1IN+
FK Package
20-Pin LCCC
Top View
NC = no internal connection.
Pin Functions
PIN
NAME
I/O (1)
DESCRIPTION
D, J, W
FK
1IN+
7
10
I
Positive input pin of the comparator 1
1IN–
6
9
I
Negative input pin of the comparator 1
1OUT
1
2
O
Output pin of the comparator 1
2IN+
5
8
I
Positive input pin of the comparator 2
2IN–
4
6
I
Negative input pin of the comparator 2
2OUT
2
3
O
Output pin of the comparator 2
3IN+
9
13
I
Positive input pin of the comparator 3
3IN–
8
12
I
Negative input pin of the comparator 3
3OUT
14
20
O
Output pin of the comparator 3
4IN+
11
16
I
Positive input pin of the comparator 4
4IN–
10
14
I
Negative input pin of the comparator 4
4OUT
13
19
O
Output pin of the comparator 4
GND
12
18
—
Ground
VCC
3
4
—
Supply pin
—
No connect (no internal connection)
1
5
NC
—
7
11
15
17
(1)
I = Input, O = Output
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6 Specifications
6.1 Absolute Maximum Ratings
over operating free-air temperature range (unless otherwise noted) (1)
MIN
MAX
UNIT
36
V
±36
V
Supply voltage (2)
VCC
(3)
VID
Differential input voltage
VI
Input voltage range (either input)
IK
–0.3
36
V
Input current (4)
–50
mA
VO
Output voltage
36
V
IO
Output current
20
mA
Duration of output short circuit to ground (5)
TJ
Operating virtual-junction temperature
Tstg
(1)
(2)
(3)
(4)
(5)
Unlimited
150
°C
Case temperature for 60 s
FK package
260
°C
Lead temperature 1.6 mm (1/16 in) from case for 60 s
J package
300
°C
150
°C
Storage temperature
–65
Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings
only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating
Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.
All voltage values, except differential voltages, are with respect to network ground.
Differential voltages are at xIN+ with respect to xIN–.
Input current flows through parasitic diode to ground and will turn on parasitic transistors that will increase ICC and may cause output to
be incorrect. Normal operation resumes when input is removed.
Short circuits from outputs to VCC can cause excessive heating and eventual destruction.
6.2 ESD Ratings
VALUE
V(ESD)
(1)
(2)
Electrostatic discharge
Human body model (HBM), per ANSI/ESDA/JEDEC JS-001
(1)
±500
Charged-device model (CDM), per JEDEC specification JESD22-C101 (2)
±750
UNIT
V
JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.
JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.
6.3 Recommended Operating Conditions
over operating free-air temperature range (unless otherwise noted)
VCC
Supply voltage
TJ
Junction temperature
MIN
MAX
UNIT
2
30
V
–55
125
°C
6.4 Thermal Information
LM139-MIL
THERMAL METRIC (1)
UNIT
D (SOIC)
J (CDIP)
W (CFP)
FK (LCCC)
156.2
82.5
°C/W
RθJA
Junction-to-ambient thermal resistance
98.8
89.5
RθJC(top)
Junction-to-case (top) thermal resistance
64.3
46.1
86.7
60.7
°C/W
RθJB
Junction-to-board thermal resistance
59.7
78.7
154.6
59.4
°C/W
ψJT
Junction-to-top characterization parameter
25.7
3
56.5
53
°C/W
ψJB
Junction-to-board characterization parameter
59.3
71.8
133.5
58.4
°C/W
RθJC(bot)
Junction-to-case (bottom) thermal resistance
—
24.2
14.3
9.7
°C/W
(1)
4
For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application
report.
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6.5 Electrical Characteristics
at specified free-air temperature, VCC = 5 V (unless otherwise noted)
TEST CONDITIONS (1)
PARAMETER
MIN
TA = 25°C
VIO
Input offset voltage
VCC = 5 V to 30 V,
VIC = VICR min,
VO = 1.4 V
IIO
Input offset current
VO = 1.4 V
IIB
Input bias current
VO = 1.4 V
VICR
Common-mode input-voltage
range (2)
AVD
Large-signal differential-voltage
amplification
VCC+ = ±7.5 V,
VO = –5 V to +5 V
IOH
High-level output current
VID = 1 V
VOL
Low-level output voltage
VID = –1 V,
IOL = 4 mA
TA = –55°C
to +125°C
IOL
Low-level output current
VID = –1 V,
VOL = 1.5 V
TA = 25°C
ICC
Supply current
(four comparators)
VO = 2.5 V,
No load
TA = 25°C
MAX
2
5
TA = –55°C
to +125°C
UNIT
mV
9
TA = 25°C
3
TA = –55°C
to +125°C
25
nA
100
TA = 25°C
–25
TA = –55°C
to +125°C
–100
nA
–300
TA = 25°C
0 to
VCC – 1.5
TA = –55°C
to +125°C
0 to
–2
VCC
V
TA = 25°C
200
V/mV
VOH = 5 V
TA = 25°C
0.1
nA
VOH = 30 V
TA = –55°C
to +125°C
1
TA = 25°C
(1)
(2)
TYP
150
400
700
6
μA
16
mV
mA
0.8
2
mA
All characteristics are measured with zero common-mode input voltage, unless otherwise specified.
The voltage at either input or common-mode must not be allowed to go negative by more than 0.3 V. The upper end of the commonmode voltage range is VCC+ – 1.5 V; however, one input can exceed VCC, and the comparator will provide a proper output state as long
as the other input remains in the common-mode range. Either or both inputs can go to 30 V without damage.
6.6 Switching Characteristics
VCC = 5 V, TA = 25°C
PARAMETER
Response time
(1)
(2)
TEST CONDITIONS
RL connected to 5 V through 5.1 kΩ,
CL = 15 pF (1) (2)
TYP
100-mV input step with 5-mV overdrive
1.3
TTL-level input step
0.3
UNIT
μs
CL includes probe and jig capacitance.
The response time specified is the interval between the input step function and the instant when the output crosses 1.4 V.
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6.7 Typical Characteristics
80
1.8
1.6
IIN – Input Bias Current – nA
ICC – Supply Current – mA
70
TA = –55°C
1.4
TA = 25°C
TA = 0°C
1.2
1
TA = 70°C
0.8
TA = 125°C
0.6
0.4
TA = –55°C
60
TA = 0°C
50
TA = 25°C
40
TA = 70°C
30
TA = 125°C
20
10
0.2
0
0
0
5
10
15
20
25
30
35
0
5
10
15
20
25
30
35
VCC – Supply Voltage – V
VCC – Supply Voltage – V
Figure 1. Supply Current vs Supply Voltage
Figure 2. Input Bias Current vs Supply Voltage
6
10
Overdrive = 5 mV
1
VO – Output Voltage – V
VO – Saturation Voltage – V
5
TA = 125°C
TA = 25°C
0.1
TA = –55°C
0.01
4
Overdrive = 20 mV
3
Overdrive = 100 mV
2
1
0
0.001
0.01
0.1
1
10
-1
-0.3
100
0
0.25 0.5 0.75
1
1.25 1.5 1.75
2
2.25
t – Time – µs
IO – Output Sink Current – mA
Figure 4. Response Time for Various Overdrives
Negative Transition
Figure 3. Output Saturation Voltage
6
VO – Output Voltage – V
5
Overdrive = 5 mV
4
Overdrive = 20 mV
3
Overdrive = 100 mV
2
1
0
-1
-0.3
0
0.25 0.5 0.75
1
1.25 1.5 1.75
2
2.25
t – Time – µs
Figure 5. Response Time for Various Overdrives
Positive Transition
6
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7 Detailed Description
7.1 Overview
The LM139-MIL is a quad comparators with the ability to operate up to an absolute maximum of 36 V on the
supply pin. This standard device has proven ubiquity and versatility across a wide range of applications. This is
due to very wide supply voltages range (2 V up to 32 V), low Iq, and fast response of the device.
The open-drain output allows the user to configure the output logic low voltage (VOL) and allows the comparator
to be used in AND functionality.
7.2 Functional Block Diagram
VCC
80-µA
Current Regulator
60 µA
10 µA
10 µA
80 µA
IN+
COMPONENT COUNT
OUT
Epi-FET
Diodes
Resistors
Transistors
1
2
2
30
IN−
GND
Figure 6. Schematic (Each Comparator)
7.3 Feature Description
The comparator consists of a PNP Darlington pair input, allowing the device to operate with very high gain and
fast response with minimal input bias current. The input Darlington pair creates a limit on the input commonmode voltage capability, allowing the comparator to accurately function from ground to (VCC – 1.5 V) differential
input. Allow for (VCC – 2 V) at cold temperature.
The output consists of an open-collector NPN (pulldown or low-side) transistor. The output NPN sinks current
when the negative input voltage is higher than the positive input voltage and the offset voltage. The VOL is
resistive and scales with the output current. See the Specifications section for VOL values with respect to the
output current.
7.4 Device Functional Modes
7.4.1 Voltage Comparison
The comparator operates solely as a voltage comparator, comparing the differential voltage between the positive
and negative pins and outputting a logic low or high impedance (logic high with pullup) based on the input
differential polarity.
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8 Application and Implementation
NOTE
Information in the following applications sections is not part of the TI component
specification, and TI does not warrant its accuracy or completeness. TI’s customers are
responsible for determining suitability of components for their purposes. Validate and test
the design implementation to confirm system functionality.
8.1 Application Information
Typically, a comparator compares either a single signal to a reference, or to two different signals. Many users
take advantage of the open-drain output to drive the comparison logic output to a logic voltage level to an MCU
or logic device. The wide supply range and high voltage capability makes the LM139-MIL device optimal for level
shifting to a higher or lower voltage.
8.2 Typical Application
VLOGIC
VLOGIC
VSUP
Vin
VSUP
Rpullup
+
Vin+
TI Device
R pullup
+
TI Device
Vref
VinCL
CL
Figure 7. Single-Ended and Differential Comparator Configurations
8.2.1 Design Requirements
For this design example, use the parameters listed in Table 1 as the input parameters.
Table 1. Design Parameters
DESIGN PARAMETER
EXAMPLE VALUE
Input Voltage Range
0 V to Vsup-1.5 V
Supply Voltage
4.5 V to VCC maximum
Logic Supply Voltage
0 V to VCC maximum
Output Current (RPULLUP)
1 µA to 4 mA
Input Overdrive Voltage
100 mV
Reference Voltage
2.5 V
Load Capacitance (CL)
15 pF
8.2.2 Detailed Design Procedure
When using the LM139-MIL in a general comparator application, determine the following:
• Input voltage range
• Minimum overdrive voltage
• Output and drive current
• Response time
8.2.2.1 Input Voltage Range
When choosing the input voltage range, the input common-mode voltage range (VICR) must be taken in to
account. If temperature operation is above or below 25°C the VICR can range from 0 V to VCC– 2 V. This limits
the input voltage range to as high as VCC– 2 V and as low as 0 V. Operation outside of this range can yield
incorrect comparisons.
8
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The following list describes the outcomes of some input voltage situations.
•
•
•
•
When both IN– and IN+ are both within the common-mode range:
– If IN– is higher than IN+ and the offset voltage, the output is low and the output transistor is sinking
current
– If IN– is lower than IN+ and the offset voltage, the output is high impedance and the output transistor is
not conducting
When IN– is higher than common mode and IN+ is within common mode, the output is low and the output
transistor is sinking current
When IN+ is higher than common mode and IN– is within common mode, the output is high impedance and
the output transistor is not conducting
When IN– and IN+ are both higher than common mode, the output is low and the output transistor is sinking
current
8.2.2.2 Minimum Overdrive Voltage
Overdrive voltage is the differential voltage produced between the positive and negative inputs of the comparator
over the offset voltage (VIO). To make an accurate comparison, the overdrive voltage (VOD) must be higher than
the input offset voltage (VIO). Overdrive voltage can also determine the response time of the comparator, with the
response time decreasing with increasing overdrive. Figure 8 and Figure 9 show positive and negative response
times with respect to overdrive voltage.
8.2.2.3 Output and Drive Current
Output current is determined by the load and pullup resistance and logic and pullup voltage. The output current
produces a low-level output voltage (VOL) from the comparator, where VOL is proportional to the output current.
The output current can also effect the transient response.
8.2.2.4 Response Time
Response time is a function of input over-drive. See the Typical Characteristics graphs for typical response
times. The rise and fall times can be determined by the load capacitance (CL), load/pull-up resistance (RPULLUP)
and equivalent collector-emitter resistance (RCE).
•
•
The rise time (τR) is approximately τR~ RPULLUP × CL
The fall time (τF) is approximately τF ~ RCE × CL
– RCE can be determined by taking the slope of Figure 3 in its linear region at the desired temperature, or by
dividing the VOL by IOUT
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8.2.3 Application Curves
6
6
5
5
Output Voltage (Vo)
Output Voltage, Vo(V)
Figure 8 and Figure 9 were generated with scope probe parasitic capacitance of 50 pF.
4
3
2
5mV OD
1
20mV OD
4
3
2
5mV OD
1
0
20mV OD
0
100mV OD
±1
-0.25
0.25
0.75
1.25
1.75
2.25
Time (usec)
VCC = 5 V
100mV OD
±1
±0.25 0.00
0.25
VLogic = 5 V
0.50
0.75
1.00
1.25
1.50
1.75
Time (usec)
C004
RPULLUP = 5.1 kΩ
VCC = 5 V
Figure 8. Response Time vs Output Voltage
(Positive Transition)
VLogic = 5 V
2.00
C006
RPULLUP = 5.1 kΩ
Figure 9. Response Time vs Output Voltage
(Negative Transition)
9 Power Supply Recommendations
For fast response and comparison applications with noisy or AC inputs, use a bypass capacitor on the supply pin
to reject any variation on the supply voltage. This variation can affect the common-mode range of the comparator
input and create an inaccurate comparison.
10 Layout
10.1 Layout Guidelines
To create an accurate comparator application without hysteresis, maintain a stable power supply with minimized
noise and glitches, which can affect the high level input common-mode voltage range. To achieve this accuracy,
add a bypass capacitor between the supply voltage and ground. Place a bypass capacitor on the positive power
supply and negative supply (if available).
NOTE
If a negative supply is not being used, do not place a capacitor between the GND pin of
the device and system ground.
10.2 Layout Example
Ground
Bypass
Capacitor
0.1 μF
Positive Supply
1OUT
2OUT
VCC
2IN–
2IN+
1IN–
1IN+
1
2
14 3OUT
13 4OUT
3
12 GND
4
5
6
7
11 4IN+
10 4IN–
9 3IN+
8 3IN–
Negative Supply or Ground
Only needed
for dual power
0.1 μF
supplies
Ground
Figure 10. LM139-MIL Layout Example
10
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11 Device and Documentation Support
11.1 Receiving Notification of Documentation Updates
To receive notification of documentation updates, navigate to the device product folder on ti.com. In the upper
right corner, click on Alert me to register and receive a weekly digest of any product information that has
changed. For change details, review the revision history included in any revised document.
11.2 Community Resources
The following links connect to TI community resources. Linked contents are provided "AS IS" by the respective
contributors. They do not constitute TI specifications and do not necessarily reflect TI's views; see TI's Terms of
Use.
TI E2E™ Online Community TI's Engineer-to-Engineer (E2E) Community. Created to foster collaboration
among engineers. At e2e.ti.com, you can ask questions, share knowledge, explore ideas and help
solve problems with fellow engineers.
Design Support TI's Design Support Quickly find helpful E2E forums along with design support tools and
contact information for technical support.
11.3 Trademarks
E2E is a trademark of Texas Instruments.
All other trademarks are the property of their respective owners.
11.4 Electrostatic Discharge Caution
These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam
during storage or handling to prevent electrostatic damage to the MOS gates.
11.5 Glossary
SLYZ022 — TI Glossary.
This glossary lists and explains terms, acronyms, and definitions.
12 Mechanical, Packaging, and Orderable Information
The following pages include mechanical packaging and orderable information. This information is the most
current data available for the designated devices. This data is subject to change without notice and revision of
this document. For browser based versions of this data sheet, refer to the left hand navigation.
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PACKAGE OPTION ADDENDUM
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29-Jun-2017
PACKAGING INFORMATION
Orderable Device
Status
(1)
Package Type Package Pins Package
Drawing
Qty
Eco Plan
Lead/Ball Finish
MSL Peak Temp
(2)
(6)
(3)
Op Temp (°C)
Device Marking
(4/5)
77008012A
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
77008012A
LM139FKB
7700801CA
ACTIVE
CDIP
J
14
1
TBD
A42
N / A for Pkg Type
-55 to 125
7700801CA
LM139JB
7700801DA
ACTIVE
CFP
W
14
1
TBD
A42
N / A for Pkg Type
-55 to 125
7700801DA
LM139WB
JM38510/11201BCA
ACTIVE
CDIP
J
14
1
TBD
A42
N / A for Pkg Type
-55 to 125
JM38510
/11201BCA
LM139FK
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
LM139FK
LM139FKB
ACTIVE
LCCC
FK
20
1
TBD
POST-PLATE
N / A for Pkg Type
-55 to 125
77008012A
LM139FKB
LM139J
ACTIVE
CDIP
J
14
1
TBD
A42
N / A for Pkg Type
-55 to 125
LM139J
LM139JB
ACTIVE
CDIP
J
14
1
TBD
A42
N / A for Pkg Type
-55 to 125
7700801CA
LM139JB
LM139W
ACTIVE
CFP
W
14
1
TBD
A42
N / A for Pkg Type
-55 to 125
LM139W
LM139WB
ACTIVE
CFP
W
14
1
TBD
A42
N / A for Pkg Type
-55 to 125
7700801DA
LM139WB
M38510/11201BCA
ACTIVE
CDIP
J
14
1
TBD
A42
N / A for Pkg Type
-55 to 125
JM38510
/11201BCA
(1)
The marketing status values are defined as follows:
ACTIVE: Product device recommended for new designs.
LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect.
NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design.
PREVIEW: Device has been announced but is not in production. Samples may or may not be available.
OBSOLETE: TI has discontinued the production of the device.
(2)
RoHS: TI defines "RoHS" to mean semiconductor products that are compliant with the current EU RoHS requirements for all 10 RoHS substances, including the requirement that RoHS substance
do not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, "RoHS" products are suitable for use in specified lead-free processes. TI may
reference these types of products as "Pb-Free".
RoHS Exempt: TI defines "RoHS Exempt" to mean products that contain lead but are compliant with EU RoHS pursuant to a specific EU RoHS exemption.
Green: TI defines "Green" to mean the content of Chlorine (Cl) and Bromine (Br) based flame retardants meet JS709B low halogen requirements of <=1000ppm threshold. Antimony trioxide based
flame retardants must also meet the <=1000ppm threshold requirement.
Addendum-Page 1
Samples
PACKAGE OPTION ADDENDUM
www.ti.com
29-Jun-2017
(3)
MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature.
(4)
There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device.
(5)
Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation
of the previous line and the two combined represent the entire Device Marking for that device.
(6)
Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish
value exceeds the maximum column width.
Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information
provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and
continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals.
TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release.
In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis.
OTHER QUALIFIED VERSIONS OF LM139-MIL :
• Space: LM139-SP
NOTE: Qualified Version Definitions:
• Space - Radiation tolerant, ceramic packaging and qualified for use in Space-based application
Addendum-Page 2
PACKAGE OUTLINE
J0014A
CDIP - 5.08 mm max height
SCALE 0.900
CERAMIC DUAL IN LINE PACKAGE
PIN 1 ID
(OPTIONAL)
A
4X .005 MIN
[0.13]
.015-.060 TYP
[0.38-1.52]
1
14
12X .100
[2.54]
14X .014-.026
[0.36-0.66]
14X .045-.065
[1.15-1.65]
.010 [0.25] C A B
.754-.785
[19.15-19.94]
8
7
B
.245-.283
[6.22-7.19]
.2 MAX TYP
[5.08]
C
.13 MIN TYP
[3.3]
SEATING PLANE
.308-.314
[7.83-7.97]
AT GAGE PLANE
.015 GAGE PLANE
[0.38]
0 -15
TYP
14X .008-.014
[0.2-0.36]
4214771/A 05/2017
NOTES:
1. All controlling linear dimensions are in inches. Dimensions in brackets are in millimeters. Any dimension in brackets or parenthesis are for
reference only. Dimensioning and tolerancing per ASME Y14.5M.
2. This drawing is subject to change without notice.
3. This package is hermitically sealed with a ceramic lid using glass frit.
4. Index point is provided on cap for terminal identification only and on press ceramic glass frit seal only.
5. Falls within MIL-STD-1835 and GDIP1-T14.
www.ti.com
EXAMPLE BOARD LAYOUT
J0014A
CDIP - 5.08 mm max height
CERAMIC DUAL IN LINE PACKAGE
(.300 ) TYP
[7.62]
SEE DETAIL A
SEE DETAIL B
1
14
12X (.100 )
[2.54]
SYMM
14X ( .039)
[1]
8
7
SYMM
LAND PATTERN EXAMPLE
NON-SOLDER MASK DEFINED
SCALE: 5X
.002 MAX
[0.05]
ALL AROUND
(.063)
[1.6]
METAL
( .063)
[1.6]
SOLDER MASK
OPENING
METAL
(R.002 ) TYP
[0.05]
.002 MAX
[0.05]
ALL AROUND
SOLDER MASK
OPENING
DETAIL A
DETAIL B
SCALE: 15X
13X, SCALE: 15X
4214771/A 05/2017
www.ti.com
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