Microchip MCP6054T 30 î¼a, high precision op amp Datasheet

MCP6051/2/4
30 µA, High Precision Op Amps
Description
Features
•
•
•
•
•
•
•
•
Low Offset Voltage: ±150 µV (maximum)
Low Quiescent Current: 30 µA (typical)
Rail-to-Rail Input and Output
Wide Supply Voltage Range: 1.8V to 6.0V
Gain Bandwidth Product: 385 kHz (typical)
Unity Gain Stable
Extended Temperature Range: -40°C to +125°C
No Phase Reversal
Applications
•
•
•
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The Microchip Technology Inc. MCP6051/2/4 family of
operational amplifiers (op amps) has low input offset
voltage (±150 µV, maximum) and rail-to-rail input and
output operation. This family is unity gain stable and
has a gain bandwidth product of 385 kHz (typical).
These devices operate with a single supply voltage as
low as 1.8V, while drawing low quiescent current per
amplifier (30 µA, typical). These features make the
family of op amps well suited for single-supply, high
precision, battery-powered applications.
The MCP6051/2/4 family is offered in single
(MCP6051), dual (MCP6052), and quad (MCP6054)
configurations.
Automotive
Portable Instrumentation
Sensor Conditioning
Battery Powered Systems
Medical Instrumentation
Test Equipment
Analog Filters
The MCP6051/2/4 is designed with Microchip’s
advanced CMOS process. All devices are available in
the extended temperature range, with a power supply
range of 1.8V to 6.0V.
Package Types
MCP6051
SOIC
Design Aids
•
•
•
•
•
•
SPICE Macro Models
FilterLab® Software
Mindi™ Circuit Designer & Simulator
Microchip Advanced Part Selector (MAPS)
Analog Demonstration and Evaluation Boards
Application Notes
NC 1
VIN– 2
VIN+ 3
VSS 4
ZIN
VIN– 2
VSS 4
MCP6051
C
Z IN = R L + j ω L
R
L = R L RC
Gyrator
VOUT
VOUTA 1
8 VDD
7 VDD
VINA– 2
VINA+ 3
7 VOUTB
MCP6051
2x3 TDFN *
VIN+ 3
RL
8 NC
6 VOUT
5 NC
NC 1
Typical Application
MCP6052
SOIC
EP
9
6 VINB–
5 VINB+
VSS 4
MCP6052
2x3 TDFN *
8 NC
VOUTA 1
7 VDD
VINA– 2
6 VOUT VINA+ 3
5 NC
8 VDD
EP
9
VSS 4
7 VOUTB
6 VINB–
5 VINB+
MCP6054
SOIC, TSSOP
VOUTA 1
14 VOUTD
VINA– 2
13 VIND–
VINA+ 3
VDD 4
12 VIND+
11 VSS
VINB+ 5
10 VINC+
VINB– 6
9 VINC–
VOUTB 7
8 VOUTC
* Includes Exposed Thermal Pad (EP); see Table 3-1.
© 2009 Microchip Technology Inc.
DS22182A-page 1
MCP6051/2/4
NOTES:
DS22182A-page 2
© 2009 Microchip Technology Inc.
MCP6051/2/4
1.0
ELECTRICAL CHARACTERISTICS
1.1
Absolute Maximum Ratings †
Current at Output and Supply Pins ............................±30 mA
† Notice: Stresses above those listed under “Absolute
Maximum Ratings” may cause permanent damage to
the device. This is a stress rating only and functional
operation of the device at those or any other conditions
above those indicated in the operational listings of this
specification is not implied. Exposure to maximum
rating conditions for extended periods may affect
device reliability.
Storage Temperature ....................................-65°C to +150°C
†† See 4.1.2 “Input Voltage And Current Limits”
VDD – VSS ........................................................................7.0V
Current at Input Pins .....................................................±2 mA
Analog Inputs (VIN+, VIN-)†† .......... VSS – 1.0V to VDD + 1.0V
All Other Inputs and Outputs ......... VSS – 0.3V to VDD + 0.3V
Difference Input Voltage ...................................... |VDD – VSS|
Output Short-Circuit Current .................................continuous
Maximum Junction Temperature (TJ).......................... +150°C
ESD protection on all pins (HBM; MM) ................ ≥ 4 kV; 400V
1.2
Specifications
TABLE 1-1:
DC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +6.0V, VSS= GND, TA= +25°C, VCM = VDD/2,
VOUT ≈ VDD/2, VL = VDD/2 and RL = 100 kΩ to VL. (Refer to Figure 1-1).
Parameters
Sym
Min
Typ
Max
Units
Conditions
VOS
-150
—
+150
µV
ΔVOS/ΔTA
—
±1.5
—
µV/°C TA= -40°C to +85°C,
VDD = 3.0V, VCM = VDD/3
ΔVOS/ΔTA
—
±4.0
—
µV/°C TA= +85°C to +125°C,
VDD = 3.0V, VCM = VDD/3
PSRR
70
87
—
dB
IB
—
±1.0
100
pA
IB
—
60
—
pA
TA = +85°C
TA = +125°C
Input Offset
Input Offset Voltage
Input Offset Drift with Temperature
Power Supply Rejection Ratio
VDD = 3.0V,
VCM = VDD/3
VCM = VSS
Input Bias Current and Impedance
Input Bias Current
IB
—
1100
5000
pA
Input Offset Current
IOS
—
±1.0
—
pA
Common Mode Input Impedance
ZCM
—
1013||6
—
Ω||pF
ZDIFF
—
1013||6
—
Ω||pF
Common Mode Input Voltage Range
VCMR
VSS−0.2
—
VDD+0.2
V
VCMR
VSS−0.3
—
VDD+0.3
V
VDD = 6.0V (Note 1)
Common Mode Rejection Ratio
CMRR
74
90
—
dB
VCM = -0.2V to 2.0V,
VDD = 1.8V
74
91
—
dB
VCM = -0.3V to 6.3V,
VDD = 6.0V
72
87
—
dB
VCM = 3.0V to 6.3V,
VDD = 6.0V
74
89
—
dB
VCM = -0.3V to 3.0V,
VDD = 6.0V
Differential Input Impedance
Common Mode
Note 1:
VDD = 1.8V (Note 1)
Figure 2-13 shows how VCMR changed across temperature.
© 2009 Microchip Technology Inc.
DS22182A-page 3
MCP6051/2/4
TABLE 1-1:
DC ELECTRICAL SPECIFICATIONS (CONTINUED)
Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +6.0V, VSS= GND, TA= +25°C, VCM = VDD/2,
VOUT ≈ VDD/2, VL = VDD/2 and RL = 100 kΩ to VL. (Refer to Figure 1-1).
Parameters
Sym
Min
Typ
Max
Units
Conditions
AOL
95
115
—
dB
0.2V < VOUT <(VDD-0.2V)
VCM = VSS
VOL, VOH
VSS+15
—
VDD–15
mV
G = +2 V/V,
0.5V input overdrive
ISC
—
±5
—
mA
VDD = 1.8V
—
±26
—
mA
VDD = 6.0V
Open-Loop Gain
DC Open-Loop Gain
(Large Signal)
Output
Maximum Output Voltage Swing
Output Short-Circuit Current
Power Supply
Supply Voltage
Quiescent Current per Amplifier
Note 1:
VDD
1.8
—
6.0
V
IQ
15
30
45
µA
IO = 0, VDD = 6.0V
VCM = 0.9VDD
Figure 2-13 shows how VCMR changed across temperature.
TABLE 1-2:
AC ELECTRICAL SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, TA = +25°C, VDD = +1.8 to +6.0V, VSS = GND, VCM = VDD/2,
VOUT ≈ VDD/2, VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF. (Refer to Figure 1-1).
Parameters
Sym
Min
Typ
Max
Units
Conditions
GBWP
—
385
—
kHz
Phase Margin
PM
—
61
—
°
Slew Rate
SR
—
0.15
—
V/µs
Input Noise Voltage
Eni
—
5.0
—
µVp-p
Input Noise Voltage Density
eni
—
34
—
nV/√Hz
f = 10 kHz
Input Noise Current Density
ini
—
0.6
—
fA/√Hz
f = 1 kHz
AC Response
Gain Bandwidth Product
G = +1 V/V
Noise
TABLE 1-3:
f = 0.1 Hz to 10 Hz
TEMPERATURE SPECIFICATIONS
Electrical Characteristics: Unless otherwise indicated, VDD = +1.8V to +6.0V and VSS = GND.
Parameters
Sym
Min
Typ
Max
Units
Operating Temperature Range
TA
-40
—
+125
°C
Storage Temperature Range
TA
-65
—
+150
°C
Thermal Resistance, 8L-2x3 TDFN
θJA
—
41
—
°C/W
Thermal Resistance, 8L-SOIC
θJA
—
149.5
—
°C/W
Thermal Resistance, 14L-SOIC
θJA
—
95.3
—
°C/W
Thermal Resistance, 14L-TSSOP
θJA
—
100
—
°C/W
Conditions
Temperature Ranges
Note 1
Thermal Package Resistances
Note 1:
The internal junction temperature (TJ) must not exceed the absolute maximum specification of +150°C.
DS22182A-page 4
© 2009 Microchip Technology Inc.
MCP6051/2/4
1.3
Test Circuits
The circuit used for most DC and AC tests is shown in
Figure 1-1. This circuit can independently set VCM and
VOUT; see Equation 1-1. Note that VCM is not the
circuit’s common mode voltage ((VP + VM)/2), and that
VOST includes VOS plus the effects (on the input offset
error, VOST) of temperature, CMRR, PSRR and AOL.
CF
6.8 pF
RG
100 kΩ
VP
G DM = R F ⁄ R G
CB1
100 nF
MCP605X
V CM = ( V P + V DD ⁄ 2 ) ⁄ 2
VDD/2
CB2
1 µF
VIN–
V OST = V IN– – V IN+
V OUT = ( V DD ⁄ 2 ) + ( V P – V M ) + V OST ( 1 + G DM )
Where:
GDM = Differential Mode Gain
(V/V)
VCM = Op Amp’s Common Mode
Input Voltage
(V)
© 2009 Microchip Technology Inc.
VDD
VIN+
EQUATION 1-1:
VOST = Op Amp’s Total Input Offset
Voltage
RF
100 kΩ
(mV)
VM
RG
100 kΩ
RL
10 kΩ
RF
100 kΩ
CF
6.8 pF
VOUT
CL
60 pF
VL
FIGURE 1-1:
AC and DC Test Circuit for
Most Specifications.
DS22182A-page 5
MCP6051/2/4
NOTES:
DS22182A-page 6
© 2009 Microchip Technology Inc.
MCP6051/2/4
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
27%
6.5
6.0
5.5
5.0
4.5
4.0
3.0
2.5
2.0
3.5
3.4
3.1
2.8
2.5
2.2
1.9
Input Offset Drift with Temperature (µV/°C)
1.6
20
16
12
8
4
0
-4
-8
-12
0%
TA = -40°C
TA = +25°C
TA = +85°C
TA = +125°C
1.3
3%
Representative Part
1.0
6%
VDD = 3.0V
0.7
9%
750
600
450
300
150
0
-150
-300
-450
-600
-750
0.4
12%
-16
-0.5
150
120
90
60
30
0
15%
FIGURE 2-2:
Input Offset Voltage Drift
with VDD = 3.0V and TA ≤ +85°C.
Common Mode Input Voltage (V)
FIGURE 2-5:
Input Offset Voltage vs.
Common Mode Input Voltage with VDD = 3.0V.
1244 Samples
VDD = 3.0V
VCM = VDD/3
TA = +85°C to +125°C
24%
21%
18%
15%
12%
9%
6%
3%
20
16
12
8
4
0
-4
-8
-12
-16
0%
-20
Percentage of Occurences
FIGURE 2-4:
Input Offset Voltage vs.
Common Mode Input Voltage with VDD = 6.0V.
-0.5
18%
Input Offset Voltage with
Input Offset Voltage (µV)
21%
Common Mode Input Voltage (V)
1244 Samples
VDD = 3.0V
VCM = VDD/3
TA = -40°C to +85°C
-20
Percentage of Occurences
24%
-30
Input Offset Voltage (µV)
FIGURE 2-1:
VDD = 3.0V.
27%
-60
-90
-120
0%
1.5
2%
Representative Part
T A = -40°C
T A = +25°C
T A = +85°C
T A = +125°C
1.0
4%
0.5
6%
VDD = 6.0V
0.0
8%
750
600
450
300
150
0
-150
-300
-450
-600
-750
0.1
10%
1244 Samples
VDD = 3.0V
VCM = VDD /3
-0.2
12%
Input Offset Voltage (µV)
14%
-150
Percentage of Occurences
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.
Input Offset Drift with Temperature (µV/°C)
FIGURE 2-3:
Input Offset Voltage Drift
with VDD = 3.0V and TA ≥ +85°C.
© 2009 Microchip Technology Inc.
FIGURE 2-6:
Input Offset Voltage vs.
Common Mode Input Voltage with VDD = 1.8V.
DS22182A-page 7
MCP6051/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.
Output Voltage (V)
750
600
450
300
150
0
-150
-300
-450
-600
-750
6.5
6.0
5.5
5.0
4.5
FIGURE 2-10:
Input Noise Voltage Density
vs. Common Mode Input Voltage.
Input Offset Voltage vs.
+125°C
+85°C
+25°C
-40°C
PSRR-
100
CMRR, PSRR (dB)
Representative Part
Representative Part
90
80
CMRR
70
60
PSRR+
50
40
6.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
30
20
10
10
Power Supply Voltage (V)
FIGURE 2-8:
Input Offset Voltage vs.
Power Supply Voltage.
PSRR,CMRR (dB)
100
10
0.1
0.1
11
10 10
100100
1k1000 10k10000100k100000
Frequency (Hz)
FIGURE 2-9:
vs. Frequency.
DS22182A-page 8
Input Noise Voltage Density
100
100
FIGURE 2-11:
Frequency.
1,000
Input Noise Voltage Density
(nV/√Hz)
4.0
Common Mode Input Voltage (V)
110
TA =
TA =
TA =
TA =
1.0
Input Offset Voltage (µV)
FIGURE 2-7:
Output Voltage.
3.5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-350
f = 10 kHz
VDD = 6.0V
3.0
VDD = 1.8V
2.5
-250
2.0
VDD = 3.0V
-150
1.5
VDD = 6.0V
-50
1.0
50
0.5
150
50
45
40
35
30
25
20
15
10
5
0
0.0
Representative Part
250
-0.5
Input Noise Voltage Density
(nV/√Hz)
Input Offset Voltage (µV)
350
110
105
100
95
90
85
80
75
70
65
60
1k
10k
1000
10000
Frequency (Hz)
100k 1000000
1M
100000
CMRR, PSRR vs.
CMRR (VDD = 6.0V, VCM = -0.3V to 6.3V)
PSRR (VDD = 1.8V to 6.0V, VCM = VSS)
-50
-25
FIGURE 2-12:
Temperature.
0
25
50
75
100
Ambient Temperature (°C)
125
CMRR, PSRR vs. Ambient
© 2009 Microchip Technology Inc.
MCP6051/2/4
0.35
0.30
0.25
0.20
0.15
0.10
0.05
0.00
-0.05
-0.10
-0.15
-0.20
-0.25
-0.30
-0.35
45
VDD - VOH @ VDD = 6.0V
@ VDD = 3.0V
@ VDD = 1.8V
VOL - VSS @ VDD = 1.8V
VOL - VSS @ VDD = 3.0V
VOL - VSS @ VDD = 6.0V
0
25
50
75
100
Ambient Temperature (°C)
25
VDD = 1.8V
VCM = 0.9VDD
20
125
-50
45
Quiescent Current (uA)
VDD = 6.0V
VCM = VDD
1000
Input Bias Current
100
10
Input Offset Current
-25
0
25
50
75
100
Ambient Temperature (°C)
125
FIGURE 2-16:
Quiescent Current vs
Ambient Temperature with VCM = 0.9VDD.
10000
VDD = 6.0V
VCM = 0.9VDD
40
35
30
25
20
TA = +125°C
TA = +85°C
TA = +25°C
TA = -40°C
15
10
5
120
100
TA = +85°C
1
0.0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0 5.5 6.0
Open-Loop Gain (dB)
VDD = 6.0V
TA = +125°C
© 2009 Microchip Technology Inc.
7.0
0
Open-Loop Gain
100
-30
80
-60
Open-Loop Phase
60
-90
40
-120
20
-150
0
-20
-180
VDD = 6.0V
0.1
1.E-01
1
10
100
1k
-210
10k 100k 1M 10M
1.E+00 1.E+01 1.E+02 1.E+03 1.E+04 1.E+05 1.E+06 1.E+07
Common Mode Input Votlage (V)
FIGURE 2-15:
Input Bias Current vs.
Common Mode Input Voltage.
6.5
FIGURE 2-17:
Quiescent Current vs.
Power Supply Voltage with VCM = 0.9VDD.
10000
1000
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
Power Supply Voltage (V)
Open-Loop Phase (°)
FIGURE 2-14:
Input Bias, Offset Currents
vs. Ambient Temperature.
2.0
125
1.5
45
65
85
105
Ambient Temperature (°C)
0.0
25
1.0
0
1
0.5
Input Bias and Offset
Currents (pA)
30
10
-25
FIGURE 2-13:
Common Mode Input
Voltage Range Limit vs. Ambient Temperature.
Input Bias Current (pA)
35
15
-50
10
VDD = 6.0V
VCM = 0.9VDD
40
Quiescent Current
(µA/Amplifier)
Common Mode Input Voltage
Range Limit (V)
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.
Frequency (Hz)
FIGURE 2-18:
Frequency.
Open-Loop Gain, Phase vs.
DS22182A-page 9
MCP6051/2/4
RL = 100 kΩ
VSS + 0.2V < VOUT < VDD - 0.2V
160
0.7
140
0.6
120
Gain Bandwidth Product
0.5
100
0.4
80
0.3
60
0.2
VDD = 6.0V
G = +1 V/V
0.1
40
Phase Margin
20
5.5
6.0
Common Mode Input Voltage (V)
FIGURE 2-20:
DC Open-Loop Gain vs.
Output Voltage Headroom.
110
100
90
Input Referred
80
100
100
1k
1000
10k
100k
10000
100000
Frequency (Hz)
1M
1000000
FIGURE 2-21:
Channel-to-Channel
Separation vs. Frequency ( MCP6052/4 only).
DS22182A-page 10
160
0.7
140
0.6
Gain Bandwidth Product
120
0.5
100
0.4
80
0.3
60
0.2
VDD = 6.0V
G = +1 V/V
0.1
-50
Phase Margin
40
20
0
-25
0
25
50
75 100 125
Ambient Temperature (°C)
FIGURE 2-23:
Gain Bandwidth Product,
Phase Margin vs. Ambient Temperature.
Gain Bandwidth Product
(MHz)
120
180
0.8
0.0
140
130
0.9
Phase Margin (°)
150
145
VDD = 6.0V
140
135
130
125
120
VDD = 1.8V
115
110
Large Signal AOL
105
100
0.00
0.05
0.10
0.15
0.20
0.25
Output Voltage Headroom
VDD - VOH or VOL - VSS (V)
FIGURE 2-22:
Gain Bandwidth Product,
Phase Margin vs. Common Mode Input Voltage.
0.9
180
0.8
160
0.7
140
0.6
Gain Bandwidth Product
120
0.5
100
0.4
80
0.3
60
0.2
VDD = 1.8V
G = +1 V/V
0.1
Phase Margin
0.0
-50
-25
0
25
50
75 100
Ambient Temperature (°C)
40
Phase Margin (°)
2.5 3.0 3.5 4.0 4.5 5.0
Power Supply Voltage (V)
0
-0.5
0.0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
4.0
4.5
5.0
5.5
6.0
6.5
2.0
FIGURE 2-19:
DC Open-Loop Gain vs.
Power Supply Voltage.
DC-Open Loop Gain (dB)
180
0.8
0.0
1.5
Channel to Channel Separation
(dB)
0.9
Phase Margin (°)
Gain Bandwidth Product
(MHz)
150
145
140
135
130
125
120
115
110
105
100
Gain Bandwidth Product
(MHz)
DC-Open Loop Gain (dB)
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.
20
0
125
FIGURE 2-24:
Gain Bandwidth Product,
Phase Margin vs. Ambient Temperature.
© 2009 Microchip Technology Inc.
MCP6051/2/4
35
T A = -40°C
T A = +25°C
T A = +85°C
T A = +125°C
30
25
20
15
10
5
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0
Output Voltage Headroom (mV)
40
0.0
Output Short Circuit Current
(mA)
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.
16.0
14.0
10.0
8.0
6.0
2.0
0.0
-50
Slew Rate (V/µs)
VDD = 1.8V
1
Falling Edge, VDD = 6.0V
Falling Edge, VDD = 1.8V
0.20
0.15
0.10
Rising Edge, VDD = 6.0V
Rising Edge, VDD = 1.8V
0.05
10k
100k
10000
100000
Frequency (Hz)
Ratio of Output Headroom to
Current (mV/mA)
FIGURE 2-26:
Frequency.
70
65
60
55
50
45
40
35
30
25
20
15
10
Output Voltage Swing vs.
(VOL - VSS)/(-IOUT)
VDD = 1.8V
(VDD - VOH)/IOUT
(VOL - VSS)/(-IOUT)
VDD = 6.0V
1
Output Current (mA)
-50
-25
FIGURE 2-29:
Temperature.
10
FIGURE 2-27:
Ratio of Output Voltage
Headroom to Output Current vs. Output Current.
© 2009 Microchip Technology Inc.
0.00
1M
1000000
(VDD - VOH)/IOUT
0.1
125
0.30
0.25
1k
1000
0
25
50
75
100
Ambient Temperature (°C)
FIGURE 2-28:
Output Voltage Headroom
vs. Ambient Temperature.
VDD = 6.0V
0.1
100
100
-25
Output Voltage (20mV/div)
Output Voltage Swing (V P-P)
10
VSS - VOL
4.0
Power Supply Voltage (V)
FIGURE 2-25:
Ouput Short Circuit Current
vs. Power Supply Voltage.
VDD - VOH
12.0
0
25
50
75
100
Ambient Temperature (°C)
125
Slew Rate vs. Ambient
VDD = 6.0V
G = +1 V/V
Time (2 µs/div)
FIGURE 2-30:
Pulse Response.
Small Signal Non-Inverting
DS22182A-page 11
MCP6051/2/4
Note: Unless otherwise indicated, TA = +25°C, VDD = +1.8V to +6.0V, VSS = GND, VCM = VDD/2, VOUT ≈ VDD/2,
VL = VDD/2, RL = 100 kΩ to VL and CL = 60 pF.
Output Voltage (20mV/div)
7.0
6.0
VIN
4.0
3.0
2.0
1.0
VDD = 6.0V
G = +2 V/V
0.0
-1.0
Time (2 µs/div)
6.0
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
Small Signal Inverting Pulse
Time (0.1 ms/div)
FIGURE 2-34:
The MCP6051/2/4 Shows
No Phase Reversal.
10000
VDD = 6.0V
G = +1 V/V
Closed Loop Output
Impedance (Ω)
FIGURE 2-31:
Response.
Output Voltage (V)
VOUT
5.0
Output Voltage (V)
VDD = 6.0V
G = -1 V/V
1000
100
GN :
101 V/V
11 V/V
1 V/V
10
1
1.0E+01
10
Time (0.02 ms/div)
5.5
5.0
4.5
4.0
3.5
3.0
2.5
2.0
1.5
1.0
0.5
0.0
-0.5
Large Signal Non-Inverting
DS22182A-page 12
1.0E+04
1k
10k
Frequency (Hz)
1.0E+05
100k
1.0E+06
1M
1.E-03
1m
1.E-04
100µ
10µ
1.E-05
VDD = 6.0V
G = -1 V/V
1µ
1.E-06
100n
1.E-07
10n
1.E-08
1n
1.E-09
100p
1.E-10
10p
1.E-11
1p
1.E-12
Time (0.02 ms/div)
FIGURE 2-33:
Response.
1.0E+03
FIGURE 2-35:
Closed Loop Output
Impedance vs. Frequency.
-IIN (A)
Output Voltage (V)
FIGURE 2-32:
Pulse Response.
1.0E+02
100
Large Signal Inverting Pulse
TA = -40 °C
TA = +25°C
TA = +85°C
TA = +125°C
-1.0 -0.9 -0.8 -0.7 -0.6 -0.5 -0.4 -0.3 -0.2 -0.1 0.0
VIN (V)
FIGURE 2-36:
Measured Input Current vs.
Input Voltage (below VSS).
© 2009 Microchip Technology Inc.
MCP6051/2/4
3.0
PIN DESCRIPTIONS
Descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
PIN FUNCTION TABLE
MCP6051
SOIC
MCP6052
2x3 TDFN
SOIC
MCP6054
2x3 TDFN
SOIC,
TSSOP
Symbol
Description
6
6
1
1
1
VOUT, VOUTA
Analog Output (op amp A)
2
2
2
2
2
VIN–, VINA–
Inverting Input (op amp A)
3
3
3
3
3
VIN+, VINA+
Non-inverting Input (op amp A)
7
7
8
8
4
VDD
Positive Power Supply
—
—
5
5
5
VINB+
Non-inverting Input (op amp B)
—
—
6
6
6
VINB–
Inverting Input (op amp B)
—
—
7
7
7
VOUTB
Analog Output (op amp B)
—
—
—
—
8
VOUTC
Analog Output (op amp C)
—
—
—
—
9
VINC–
Inverting Input (op amp C)
—
—
—
—
10
VINC+
4
4
4
4
11
VSS
—
—
—
—
12
VIND+
Non-inverting Input (op amp D)
—
—
—
—
13
VIND–
Inverting Input (op amp D)
Non-inverting Input (op amp C)
Negative Power Supply
Analog Output (op amp D)
—
—
—
—
14
VOUTD
1, 5, 8
1, 5, 8
—
—
—
NC
No Internal Connection
—
9
—
9
—
EP
Exposed Thermal Pad (EP); must be
connected to VSS.
3.1
Analog Outputs
The output pins are low-impedance voltage sources.
3.2
Analog Inputs
The non-inverting and inverting inputs are highimpedance CMOS inputs with low bias currents.
3.3
Power Supply Pins
The positive power supply (VDD) is 1.8V to 6.0V higher
than the negative power supply (VSS). For normal
operation, the other pins are at voltages between VSS
and VDD.
Typically, these parts are used in a single (positive)
supply configuration. In this case, VSS is connected to
ground and VDD is connected to the supply. VDD will
need bypass capacitors.
3.4
Exposed Thermal Pad (EP)
There is an internal electrical connection between the
Exposed Thermal Pad (EP) and the VSS pin; they must
be connected to the same potential on the Printed
Circuit Board (PCB).
© 2009 Microchip Technology Inc.
DS22182A-page 13
MCP6051/2/4
NOTES:
DS22182A-page 14
© 2009 Microchip Technology Inc.
MCP6051/2/4
4.0
APPLICATION INFORMATION
VDD
The MCP6051/2/4 family of op amps is manufactured
using Microchip’s state-of-the-art CMOS process and
is specifically designed for low-power, high precision
applications.
4.1
D1
R1
Rail-to-Rail Input
4.1.1
PHASE REVERSAL
R2
INPUT VOLTAGE AND CURRENT
LIMITS
The ESD protection on the inputs can be depicted as
shown in Figure 4-1. This structure was chosen to
protect the input transistors and to minimize input bias
current (IB). The input ESD diodes clamp the inputs
when they try to go more than one diode drop below
VSS. They also clamp any voltage that go too far above
VDD; their breakdown voltage is high enough to allow
normal operation and low enough to bypass ESD
events within the specified limits.
VDD Bond
Pad
VIN+ Bond
Pad
Bond
VIN–
Pad
VSS Bond
Pad
FIGURE 4-1:
Structures.
R3
VSS – (minimum expected V1)
2 mA
VSS – (minimum expected V2)
R2 >
2 mA
R1 >
FIGURE 4-2:
Inputs.
Simplified Analog Input ESD
In order to prevent damage and/or improper operation
of these op amps, the circuit they are in must limit the
voltages and currents at the VIN+ and VIN- pins (see
Absolute Maximum Ratings at the beginning of
Section 1.0 “Electrical Characteristics”). Figure 4-2
shows the recommended approach to protecting these
inputs. The internal ESD diodes prevent the input pins
(VIN+ and VIN-) from going too far below ground, and
the resistors R1 and R2 limit the possible current drawn
out of the input pins. Diodes D1 and D2 prevent the
input pins (VIN+ and VIN-) from going too far above
VDD. When implemented as shown, resistors R1 and
R2 also limit the current through D1 and D2.
© 2009 Microchip Technology Inc.
Protecting the Analog
It is also possible to connect the diodes to the left of the
resistors R1 and R2. In this case, the currents through
the diodes D1 and D2 need to be limited by some other
mechanism. The resistors then serve as in-rush current
limiters; the DC currents into the input pins (VIN+ and
VIN-) should be very small. A significant amount of
current can flow out of the inputs when the common
mode voltage (VCM) is below ground (VSS). (See
Figure 2-36).
4.1.3
Input
Stage
MCP605X
V2
The MCP6051/2/4 op amps are designed to prevent
phase reversal when the input pins exceed the supply
voltages. Figure 2-34 shows the input voltage
exceeding the supply voltage without any phase
reversal.
4.1.2
D2
V1
NORMAL OPERATION
The input stage of the MCP6051/2/4 op amps uses two
differential input stages in parallel. One operates at a
low common mode input voltage (VCM), while the other
operates at a high VCM. With this topology, the device
operates with a VCM up to 300 mV above VDD and
300 mV below VSS. (See Figure 2-13) .The input offset
voltage is measured at VCM = VSS – 0.3V and
VDD + 0.3V to ensure proper operation.
The transition between the input stages occurs when
VCM is near VDD – 1.1V (See Figures 2-4, 2-5 and
Figure 2-6). For the best distortion performance and
gain linearity, with non-inverting gains, avoid this region
of operation.
4.2
Rail-to-Rail Output
The output voltage range of the MCP6051/2/4 op amps
is VSS + 15 mV (minimum) and VDD – 15 mV
(maximum) when RL = 10 kΩ is connected to VDD/2
and VDD = 6.0V. Refer to Figures 2-27 and 2-28 for
more information.
DS22182A-page 15
MCP6051/2/4
4.3
Capacitive Loads
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. While a unity-gain buffer (G = +1) is the most
sensitive to capacitive loads, all gains show the same
general behavior.
When driving large capacitive loads with these op
amps (e.g., > 100 pF when G = +1), a small series
resistor at the output (RISO in Figure 4-3) improves the
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will be generally lower than the bandwidth
with no capacitance load.
–
RISO
MCP605X
+
VIN
VOUT
CL
FIGURE 4-3:
Output Resistor, RISO
Stabilizes Large Capacitive Loads.
Figure 4-4 gives recommended RISO values for
different capacitive loads and gains. The x-axis is the
normalized load capacitance (CL/GN), where GN is the
circuit's noise gain. For non-inverting gains, GN and the
Signal Gain are equal. For inverting gains, GN is
1+|Signal Gain| (e.g., -1 V/V gives GN = +2 V/V).
After selecting RISO for your circuit, double-check the
resulting frequency response peaking and step
response overshoot. Modify RISO’s value until the
response is reasonable. Bench evaluation and
simulations with the MCP6051/2/4 SPICE macro
model are very helpful.
4.4
Supply Bypass
With this family of operational amplifiers, the power
supply pin (VDD for single-supply) should have a local
bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm
for good high frequency performance. It can use a bulk
capacitor (i.e., 1 µF or larger) within 100 mm to provide
large, slow currents. This bulk capacitor can be shared
with other analog parts.
4.5
Unused Op Amps
An unused op amp in a quad package (MCP6054)
should be configured as shown in Figure 4-5. These
circuits prevent the output from toggling and causing
crosstalk. Circuits A sets the op amp at its minimum
noise gain. The resistor divider produces any desired
reference voltage within the output voltage range of the
op amp; the op amp buffers that reference voltage.
Circuit B uses the minimum number of components
and operates as a comparator, but it may draw more
current.
¼ MCP6054 (A)
¼ MCP6054 (B)
VDD
R1
R2
VDD
VDD
VREF
Recommended R
ISO
(Ω)
10000
VDD = 6.0 V
RL = 100 kΩ
1000
GN:
1 V/V
2 V/V
≥ 5 V/V
100
R2
V REF = V DD × -------------------R1 + R2
FIGURE 4-5:
Unused Op Amps.
10
1
1.E-11
10p
1.E-10
1.E-09
1.E-08
1.E-07
1.E-06
100p
1n
10n
0.1µ
1µ
Normalized Load Capacitance; CL/GN (F)
FIGURE 4-4:
Recommended RISO Values
for Capacitive Loads.
DS22182A-page 16
© 2009 Microchip Technology Inc.
MCP6051/2/4
4.6
PCB Surface Leakage
4.7
In applications where low input bias current is critical,
Printed Circuit Board (PCB) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 1012Ω. A 5V difference would
cause 5 pA of current to flow; which is greater than the
MCP6051/2/4 family’s bias current at +25°C (±1.0 pA,
typical).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure 4-6.
Guard Ring
VIN– VIN+
VSS
Application Circuits
4.7.1
GYRATOR
The MCP6051/2/4 op amps can be used in gyrator
applicaitons. The gyrator is an electric circuit which can
make a capacitive circuit behave inductively. Figure 47 shows an example of a gyrator simulating
inductance, with an approximately equivalent circuit
below. The two ZIN have similar values in typical
applications. The primary application for a gyrator is to
reduce the size and cost of a system by removing the
need for bulky, heavy and expensive inductors. For
example, RLC bandpass filter characteristics can be
realized with capacitors, resistors and operational
amplifiers without using inductors. Moreover, gyrators
will typically have higher accuracy than real inductors,
due to the lower cost of precision capacitors than
inductors.
.
RL
ZIN
FIGURE 4-6:
for Inverting Gain.
1.
2.
MCP6051
C
Example Guard Ring Layout
Non-inverting Gain and Unity-Gain Buffer:
a) Connect the non-inverting pin (VIN+) to the
input with a wire that does not touch the
PCB surface.
b) Connect the guard ring to the inverting input
pin (VIN–). This biases the guard ring to the
common mode input voltage.
Inverting Gain and Transimpedance Gain
Amplifiers (convert current to voltage, such as
photo detectors):
a) Connect the guard ring to the non-inverting
input pin (VIN+). This biases the guard ring
to the same reference voltage as the op
amp (e.g., VDD/2 or ground).
b) Connect the inverting pin (VIN–) to the input
with a wire that does not touch the PCB
surface.
© 2009 Microchip Technology Inc.
Z IN = R L + j ω L
VOUT
Gyrator
R
L = RL RC
ZIN
RL
Equivalent Circuit
L
FIGURE 4-7:
Gyrator.
DS22182A-page 17
MCP6051/2/4
4.7.2
INSTRUMENTATION AMPLIFIER
The MCP6051/2/4 op amps are well suited for conditioning sensor signals in battery-powered applications.
Figure 4-8 shows a two op amp instrumentation
amplifier, using the MCP6052, that works well for
applications requiring rejection of common mode noise
at higher gains. The reference voltage (VREF) is
supplied by a low impedance source. In single supply
applications, VREF is typically VDD/2.
R2
PRECISION COMPARATOR
Use high gain before a comparator to improve the
latter’s input offset performance. Figure 4-9 shows a
gain of 11 V/V placed before a comparator. The
reference voltage VREF can be any value between the
supply rails.
VIN
MCP6051
RG
VREF R1
4.7.3
R2
R1
VOUT
1 MΩ
100 kΩ
MCP6541
VOUT
VREF
V2
½
MCP6052
½
MCP6052
V1
FIGURE 4-9:
Comparator.
Precision, Non-inverting
R
2R
V OUT = ( V 1 – V 2 ) ⎛⎝ 1 + -----1- + --------1-⎞⎠ + V REF
R2 RG
FIGURE 4-8:
Two Op Amp
Instrumentation Amplifier.
To obtain the best CMRR possible, and not limit the
performance by the resistor tolerances, set a high gain
with the RG resistor.
DS22182A-page 18
© 2009 Microchip Technology Inc.
MCP6051/2/4
5.0
DESIGN AIDS
Microchip provides the basic design tools needed for
the MCP6051/2/4 family of op amps.
5.1
SPICE Macro Model
The latest SPICE macro model for the MCP6051/2/4
op amps is available on the Microchip web site at
www.microchip.com. This model is intended to be an
initial design tool that works well in the op amp’s linear
region of operation over the temperature range. See
the model file for information on its capabilities.
Bench testing is a very important part of any design and
cannot be replaced with simulations. Also, simulation
results using this macro model need to be validated by
comparing them to the data sheet specifications and
characteristic curves.
5.2
FilterLab® Software
Microchip’s FilterLab® software is an innovative
software tool that simplifies analog active filter (using
op amps) design. Available at no cost from the
Microchip web site at www.microchip.com/filterlab, the
FilterLab design tool provides full schematic diagrams
of the filter circuit with component values. It also
outputs the filter circuit in SPICE format, which can be
used with the macro model to simulate actual filter
performance.
5.3
Mindi™ Circuit Designer &
Simulator
Microchip’s Mindi™ Circuit Designer & Simulator aids
in the design of various circuits useful for active filter,
amplifier and power-management applications. It is a
free online circuit designer & simulator available from
the Microchip web site at www.microchip.com/mindi.
This interactive circuit designer & simulator enables
designers to quickly generate circuit diagrams,
simulate circuits. Circuits developed using the Mindi
Circuit Designer & Simulator can be downloaded to a
personal computer or workstation.
5.4
Microchip Advanced Part Selector
(MAPS)
MAPS is a software tool that helps semiconductor
professionals efficiently identify Microchip devices that
fit a particular design requirement. Available at no cost
from the Microchip website at www.microchip.com/
maps, the MAPS is an overall selection tool for
Microchip’s product portfolio that includes Analog,
Memory, MCUs and DSCs. Using this tool you can
define a filter to sort features for a parametric search of
devices and export side-by-side technical comparasion
reports. Helpful links are also provided for Datasheets,
Purchase, and Sampling of Microchip parts.
© 2009 Microchip Technology Inc.
5.5
Analog Demonstration and
Evaluation Boards
Microchip offers a broad spectrum of Analog
Demonstration and Evaluation Boards that are
designed to help you achieve faster time to market. For
a complete listing of these boards and their
corresponding user’s guides and technical information,
visit the Microchip web site at www.microchip.com/
analogtools.
Some boards that are especially useful are:
•
•
•
•
•
•
•
MCP6XXX Amplifier Evaluation Board 1
MCP6XXX Amplifier Evaluation Board 2
MCP6XXX Amplifier Evaluation Board 3
MCP6XXX Amplifier Evaluation Board 4
Active Filter Demo Board Kit
5/6-Pin SOT-23 Evaluation Board, P/N VSUPEV2
8-Pin SOIC/MSOP/TSSOP/DIP Evaluation Board,
P/N SOIC8EV
• 14-Pin SOIC/TSSOP/DIP Evaluation Board,
P/N SOIC14EV
5.6
Application Notes
The following Microchip Analog Design Note and
Application Notes are available on the Microchip web
site at www.microchip.com/appnotes and are
recommended as supplemental reference resources:
• ADN003: “Select the Right Operational Amplifier
for your Filtering Circuits”, DS21821
• AN722: “Operational Amplifier Topologies and DC
Specifications”, DS00722
• AN723: “Operational Amplifier AC Specifications
and Applications”, DS00723
• AN884: “Driving Capacitive Loads With Op
Amps”, DS00884
• AN990: “Analog Sensor Conditioning Circuits –
An Overview”, DS00990
• AN1177: “Op Amp Precision Design: DC Errors”,
DS01177
• AN1228: “Op Amp Precision Design: Random
Noise”, DS01228
These application notes and others are listed in the
design guide:
• “Signal Chain Design Guide”, DS21825
DS22182A-page 19
MCP6051/2/4
NOTES:
DS22182A-page 20
© 2009 Microchip Technology Inc.
MCP6051/2/4
6.0
PACKAGING INFORMATION
6.1
Package Marking Information
8-Lead SOIC (150 mil) (MCP6051, MCP6052)
XXXXXXXX
XXXXYYWW
NNN
Example:
MCP6051E
e3
SN^^0919
256
8-Lead 2x3 TDFN (MCP6051, MCP6052)
Example:
XXX
YWW
NN
AHA
919
25
14-Lead SOIC (150 mil) (MCP6054)
Example:
XXXXXXXXXXX
XXXXXXXXXXX
YYWWNNN
14-Lead TSSOP (MCP6054)
XXXXXXXX
YYWW
NNN
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
MCP6054
e3
E/SL^^
0919256
Example:
MCP6054E
0919
256
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2009 Microchip Technology Inc.
DS22182A-page 21
MCP6051/2/4
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© 2009 Microchip Technology Inc.
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$ % % " %
DS22182A-page 25
MCP6051/2/4
12 &
!"#$%
2% & %! % 3
%% 144)))& &4
" )
3 ' % 3
$ % % " %
D
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1
2
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e
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c
φ
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5%
& 6&%
7!&( $
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, & "-"%!" &"$ %! "$ %! % # ".&&
& "% -/.
0+1 0 & % # % ! ))%!%% -21 $ & '! ! )%!%% '$$& % ! " ) + >.0
DS22182A-page 26
© 2009 Microchip Technology Inc.
MCP6051/2/4
&
2% & %! % 3
%% 144)))& &4
© 2009 Microchip Technology Inc.
" )
3 ' % 3
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DS22182A-page 27
MCP6051/2/4
12 &
03 3 ) 022 !"0 %
2% & %! % 3
%% 144)))& &4
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3 ' % 3
$ % % " %
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1 2
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DS22182A-page 28
© 2009 Microchip Technology Inc.
MCP6051/2/4
APPENDIX A:
REVISION HISTORY
Revision A (May 2009)
• Original Release of this Document.
© 2009 Microchip Technology Inc.
DS22182A-page 29
MCP6051/2/4
NOTES:
DS22182A-page 30
© 2009 Microchip Technology Inc.
MCP6051/2/4
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
Device:
PART NO.
X
/XX
Device
Temperature
Range
Package
MCP6051:
MCP6051T:
MCP6052:
MCP6052T:
MCP6054:
MCP6054T:
Temperature Range: E
Package:
Single Op Amp
Single Op Amp (Tape and Reel)
(SOIC and 2x3 TDFN)
Dual Op Amp
Dual Op Amp (Tape and Reel)
(SOIC and 2x3 TDFN)
Quad Op Amp
Quad Op Amp (Tape and Reel)
(SOIC and TSSOP)
Examples:
a)
b)
MCP6051-E/SN:
MCP6051T-E/SN:
c)
d)
MCP6051-E/MNY:
MCP6051T-E/MNY:
a)
b)
MCP6052-E/SN:
MCP6052T-E/SN:
c)
d)
MCP6052-E/MNY:
MCP6052T-E/MNY:
a)
b)
MCP6054-E/SL:
MCP6054T-E/SL:
c)
d)
MCP6054-E/ST:
MCP6054T-E/ST:
= -40°C to +125°C
MNY *
SL =
SN =
ST =
= Plastic Dual Flat, No Lead, (2x3 TDFN ) 8-lead
Plastic SOIC (150 mil Body), 14-lead
Plastic SOIC, (150 mil Body), 8-lead
Plastic TSSOP (4.4mm Body), 14-lead
* Y = Nickel palladium gold manufacturing designator. Only
available on the TDFN package.
© 2009 Microchip Technology Inc.
8LD SOIC package
Tape and Reel,
8LD SOIC package
8LD 2x3 TDFN package
Tape and Reel,
8LD 2x3 TDFN package
8LD SOIC package
Tape and Reel,
8LD SOIC package
8LD 2x3 TDFN package
Tape and Reel
8LD 2x3 TDFN package
14LD SOIC package
Tape and Reel,
14LD SOIC package
14LD TSSOP package
Tape and Reel,
14LD TSSOP package
DS22182A-page 31
MCP6051/2/4
NOTES:
DS22182A-page 32
© 2009 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
the buyer’s risk, and the buyer agrees to defend, indemnify and
hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, KEELOQ logo, MPLAB, PIC, PICmicro,
PICSTART, rfPIC, SmartShunt and UNI/O are registered
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
FilterLab, Hampshire, Linear Active Thermistor, MXDEV,
MXLAB, SEEVAL, SmartSensor and The Embedded Control
Solutions Company are registered trademarks of Microchip
Technology Incorporated in the U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, dsSPEAK, ECAN,
ECONOMONITOR, FanSense, In-Circuit Serial
Programming, ICSP, ICEPIC, Mindi, MiWi, MPASM, MPLAB
Certified logo, MPLIB, MPLINK, mTouch, nanoWatt XLP,
PICkit, PICDEM, PICDEM.net, PICtail, PIC32 logo, PowerCal,
PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select
Mode, Total Endurance, TSHARC, WiperLock and ZENA are
trademarks of Microchip Technology Incorporated in the
U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2009, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2009 Microchip Technology Inc.
DS22182A-page 33
WORLDWIDE SALES AND SERVICE
AMERICAS
ASIA/PACIFIC
ASIA/PACIFIC
EUROPE
Corporate Office
2355 West Chandler Blvd.
Chandler, AZ 85224-6199
Tel: 480-792-7200
Fax: 480-792-7277
Technical Support:
http://support.microchip.com
Web Address:
www.microchip.com
Asia Pacific Office
Suites 3707-14, 37th Floor
Tower 6, The Gateway
Harbour City, Kowloon
Hong Kong
Tel: 852-2401-1200
Fax: 852-2401-3431
India - Bangalore
Tel: 91-80-3090-4444
Fax: 91-80-3090-4080
India - New Delhi
Tel: 91-11-4160-8631
Fax: 91-11-4160-8632
Austria - Wels
Tel: 43-7242-2244-39
Fax: 43-7242-2244-393
Denmark - Copenhagen
Tel: 45-4450-2828
Fax: 45-4485-2829
India - Pune
Tel: 91-20-2566-1512
Fax: 91-20-2566-1513
France - Paris
Tel: 33-1-69-53-63-20
Fax: 33-1-69-30-90-79
Japan - Yokohama
Tel: 81-45-471- 6166
Fax: 81-45-471-6122
Germany - Munich
Tel: 49-89-627-144-0
Fax: 49-89-627-144-44
Atlanta
Duluth, GA
Tel: 678-957-9614
Fax: 678-957-1455
Boston
Westborough, MA
Tel: 774-760-0087
Fax: 774-760-0088
Chicago
Itasca, IL
Tel: 630-285-0071
Fax: 630-285-0075
Cleveland
Independence, OH
Tel: 216-447-0464
Fax: 216-447-0643
Dallas
Addison, TX
Tel: 972-818-7423
Fax: 972-818-2924
Detroit
Farmington Hills, MI
Tel: 248-538-2250
Fax: 248-538-2260
Kokomo
Kokomo, IN
Tel: 765-864-8360
Fax: 765-864-8387
Los Angeles
Mission Viejo, CA
Tel: 949-462-9523
Fax: 949-462-9608
Santa Clara
Santa Clara, CA
Tel: 408-961-6444
Fax: 408-961-6445
Toronto
Mississauga, Ontario,
Canada
Tel: 905-673-0699
Fax: 905-673-6509
Australia - Sydney
Tel: 61-2-9868-6733
Fax: 61-2-9868-6755
China - Beijing
Tel: 86-10-8528-2100
Fax: 86-10-8528-2104
China - Chengdu
Tel: 86-28-8665-5511
Fax: 86-28-8665-7889
Korea - Daegu
Tel: 82-53-744-4301
Fax: 82-53-744-4302
China - Hong Kong SAR
Tel: 852-2401-1200
Fax: 852-2401-3431
Korea - Seoul
Tel: 82-2-554-7200
Fax: 82-2-558-5932 or
82-2-558-5934
China - Nanjing
Tel: 86-25-8473-2460
Fax: 86-25-8473-2470
Malaysia - Kuala Lumpur
Tel: 60-3-6201-9857
Fax: 60-3-6201-9859
China - Qingdao
Tel: 86-532-8502-7355
Fax: 86-532-8502-7205
Malaysia - Penang
Tel: 60-4-227-8870
Fax: 60-4-227-4068
China - Shanghai
Tel: 86-21-5407-5533
Fax: 86-21-5407-5066
Philippines - Manila
Tel: 63-2-634-9065
Fax: 63-2-634-9069
China - Shenyang
Tel: 86-24-2334-2829
Fax: 86-24-2334-2393
Singapore
Tel: 65-6334-8870
Fax: 65-6334-8850
China - Shenzhen
Tel: 86-755-8203-2660
Fax: 86-755-8203-1760
Taiwan - Hsin Chu
Tel: 886-3-6578-300
Fax: 886-3-6578-370
China - Wuhan
Tel: 86-27-5980-5300
Fax: 86-27-5980-5118
Taiwan - Kaohsiung
Tel: 886-7-536-4818
Fax: 886-7-536-4803
China - Xiamen
Tel: 86-592-2388138
Fax: 86-592-2388130
Taiwan - Taipei
Tel: 886-2-2500-6610
Fax: 886-2-2508-0102
China - Xian
Tel: 86-29-8833-7252
Fax: 86-29-8833-7256
Thailand - Bangkok
Tel: 66-2-694-1351
Fax: 66-2-694-1350
Italy - Milan
Tel: 39-0331-742611
Fax: 39-0331-466781
Netherlands - Drunen
Tel: 31-416-690399
Fax: 31-416-690340
Spain - Madrid
Tel: 34-91-708-08-90
Fax: 34-91-708-08-91
UK - Wokingham
Tel: 44-118-921-5869
Fax: 44-118-921-5820
China - Zhuhai
Tel: 86-756-3210040
Fax: 86-756-3210049
03/26/09
DS22182A-page 34
© 2009 Microchip Technology Inc.