AVAGO HCPL-7520 Isolated linear sensing ic Datasheet

HCPL-7520
Isolated Linear Sensing IC
Data Sheet
Lead (Pb) Free
RoHS 6 fully
compliant
RoHS 6 fully compliant options available;
-xxxE denotes a lead-free product
Description
Features
The HCPL-7520 isolated linear current sensing IC family
is designed for current sensing in low-power electronic
motor drives. In a typical implementa­tion, motor current
flows through an external resistor and the resulting
analog voltage drop is sensed by the HCPL-7520. An
output voltage is created on the other side of the HCPL7520 optical isolation barrier. This single-ended output
voltage is proportional to the motor current. Since
common-mode voltage swings of several hundred
volts in tens of nanoseconds are common in modern
switching inverter motor drives, the HCPL-7520 was
designed to ignore very high common-mode transient
slew rates (of at least 10 kV/µs).
•
•
•
•
•
•
•
The high CMR capability of the HCPL-7520 isolation
amplifier provides the precision and stability needed to
accurately monitor motor current in high noise motor
control environ­ments, providing for smoother control
(less “torque ripple”) in various types of motor control
applications.
The product can also be used for general analog signal
isolation applications. For general applications, we
recommend the HCPL-7520 (gain tolerance of ±5%).
The HCPL-7520 utilizes sigma-delta (Σ−∆) analog-todigital converter technology to delivery offset and gain
accuracy and stability over time and temper­a­ture. This
performance is delivered in a compact, auto-insert, 8pin DIP package that meets world­wide regulatory safety
standards. (A gull-wing surface mount option 300 is also
available).
15 kV/µs common-mode rejection at Vcm = 1000 V
Compact, auto-insertable 8-pin DIP package
60 ppm/°C gain drift vs. temperature
–0.6 mV input offset voltage
8 µV/°C input offset voltage vs. temperature
100 kHz bandwidth
0.06% non-linearity, single-ended amplifier output for
low power application.
• Worldwide safety approval:
UL 1577 (3750 Vrms/1 min.), CSA and IEC/EN/DIN EN
60747-5-2 (Option 060 only)
• Advanced sigma-delta (Σ−∆) A/D converter
technology
Applications
•
•
•
•
Low-power inverter current sensing
Motor phase and rail current sensing
Switched mode power supply signal isolation
General purpose low-power current sensing and
monitoring
• General purpose analog signal isolation
Functional Diagram
VDD1 1
IDD1
IDD2
8
VDD2
VIN+ 2
+
+
7
VOUT
VIN– 3
–
–
6
VREF
5
GND2
GND1 4
SHIELD
A 0.1 µF bypass capacitor must be connected between pins 1 and 4 and between pins 5 and 8.
CAUTION: It is advised that normal static precautions be taken in handling and assembly
of this component to prevent damage and /or degradation which may be induced by ESD.
Ordering Information
HCPL-7520 is UL Recognized with 3750 Vrms for 1 minute per UL1577.
Option
Part number
HCPL-7520
RoHS
Compliant
Non-RoHS
Compliant
-000E
No option
-300E
-300
X
X
-500E
-500
X
X
-060E
-060
-360E
-360
X
X
-560E
-560
X
X
Package
Surface
Mount
Gull Wing
Tape& Reel
IEC/EN/DIN
EN 60747-5-2 Quantity
50 per tube
300 mil DIP-8
50 per tube
X
X
1000 per reel
X
50 per tube
X
50 per tube
X
1000 per reel
To order, choose a part number from the part number column and combine with the desired option from the option
column to form an order entry.
Example 1:
HCPL-7520-560E to order product of Gull Wing Surface Mount package in Tape and Reel packaging
with IEC/EN/DIN EN 60747-5-2 Safety Approval in RoHS compliant.
Example 2:
HCPL-7520 to order product of 300 mil DIP package in tube packaging and non-RoHS compliant.
Option datasheets are available. Contact your Avago sales representative or authorized distributor for information.
Package Outline Drawings
HCPL-7520 Standard DIP Package
9.80 ± 0.25
(0.386 ± 0.010)
8
7
6
5
DATE CODE
A 7520
YYWW
1
1.19 (0.047) MAX.
3.56 ± 0.13
(0.140 ± 0.005)
2
3
7.62 ± 0.25
(0.300 ± 0.010)
4
1.78 (0.070) MAX.
6.35 ± 0.25
(0.250 ± 0.010)
4.70 (0.185) MAX.
0.51 (0.020) MIN.
2.92 (0.115) MIN.
1.080 ± 0.320
(0.043 ± 0.013)
0.65 (0.025) MAX.
2.54 ± 0.25
(0.100 ± 0.010)
5 TYP.
0.20 (0.008)
0.33 (0.013)
DIMENSIONS IN MILLIMETERS AND (INCHES).
NOTE: FLOATING LEAD PROTUSION IS 0.5 mm (20 mils) MAX.
HCPL-7520 Gull Wing Surface Mount Option 300 Outline Drawing
Land Pattern Recommendation
9.80 ± 0.25
(0.386 ± 0.010)
8
6
7
1.016 (0.040)
5
A 7520
6.350 ± 0.25
(0.250 ± 0.010)
YYWW
1
2
3
10.9 (0.430)
4
2.0 (0.080)
1.27 (0.050)
9.65 ± 0.25
(0.380 ± 0.010)
1.780
(0.070)
MAX.
1.19
(0.047)
MAX.
7.62 ± 0.25
(0.300 ± 0.010)
0.20 (0.008)
0.33 (0.013)
3.56 ± 0.13
(0.140 ± 0.005)
1.080 ± 0.320
(0.043 ± 0.013)
2.54
(0.100)
BSC
0.635 ± 0.130
(0.025 ± 0.005)
DIMENSIONS IN MILLIMETERS (INCHES).
TOLERANCES (UNLESS OTHERWISE SPECIFIED): xx.xx = 0.01
xx.xxx = 0.005
NOTE: FLOATING LEAD PROTUSION IS 0.5 mm (20 mils) MAX.
0.635 ± 0.25
(0.025 ± 0.010)
12 NOM.
LEAD COPLANARITY
MAXIMUM: 0.102 (0.004)
Solder Reflow Temperature Profile
300
PREHEATING RATE 3˚C + 1˚C/–0.5˚C/SEC.
REFLOW HEATING RATE 2.5˚C ± 0.5˚C/SEC.
TEMPERATURE (˚C)
200
PEAK
TEMP.
245˚C
PEAK
TEMP.
240˚C
2.5˚C ± 0.5˚C/SEC.
30
SEC.
160˚C
150˚C
140˚C
PEAK
TEMP.
230˚C
SOLDERING
TIME
200˚C
30
SEC.
3˚C + 1˚C/–0.5˚C
100
PREHEATING TIME
150˚C, 90 + 30 SEC.
50 SEC.
TIGHT
TYPICAL
LOOSE
0
0
50
ROOM TEMPERATURE
100
150
TIME (SECONDS)
Note: Use of non-chlorine-activated fluxes is highly recommended.
Recommended Pb-Free IR Profile
TEMPERATURE (˚C)
tp
Tp
217 ˚C
TL
Tsmax
Tsmin
260 +0/-5 ˚C
TIME WITHIN 5 ˚C of ACTUAL
PEAK TEMPERATURE
20-40 SEC.
RAMP-UP
3 ˚C/SEC. MAX.
150 - 200 ˚C
ts
PREHEAT
60 to 180 SEC.
RAMP-DOWN
6 ˚C/SEC. MAX.
tL
60 to 150 SEC.
25
t 25 ˚C to PEAK
TIME (SECONDS)
NOTES:
THE TIME FROM 25 ˚C to PEAK TEMPERATURE = 8 MINUTES MAX.
Tsmax = 200 ˚C, Tsmin = 150 ˚C
Note: Use of non-chlorine-activated fluxes is highly recommended.
200
250
Regulatory Information
The HCPL-7520 has been approved by the following organizations:
UL
IEC/EN/DIN EN 60747-5-2
Approved under UL 1577, component recognition
Approved under:
program up to VISO = 3750 VRMS. File E55361.
IEC 60747-5-2:1997 + A1:2002
EN 60747-5-2:2001 + A1:2002
CSA
DIN EN 60747-5-2 (VDE 0884 Teil 2):2003-01.
Approved under CSA Component Acceptance
Notice #5, File CA 88324.
IEC/EN/DIN EN 60747-5-2 Insulation Characteristics[1]
Description
Symbol
Installation classification per DIN EN 0110-1/1997-04, Table 1
for rated mains voltage ≤ 150 Vrms
for rated mains voltage ≤ 300 Vrms
for rated mains voltage ≤ 600 Vrms
Climatic Classification
Pollution Degree (DIN EN 0110-1/1997-04)
Maximum Working Insulation Voltage
VIORM
Input to Output Test Voltage, Method b[2]
VIORM x 1.875 = VPR, 100% production test with tm = 1 sec, partial discharge <5 pC VPR
Input to Output Test Voltage, Method a[2]
VIORM x 1.5 = VPR, type and sample test, tm = 60 sec, partial discharge <5 pC
VPR
Highest Allowable Overvoltage (transient overvoltage tini = 10 sec)
VIOTM
Safety-limiting values – maximum values allowed in the event of a failure.
Case Temperature
TS
Input Current[3]
IS, INPUT
Output Power[3]
PS, OUTPUT
Insulation Resistance at TS, VIO = 500 V
RS
Vpeak
1670
Vpeak
1336
6000
Vpeak
Vpeak
175
400
600
>109
°C
mA
mW
Ω
PS (mW)
IS (mA)
700
600
500
400
300
200
100
0
0
25
50
75
100 125 150 175 200
TS – CASE TEMPERATURE – °C
I – IV
I – III
I – II
55/100/21
2
891
800
OUTPUT POWER – PS, INPUT CURRENT – IS
Notes:
1. Insulation characteristics are guaranteed only within the safety
maximum ratings which must be ensured by protective circuits
within the application. Surface Mount Classifications is Class A in
accordance with CECC00802.
2. Refer to the optocoupler section of the Isolation and Control
Components Designer’s Catalog, under Product Safety Regulations
section, (IEC/EN/DIN EN 60747-5-2) for a detailed description of
Method a and Method b partial discharge test profiles.
3. Refer to the following figure for dependence of PS and IS on ambient
temperature.
Characteristic Unit
Insulation and Safety Related Specifications
Parameter
Symbol Value Unit
Minimum External Air Gap
L(101)
7.4
mm
(clearance)
Minimum External Tracking
L(102)
8.0
mm
(creepage)
Minimum Internal Plastic Gap
0.5
mm
(internal clearance)
Tracking Resistance
CTI
>175 V
(comparative tracking index)
Isolation Group
IIIa
Conditions
Measured from input terminals to output terminals,
shortest distance through air.
Measured from input terminals to output terminals,
shortest distance path along body.
Through insulation distance conductor to conductor,
usually the straight line distance thickness between
the emitter and detector.
DIN IEC 112 Part 1
Material Group (DIN EN 0110-1/1997-04)
Option 300 - surface mount classification is Class A in accordance with CECC 00802.
Absolute Maximum Ratings
Parameter
Storage Temperature
Operating Temperature
Supply Voltage
Steady-State Input Voltage
Two Second Transient Input Voltage
Output Voltage
Reference Input Voltage
Reference Input Current
Lead Solder Temperature
Solder Reflow Temperature Profile
Symbol
Min.
Max.
TS
–55
125
TA
–40
100
VDD1, VDD2
0
6
VIN+, VIN–2.0
VDD1 + 0.5
VIN+, VIN–6.0
VDD1 + 0.5
VOUT
–0.5
VDD2 + 0.5
VREF
0.0
VDD2 + 0.5
IREF
20
260°C for 10 sec., 1.6 mm below seating plane
See Package Outline Drawings section
Units
Note
°C
°C
V
V
V
V
V
mA
Recommended Operating Conditions
Parameter
Operating Temperature
Supply Voltage
Input Voltage (accurate and linear)
Input Voltage (functional)
Reference Input Voltage
Symbol
TA
VDD1, VDD2
VIN+, VINVIN+, VINVREF
Min.
–40
4.5
–200
–2.0
4.0
Max.
85
5.5
200
2.0
VDD2
Units
°C
V
mV
V
V
Note
Electrical Specifications (DC)
Unless otherwise noted, all typicals and figures are at the nominal operation conditions of VIN+ = 0 V, VIN- = 0 V, VREF
= 4.0 V, VDD1 = VDD2 = 5.0 V and TA = 25°C; all Minimum/Maximum specifications are within the Recommended Operating Conditions.
Test
Parameter
Symbol
Min.
Typ.
Max.
Units
Conditions Fig. Note
Input Offset Voltage
VOS
–6
–0.6
6
mV
VIN+ = 0 V
6
1
Magnitude of Input Offset
∆Vos/∆T
8
20
µV/°C
VIN+ = 0 V
7
Change vs. Temperature
Gain
G
VREF/0.512
VREF
VREF/0.512 V/V
-0.2 V < VIN+ 8, 9 2
– 5%
/0.512 + 5%
< 0.2 V
TA = 25°C
Magnitude of Gain Change ∆G/∆T
60
300
ppm/°C -0.2 V < VIN+ 9
vs. Temperature
< 0.2 V
VOUT 200 mV Nonlinearity
NL200
0.06
0.55
%
-0.2 V < VIN+ 10, 3,4
< 0.2 V
11
Magnitude of VOUT 200 mV |dNL200/dT|
0.0004
%/°C
-0.2 V < VIN+ 11
Nonlinearity Change
< 0.2 V
vs. Temperature
VOUT 100 mV Nonlinearity
NL100
0.04
0.4
%
-0.1 V < VIN+ 10, 3,5
< 0.1 V
11
Input Supply Current
IDD1
11.7
16
mA
1,2,3
Output Supply Current
IDD2
9.9
16
mA
1,2,3
Reference Voltage Input
IREF
0.26
1
mA
Current
Input Current
IIN+
–0.6
5
µA
VIN+ = 0 V
4
Magnitude of Input Bias
|dIIN/dT|
0.45
nA/°C
VIN+ = 0 V
Current vs. Termperature
Coefficient
Maximum Input Voltage
|VIN+|MAX
256
mV
5
before VOUT Clipping
Equivalent Input Impedance RIN
700
kΩ
VOUT Output Impedance
ROUT
15
Ω
Input DC Common-Mode
CMRRIN
63
dB
7
Rejection Ratio
Switching Specifications (AC)
Over recommended operating conditions unless otherwise specified.
Parameter
Symbol Min. Typ. Max. Units
VIN to VOUT Signal Delay (50 – 10%) tPD10
2.2
4
µs
VIN to VOUT Signal Delay (50 – 50%) tPD50
3.4
5
µs
VIN to VOUT Signal Delay (50 – 90%) tPD90
5.2
9.9
µs
VOUT Rise Time (10 – 90%)
tR
3.0
7
µs
VOUT Fall Time (10 – 90%)
tF
3.2
7
µs
VOUT Bandwidth (-3 dB)
BW
50
100
kHz
VOUT Noise
NOUT
31.5
mVrms
Common Mode Transient
CMTI
10
15
kV/µs
Immunity
Test Conditions
VIN+ = 0 mV to 200 mV step
VIN+ = 0 mV to 200 mV step
VIN+ = 0 mV to 200 mV step
VIN+ = 0 mV to 200 mV step
Fig. Note
13
13
13
13
VIN+ = 200 mVpk-pk
VIN+ = 0 V
TA = 25°C, VCM = 1000 V
14
15
Package Characteristics
Parameter
Input-Output Momentary
Withstand Voltage
Input-Output Resistance
Input-Output Capacitance
Symbol
VISO
Min.
Typ.
Max.
3750
RI-O
CI-O
>109
1.4
Units
Vrms
Test Conditions
Fig.
TA = 25°C, RH < 50%
Ω
pF
VI-O = 500 V
Freq = 1 MHz
Note
6
Notes:
General Note: Typical values were taken from a sample of nominal units operating at nominal conditions (VDD1 = VDD2 = 5 V, VREF = 4.0 V, Temperature
= 25°C) unless otherwise stated. Nominal plots shown from Figure 1 to 11 represented the drift of these nominal units from their nominal
operating conditions.
1. Input Offset Voltage is defined as the DC Input Voltage required to obtain an output voltage of VREF/2.
2. Gain is defined as the slope of the best-fit line of the output voltage vs. the differential input voltage (VIN+ - VIN-) over the specified input range.
Gain is derived from VREF/512 mV; e.g. VREF = 5.0, gain will be 9.77 V/V.
3. Nonlinearity is defined as half of the peak-to-peak output deviation from the best-fit gain line, expressed as a percentage of the full-scale output
voltage range.
4. NL200 is the nonlinearity specified over an input voltage range of ±200 mV.
5. NL100 is the nonlinearity specified over an input voltage range of ±100 mV.
6. In accordance with UL1577, each optocoupler is proof tested by applying an insulation test voltage ≥ 4500 Vrms for 1 second (leakage
detection current limit, II-O ≤ 5 µA). This test is performed before the 100% production test for the partial discharge (method b) shown in
IEC/EN/DIN EN 60747-5-2 Insulation Characteristic Table, if applicable.
7. CMRR is defined as the ratio of the differential signal gain (signal applied differentially between pins 2 and 3) to the common-mode gain (input
pins tied together and the signal applied to both inputs at the same time), expressed in dB.
11
10
IDD1
9
8
4.5
IDD2
4.7
4.9
5.1
5.3
11.0
12.0
10.5
11.0
10.0
9.5
9.0
8.5
IDD1
8.0
IDD2
7.5
7.0
-40
5.5
-20
0
40
60
80
9.0
8.0
7.0
4.0
-0.3
100
0
3.5
2.0
-0.2
-0.4
-0.6
-0.8
-1.0
-1.2
∆VOS – INPUT OFFSET CHANGE – µV
2.5
3.0
2.5
2.0
1.5
1.0
0.5
-0.1
0
0.1
0.2
0
-0.3
0.3
VIN – INPUT VOLTAGE – V
-0.1
0
0.1
0.2
0.5
0
-0.5
-1.0
-1.5
-20
0
20
40
60
80
100
TA – TEMPERATURE – °C
Figure 7. Input offset change vs. temperature.
0.3
VDD1
VDD2
0.5
0
-0.5
-1.0
-1.5
4.7
4.9
5.1
5.3
5.5
0.7
0.6
VDD1
0.015
VDD2
0.010
0.005
0
-0.005
-0.010
4.5
0.2
Figure 6. Input offset change vs. supply voltage.
∆GAIN – GAIN CHANGE – %
∆GAIN – GAIN CHANGE – %
1.0
0.1
VDD – SUPPLY VOLTAGE – V
0.020
TYPICAL
MAXIMUM
0
1.0
-2.0
4.5
0.3
Figure 5. Output voltage vs. input voltage.
2.0
-2.0
-40
-0.2
-0.1
1.5
VIN – INPUT VOLTAGE – V
Figure 4. Input current vs. input voltage.
1.5
-0.2
Figure 3. Supply current vs. input voltage.
4.0
-0.2
IDD2
VIN – INPUT VOLTAGE – V
0.2
-1.4
-0.3
IDD1
6.0
5.0
Figure 2. Supply current vs. temperature.
VO – OUTPUT VOLTAGE – V
IIN – INPUT CURRENT – µA
Figure 1. Supply current vs. supply voltage.
∆VOS – INPUT OFFSET CHANGE – mV
20
10.0
TA – TEMPERATURE – °C
VDD – SUPPLY VOLTAGE – V
IDD – SUPPLY CURRENT – mA
12
IDD – SUPPLY CURRENT – mA
IDD – SUPPLY CURRENT – mA
13
0.5
0.4
0.3
0.2
0.1
0
-0.1
-0.2
4.7
4.9
5.1
5.3
VDD – SUPPLY VOLTAGE – V
Figure 8. Gain change vs. supply voltage.
5.5
-0.3
-40
-20
0
20
40
60
TA – TEMPERATURE – °C
Figure 9. Gain change vs. temperature.
80
100
0.09
0.048
NL – NONLINEARITY – %
NL – NONLINEARITY – %
0.050
0.046
0.044
VDD1
0.042
0.08
0.07
0.06
VDD2
0.040
4.5
4.7
4.9
5.1
5.3
0.05
-40
5.5
-20
Figure 10. Nonlinearity vs. supply voltage.
VDD2
40
60
80
100
6
8
0.1 µF
0.1 µF
2
7
VOUT
HCPL-7520
6
3
4
5
VREF
TPD – PROPAGATION DELAY – µs
1
0.1 µF
20
Figure 11. Nonlinearity vs. temperature.
VDD1
VIN
0
TA – TEMPERATURE – °C
VDD – SUPPLY VOLTAGE – V
5
4
3
2
Tp5010
Tp5050
Tp5090
Trise
1
0
-40
-20
0
20
40
60
80
100
TA – TEMPERATURE – °C
GND2
GND1
Figure 12. Propagation delay test circuit.
Figure 13. Propagation delay vs. temperature.
VDD2
78L05
IN OUT
0.1
µF
1
0.1
µF
NORMALIZED GAIN - dB
0
8
0.1 µF
2
7
-1
3
6
4
5
-3
-4
-6
0.1
PULSE GEN.
1.0
10.0
100.0
1000.0
Figure 14. Bandwidth.
–
+
FREQUENCY – kHz
VCM
Figure 15. CMTI test circuit.
VOUT
HCPL-7520
9V
-2
-5
10
1
VREF
Application Information
Power Supplies and Bypassing
The recommended supply connections are shown in
Figure 16. A floating power supply (which in many applications could be the same supply that is used to
drive the high-side power transistor) is regulated to 5 V
using a simple zener diode (D1); the value of resistor R4
should be chosen to supply sufficient current from the
existing floating supply. The voltage from the current
sensing resistor (Rsense) is applied to the input of the
HCPL-7520 through an RC anti-aliasing filter (R2 and
C2). Although the application circuit is relatively simple,
a few recom- mendations should be followed to ensure
optimal performance.
An inexpensive 78L05 three-terminal regulator can also
be used to reduce the floating supply voltage to 5 V. To
help attenuate high- frequency power supply noise or
ripple, a resistor or inductor can be used in series with
the input of the regulator to form a low-pass filter with
the regulator’s input bypass capacitor.
The power supply for the HCPL -7520 is most often
obtained from the same supply used to power the
power transistor gate drive circuit. If a dedicated supply
is required, in many cases it is possible to add an additional winding on an existing transformer. Otherwise,
some sort of simple isolated supply can be used, such
as a line powered transformer or a high-frequency DCDC converter.
HV+
+
FLOATING
POSITIVE
SUPPLY
GATE DRIVE
CIRCUIT
-
R4
R2
MOTOR
D1
5.1 V
C1
0.1 µF
39 Ω
+ R1 -
2 VIN+
3 VIN4 GND1
RSENSE
HV-
Figure 16. Recommended supply and sense resistor connections.
11
C2
0.01 µF
1 VDD1
HCPL-7520
As shown in Figure 17, 0.1 µF bypass capacitors (C1, C2)
should be located as close as possible to the pins of the
HCPL-7520. The bypass capacitors are required because
of the high-speed digital nature of the signals inside the
HCPL-7520. A 0.01 µF bypass capacitor (C2) is also recommended at the input due to the switched-capacitor
nature of the input circuit. The input bypass capacitor
also forms part of the anti-aliasing filter, which is recommended to prevent high frequency noise from aliasing
down to lower frequencies and interfering with the
input signal. The input filter also performs an important
reliability function—it reduces transient spikes from ESD
events flowing through the current sensing resistor.
PC Board Layout
The design of the printed circuit board (PCB) should
follow good layout practices, such as keeping bypass
capacitors close to the supply pins, keeping output
signals away from input signals, the use of ground and
power planes, etc. In addition, the layout of the PCB
can also affect the isolation transient immunity (CMTI)
of the HCPL-7520, due primarily to stray capacitive
coupling between the input and the output circuits. To
obtain optimal CMTI performance, the layout of the PC
board should minimize any stray coupling by maintaining the maximum possible distance between the input
and output sides of the circuit and ensuring that any
ground or power plane on the PC board does not pass
directly below or extend much wider than the body of
the HCPL-7520.
FLOATING
POSITIVE
SUPPLY
HV+
GATE DRIVE
CIRCUIT
U1
78L05
IN
C1
0.1 µF
MOTOR
OUT
C2
0.1 µF
R5
68 Ω
+ R1 -
1 VDD1
VDD2 8
2 VIN+
VOUT 7
3 VIN-
VREF 6
4 GND1
RSENSE
GND2 5
HCPL-7520
HV-
Figure 17. Recommended HCPL-7520 application circuit.
12
C3
0.01 µF
µC
+5 V
A/D
C4
C5
C6 = 150 pF
C4 = C5 = 0.1 µF
C6
VREF
GND
Current Sensing Resistors
The current sensing resistor should have low resistance
(to minimize power dissipation), low inductance (to
minimize di/dt induced voltage spikes which could
adversely affect operation), and reasonable tolerance
(to maintain overall circuit accuracy). Choosing a particular value for the resistor is usually a compromise
between minimizing power dissipation and maximizing accuracy. Smaller sense resistance decreases power
dissipation, while larger sense resistance can improve
circuit accuracy by utilizing the full input range of the
HCPL -7520.
The first step in selecting a sense resistor is determining
how much current the resistor will be sensing. The graph
in Figure 18 shows the RMS current in each phase of a
three-phase induction motor as a function of average
motor output power (in horsepower, hp) and motor
drive supply voltage. The maximum value of the sense
resistor is determined by the current being measured
and the maximum recommended input voltage of the
isolation amplifier. The maximum sense resistance can
be calculated by taking the maximum recommended
input voltage and dividing by the peak current that the
sense resistor should see during normal operation. For
example, if a motor will have a maximum RMS current
of 10 A and can experience up to 50% overloads during
normal operation, then the peak current is 21.1 A (=10
x 1.414 x 1.5). Assuming a maximum input voltage of
200 mV, the maximum value of sense resistance in this
case would be about 10 mΩ. The maximum average
power dissipation in the sense resistor can also be easily
calculated by multiplying the sense resistance times the
square of the maximum RMS current, which is about
1 W in the previous example. If the power dissipation
in the sense resistor is too high, the resistance can be
decreased below the maximum value to decrease power
dissipation. The minimum value of the sense resistor is
limited by precision and accuracy requirements of the
design. As the resistance value is reduced, the output
voltage across the resistor is also reduced, which means
that the offset and noise, which are fixed, become a
larger percentage of the signal amplitude. The selected
value of the sense resistor will fall somewhere between
the minimum and maximum values, depending on the
particular requirements of a specific design.
13
When sensing currents large enough to cause significant heating of the sense resistor, the temperature
coefficient (tempco) of the resistor can introduce nonlinearity due to the signal dependent temperature rise
of the resistor. The effect increases as the resistor-toambient thermal resistance increases. This effect can
be minimized by reducing the thermal resistance of
the current sensing resistor or by using a resistor with
a lower tempco. Lowering the thermal resistance can
be accomplished by repositioning the current sensing
resistor on the PC board, by using larger PC board traces
to carry away more heat, or by using a heat sink. For a
two-terminal current sensing resistor, as the value of
resistance decreases, the resistance of the leads become
a significant percentage of the total resistance. This
has two primary effects on resistor accuracy. First, the
effective resistance of the sense resistor can become
dependent on factors such as how long the leads are,
how they are bent, how far they are inserted into the
board, and how far solder wicks up the leads during
assembly (these issues will be discussed in more detail
shortly). Second, the leads are typically made from
a material, such as copper, which has a much higher
tempco than the material from which the resistive
element itself is made, resulting in a higher tempco
overall. Both of these effects are eliminated when a
four-terminal current sensing resistor is used. A fourterminal resistor has two additional terminals that are
Kelvin-connected directly across the resistive element
itself; these two terminals are used to monitor the
voltage across the resistive element while the other two
terminals are used to carry the load current. Because
of the Kelvin connection, any voltage drops across the
leads carrying the load current should have no impact
on the measured voltage.
Sense Resistor Connections
MOTOR OUTPUT POWER – HORSEPOWER
40
440
380
220
120
35
30
25
20
15
10
5
0
0
5
10
15
20
25
30
35
MOTOR PHASE CURRENT – A (rms)
Figure 18. Motor output horsepower vs. motor phase current and supply
voltage.
When laying out a PC board for the current sensing
resistors, a couple of points should be kept in mind. The
Kelvin connections to the resistor should be brought
together under the body of the resistor and then run
very close to each other to the input of the HCPL-7520;
this minimizes the loop area of the connection and
reduces the possibility of stray magnetic fields from interfering with the measured signal. If the sense resistor
is not located on the same PC board as the HCPL-7520
circuit, a tightly twisted pair of wires can accomplish
the same thing. Also, multiple layers of the PC board
can be used to increase current carrying capacity.
Numerous plated-through vias should surround each
non-Kelvin terminal of the sense resistor to help distribute the current between the layers of the PC board.
The PC board should use 2 or 4 oz. copper for the layers,
resulting in a current carrying capacity in excess of 20
A. Making the current carrying traces on the PC board
fairly large can also improve the sense resistor’s power
dissipation capability by acting as a heat sink. Liberal
use of vias where the load current enters and exits the
PC board is also recommended.
14
The recommended method for connecting the HCPL7520 to the current sensing resistor is shown in Figure
17. VIN+ (pin 2 of the HPCL-7520) is connected to the
positive terminal of the sense resistor, while VIN- (pin
3) is shorted to GND1 (pin 4), with the powersupply
return path functioning as the sense line to the negative
terminal of the current sense resistor. This allows a
single pair of wires or PC board traces to connect the
HCPL-7520 circuit to the sense resistor. By referencing the input circuit to the negative side of the sense
resistor, any load current induced noise transients on
the resistor are seen as a common- mode signal and
will not interfere with the current-sense signal. This
is important because the large load currents flowing
through the motor drive, along with the parasitic inductances inherent in the wiring of the circuit, can
generate both noise spikes and offsets that are relatively large compared to the small voltages that are being
measured across the current sensing resistor. If the same
power supply is used both for the gate drive circuit and
for the current sensing circuit, it is very important that
the connection from GND1 of the HCPL-7520 to the
sense resistor be the only return path for supply current
to the gate drive power supply in order to eliminate
potential ground loop problems. The only direct connection between the HCPL-7520 circuit and the gate
drive circuit should be the positive power supply line.
FREQUENTLY ASKED QUESTIONS ABOUT THE HCPL-7520
1. THE BASICS
1.1: Why should I use the HCPL-7520 for sensing
current when Hall-effect sensors are available which
don’t need an isolated supply voltage?
Available in an auto-insertable, 8-pin DIP package, the
HCPL-7520 is smaller than and has better linearity, offset
vs. temperature and Common Mode Rejection (CMR)
performance than most Hall-effect sensors. Additionally, often the required input-side power supply can be
derived from the same supply that powers the gatedrive optocoupler.
2. SENSE RESISTOR AND INPUT FILTER
2.1: Where do I get 10 mΩ resistors? I have never
seen one that low.
Although less common than values above 10 Ω, there
are quite a few manufacturers of resistors suitable for
measuring currents up to 50 A when combined with the
HCPL-7520. Example product information may be found
at Dale’s web site (http://www.vishay.com/vishay/dale)
and Isotek’s web site (http://www.isotekcorp.com) and
Iwaki Musen Kenkyusho’s website (http://www.iwakimusen.co.jp) and Micron Electric’s website (http://www.
micron-e.co.jp).
2.2: Should I connect both inputs across the sense
resistor instead of grounding VIN- directly to pin 4?
This is not necessary, but it will work. If you do, be sure
to use an RC filter on both pin 2 (VIN+) and pin 3 (VIN-)
to limit the input voltage at both pads.
2.3: Do I really need an RC filter on the input? What is
it for? Are other values of R and C okay?
The input anti-aliasing filter (R=39 Ω, C=0.01 µF) shown
in the typical application circuit is recommended for
filtering fast switching voltage transients from the input
signal. (This helps to attenuate higher signal frequencies
which could otherwise alias with the input sampling
rate and cause higher input offset voltage.)
Some issues to keep in mind using different filter
resistors or capacitors are:
1. (Filter resistor:) The equivalent input resistance for
HCPL-7520 is around 700 kΩ. It is therefore best to
ensure that the filter resistance is not a significant percentage of this value; otherwise the offset voltage will
be increased through the resistor divider effect. [As an
example, if Rfilt = 5.5 kΩ, then VOS = (Vin * 1%) = 2 mV
for a maximum 200 mV input and VOS will vary with
respect to Vin.]
15
2. The input bandwidth is changed as a result of this
different R-C filter configuration. In fact this is one of
the main reasons for changing the input-filter R-C time
constant.
3. (Filter capacitance:) The input capacitance of
the HCPL-7520 is approximately 1.5 pF. For proper
operation the switching input-side sampling capacitors must be charged from a relatively fixed
(low impedance) voltage source. Therefore, if a filter
capacitor is used it is best for this capacitor to be a few
orders of magnitude greater than the CINPUT (A value of
at least 100 pF works well.)
2.4: How do I ensure that the HCPL-7520 is not
destroyed as a result of short circuit conditions
which cause voltage drops across the sense resistor
that exceed the ratings of the HCPL-7520’s inputs?
Select the sense resistor so that it will have less than 5 V
drop when short circuits occur. The only other requirement is to shut down the drive before the sense resistor
is damaged or its solder joints melt. This ensures that
the input of the HCPL-7520 can not be damaged by
sense resistors going open-circuit.
3. ISOLATION AND INSULATION
3.1: How many volts will the HCPL-7520 withstand?
The momentary (1 minute) withstand voltage is 3750
V rms per UL 1577 and CSA Component Acceptance
Notice #5.
4. ACCURACY
4.1: Does the gain change if the internal LED light
output degrades with time?
No. The LED is used only to transmit a digital pattern.
Avago Technologies has accounted for LED degradation
in the design of the product to ensure long life.
5. MISCELLANEOUS
5.1: How does the HCPL-7520 measure negative
signals with only a +5 V supply?
The inputs have a series resistor for protection against
large negative inputs. Normal signals are no more than
200 mV in amplitude. Such signals do not forward bias
any junctions sufficiently to interfere with accurate
operation of the switched capacitor input circuit.
For product information and a complete list of distributors, please go to our web site: www.avagotech.com
Avago, Avago Technologies, and the A logo are trademarks of Avago Technologies, Limited in the United States and other countries.
Data subject to change. Copyright © 2006 Avago Technologies Limited. All rights reserved. Obsoletes 5989-2163EN
AV02-0956EN - January 3, 2008