ATH06T033 Series —3.3-V Input 6-A, 3.3-V Input Non-Isolated Wide-Output Adjust Power Module REVISION 00 (01DEC2003) Features NOMINAL SIZE = • Up to 6-A Output Current • 3.3-V Input Voltage • Wide-Output Voltage Adjust (0.8 V to 2.5 V) • Efficiencies up to 94 % • 103 W/in³ Power Density • On/Off Inhibit • Pre-Bias Startup • Under-Voltage Lockout • Operating Temp: –40 to +85 °C 0.87 in x 0.5 in (22,1 mm x 12,57 mm) • Auto-Track™ Sequencing • Output Over-Current Protection (Non-Latching, Auto-Reset) • IPC Lead Free 2 • Safety Agency Approvals (Pending) UL 1950, CSA 22.2 950, & EN60950 • Point-of-Load Alliance (POLA) Compatible Pin Configuration ADVANCE INFORMATION Description The ATH06T033 series is one of the smallest non-isolated power modules that features Auto-Track™. Auto-Track™ simplifies supply voltage sequencing in power systems by enabling modules to track each other, or any other external voltage, during power up and power down. Although small in size (0.87 in × 0.5 in), these modules are rated for up to 6 A of output current, and are an ideal choice in applications where space, performance, and a power-up sequencing capability are important attributes. The product provides high-performance step-down conversion from a 3.3-V input bus voltage. The output voltage of the ATH06T033 can be set to any voltage over the range, 0.8 V to 2.5 V, using a single resistor. Other operating features include an on/off inhibit, output voltage adjust (trim), and output over-current protection. For high efficiency these parts employ a synchronous rectifier output stage, but a pre-bias hold-off capability ensures that the output will not sink current during startup. Target applications include telecom, industrial, and general purpose circuits, including low-power dual-voltage systems that use a DSP, microprocessor, ASIC, or FPGA. Package options include both throughhole and surface mount configurations. Pin 1 2 3 4 5 6 Function GND Track Vin Inhibit * Vo Adjust Vout * Denotes negative logic: Open = Normal operation Ground = Function active ™ Track o t u A g encin u q e S Standard Application Rset = Required to set the output voltage to a value higher than 0.8 V. (See spec. table for values) Cin = Required 100 µF Co 1 = Optional 100 µF capacitor Co 2 = Optional 10 µF ceramic capacitor for reduced output ripple. Track 1 2 VIN 3 PTH03050W (Top View) ATH06T033-9S 4 CIN 100 µF (Required) VOUT 6 5 RSET 1 %, 0.1 W (Required) Co1 100 µF Electrolytic (Optional) Co2 10 µF Ceramic (Optional) Inhibit GND North America (USA): 1-888-41-ASTEC GND Europe (UK): 44(1384)842-211 Asia (HK): 852-2437-9662 ATH06T033 Series —3.3-V Input 6-A, 3.3-V Input Non-Isolated Wide-Output Adjust Power Module REVISION 00 (01DEC2003) Ordering Information Input Voltage Output Voltage 2.95V to 3.65V 0.81 to 2.5V Options: “-J” “-SJ” “-S” - Output Current Model Number 6A ATH06T033-9(S)(J) Through-hole Termination, Tray Packaging SMT Termination, Tray Packaging SMT Termination, T&R Packaging Notes: 1 Preset output voltage is 0.8V; externally adjustable to 2.5V through the Vo,Adjust pin Pin Descriptions Vin: The positive input voltage power node to the module, which is referenced to common GND. GND: This is the common ground connection for the Vin and Vout power connections. It is also the 0 VDC reference for the control inputs. Vo Adjust: A 0.1 W 1 % resistor must be directly connected between this pin and GND to set the output voltage to a value higher than 0.8 V. The temperature stability of the resistor should be 100 ppm/°C (or better). The setpoint range for the output voltage is from 0.8 V to 2.5 V. The resistor value required for a given output voltage may be calculated from the following formula. If this pin is left open circuit, the output voltage will default to its lowest value. For further information on output voltage adjustment consult the related application note. Rset = 10 kΩ · 0.8 V Vout – 0.8 V Track: This is an analog control input that allows the output voltage to follow another voltage during powerup and power-down sequences. The pin is active from 0 V up to the nominal set-point voltage. Within this range the module’s output will follow the voltage at the Track pin on a volt-for-volt basis. When the control voltage is raised above this range, the module regulates at its nominal output voltage. If unused, this input may be left unconnected. For further information consult the related application note. – 2.49 kΩ The specification table gives the preferred resistor values for a number of standard output voltages. North America (USA): 1-888-41-ASTEC Europe (UK): 44(1384)842-211 Asia (HK): 852-2437-9662 ADVANCE INFORMATION Vout: The regulated positive power output with respect to the GND node. Inhibit: The Inhibit pin is an open-collector/drain negative logic input that is referenced to GND. Applying a lowlevel ground signal to this input disables the module’s output and turns off the output voltage. When the Inhibit control is active, the input current drawn by the regulator is significantly reduced. If the Inhibit pin is left open-circuit, the module will produce an output whenever a valid input source is applied. ATH06T033 Series —3.3-V Input 6-A, 3.3-V Input Non-Isolated Wide-Output Adjust Power Module Environmental & Absolute Maximum Ratings Characteristics Symbols Track Input Voltage Operating Temperature Range Solder Reflow Temperature Storage Temperature Mechanical Shock Vtrack Ta Treflow Ts Mechanical Vibration Weight Flammability — — (Voltages are with respect to GND) Conditions Over Vin Range Surface temperature of module body or pins — Per Mil-STD-883D, Method 2002.3 1 msec, ½ Sine, mounted Mil-STD-883D, Method 2007.2 Suffix H 20-2000 Hz Suffix S Min Typ –0.3 –40 (i) — — Max Units Vin + 0.3 85 235 (ii) 125 V °C °C °C –40 — — TBD — G’s — — — TBD TBD 2.9 — — — grams G’s Meets UL 94V-O Notes: (i) For operation below 0 °C the external capacitors m ust bave stable characteristics. use either a low ESR tantalum, Os-Con®, or ceramic capacitor. (ii) During reflow of SMD package version do not elevate peak temperature of the module, pins or internal components above the stated maximum. ADVANCE INFORMATION Specifications (Unless otherwise stated, Ta =25 °C, V in =3.3 V, Vo =2.5 V, Co in =100 µF, Co1 =0 µF, Co2 =0 µF, and Io =Iomax) Characteristics Symbols Conditions Output Current Input Voltage Range Set-Point Voltage Tolerance Temperature Variation Line Regulation Load Regulation Total Output Variation Io Vin Vo tol ∆Regtemp ∆Regline ∆Regload ∆Regtot 0.8 V ≤ Vo ≤ 2.5 V, Over Io range Efficiency η Vo Ripple (pk-pk) Over-Current Threshold Transient Response Vr Io trip Track Input Current (pin 2) Track Slew Rate Capability Under-Voltage Lockout ttr ∆Vtr IIL track dVtrack/dt UVLO Inhibit Control (pin4) Input High Voltage Input Low Voltage Input Low Current VIH VIL IIL inhibit Input Standby Current Switching Frequency External Input Capacitance External Output Capacitance Reliability Iin inh ƒs Cin Cout MTBF Min 85 °C, natural convection –40 °C <Ta < +85 °C Over Vin range Over Io range Includes set-point, line, load, –40 °C ≤ T a ≤ +85 °C RSET = 2.21 kΩ Vo = 2.5 V Io =4 A RSET = 4.12 kΩ Vo = 2.0 V RSET = 5.49 kΩ Vo = 1.8 V RSET = 8.87 kΩ Vo = 1.5 V RSET = 17.4 kΩ Vo = 1.2 V RSET = 36.5 kΩ Vo = 1.0 V 20 MHz bandwidth, Co2 =10 µF ceramic Reset, followed by auto-recovery 1 A/µs load step, 50 to 100 % Iomax, Co1 =100 µF Recovery Time Vo over/undershoot Pin to GND Vtrack – Vo ≤ 50 mV and Vtrack < Vo(nom) Vin increasing Vin decreasing Referenced to GND 0 2.95 — — — — ATH06T033 Typ — — — ±0.5 ±10 ±12 Max Units 6 (1) 3.65 ±2 (2) — — — A V %Vo %Vo mV mV %Vo — — ±3 — — — — — — — — 94 92 91 90 88 87 20 (3) 12 — — — — — — — — — — — 5 — 3.4 70 100 — — 4.3 3.7 — — –130 — 4.45 — Pin to GND Inhibit (pin 4) to GND, Track (pin 2) open Over Vin and Io ranges Vin –0.5 –0.2 — — 550 100 (5) 0 — — –130 10 600 — 100 (6) Open 0.6 — — 650 — TBD Per Bellcore TR-332 50 % stress, Ta =40 °C, ground benign TBD — — (2) % mVpp A (4) µSec mV µA V/ms V (4) V µA mA kHz µF µF 106 Hrs Notes: (1) No derating is required when the module is soldered directly to a 4-layer PCB with 1 oz. copper. (2) The set-point voltage tolerance is affected by the tolerance and stability ofRSET. The stated limit is unconditionally met if RSET has a tolerance of 1 % with 100 ppm/°C or better temperature stability. (3) The pk-pk output ripple voltage is measured with an external 10 µF ceramic capacitor. See the standard application schematic. (4) This control pin has an internal pull-up to the input voltage Vin. If it is left open-circuit the module will operate when input power is applied. A small low-leakage (<100 nA) MOSFET is recommended for control. For further information, consult the related application note. (5) A 100 µF input capacitor is required for proper operation. The capacitor must be rated for a minimum of 300 mA rms of ripple current. (6) An external output capacitor is not required for basic operation. Adding 100 µF of distributed capacitance at the load will improve the transient response. North America (USA): 1-888-41-ASTEC Europe (UK): 44(1384)842-211 Asia (HK): 852-2437-9662 ATH06T033 Series —3.3-V Input Typical Characteristics 6-A, 3.3-V Input Non-Isolated Wide-Output Adjust Power Module Characteristic Data; Vin =3.3 V (See Note A) Efficiency vs Load Current 100 Efficiency - % 90 VOUT 2.5 V 1.8 V 1.5 V 1.2 V 1.0 V 80 70 60 50 0 1 2 3 4 5 6 Iout - Amps Output Ripple vs Load Current (See Note 3 to Table) 50 VOUT ADVANCE INFORMATION Ripple - mV 40 1.8 V 1.5 V 1.2 V 1.0 V 2.5 V 30 20 10 0 0 1 2 3 4 5 6 Iout - Amps Power Dissipation vs Load Current 1.2 1 Pd - Watts 0.8 0.6 0.4 0.2 0 0 1 2 3 4 5 6 Iout - Amps The products listed hereunder are prototype or pre-production devices which have not been fully qualified to Astec’s specifications. Product specifications are subject to change without notice. Astec makes no warranty, either expressed, implied, or statutory, including implied warranty of merchantability or fitness for a specific purpose, of these products. Note A: Characteristic data has been developed from actual products tested at 25°C. This data is considered typical data for the Converter. North America (USA): 1-888-41-ASTEC Europe (UK): 44(1384)842-211 Asia (HK): 852-2437-9662 Application Notes ATH06T033 & ATH06T05 Series Adjusting the Output Voltage of the ATH06T033 & ATH06T05 Wide-Output Adjust Power Modules The Vo Adjust control (pin 5) sets the output voltage to a value higher than 0.8 V. The adjustment range of the ATH06T033 (3.3-V input) is from 0.8 V to 2.5 V 1, and the ATH06T05-9xx (5-V input) from 0.8 V to 3.6 V. The adjustment method requires the addition of a single external resistor, Rset, that must be connected directly between the Vo Adjust and GND pins 2. Table 1-1 gives the preferred value of the external resistor for a number of standard voltages, along with the actual output voltage that this resistance value provides. For other output voltages the value of the required resistor can either be calculated using the following formula, or simply selected from the range of values given in Table 1-2. Figure 1-1 shows the placement of the required resistor. Rset 0.8 V Vout – 0.8 V = 10 kΩ · – 2.49 kΩ Table 1-1; Preferred Values of Rset for Standard Output Voltages Vout (Standard) Rset (Pref’d Value) 3.3 V 1 2.5 V 2V 1.8 V 1.5 V 1.2 V 1V 0.8 V 698 Ω 2.21 kΩ 4.12 kΩ 5.49 kΩ 8.87 kΩ 17.4 kΩ 36.5 kΩ Open Vout (Actual) 3.309V 2.502 V 2.010 V 1.803 V 1.504 V 1.202 V 1.005 V 0.8 V Figure 1-1; Vo Adjust Resistor Placement 2 Table 1-2; Output Voltage Set-Point Resistor Values Va Req’d 0.800 0.825 0.850 0.875 0.900 0.925 0.950 0.975 1.000 1.025 1.050 1.075 1.100 1.125 1.150 1.175 1.200 1.225 1.250 1.275 1.300 1.325 1.350 1.375 1.400 1.425 1.450 1.475 1.50 1.55 1.60 1.65 1.70 1.75 1.80 1.85 1.90 1.95 Rset Open 318 kΩ 158 kΩ 104 kΩ 77.5 kΩ 61.5 kΩ 50.8 kΩ 43.2 kΩ 37.5 kΩ 33.1 kΩ 29.5 kΩ 26.6 kΩ 24.2 kΩ 22.1 kΩ 20.4 kΩ 18.8 kΩ 17.5 kΩ 16.3 kΩ 15.3 kΩ 14.4 kΩ 13.5 kΩ 12.7 kΩ 12.1 kΩ 11.4 kΩ 10.8 kΩ 10.3 kΩ 9.82 kΩ 9.36 kΩ 8.94 kΩ 8.18 kΩ 7.51 kΩ 6.92 kΩ 6.4 kΩ 5.93 kΩ 5.51 kΩ 5.13 kΩ 4.78 kΩ 4.47 kΩ Va Req’d 2.00 2.05 2.10 2.15 2.20 2.25 2.30 2.35 2.40 2.45 2.50 2.55 2.60 2.65 2.70 2.75 2.80 2.85 2.90 2.95 3.00 3.05 3.10 3.15 3.20 3.25 3.30 3.35 3.40 3.45 3.50 3.55 3.60 Rset 4.18 kΩ 3.91 kΩ 3.66 kΩ 3.44 kΩ 3.22 kΩ 3.03 kΩ 2.84 kΩ 2.67 kΩ 2.51 kΩ 2.36 kΩ 2.22 kΩ 2.08 kΩ 1.95 kΩ 1.83 kΩ 1.72 kΩ 1.61 kΩ 1.51 kΩ 1.41 kΩ 1.32 kΩ 1.23 kΩ 1.15 kΩ 1.07 kΩ 988 Ω 914 Ω 843 Ω 775 Ω 710 Ω 647 Ω 587 Ω 529 Ω 473 Ω 419 Ω 367 Ω Track 3 VIN ATH06T05-9J PTH05050W Inhibit 3 VO GND 1 4 RSET 1% 0.1 W CIN 100 µF (Required) VOUT 6 GND North America (USA): 1-888-41-ASTEC + VIN COUT 100 µF (Optional) Notes: 1. Modules that operate from a 3.3-V input bus should not be adjusted higher than 2.5 V. 2. Use a 0.1 W resistor. The tolerance should be 1 %, with temperature stability of 100 ppm/°C (or better). Place the resistor as close to the regulator as possible. Connect the resistor directly between pins 5 and 1 using dedicated PCB traces. 3. Never connect capacitors from Vo Adjust to either GND or Vout. Any capacitance added to the Vo Adjust pin will affect the stability of the regulator. Europe (UK): 44(1384)842-211 Asia (HK): 852-2437-9662 + Application Notes ATH06T033 & ATH06T05 Series ATH06T033/T05: Capacitor Recommendations Input Capacitor The recommended input capacitance is determined by 100 µF minimum capacitance, and 300 mA (rms) minimum ripple current rating. Ripple current and less than 300 mΩ equivalent series resistance (ESR) values are the major considerations, along with temperature, when designing with different types of capacitors. Tantalum capacitors have a recommended minimum voltage rating of twice 2× (the maximum DC voltage + AC ripple). This is standard practice for tantalum capacitors to insure reliability. Output Capacitors (Optional) The ESR of the recommended capacitors is equal to or less than 300 mΩ. Electrolytic capacitors have marginal ripple performance at frequencies greater than 400 kHz but excellent low frequency transient response. Above the ripple frequency, ceramic capacitors are necessary to improve the transient response and reduce any high frequency noise components apparent during higher current excursions. Tantalum capacitors are acceptable on the output bus. Tantalum, Os-con, or ceramic capacitor types are recommended for applications where ambient temperatures fall below 0 °C. Ceramic capacitors may be used instead of electrolytic types on both the input and output bus. The input bus must have the minimum amount of capacitance. A single 10 µF ceramic capacitor may also be used on the output bus to reduce output ripple. Capacitor Table Table 2-1 identifies the characteristics of capacitors from a number of vendors with acceptable ESR and ripple current (rms) ratings. The number of capacitors required at both the input and output buses is identified for each capacitor type. This is not an extensive capacitor list. Capacitors from other vendors are available with comparable specifications. Those listed are for guidance. The RMS ripple current rating and ESR are the critical parameters necessary to insure both optimum regulator performance and long capacitor life. Tantalum/ Ceramic Capacitors Table 2-1: Recommended Input/Output Capacitors Capacitor Vendor/ Component Series Capacitor Characteristics Quantity Working Voltage Value (µF) (ESR) Equivalent Series Resistance Max Ripple at 85 °C Current (Irms) Physical Size (mm) Input Bus Output Bus Panasonic FC (SMT WA (SMT) 25 V 10 V 100 µF 120 µF 0.300 Ω 0.035 Ω 450 mA 2800 mA 8×10 8.3×6.9 1 1 1 1 EEVFC1E101P EEFWA1A121P Panasonic FC FK (SMT) 16 V 16 V 220 µF 330 µF 0.150 Ω 0.160 Ω 555 mA 600 mA 10×10.2 8×10.2 1 1 1 1 EEUFC1C221 EEVFK1C331P United Chemi–Con FS PXA (SMT) MVZ (SMT) PS 10 V 10 V 16 V 10 V 100 µF 120 µF 220 µF 270 µF 0.040 Ω 0.027 Ω 0.170 Ω 0.014 Ω 2100 mA 2430 mA 450 mA 4420 mA 6.3×9.8 8×6.7 8×10 8×11.5 1 1 1 1 1 1 1 1 10FS100M PXA10VC121MH80TP MVZ25VC221MH10TP 10PS270MH11 Nichicon WG (SMT) F55 PM 35 V 10 V 25 V 100 µF 100 µF 150 µF 0.150 Ω 0.055 Ω 0.160 Ω 670 mA 2000 mA 460 mA 10×10 7,7x4,3 10×11.5 1 1 1 1 1 1 UWG1V101MNR1GS F551A107MN UPM1E151MPH Sanyo Os-con® SVP (SMT) SP TPA 10 V 16 V 10 V 120 µF 100 µF 100 µF 0.040 Ω 0.025 Ω 0.080 Ω >2500 mA >2800 mA >1200 mA 7×8 6.3×9.8 7.3×4.8 1 1 1 1 1 1 10SVP120M 16SPS100M 10TPA100M AVX Tantalum TPS 10 V 10 V 100 µF 220 µF 0.100 Ω 0.100 Ω >1090 mA >1414 mA 7.3L ×4.3W ×4.1H 1 1 1 1 TPSD107M010R0100 TPSV227M010R0100 Kemet T520 T495 10 V 10 V 100 µF 100 µF 0.080 Ω 0.100 Ω 1200 mA >1100 mA 7.3L ×5.7W ×4.0H 1 1 1 1 T520D107M010AS T495X107M010AS Sprague 594D/595D 10 V 10 V 150 µF 120 µF 0.090 Ω 0.140 Ω 1100 mA >1000 mA 7.3L ×6.0W ×4.1H 1 1 1 1 594D157X0010C2T 595D127X0010D2T TDK- Ceramic X5R Murata Ceramic X5R 1210 Case 6.3 V 6.3 V 47 µF 47 µF 0.002 Ω 0.002 Ω >1400 mA >1000 mA 3.6L ×2.8W ×2.8H 2 2 2 2 C3225X5R0J476KT/MT GRM32ER60J476M/6.3 North America (USA): 1-888-41-ASTEC Europe (UK): 44(1384)842-211 Vendor Number Asia (HK): 852-2437-9662 Application Notes ATH Series of Wide-Output Adjust Power Modules (3.3/5-V Input) Features of the ATH Family of Non-Isolated Wide Output Adjust Power Modules This is a feature unique to the ATH family, and was specifically designed to simplify the task of sequencing the supply voltage in a power system. These and other features are described in the following sections. Point-of-Load Alliance The ATH family of non-isolated, wide-output adjust power modules are optimized for applications that require a flexible, high performance module that is small in size. These products are part of the “Point-of-Load Alliance” (POLA), which ensures compatible footprint, interoperability and true second sourcing for customer design flexibility. The POLA is a collaboration between Texas Instruments, Artesyn Technologies, and Astec Power to offer customers advanced non-isolated modules that provide the same functionality and form factor. Product series covered by the alliance includes the ATH06 (6 A), ATH10 (10 A), ATH12/15 (12/15 A), ATH18/22 (18/22 A), and the ATH26/30 (26/30 A). From the basic, “Just Plug it In” functionality of the 6-A modules, to the 30-A rated feature-rich ATH30 Series, these products were designed to be very flexible, yet simple to use. The features vary with each product. Table 3-1 provides a quick reference to the available features by product and input bus voltage. 6A 3.3 V / 5 V 10 A 12 V 10 8 AA 3.3 V / 5 V 15 A 12 V 12 A 3.3 V / 5 V 22 A 12 V 18 A 3.3 V / 5 V 30 A 12 V 26 A • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • • Thermal Shutdown • • • • • • • • • • • Pre-Bias Startup • • • • • • • • • • • Output Sense 12 V • • • • • • • • • • • Margin Up/Down PTHxx030 ATH26/30 6A Auto-Track™ PTHxx020 ATH18/22 6A 5V Over-Current PTHxx010 ATH12/15 3.3 V On/Off Inhibit ATH10 PTHxx060 I OUT Adjust (Trim) PTHxx050 ATH06 Input Bus Vo (2V/Div) Iin (2A/Div) Vin (5V/Div) HORIZ SCALE: 10ms/Div • • • • For simple point-of-use applications, the ATH06 (6A) provides operating features such as an on/off inhibit, output voltage trim, pre-bias startup (3.3/5-V input only), and over-current protection. The ATH10 (10 A), and ATH12/15 (12/15 A) include an output voltage sense, and margin up/down controls. Then the higher output current, ATH18/22 (18/22A) and ATH26/30 (26/30A) products incorporate over-temperature shutdown protection. All of the products referenced in Table 3-1 include Auto-Track™. North America (USA): 1-888-41-ASTEC When configured per their standard application all the ATH products will produce a regulated output voltage following the application of a valid input source voltage. All the modules include soft-start circuitry. This slows the initial rate in which the output voltage can rise, thereby limiting the amount of in-rush current that can be drawn from the input source. The soft-start circuitry also introduces a short time delay (typically 5 ms-10 ms) into the power-up characteristic. This delay is from the point that a valid input source is recognized, to the initial rise of the output voltage. Figure 3-1 shows the power-up characteristic of the 22-A output product (ATH22T05-9xx), operating from a 5-V input bus and configured for a 3.3-V output. The waveforms were measured with a 5-A resistive load. The initial rise in input current when the input voltage first starts to rise is the charge current drawn by the input capacitors. Figure 3-1 Table 3-1; Operating Features by Series and Input Bus Voltage Series Power-Up Characteristics Over-Current Protection For protection against load faults, all modules incorporate output over-current protection. Applying a load that exceeds the regulator’s over-current threshold will cause the regulated output to shut down. Following shutdown a module will periodically attempt to recover by initiating a soft-start power-up. This is described as a “hiccup” mode of operation, whereby the module continues in a cycle of successive shutdown and power up until the load fault is removed. During this period, the average current flowing into the fault is significantly reduced. Once the fault is removed, the module automatically recovers and returns to normal operation. Europe (UK): 44(1384)842-211 Asia (HK): 852-2437-9662 Application Notes ATH Series of Wide-Output Adjust Power Modules (3.3/5-V Input) Output On/Off Inhibit Remote Sense For applications requiring output voltage on/off control, each series of the ATH family incorporates an output Inhibit control pin. The inhibit feature can be used wherever there is a requirement for the output voltage from the regulator to be turned off. The ATH10, ATH12/15, ATH18/22, and ATH26/30 products incorporate an output voltage sense pin, Vo Sense. The Vo Sense pin should be connected to Vout at the load circuit (see data sheet standard application). A remote sense improves the load regulation performance of the module by allowing it to compensate for any ‘IR’ voltage drop between itself and the load. An IR drop is caused by the high output current flowing through the small amount of pin and trace resistance. Use of the remote sense is optional. If not used, the Vo Sense pin can be left open-circuit. An internal low-value resistor (15-Ω or less) is connected between the Vo Sense and Vout. This ensures the output voltage remains in regulation. The power modules function normally when the Inhibit pin is left open-circuit, providing a regulated output whenever a valid source voltage is connected to Vin with respect to GND. Figure 3-2 shows the typical application of the inhibit function. Note the discrete transistor (Q1). The Inhibit control has its own internal pull-up to Vin potential. The input is not compatible with TTL logic devices. An opencollector (or open-drain) discrete transistor is recommended for control. Turning Q1 on applies a low voltage to the Inhibit control pin and disables the output of the module. If Q1 is then turned off, the module will execute a soft-start power-up sequence. A regulated output voltage is produced within 20 msec. Figure 3-3 shows the typical rise in both the output voltage and input current, following the turn-off of Q1. The turn off of Q1 corresponds to the rise in the waveform, Q1 Vds. The waveforms were measured with a 5-A load. Figure 3-2 Vo Sense VIN 2 8 1 7 + Q1 BSS138 VOUT 6 4 RSET COUT 330 µF L O A D 1 =Inhibit GND Note: The remote sense feature is not designed to compensate for the forward drop of non-linear or frequency dependent components that may be placed in series with the converter output. Examples include OR-ing diodes, filter inductors, ferrite beads, and fuses. When these components are enclosed by the remote sense connection they are effectively placed inside the regulation control loop, which can adversely affect the stability of the regulator. Over-Temperature Protection 5 ATH15T05-9S PTH05020W 3 CIN 1,000 µF 9 + 10 With the sense pin connected, the difference between the voltage measured directly between the Vout and GND pins, and that measured from V o Sense to GND, is the amount of IR drop being compensated by the regulator. This should be limited to a maximum of 0.3 V. GND Figure 3-3 Vo (2V/Div) Iin (2A/Div) The ATH18/22 and ATH26/30 series of products have over-temperature protection. These products have an on-board temperature sensor that protects the module’s internal circuitry against excessively high temperatures. A rise in the internal temperature may be the result of a drop in airflow, or a high ambient temperature. If the internal temperature exceeds the OTP threshold, the module’s Inhibit control is automatically pulled low. This turns the output off. The output voltage will drop as the external output capacitors are discharged by the load circuit. The recovery is automatic, and begins with a soft-start power up. It occurs when the the sensed temperature decreases by about 10 °C below the trip point. Note: The over-temperature protection is a last resort mechanism to prevent thermal stress to the regulator. Operation at or close to the thermal shutdown temperature is not recommended and will reduce the long-term reliability of the module. Always operate the regulator within the specified Safe Operating Area (SOA) limits for the worst-case conditions of ambient temperature and airflow. Q1Vds (5V/Div) HORIZ SCALE: 10ms/Div North America (USA): 1-888-41-ASTEC Europe (UK): 44(1384)842-211 Asia (HK): 852-2437-9662 Application Notes ATH Series of Wide-Output Adjust Power Modules (3.3/5-V Input) Auto-Track™ Function The Auto-Track™ function is unique to the ATH family, and is available with the all “Point-of-Load Alliance” (POLA) products. Auto-Track™ was designed to simplify the amount of circuitry required to make the output voltage from each module power up and power down in sequence. The sequencing of two or more supply voltages during power up is a common requirement for complex mixed-signal applications, that use dual-voltage VLSI ICs such as DSPs, micro-processors, and ASICs. How Auto-Track™ Works Auto-Track™ works by forcing the module’s output voltage to follow a voltage presented at the Track control pin. This control range is limited to between 0 V and the module’s set-point voltage. Once the track-pin voltage is raised above the set-point voltage, the module’s output remains at its set-point 1. As an example, if the Track pin of a 2.5-V regulator is at 1 V, the regulated output will be 1 V. But if the voltage at the Track pin rises to 3 V, the regulated output will not go higher than 2.5 V. When under track control, the regulated output from the module follows the voltage at its Track pin on a voltfor-volt basis. By connecting the Track pin of a number of these modules together, the output voltages will follow a common signal during power-up and power-down. The control signal can be an externally generated master ramp waveform, or the output voltage from another power supply circuit 3. The Track control also incorporates an internal RC charge circuit. This operates off the module’s input voltage to produce a suitable rising waveform at power up. Typical Application The basic implementation of Auto-Track™ allows for simultaneous voltage sequencing of a number of AutoTrack™ compliant modules. Connecting the Track control pins of two or more modules forces the Track control of all modules to follow the same collective RC ramp waveform, and allows them to be controlled through a single transistor or switch; Q1 in Figure 3-4. each module will rise in unison with other modules, to its respective set-point voltage. Figure 3-5 shows the output voltage waveforms from the circuit of Figure 3-4 after the On/Off Control is set from a high to a low-level voltage. The waveforms, Vo1 and Vo2 represent the output voltages from the two power modules, U1 (3.3 V) and U2 (2.0 V) respectively. Vo1 and Vo2 are shown rising together to produce the desired simultaneous power-up characteristic. The same circuit also provides a power-down sequence. Power down is the reverse of power up, and is accomplished by lowering the track control voltage back to zero volts. The important constraint is that a valid input voltage must be maintained until the power down is complete. It also requires that Q1 be turned off relatively slowly. This is so that the Track control voltage does not fall faster than Auto-Track's slew rate capability, which is 5 V/ms. The components R1 and C1 in Figure 3-4 limit the rate at which Q1 can pull down the Track control voltage. The values of 100 k-ohm and 0.047 µF correlate to a decay rate of about 0.6 V/ms. The power-down sequence is initiated with a low-to-high transition at the On/Off Control input to the circuit. Figure 3-6 shows the power-down waveforms. As the Track control voltage falls below the nominal set-point voltage of each power module, then its output voltage decays with all the other modules under Auto-Track™ control. Notes on Use of Auto-Track™ 1. The Track pin voltage must be allowed to rise above the module’s set-point voltage before the module can regulate at its adjusted set-point voltage. 2. The Auto-Track™ function will track almost any voltage ramp during power up, and is compatible with ramp speeds of up to 5 V/ms. 3. The absolute maximum voltage that may be applied to the Track pin is Vin. To initiate a power-up sequence, it is recommended that the Track control be first pulled to ground potential. This should be done at or before input power is applied to the modules, and then held for at least 10 ms thereafter. This brief period gives the modules time to complete their internal soft-start initialization. Applying a logiclevel high signal to the circuit’s On/Off Control turns Q1 on and applies a ground signal to the Track pins. After completing their internal soft-start intialization, the output of all modules will remain at zero volts while Q1 is on. 4. The module will not follow a voltage at its Track control input until it has completed its soft-start initialization. This takes about 10 ms from the time that the module has sensed that a valid voltage has been applied its input. During this period, it is recommended that the Track pin be held at ground potential. 10 ms after a valid input voltage has been applied to the modules, Q1 may be turned off. This allows the track control voltage to automatically rise toward to the modules' input voltage. During this period the output voltage of 6. The Auto-Track™ function can be disabled by connecting the Track pin to the input voltage (Vin) through a 1-kΩ resistor. When Auto-Track™ is disabled, the output voltage will rise faster following the application of input power. 5. Once its soft-start initialization is complete, the module is capable of both sinking and sourcing current when following the voltage at the Track pin. **Auto-Track is a trademark of Texas Instruments, Inc. North America (USA): 1-888-41-ASTEC Europe (UK): 44(1384)842-211 Asia (HK): 852-2437-9662 Application Notes ATH Series of Wide-Output Adjust Power Modules (3.3/5-V Input) Figure 3-4; Sequenced Power Up & Power Down Using Auto-Track U1 10 9 8 5 Track Inhibit + CIN ATH22T05-9SJ PTH05020W VIN VO Vo1 =3.3V 6 GND 3 7 1 COUT 4 R2 698 + 2 +5V C1 0.047µF U2 9 8 5 Track 2 CIN 0V Figure 3-5; Simultaneous Power Up with Auto-Track Control + R1 100k 10 Q1 BSS138 ATH15T05-9SJ PTH05010W VIN Inhibit 3 VO Vo2 =2V 6 GND 1 7 4 R3 4k12 COUT + On/Off Control 1 = Power Down 0 = Power Up Figure 3-6; Simultaneous Power Down with Auto-Track Control Vo1 (1V/Div) Vo1 (1V/Div) Vo2 (1V/Div) Vo2 (1V/Div) On/Off Input (5V/Div) On/Off Control (5V/Div) HORIZ SCALE: 5ms/Div HORIZ SCALE: 5ms/Div North America (USA): 1-888-41-ASTEC Europe (UK): 44(1384)842-211 Asia (HK): 852-2437-9662 Application Notes ATH Series of Wide-Output Adjust Power Modules (3.3/5-V Input) Margin Up/Down Controls Notes: The ATH10 (10A), ATH12/15 (12/15A), ATH18/22 (18/ 22A) and ATH26/30 (26/30A) products incorporate Margin Up and Margin Down control inputs. These controls allow the output voltage to be momentarily adjusted 1, either up or down, by a nominal 5 %. This provides a convenient method for dynamically testing the operation of the load circuit over its supply margin or range. It can also be used to verify the function of supply voltage supervisors. The ±5 % change is applied to the adjusted output voltage, as set by the external resistor, Rset at the Vo Adjust pin. 1. The Margin Up* and Margin Dn* controls were not intended to be activated simultaneously. If they are their affects on the output voltage may not completely cancel, resulting in the possibility of a slightly higher error in the output voltage set point. The 5 % adjustment is made by pulling the appropriate margin control input directly to the GND terminal 2. A low-leakage open-drain device, such as an n-channel MOSFET or p-channel JFET is recommended for this purpose 3. Adjustments of less than 5 % can also be accommodated by adding series resistors to the control inputs (See Figure 3-4). The value of the resistor can be selected from Table 3-2, or calculated using the following formula. 2. The ground reference should be a direct connection to the module GND at pin 7 (pin 1 for the ATH06). This will produce a more accurate adjustment at the load circuit terminals. The transistors Q1 and Q2 should be located close to the regulator. 3. The Margin Up and Margin Dn control inputs are not compatible with devices that source voltage. This includes TTL logic. These are analog inputs and should only be controlled with a true open-drain device (preferably a discrete MOSFET transistor). The device selected should have low off-state leakage current. Each input sources 8 µA when grounded, and has an open-circuit voltage of 0.8 V. Up/Down Adjust Resistance Calculation To reduce the margin adjustment to something less than 5 %, series resistors are required (See RD and RU in Figure 3-7). For the same amount of adjustment, the resistor value calculated for RU and RD will be the same. The formulas is as follows. RU or RD = 499 ∆% – 99.8 Table 3-2; Margin Up/Down Resistor Values % Adjust 5 4 3 2 1 kΩ Where ∆% = The desired amount of margin adjust in percent. RU / RD 0.0 kΩ 24.9 kΩ 66.5 kΩ 150.0 kΩ 397.0 kΩ Figure 3-7; Margin Up/Down Application Schematic 10 9 8 1 7 PTH05010W ATH15T05-9S +Vo 0V (Top View) VIN 2 3 + RD 4 MargUp 5 RU RSET 0.1 W, 1 % Cin MargDn +VOUT 6 + Cout Q2 GND North America (USA): 1-888-41-ASTEC L O A D Q1 GND Europe (UK): 44(1384)842-211 Asia (HK): 852-2437-9662 Application Notes ATH Series of Wide-Output Adjust Power Modules (3.3/5-V Input) Pre-Bias Startup Capability Notes Only selected products in the ATH family incorporate this capability. Consult Table 3-1 to identify which products are compliant. 1. Startup is the relatively short period (approx. 10 ms) prior to the output voltage rising. The startup period immediately follows either the application of a valid input source voltage, or the release of a ground signal at the Inhibit pin. A pre-bias startup condition occurs as a result of an external voltage being present at the output of a power module prior to its output becoming active. This often occurs in complex digital systems when current from another power source is backfed through a dual-supply logic component, such as an FPGA or ASIC. Another path might be via clamp diodes as part of a dual-supply power-up sequencing arrangement. A prebias can cause problems with power modules that incorporate synchronous rectifiers. This is because under most operating conditions, these types of modules can sink as well as source output current. 2. To ensure that the regulator does not sink current when power is first applied (even with a ground signal applied to the Inhibit control pin), the input voltage must always be greater than the output voltage throughout the power-up and power-down sequence. 3. The Auto-Track function can be disabled at power up by immediately applying a voltage to the module’s Track pin that is greater than its set-point voltage. This can be easily accomplished by connecting the Track pin to Vin through a 1-kΩ resistor. The ATH family of power modules incorporate synchronous rectifiers, but will not sink current during startup 1, or whenever the Inhibit pin is held low. However, to ensure satisfactory operation of this function, certain conditions must be maintained. 2 Figure 3-7 shows an application demonstrating the pre-bias startup capability. The startup waveforms are shown in Figure 3-9. Note that the output current from the ATH15T033-9xx (Io) shows negligible current until its output voltage rises above that backfed through diodes D1 and D2. Figure 3.9; Pre-Bias Startup Waveforms Vin (1 V/Div) Vo (1 V/Div) Note: The pre-bias start-up feature is not compatible with Auto-Track. When the module is under Auto-Track control, it is fully active and will sink current if the output voltage is below that of a back-feeding source. Therefore to ensure a prebias hold-off, one of two approaches must be followed when input power is applied to the module. The Auto-Track function must either be disabled 3, or the module’s output held off using the Inhibit pin. The latter allows Auto-Track’s internal (RC) voltage ramp to rise above the set-point voltage. Io (5 A/Div) HORIZ SCALE: 5 ms/Div Figure 3.8; Application Circuit Demonstrating Pre-Bias Startup VIN = 3.3 V R1 1k0 10 9 5 8 Track 2 VIN Sense ATH15T033-9S PTH03010W Inhibit 3 GND 1 VO Vo = 2.5 V 6 + Vadj 7 D1, D2 MBR3100 Io 4 VCCIO VCORE + CIN 330 µF North America (USA): 1-888-41-ASTEC R2 2k21 + COUT 330 µF Europe (UK): 44(1384)842-211 ASIC Asia (HK): 852-2437-9662 Through Hole Termination Surface Mount Termination