CALMIRCO CSPEMI202 2 channel headset microphone emi filter with esd protection Datasheet

CSPEMI202A
2 Channel Headset Microphone EMI Filter with ESD Protection
Features
Product Description
•
•
The CSPEMI202A is a dual low-pass filter array integrating two pi-style filters (C-R-C) that reduce EMI/RFI
emissions while at the same time providing ESD protection. This part is custom-designed to interface with a
microphone port on a cellular telephone or similar
device. Each high quality filter provides more than
35dB attenuation in the 800-2700 MHz range. These
pi-style filters support bidirectional filtering, controlling
EMI both to and from a microphone element. They also
support bipolar signals, enabling audio signals to pass
through without distortion.
•
•
•
•
•
•
•
Two channels of EMI filtering
Pi-style EMI filters in a capacitor-resistor-capacitor
(C-R-C) network
Greater than 40dB attenuation at 1GHz
+8kV ESD protection on each channel
(IEC 61000-4-2 Level 4, contact discharge)
+15kV ESD protection on each channel (HBM)
Supports bipolar signals—ideal for
audio applications
Chip Scale Package features extremely low
lead inductance for optimum filter and ESD
performance
5-bump, 0.950mm X 1.410mm footprint
Chip Scale Package (CSP)
Lead-free version available
In addition, the CSPEMI202A provides a very high
level of protection for sensitive electronic components
that may be subjected to electrostatic discharge (ESD).
The input pins are designed and characterized to
safely dissipate ESD strikes of 8kV, the maximum
requirement of the IEC 61000-4-2 international standard. Using the MIL-STD-883 (Method 3015) specification for Human Body Model (HBM) ESD, the device
provides protection for contact discharges to greater
than 15kV.
Applications
•
•
•
•
•
•
•
EMI filtering and ESD protection for headset
microphone ports
Wireless Handsets
Handheld PCs / PDAs
MP3 Players
Digital Camcorders
Notebooks
Desktop PCs
The CSPEMI202A is particularly well suited for portable electronics (e.g., cellular telephones, PDAs, notebook computers) because of its small package format
and low weight. The CSPEMI202A is available in a
space-saving, low-profile Chip Scale Package with
optional lead-free finishing.
Electrical Schematic
MIC_IN1
68Ω
A1
47pF
MIC_IN2
MIC_OUT1
47pF
68Ω
A3
47pF
GND
C1
C3
MIC_OUT2
47pF
B2
© 2003 California Micro Devices Corp. All rights reserved.
10/09/03
430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲ Tel: 408.263.3214
▲ Fax: 408.263.7846
▲
www.calmicro.com
1
CSPEMI202A
PACKAGE / PINOUT DIAGRAMS
BOTTOM VIEW
(Bumps Up View)
TOP VIEW
(Bumps Down View)
Orientation
Marking
(see note 2)
1 2 3
A
MIC_OUT2
C1
C3
GND
AD
B
MIC_OUT1
B2
Orientation
Marking
C
MIC_IN1
MIC_IN2
A1
A3
A1
CSPEMI202A
CSP Package
Note:
1) These drawings are not to scale.
2) Lead-free devices are specified by using a "+" character for the top side orientation mark.
PIN DESCRIPTIONS
PIN
NAME
DESCRIPTION
A1
MIC_IN1
Microphone Input 1 (from microphone)
A3
MIC_IN2
Microphone Input 2 (from microphone)
B2
GND
C1
MIC_OUT1
Microphone Output 1 (to audio circuitry)
C3
MIC_OUT2
Microphone Output 2 (to audio circuitry)
Device Ground
Ordering Information
PART NUMBERING INFORMATION
Lead-free Finish 2
Standard Finish
Ordering Part
Ordering Part
Bumps
Package
Number1
Part Marking
Number1
Part Marking
5
CSP
CSPEMI202A
AD
CSPEMI202AG
AD
Note 1: Parts are shipped in Tape & Reel form unless otherwise specified.
Note 2: Lead-free devices are specified by using a "+" character for the top side orientation mark.
© 2003 California Micro Devices Corp. All rights reserved.
2
430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲ Tel: 408.263.3214
▲ Fax: 408.263.7846
▲
www.calmicro.com
10/09/03
CSPEMI202A
Specifications
ABSOLUTE MAXIMUM RATINGS
PARAMETER
RATING
UNITS
-65 to +150
°C
DC Power per Resistor
100
mW
DC Package Power Rating
200
mW
RATING
UNITS
-40 to +85
°C
Storage Temperature Range
STANDARD OPERATING CONDITIONS
PARAMETER
Operating Temperature Range
ELECTRICAL OPERATING CHARACTERISTICS1
SYMBOL
PARAMETER
CONDITIONS
MIN
TYP
MAX
UNITS
R1
Resistance
61
68
75
Ω
C1
Capacitance
38
47
56
pF
1.0
µA
15
-15
V
V
ILEAK
Diode Leakage Current
VIN=5.0V
VSIG
Signal Voltage
Positive Clamp
Negative Clamp
ILOAD = 10mA
In-system ESD Withstand Voltage
a) Human Body Model, MIL-STD-883,
Method 3015
b) Contact Discharge per IEC 61000-4-2
Level 4
Notes 2,4 and 5
Clamping Voltage during ESD Discharge
MIL-STD-883 (Method 3015), 8kV
Positive Transients
Negative Transients
Notes 2,3,4 and 5
Cut-off frequency
ZSOURCE = 50Ω, ZLOAD = 50Ω
R = 68Ω, C = 47pF
VESD
VCL
fC
5
-5
7
-10
±15
kV
±8
kV
+15
-19
V
V
60
MHz
Note 1: TA=25°C unless otherwise specified.
Note 2: ESD applied to input and output pins with respect to GND, one at a time.
Note 3: Clamping voltage is measured at the opposite side of the EMI filter to the ESD pin. For example, if ESD is applied to Pin A1,
then clamping voltage is measured at Pin C1.
Note 4: Unused pins are left open
Note 5: These parameters are guaranteed by design and characterization.
© 2003 California Micro Devices Corp. All rights reserved.
10/09/03
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
▲ Tel: 408.263.3214
▲
Fax: 408.263.7846
▲
www.calmicro.com
3
CSPEMI202A
Performance Information
Typical Filter Performance (nominal conditions unless specified otherwise, 50 Ohm Environment)
Figure 1. Insertion Loss VS. Frequency (A1-C1 to GND B2)
Figure 2. Insertion Loss VS. Frequency (A3-C3 to GND B2)
© 2003 California Micro Devices Corp. All rights reserved.
4
430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲ Tel: 408.263.3214
▲ Fax: 408.263.7846
▲
www.calmicro.com
10/09/03
CSPEMI202A
Application Information
Refer to Application Note AP-217, "The Chip Scale
Package", for a detailed description of Chip Scale
Packages offered by California Micro Devices.
PRINTED CIRCUIT BOARD RECOMMENDATIONS
PARAMETER
VALUE
Pad Size on PCB
0.275mm
Pad Shape
Round
Pad Definition
Non-Solder Mask defined pads
Solder Mask Opening
0.325mm Round
Solder Stencil Thickness
0.125 - 0.150mm
Solder Stencil Aperture Opening (laser cut, 5% tapered walls)
0.330mm Round
Solder Flux Ratio
50/50 by volume
Solder Paste Type
No Clean
Pad Protective Finish
OSP (Entek Cu Plus 106A)
Tolerance — Edge To Corner Ball
+50µm
Solder Ball Side Coplanarity
+20µm
Maximum Dwell Time Above Liquidous
60 seconds
Soldering Maximum Temperature
260°C
Non-Solder Mask Defined Pad
0.275mm DIA.
Solder Stencil Opening
0.330mm DIA.
Solder Mask Opening
0.325mm DIA.
Figure 3. Recommended Non-Solder Mask Defined Pad Illustration
Temperature (°C)
250
200
150
100
50
0
Figure 4. Eutectic (SnPb) Solder
Ball Reflow Profile
1:00.0
2:00.0
3:00.0
Time (minutes)
4:00.0
Figure 5. Lead-free (SnAgCu) Solder
Ball Reflow Profile
© 2003 California Micro Devices Corp. All rights reserved.
10/09/03
430 N. McCarthy Blvd., Milpitas, CA 95035-5112
▲ Tel: 408.263.3214
▲
Fax: 408.263.7846
▲
www.calmicro.com
5
CSPEMI202A
Mechanical Details
CSP Mechanical Specifications
Mechanical Package Diagrams
CSPEMI202A devices are packaged in a custom Chip
Scale Package (CSP). Dimensions are presented
below. For complete information on CSP packaging,
see the California Micro Devices CSP Package Information document.
BOTTOM VIEW
A1
C
B
5
A
Millimeters
Inches
Nom
Max
A1
0.905
0.950
0.995
0.0356 0.0374 0.0392
A2
1.365
1.410
1.455
0.0537 0.0555 0.0573
B1
0.495
0.500
0.505
0.0195 0.0197 0.0199
B2
0.245
0.250
0.255
0.0096 0.0098 0.0100
B3
0.430
0.435
0.440
0.0169 0.0171 0.0173
B4
0.430
0.435
0.440
0.0169 0.0171 0.0173
C1
0.175
0.225
0.275
0.0069 0.0089 0.0108
C2
0.220
0.270
0.320
0.0087 0.0106 0.0126
D1
0.561
0.605
0.649
0.0221 0.0238 0.0255
D2
0.355
0.380
0.405
C2
Nom
1 2 3
Min
# per tape and
reel
Min
A2
Custom CSP
Bumps
Dim
B4
B3
PACKAGE DIMENSIONS
Package
SIDE
VIEW
C1
B2
B1
Max
D1
0.30 DIA.
D2
63/37 Sn/Pb (Eutectic) or
96.8/2.6/0.6 Sn/Ag/Cu (Lead-free)
SOLDER BUMPS
DIMENSIONS IN MILLIMETERS
Package Dimensions for
CSPEMI202A Chip Scale Package
0.0140 0.0150 0.0159
3500 pieces
Controlling dimension: millimeters
CSP Tape and Reel Specifications
PART NUMBER
CHIP SIZE (mm)
POCKET SIZE (mm)
B0 X A0 X K0
TAPE WIDTH
W
REEL
DIAMETER
QTY PER
REEL
P0
P1
CSPEMI202A
1.41 X 0.95 X 0.6
1.52 X 1.07 X 0.72
8mm
178mm (7")
3500
4mm
4mm
Po
Top
Cover
Tape
10 Pitches Cumulative
Tolerance On Tape
±0.2 mm
Ao
W
Bo
Ko
For Tape Feeder Reference
Only including Draft.
Concentric Around B.
Embossment
P1
Center Lines
of Cavity
User Direction of Feed
Figure 6. Tape and Reel Mechanical Data
© 2003 California Micro Devices Corp. All rights reserved.
6
430 N. McCarthy Blvd., Milpitas, CA 95035-5112 ▲ Tel: 408.263.3214
▲ Fax: 408.263.7846
▲
www.calmicro.com
10/09/03
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