MCNIX MX23L3211TC-10G 32m-bit mask rom (8/16-bit output) Datasheet

MX23L3211
32M-BIT MASK ROM (8/16-BIT OUTPUT)
• Current
- Operating:40mA
- Standby:5uA
• Supply voltage
- 3.0V ~ 3.6V for 90ns and 70ns speed grades
- 2.7V ~ 3.6V for 100ns and 120ns speed grades
• Package
- 44 pin SOP (500mil)
- 48 pin TSOP (12mm x 20mm)
FEATURES
• Bit organization
- 4M x 8 (byte mode)
- 2M x 16 (word mode)
• Fast access time
- Random access: 70ns (max.)
- Page access: 25ns (max.)
• Page Size
- 8 words per page
PIN CONFIGURATION
NC
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE/CE
VSS
OE/OE
D0
D8
D1
D9
D2
D10
D3
D11
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
MX23L3211
44 SOP
PIN DESCRIPTION
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
24
23
Symbol
A0~A20
D0~D14
D15/A-1
A20
A19
A8
A9
A10
A11
A12
A13
A14
A15
A16
BYTE
VSS
D15/A1
D7
D14
D6
D13
D5
D12
D4
VCC
CE
OE
Byte
VCC
VSS
NC
Pin Function
Address Inputs
Data Outputs
D15 (Word Mode)/ LSB Address
(Byte Mode)
Chip Enable Input
Output Enable Input
Word/ Byte Mode Selection
Power Supply Pin
Ground Pin
No Connection
ORDER INFORMATION
Part No.
MX23L3211MC-70
Access Time
Page Access Time
70ns
25ns
Package
Remark
44 pin SOP
MX23L3211MC-90
90ns
25ns
44 pin SOP
MX23L3211MC-10
100ns
30ns
44 pin SOP
MX23L3211MC-12
120ns
50ns
44 pin SOP
MX23L3211MC-10G
100ns
30ns
44 pin SOP
Pb-free
MX23L3211MC-12G
120ns
50ns
44 pin SOP
Pb-free
MX23L3211TC-90
90ns
25ns
48 pin TSOP
MX23L3211TC-10
100ns
30ns
48 pin TSOP
MX23L3211TC-12
120ns
50ns
48 pin TSOP
MX23L3211TC-10G
100ns
30ns
48 pin TSOP
Pb-free
MX23L3211TC-12G
120ns
50ns
48 pin TSOP
Pb-free
MX23L3211RC-90
90ns
25ns
48 pin TSOP(Reverse type)
MX23L3211RC-10
100ns
30ns
48 pin TSOP(Reverse type)
MX23L3211RC-12
120ns
50ns
48 pin TSOP(Reverse type)
P/N:PM0411
REV. 2.9, MAY 11, 2004
1
MX23L3211
48 TSOP (Normal Type)
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
BYTE
A16
A15
A14
A13
A12
A11
A10
A9
A8
A19
VSS
A20
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
MX23L3211
(Normal Type)
VSS
VSS
D15/A-1
D7
D14
D6
D13
D5
D12
D4
VCC
VCC
NC
D11
D3
D10
D2
D9
D1
D8
D0
OE
VSS
VSS
48 TSOP (Reverse Type)
VSS
VSS
D15/A-1
D7
D14
D6
D13
D5
D12
D4
VCC
VCC
NC
D11
D3
D10
D2
D9
D1
D8
D0
OE
VSS
VSS
48
47
46
45
44
43
42
41
40
39
38
37
36
35
34
33
32
31
30
29
28
27
26
25
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
MX23L3211
(Reverse Tpye)
BYTE
A16
A15
A14
A13
A12
A11
A10
A9
A8
A19
VSS
A20
A18
A17
A7
A6
A5
A4
A3
A2
A1
A0
CE
MODE SELECTION
CE
H
L
L
L
OE
X
H
L
L
Byte
X
X
H
L
D15/A-1
X
X
Output
Input
D0~D7
High Z
High Z
D0~D7
D0~D7
P/N:PM0411
D8~D15
High Z
High Z
D8~D15
High Z
Mode
Word
Byte
Power
Stand-by
Active
Active
Active
REV. 2.9, MAY 11, 2004
2
MX23L3211
BLOCK DIAGRAM
A0/(A-1)
A2
A3
Address
Buffer
Memory
Array
Page
Decoder
Page
Buffer
Word/
Byte
Output
Buffer
A20
D0
D15/(D7)
CE
BYTE
OE
ABSOLUTE MAXIMUM RATINGS
Item
Symbol
Ratings
Supply Voltage Relative to VSS
VCC
-0.3V to 4.3V
Voltage on any Pin Relative to VSS
VIN
-0.5V to VCC + 2.0V
Ambient Operating Temperature
Topr
0° C to 70° C
Storage Temperature
Tstg
-65° C to 125° C
DC CHARACTERISTICS (Ta = 0° C ~ 70° C, VCC = 2.7V~3.6V)
Item
Output High Voltage
Output Low Voltage
Input High Voltage
Input Low Voltage
Input Leakage Current
Output Leakage Current
Operating Current
Standby Current (TTL)
Standby Current (CMOS)
Input Capacitance
Output Capacitance
Symbol
VOH
VOL
VIH
VIL
ILI
ILO
ICC1
ISTB1
ISTB2
CIN
COUT
MIN.
2.4V
2.2V
-0.3V
-
MAX.
0.4V
VCC+0.3V
0.8V
5uA
5uA
40mA
1mA
5uA
10pF
10pF
P/N:PM0411
Conditions
IOH = -400uA
IOL = 1.6mA
0V, VCC
0V, VCC
tRC = 100ns, all output open
CE = VIH
CE>VCC-0.2V
Ta = 25° C, f = 1MHZ
Ta = 25° C, f = 1MHZ
REV. 2.9, MAY 11, 2004
3
MX23L3211
AC CHARACTERISTICS (Ta = 0° C ~ 70° C, VCC =2.7V~3.6V)
Item
Read Cycle Time
Address Access Time
Chip Enable Access Time
Page Mode Access Time
Output Enable Time
Output Hold After Address
Output High Z Delay
Symbol
tRC
tAA
tACE
tPA
tOE
tOH
tHZ*
23L3211-70*
MIN.
MAX.
70ns
70ns
70ns
25ns
25ns
0ns
20ns
23L3211-90
MIN.
MAX.
90ns
90ns
90ns
25ns
25ns
0ns
20ns
23L3211-10
MIN.
MAX.
100ns 100ns
100ns
30ns
30ns
0ns
20ns
23L3211-12
MIN.
MAX.
120ns 120ns
120ns
50ns
50ns
0ns
20ns
Note:
1. Output high-impedance delay (tHZ) is measured from OE or CE going high, and this parameter guaranteed by
design over the full voltage and temperature operating range - not tested.
2. For 70ns speed grade, the VCC range is 3.0~3.6V, operating temperature 0~55° C, and output load is 30pF.
AC Test Conditions
Input Pulse Levels
Input Rise and Fall Times
Input Timing Level
Output Timing Level
Output Load
0.4V~ 2.6V
10ns
1.4V
1.4V
See Figure
IOH (load)=-0.4mA
DOUT
IOL (load)=1.6mA
C<100pF
Note:
No output loading is present in tester load board.
Active loading is used and under software programming control.
Output loading capacitance includes load board's and all stray capacitance.
P/N:PM0411
REV. 2.9, MAY 11, 2004
4
MX23L3211
TIMING DIAGRAM
RANDOM READ
ADD
ADD
ADD
ADD
tRC
tACE
CE
tOE
OE
tOH
tAA
VALID
DATA
VALID
tHZ
VALID
PAGE READ
VALID ADD
A3-A20
(A-1),A0,A1,A2
2'nd ADD
1'st ADD
tAA
tPA
VALID
DATA
3'rd ADD
VALID
VALID
Note: CE, OE are enable.
Page size is 8 words in 16-bit mode, 16 bytes in 8-bit mode.
P/N:PM0411
REV. 2.9, MAY 11, 2004
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MX23L3211
PACKAGE INFORMATION
P/N:PM0411
REV. 2.9, MAY 11, 2004
6
MX23L3211
P/N:PM0411
REV. 2.9, MAY 11, 2004
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MX23L3211
P/N:PM0411
REV. 2.9, MAY 11, 2004
8
MX23L3211
REVISION HISTORY
REVISION
2.0
2.1
2.2
2.3
2.4
2.5
2.6
2.7
2.8
2.9
DESCRIPTION
Output hold after address (tOH) spec is revised as 0ns(min.)
120ns speed grade's voltage range is revised as 2.7V~3.6V
Modify Package Information
1. Add supply voltage relative to VSS
2. Change voltage on any pin relative to VSS:-0.5V to VCC+2.0
1. Supply voltage change to 2.7V ~ 3.6V
1. Modify VIN : -0.5V to VCC + 2V --> -0.5V to VCC + 2.0V
2. Add 48-TSOP reverse type package information
To modify Package Information
1. Add access time:70ns, 90ns
1. Add MX23L3211MC-90 in Order Information
1. Modify Timing Diagram--Page Read
1. Add Pb-free package in order information
P/N:PM0411
PAGE
P4
P1
P6~7
P3
P3
P1
P3
P8
P6~8
P1,4
P1
P5
P1
DATE
JAN/22/1999
JUL/17/2001
JUL/25/2002
JUL/26/2002
AUG/21/2002
NOV/21/2002
JAN/20/2003
JAN/22/2003
JAN/23/2003
MAY/11/2004
REV. 2.9, MAY 11, 2004
9
MX23L3211
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