ON NCP431AVSNT1G Programmable precision reference Datasheet

NCP431A, SC431A,
NCP431B, SC431B,
NCP432B, SC432B Series
Programmable Precision
References
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The NCP431/NCP432 integrated circuits are three−terminal
programmable shunt regulator diodes. These monolithic IC voltage
references operate as a low temperature coefficient zener which is
programmable from Vref to 36 V using two external resistors. These
devices exhibit a wide operating current range of 40 mA to 100 mA
with a typical dynamic impedance of 0.22 W. The characteristics of
these references make them excellent replacements for zener diodes in
many applications such as digital voltmeters, power supplies, and op
amp circuitry. The 2.5 V reference makes it convenient to obtain a
stable reference from 5.0 V logic supplies, and since the NCP431/
NCP432 operates as a shunt regulator, it can be used as either a
positive or negative voltage reference. Low minimum operating
current makes this device an ideal choice for secondary regulators in
SMPS adapters with extremely low no−load consumption.
12
TO−92
LP SUFFIX
CASE 29−11
Pin 1. Reference
2. Anode
3. Cathode
3
SOIC−8 NB
D SUFFIX
CASE 751
8
1
Features
1
Cathode
• Programmable Output Voltage to 36 V
• Low Minimum Operating Current: 40 mA, Typ @ 25°C
• Voltage Reference Tolerance: ±0.5%, Typ @ 25°C
Anode
Anode
Anode
Anode
NC
NC
(Top View)
(NCP431B/NCP432B)
• Low Dynamic Output Impedance, 0.22 W Typical
• Sink Current Capability of 40 mA to 100 mA
• Equivalent Full−Range Temperature Coefficient of 50 ppm/°C
•
•
•
Reference
Typical
Temperature Compensated for Operation over Full Rated Operating
Temperature Range
SC Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q100 Qualified and
PPAP Capable
These are Pb−Free Devices
3
1
SOT−23−3
SN SUFFIX
CASE 318
2
NCP431/SC431
Pin 1. Reference
2. Cathode
3. Anode
NCP432/SC432
Pin 1. Cathode
2. Reference
3. Anode
Typical Applications
•
•
•
•
•
ORDERING AND MARKING INFORMATION
Voltage Adapters
Switching Power Supply
Precision Voltage Reference
Charger
Instrumentation
© Semiconductor Components Industries, LLC, 2016
June, 2016 − Rev. 14
See detailed ordering and shipping information in the package
dimensions section on page 14 of this data sheet.
1
Publication Order Number:
NCP431/D
NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series
Reference
(R)
Cathode
(K)
Reference
(R)
Cathode
(K)
2.5 V ref
Anode
(A)
Anode
(A)
Figure 1. Symbol
Figure 2. Representative Block diagram
This device contains 20 active transistors
MAXIMUM RATINGS (Full operating ambient temperature range applies, unless otherwise noted)
Symbol
VKA
Rating
Value
Unit
37
V
−100 to +150
mA
−5 to +10
mA
150
°C
Cathode to Anode Voltage
IK
Cathode Current Range, Continuous
Iref
Reference Input Current Range, Continuous
TJ
Operating Junction Temperature
TA
Operating Ambient Temperature Range
−40 to +125
°C
Tstg
Storage Temperature Range
−65 to +150
°C
PD
Total Power Dissipation @ TA = 25°C
Derate above 25°C Ambient Temperature
D, LP Suffix Plastic Package
SN1 Suffix Plastic Package
PD
HBM
CDM
W
0.70
0.52
Total Power Dissipation @ TC = 25°C
Derate above 25°C Case Temperature
D, LP Suffix Plastic Package
1.5
ESD Rating (Note 1)
Human Body Model per JEDEC JESD22−A114F
Charged Device Model per JEDEC JESD22−C101E
W
V
>2000
>1000
Stresses exceeding those listed in the Maximum Ratings table may damage the device. If any of these limits are exceeded, device functionality
should not be assumed, damage may occur and reliability may be affected.
1. This device contains latch−up protection and exceeds ±100 mA per JEDEC standard JESD78.
RECOMMENDED OPERATING CONDITIONS
Symbol
VKA
IK
Min
Max
Unit
Cathode to Anode Voltage
Condition
Vref
36
V
Cathode Current
0.04
100
mA
Functional operation above the stresses listed in the Recommended Operating Ranges is not implied. Extended exposure to stresses beyond
the Recommended Operating Ranges limits may affect device reliability.
THERMAL CHARACTERISTICS
Symbol
Characteristic
LP Suffix Package
(50 mm2 x 35 mm Cu)
D Suffix Package
(50 mm2 x 35 mm Cu)
SN Suffix Package
(10 mm2 x 35 mm Cu)
Unit
RQJA
Thermal Resistance,
Junction−to−Ambient
176
210
255
°C/W
RQJL
Thermal Resistance,
Junction−to−Lead (Lead 3)
75
68
80
°C/W
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2
NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series
ELECTRICAL CHARACTERISTICS (TA = 25°C, unless otherwise noted.)
NCP431AC
Symbol
Vref
Min
Characteristic
Reference Input Voltage
VKA = Vref, IK = 1 mA
TA = 25°C
TA = Tlow to Thigh (Figure 3, Note 2)
2.475 2.500 2.525
2.475 2.500 2.525
Reference Input Voltage Deviation Over Temperature Range (Figure 3, Notes 3, 4)
VKA= Vref, IK = 1 mA
DVref
DVKA
Ratio of Change in Reference Input Voltage to
Change in Cathode to Anode Voltage
IK = 1 mA (Figure 4),
DVKA = 10 V to Vref
DVKA = 36 V to 10 V
DIrefT
Max
Min
Typ
Max
Min
Typ
Max
Unit
V
DVrefT
Iref
Typ
NCP431AV/
SC431AV
NCP431AI
−
−
−
2.475 2.500 2.525 2.475 2.500 2.525
2.465 2.500 2.525 2.460 2.500 2.525
−
5.0
10
−
10
15
mV
mV/
V
−
−
−1.85
−0.80
−3.1
−1.8
−
−
−1.85
−0.80
−3.1
−1.8
−
−
−1.85
−0.80
−3.1
−1.8
Reference Input Current (Figure 4)
IK = 1 mA, R1 = 220 k, R2 = R
TA = −40°C to +125°C
−
81
190
−
81
190
−
81
190
Reference Input Current Deviation Over Temperature Range (Figure 4, Note 3)
IK = 1 mA, R1 = 10 k, R2 = R
−
22
55
−
22
55
−
22
55
nA
nA
Imin
Minimum Cathode Current For Regulation
VKA = Vref (Figure 3)
−
40
60
−
40
60
−
40
60
mA
Ioff
Off−State Cathode Current (Figure 5)
VKA = 36 V, Vref = 0 V
−
180
1000
−
180
1000
−
180
1000
nA
Dynamic Impedance (Figure 3, Note 5)
VKA = Vref, DIK = 1.0 mA to 100 mA
f v 1.0 kHz
−
0.22
0.5
−
0.22
0.5
−
0.22
0.5
W
|ZKA|
2. Tlow
= −40°C for NCP431AI, NCP431AV, SC431AV
= 0°C for NCP431AC
Thigh = 70°C for NCP431AC
= 85°C for NCP431AI
= 125°C for NCP431AV, SC431AV
3. Guaranteed by design
4. The deviation parameter DVrefT is defined as the difference between the maximum and minimum values obtained over the full operating
ambient temperature range that applies.
ǒ
The average temperature coefficient of the reference input voltage, Vref is defined as:
V
ppm
ref ° C
+
DV
V
ref
@25° C
ref
DT
Ǔ
106
+
A
DV
DT
ref
10 6
ǒVref@25° CǓ
A
aVref can be positive or negative depending on whether Vref Min or Vref Max occurs at the lower ambient temperature.
Example: DVrefT = 17 mV and slope is positive
Vref = 2.5 V, DTA = 165°C (from −40°C to +125°C)
aV
ref
+
0.017 @ 10 6
165 @ 2.5
+ 41.2 ppmń° C
5. The dynamic impedance ZKA is defined as: (|ZKA| = (DVKA/DIK). When the device is programmed with two external resistors, R1 and R2,
the total dynamic impedance of the circuit is defined as: |ZKA’| [ |ZKA| (1 + (R1/R2)).
6. SC431AVSNT1G − Tlow = −40°C, Thigh = 125°C. Guaranteed by design. SC Prefix for Automotive and Other Applications Requiring Unique
Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable.
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3
NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series
ELECTRICAL CHARACTERISTICS (TA = 25°C, unless otherwise noted.)
NCP431BC
NCP432BC
Symbol
Vref
Reference Input Voltage
VKA = Vref, IK = 1 mA
TA = 25°C
TA = Tlow to Thigh (Figure 3, Note 7)
DVrefT
Reference Input Voltage Deviation Over Temperature Range (Figure 3, Notes 8, 9)
VKA= Vref, IK = 1 mA
DVref
DVKA
Ratio of Change in Reference Input Voltage to
Change in Cathode to Anode Voltage
IK = 1 mA (Figure 4),
DVKA = 10 V to Vref
DVKA = 36 V to 10 V
Iref
DIrefT
Min
Characteristic
Typ
NCP431BI
NCP432BI
Max
Min
Typ
NCP/SC431BV
NCP/SC432BV
Max
Min
Typ
Max
Unit
V
2.4875 2.500 2.5125 2.4875 2.500 2.5125 2.4875 2.500 2.5125
2.4875 2.500 2.5125 2.4775 2.500 2.5125 2.4725 2.500 2.5125
−
−
−
−
−
−
−
5.0
10
1−
−
−
10
15
15
mV
mV/
V
−
−
−1.85
−0.80
−3.1
−1.8
−
−
−1.85
−0.80
−3.1
−1.8
−
−
−1.85
−0.80
−3.1
−1.8
Reference Input Current (Figure 4)
IK = 1 mA, R1 = 220 k, R2 = R
TA = −40°C to +125°C
−
81
190
−
81
190
−
81
190
Reference Input Current Deviation Over Temperature Range (Figure 4, Note 8)
IK = 1 mA, R1 = 10 k, R2 = R
−
22
55
−
22
55
−
22
55
nA
nA
Imin
Minimum Cathode Current For Regulation
VKA = Vref (Figure 3)
−
40
60
−
40
60
−
40
60
mA
Ioff
Off−State Cathode Current (Figure 5)
VKA = 36 V, Vref = 0 V
−
180
1000
−
180
1000
−
180
1000
nA
Dynamic Impedance (Figure 3, Note 10)
VKA = Vref, DIK = 1.0 mA to 100 mA
f v 1.0 kHz
−
0.22
0.5
−
0.22
0.5
−
0.22
0.5
W
|ZKA|
7. Tlow
= −40°C for NCP431BI, NCP431BV, NCP432BI, NCP432BV, SC431B, SC432B
= 0°C for NCP431BC, NCP432BC
Thigh = 70°C for NCP431BC, NCP432BC
= 85°C for NCP431BI, NCP432BI
= 125°C for NCP431BV, NCP432BV, SC431BV, SC432BV
8. Guaranteed by design
9. The deviation parameter DVrefT is defined as the difference between the maximum and minimum values obtained over the full operating
ambient temperature range that applies.
ǒ
The average temperature coefficient of the reference input voltage, Vref is defined as:
V
ppm
ref ° C
+
DV
V
ref
@25° C
ref
DT
Ǔ
106
+
A
DV
DT
ref
10 6
ǒVref@25° CǓ
A
aVref can be positive or negative depending on whether Vref Min or Vref Max occurs at the lower ambient temperature.
Example: DVrefT = 17 mV and slope is positive
Vref = 2.5 V, DTA = 165°C (from −40°C to +125°C)
aV
ref
+
0.017 @ 10 6
165 @ 2.5
+ 41.2 ppmń° C
10. The dynamic impedance ZKA is defined as: (|ZKA| = (DVKA/DIK). When the device is programmed with two external resistors, R1 and R2,
the total dynamic impedance of the circuit is defined as: |ZKA’| [ |ZKA| (1 + (R1/R2))
11. SC431BVSNT1G, SC432BVSNT1G − Tlow = −40°C, Thigh = 125°C. Guaranteed by design. SC Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP Capable.
Product parametric performance is indicated in the Electrical Characteristics for the listed test conditions, unless otherwise noted. Product
performance may not be indicated by the Electrical Characteristics if operated under different conditions.
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NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series
Input
Input
VKA
V KA
Input
V KA
IK
Ioff
R1
Iref
IK
Vref
R2
V
Figure 3. Test Circuit for VKA = Vref
KA
+V
ref
Figure 4. Test Circuit for VKA > Vref
60.0
150.0
Input
100.0
IK, CATHODE CURRENT (mA)
VKA = Vref
TA = 25°C
VKA
IK
50.0
0.0
Figure 5. Test Circuit for Ioff
VKA = Vref
TA = 25°C
Input
40.0
VKA
IMin
IK
20.0
0.0
−20.0
−50.0
−100.0
−1.0
−40.0
0.0
1.0
2.0
3.0
−60.0
−1.0
0.0
VKA, CATHODE VOLTAGE (V)
1.0
Figure 7. Cathode Current versus Cathode
Voltage
80.00
70.00
60.00
50.00
40.00
30.00
20.00
10.00
0.00
−50
−25
2.0
VKA, CATHODE VOLTAGE (V)
Figure 6. Cathode Current versus Cathode
Voltage
IMIN, (mA)
IK, CATHODE CURRENT (mA)
ǒ1 ) R1
Ǔ ) Iref @ R1
R2
Vref
0
25
50
75
100
125
TA, AMBIENT TEMPERATURE (°C)
Figure 8. Minimum Cathode Current Regulation
versus Ambient Temperature
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5
3.0
VKA = Vref
IK = 1 mA
VKA
Input
Iref, REFERENCE INPUT CURRENT (nA)
2540
2530
IK
2520
Vref
2510
2500
2490
2480
2470
2460
−50
−25
0
25
50
75
100
125
Input
IK = 1 mA
VKA
110
IK
220k
100
Iref
90
80
70
60
50
40
−50
−25
0
25
50
75
100
125
TA, AMBIENT TEMPERATURE (°C)
TA, AMBIENT TEMPERATURE (°C)
Figure 10. Reference Input Current versus
Ambient temperature
0
Input
VKA
IK
R1
−10
R2
Vref
−20
−30
VKA = Vref
IK = 1 mA
−40
0
10
20
30
40
100
VKA = 36V
V ref = 0V
Input
VKA
Ioff
10
1
−50
−25
0
25
50
75
100
125
VKA, CATHODE VOLTAGE (V)
TA, AMBIENT TEMPERATURE (°C)
Figure 11. Change in Reference Input Voltage
versus Cathode Voltage
Figure 12. Off−State Cathode Current versus
Ambient Temperature
10
0.320
1.0k
Output
|ZKA|, DYNAMIC IMPEDANCE (W)
|ZKA|, DYNAMIC IMPEDANCE (W)
120
Figure 9. Reference Input Voltage versus
Ambient temperature
Ioff, OFF−STATE CATHODE CURRENT (nA)
DVref, REFERENCE INPUT VOLTAGE (mV)
Vref, REFERENCE INPUT VOLTAGE (mV)
NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series
IK
50
GND
1
DIK = 1 mA to 100 mA
TA = 25°C
0.1
0.001
0.01
0.1
1
f, FREQUENCY (MHz)
10
0.300
0.280
0.260
VKA = V ref
DI K = 1.0 mA to 100mA
f<1.0 kHz
0.240
Output
1.0k
50
0.220
GND
0.200
−50
100
Figure 13. Dynamic Impedance versus
Frequency
IK
−25
0
25
50
75
100
TA, AMBIENT TEMPERATURE (°C)
125
Figure 14. Dynamic Impedance versus Ambient
Temperature
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6
60
800
Output
50
9.0mF
40
IK
15k
230
NOISE VOLTAGE (nV/√HZ)
AVOL, OPEN LOOP VOLTAGE GAIN (dB)
NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series
8.25k
GND
30
20
10
0
IK = 100 mA to 10 mA
TA = 25°C
700
600
500
400
300
10k
100
100k
f, FREQUENCY (Hz)
1M
10M
10
100
1000
10k
f, FREQUENCY (Hz)
Figure 15. Open−Loop Voltage Gain versus
Frequency
Figure 16. Spectral Noise Density
Input
Monitor
220
3.0
2.0
Pulse
Generator
f = 100kHz
Output
Output
IK, CATHODE CURRENT (mA)
4.0
VOLTAGE SWING (V)
VKA
IK
200
0
−10
1000
VKA = V ref
IK = 1 mA
Input TA = 25°C
50
GND
1.0
10
5.0
Input
0
0
4.0
8.0
12
16 20 24
t, TIME (ms)
28
32
36
40
CL, LOAD CAPACITANCE (nF)
Figure 17. Pulse Response
Figure 18. Stability Boundary Conditions
Figure 19. Stability Boundary Conditions for
Small Cathode Current
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7
100k
NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series
150
150
VOUT
VOUT
IK
V+
IK
V+
CL
Figure 20. Test Circuit For Curve A of Stability
Boundary Conditions
10k
CL
Figure 21. Test Circuit For Curve B And C of
Stability Boundary Conditions
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NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series
TYPICAL APPLICATIONS
V+
V+
VOUT
VOUT
R1
IK
R1
CL
R2
R2
V
OUT
ǒ
+ 1)
R1
R2
Ǔ Vref
V
Figure 22. Shunt Regulator
OUT
ǒ
+ 1)
R1
R2
Ǔ Vref
Figure 23. High Current Shunt
Regulator
V+
VOUT
MC7805
V+
In
Out
Common
VOUT
R1
R1
R2
R2
V
V
OUT
ǒ
+ 1)
OUT(min)
R1
R2
+V
Ǔ Vref
ref
V
) 5.0 V
V
V
Figure 24. Output Control for a
Tree−Terminal Fixed Regulator
OUT
ǒ
+ 1)
IN(min)
+V
OUT(min)
R1
R2
Ǔ Vref
OUT
+V
)V
be
ref
Figure 25. Series Pass
Regulator
V+
ISink
RCL
IOUT
V+
V
I
V
I
OUT
+
R
ref
Sink
+
ref
Rs
RS
CL
Figure 26. Constant Current Source
Figure 27. Constant Current
Sink
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NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series
VOUT
V+
V
ǒ
(trip) + 1 )
OUT
R1
R2
VOUT
V+
R1
R1
R2
R2
Ǔ Vref
V
Figure 28. Triac Crowbar
R1
R2
Ǔ Vref
Figure 29. SRC Crowbar
V+
VOUT
V+
R1
I
ǒ
(trip) + 1 )
OUT
R3
R1
VOUT
VIN
VIN
R2
R4
V
th
+V
VOUT
< Vref
V+
> Vref
[2.0 V
ref
Figure 31. Single−Supply Comparator with
Temperature−Compensated Threshold
L.E.D. indicator is ‘on’ when V+ is between the uppper
and lower limits.
ǒ
Lower Limit + 1 )
ǒ
Upper Limit + 1 )
R1
R2
R3
R4
ǓVref
ǓVref
Figure 30. Voltage Monitoring
150 mH @ 2.0 A
Vin = 10 to 20 V
TIP115
VOUT = 5.0 V
IOUT = 1.0 A
1.0k
1N5823
4.7 k
4.7k
100k
MPSA20
2200 mF
0.1 mF
470 mF
0.01 mF
4.7k
2.2k
51k
10
Figure 32. Step−Down Switching Converter
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NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series
APPLICATIONS INFORMATION
The NCP431/NCP432 is a programmable precision
reference which is used in a variety of ways. It serves as a
reference voltage in circuits where a non−standard reference
voltage is needed. Other uses include feedback control for
driving an optocoupler in power supplies, voltage monitor,
constant current source, constant current sink and series pass
regulator. In each of these applications, it is critical to
maintain stability of the device at various operating currents
and load capacitances. In some cases the circuit designer can
estimate the stabilization capacitance from the stability
boundary conditions curve provided in Figure 18. However,
these typical curves only provide stability information at
specific cathode voltages and at a specific load condition.
Additional information is needed to determine the
capacitance needed to optimize phase margin or allow for
process variation.
A simplified model of the NCP431/NCP432 is shown in
Figure 33. When tested for stability boundaries, the load
resistance is 150 W. The model reference input consists of an
input transistor and a dc emitter resistance connected to the
device anode. A dependent current source, Gm, develops a
current whose amplitude is determined by the difference
between the 1.78 V internal reference voltage source and the
input transistor emitter voltage. A portion of Gm flows
through compensation capacitance, CP2. The voltage across
CP2 drives the output dependent current source, Go, which
is connected across the device cathode and anode.
Model component values are:
Vref = 1.78 V
Gm = 0.3 + 2.7 exp (−IC/26 mA)
where IC is the device cathode current and Gm is in mhos
Go = 1.25 (Vcp2) mmhos.
Resistor and capacitor typical values are shown on the
model. Process tolerances are ±20% for resistors, ±10% for
capacitors, and ±40% for transconductances.
An examination of the device model reveals the location
of circuit poles and zeroes:
P1 +
P2 +
Z1 +
1
1
+
+ 7.96 kHz
2pR GMC P1
2p @ 1.0M @ 20 pF
1
2pR P2C P2
+
1
2p @ 10M @ 0.265 pF
+ 60 kHz
1
1
+
+ 500 kHz
2pR Z1C P1
2p @ 15.9k @ 20 pF
In addition, there is an external circuit pole defined by the
load:
PL +
1
2pR LC L
Also, the transfer dc voltage gain of the NCP431 is:
G + G MR GMGoR L
Example 1:
IC=10 mA, RL= 230 W,CL= 0. Define the transfer gain.
The DC gain is:
G + G MR GMGoR L + (2.138)(1.0M)(1.25m)(230)
+ 615 + 56 dB
Loop gain + G
8.25k
8.25k ) 15k
+ 218 + 47 dB
The resulting transfer function Bode plot is shown in
Figure 34. The asymptotic plot may be expressed as the
following equation:
Av + 615
ǒ1 )
ǒ1 )
jf
8.0 kHz
jf
500 kHz
Ǔ
Ǔǒ1 )
jf
60 kHz
Ǔ
The Bode plot shows a unity gain crossover frequency of
approximately 600 kHz. The phase margin, calculated from
the equation, would be 55.9°. This model matches the
Open−Loop Bode Plot of Figure 15. The total loop would
have a unity gain frequency of about 300 kHz with a phase
margin of about 44°.
Figure 33. Simplified NCP431/NCP432 Device Model
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NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series
NCP431/NCP432 OPEN−LOOP VOLTAGE GAIN
VERSUS FREQUENCY
NCP431/NCP432 OPEN−LOOP BODE PLOT WITH
LOAD CAP
Figure 35. Example 2 Circuit Open Loop Gain Plot
Figure 34. Example 1 Circuit Open Loop Gain Plot
With three poles, this system is unstable. The only hope
for stabilizing this circuit is to add a zero. However, that can
only be done by adding a series resistance to the output
capacitance, which will reduce its effectiveness as a noise
filter. Therefore, practically, in reference voltage
applications, the best solution appears to be to use a smaller
value of capacitance in low noise applications or a very large
value to provide noise filtering and a dominant pole rolloff
of the system.
Example 2.
IC = 7.5 mA, RL = 2.2 kW, CL = 0.01 mF. Cathode tied to
reference input pin. An examination of the data sheet
stability boundary curve (Figure 18) shows that this value of
load capacitance and cathode current is on the boundary.
Define the transfer gain.
The DC gain is:
G + G MR GMGoR L + (2.138)(1.0M)(1.25m)(230)
+ 6389 + 76 dB
The NCP431/NCP432 is often used as a regulator in
secondary side of a switch mode power supply (SMPS).
The benefit of this reference is high and stable gain under
low bias currents. Figure 36 shows dependence of the gain
(dynamic impedance) on the bias current. Value of
minimum cathode current that is needed to assure stable gain
is 80 mA maximum.
The resulting open loop Bode plot is shown in Figure 35.
The asymptotic plot may be expressed as the following
equation:
Av + 615
ǒ1 )
jf
8.0 kHz
ǒ1 )
500 kHz
Ǔǒ1 )
60 kHz
jf
jf
Ǔ
Ǔǒ1 )
jf
7.2 kHz
Ǔ
Note that the transfer function now has an extra pole
formed by the load capacitance and load resistance.
Note that the crossover frequency in this case is about
250 kHz, having a phase margin of about −46°. Therefore,
instability of this circuit is likely.
www.onsemi.com
12
NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series
Figure 37. SMPS Secondary Side and Feedback
Connection on Primary Side
Figure 36. Knee of Reference
Regulator with TL431 or other references in secondary
side of a SMPS needs bias resistor to increase cathode
current to reach high and stable gain (refer to Figure 37).
This bias resistor does not have to be used in regulator with
NCP431/NCP432 thanks to its low minimum cathode
current.
The NCP431/NCP432 operates with very low leakage
and reference input current. Sum of these currents is lower
than 100 nA. Regulator with the NCP431/NCP432
minimizes parasitic power consumption.
The best way to achieve extremely low no−load
consumption in SMPS applications is to use
NCP431/NCP432 as regulator on the secondary side. The
consumption is reduced by minimum parasitic consumption
and very low bias current of NCP431/NCP432.
www.onsemi.com
13
NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series
MARKING DIAGRAMS
NCP43
1xxxx
YWW G
G
8
N431xx
ALYW
G
xxx MG
G
1
1
xx, xxx, xxx = Specific Device Code
A
= Assembly Location
L
= Wafer Lot
Y
= Year
M
= Date Code
W, WW
= Work Week
G
= Pb−Free Package
(Note: Microdot may be in either location)
ORDERING INFORMATION
Operating
Temperature Range
Package
Shipping†
1%
SOIC−8
(Pb−Free)
2500 / Tape & Reel
VRF
1%
SOT−23−3
(Pb−Free)
3000 / Tape & Reel
NCP431BCSNT1G
VRJ
0.5%
SOT−23−3
(Pb−Free)
3000 / Tape & Reel
NCP432BCSNT1G
VRM
0.5%
SOT−23−3
(Pb−Free)
3000 / Tape & Reel
ACLP
1%
TO−92 (TO−226)
(Pb−Free)
2000 / Tape & Reel
NCP431AIDR2G
AI
1%
SOIC−8
(Pb−Free)
2500 / Tape & Reel
NCP431AISNT1G
VRG
1%
SOT−23−3
(Pb−Free)
3000 / Tape & Reel
NCP431BISNT1G
VRK
0.5%
SOT−23−3
(Pb−Free)
3000 / Tape & Reel
NCP432BISNT1G
VRN
0.5%
SOT−23−3
(Pb−Free)
3000 / Tape & Reel
NCP431AILPRAG
AILP
1%
TO−92 (TO−226)
(Pb−Free)
2000 / Tape & Reel
NCP431AVDR2G
AV
1%
SOIC−8
(Pb−Free)
2500 / Tape & Reel
NCP431AVSNT1G /
SC431AVSNT1G*
VRH
1%
SOT−23−3
(Pb−Free)
3000 / Tape & Reel
NCP431AVLPRAG
AVLP
1%
TO−92 (TO−226)
(Pb−Free)
2000 / Tape & Reel
NCP431AVLPG
AVLP
1%
TO−92 (TO−226)
(Pb−Free)
2000 Units / Bag
NCP431BVSNT1G /
SC431BVSNT1G*
VRL
0.5%
SOT−23−3
(Pb−Free)
3000 / Tape & Reel
NCP432BVSNT1G /
SC432BVSNT1G*
VRP
0.5%
SOT−23−3
(Pb−Free)
3000 / Tape & Reel
Device
Marking
Tolerance
NCP431ACDR2G
AC
NCP431ACSNT1G
NCP431ACLPRAG
0°C to 70°C
−40°C to 85°C
−40°C to 125°C
†For information on tape and reel specifications, including part orientation and tape sizes, please refer to our Tape and Reel Packaging
Specifications Brochure, BRD8011/D.
*SC Prefix for Automotive and Other Applications Requiring Unique Site and Control Change Requirements; AEC−Q100 Qualified and PPAP
Capable.
www.onsemi.com
14
NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series
PACKAGE DIMENSIONS
TO−92 (TO−226)
CASE 29−11
ISSUE AN
A
B
STRAIGHT LEAD
R
P
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI
Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. CONTOUR OF PACKAGE BEYOND DIMENSION R
IS UNCONTROLLED.
4. LEAD DIMENSION IS UNCONTROLLED IN P AND
BEYOND DIMENSION K MINIMUM.
L
SEATING
PLANE
K
D
X X
G
J
H
V
C
SECTION X−X
1
N
DIM
A
B
C
D
G
H
J
K
L
N
P
R
V
INCHES
MIN
MAX
0.175
0.205
0.170
0.210
0.125
0.165
0.016
0.021
0.045
0.055
0.095
0.105
0.015
0.020
0.500
--0.250
--0.080
0.105
--0.100
0.115
--0.135
---
MILLIMETERS
MIN
MAX
4.45
5.20
4.32
5.33
3.18
4.19
0.407
0.533
1.15
1.39
2.42
2.66
0.39
0.50
12.70
--6.35
--2.04
2.66
--2.54
2.93
--3.43
---
N
A
R
BENT LEAD
B
P
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ASME Y14.5M, 1994.
2. CONTROLLING DIMENSION: MILLIMETERS.
3. CONTOUR OF PACKAGE BEYOND
DIMENSION R IS UNCONTROLLED.
4. LEAD DIMENSION IS UNCONTROLLED IN P
AND BEYOND DIMENSION K MINIMUM.
T
SEATING
PLANE
K
D
X X
G
J
V
1
C
SECTION X−X
N
www.onsemi.com
15
DIM
A
B
C
D
G
J
K
N
P
R
V
MILLIMETERS
MIN
MAX
4.45
5.20
4.32
5.33
3.18
4.19
0.40
0.54
2.40
2.80
0.39
0.50
12.70
--2.04
2.66
1.50
4.00
2.93
--3.43
---
NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series
PACKAGE DIMENSIONS
SOIC−8 NB
CASE 751−07
ISSUE AK
NOTES:
1. DIMENSIONING AND TOLERANCING PER
ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: MILLIMETER.
3. DIMENSION A AND B DO NOT INCLUDE
MOLD PROTRUSION.
4. MAXIMUM MOLD PROTRUSION 0.15 (0.006)
PER SIDE.
5. DIMENSION D DOES NOT INCLUDE DAMBAR
PROTRUSION. ALLOWABLE DAMBAR
PROTRUSION SHALL BE 0.127 (0.005) TOTAL
IN EXCESS OF THE D DIMENSION AT
MAXIMUM MATERIAL CONDITION.
6. 751−01 THRU 751−06 ARE OBSOLETE. NEW
STANDARD IS 751−07.
−X−
A
8
5
S
B
0.25 (0.010)
M
Y
M
1
4
K
−Y−
G
C
N
DIM
A
B
C
D
G
H
J
K
M
N
S
X 45 _
SEATING
PLANE
−Z−
0.10 (0.004)
H
M
D
0.25 (0.010)
M
Z Y
S
X
J
S
SOLDERING FOOTPRINT*
1.52
0.060
7.0
0.275
4.0
0.155
0.6
0.024
1.270
0.050
SCALE 6:1
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
www.onsemi.com
16
MILLIMETERS
MIN
MAX
4.80
5.00
3.80
4.00
1.35
1.75
0.33
0.51
1.27 BSC
0.10
0.25
0.19
0.25
0.40
1.27
0_
8_
0.25
0.50
5.80
6.20
INCHES
MIN
MAX
0.189
0.197
0.150
0.157
0.053
0.069
0.013
0.020
0.050 BSC
0.004
0.010
0.007
0.010
0.016
0.050
0 _
8 _
0.010
0.020
0.228
0.244
NCP431A, SC431A, NCP431B, SC431B, NCP432B, SC432B Series
PACKAGE DIMENSIONS
SOT−23 (TO−236)
CASE 318−08
ISSUE AP
NOTES:
1. DIMENSIONING AND TOLERANCING PER ANSI Y14.5M, 1982.
2. CONTROLLING DIMENSION: INCH.
3. MAXIMUM LEAD THICKNESS INCLUDES LEAD FINISH
THICKNESS. MINIMUM LEAD THICKNESS IS THE MINIMUM
THICKNESS OF BASE MATERIAL.
4. DIMENSIONS D AND E DO NOT INCLUDE MOLD FLASH,
PROTRUSIONS, OR GATE BURRS.
D
SEE VIEW C
3
HE
E
DIM
A
A1
b
c
D
E
e
L
L1
HE
q
c
1
2
b
0.25
e
q
A
L
A1
MIN
0.89
0.01
0.37
0.09
2.80
1.20
1.78
0.10
0.35
2.10
0°
MILLIMETERS
NOM
MAX
1.00
1.11
0.06
0.10
0.44
0.50
0.13
0.18
2.90
3.04
1.30
1.40
1.90
2.04
0.20
0.30
0.54
0.69
2.40
2.64
−−−
10 °
MIN
0.035
0.001
0.015
0.003
0.110
0.047
0.070
0.004
0.014
0.083
0°
INCHES
NOM
0.040
0.002
0.018
0.005
0.114
0.051
0.075
0.008
0.021
0.094
−−−
MAX
0.044
0.004
0.020
0.007
0.120
0.055
0.081
0.012
0.029
0.104
10°
L1
VIEW C
SOLDERING FOOTPRINT*
0.95
0.037
0.95
0.037
2.0
0.079
0.9
0.035
SCALE 10:1
0.8
0.031
mm Ǔ
ǒinches
*For additional information on our Pb−Free strategy and soldering
details, please download the ON Semiconductor Soldering and
Mounting Techniques Reference Manual, SOLDERRM/D.
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NCP431/D