ATMEL B10011S-MFPG1 Can transceiver ic Datasheet

Features
• Capability of Single-wire Operation
• Hardware Fault Recognition
• Inputs with High Common-mode and Differential-mode Interference Rejection Above
100 VPP due to External Filters at the Receiver Input
• Immunity Against Electromagnetic Interference
• Immunity Against Ground-voltage Offsets < 6 V
• Ruggedized Against ESD by MIL-STD-883C, Method 3015
Benefits
Systems which employ this device have the following benefits compared to solutions
using discrete components:
• High Reliability
CAN
Transceiver IC
B10011S
Applications
• Especially Suited for Truck and Van Applications
• Interface Between Truck and Trailer
• Interface Between Dashboard and Engine
Description
The CAN driver IC B10011S is a low-speed, high-level interface for 24 V (27 V) operation with transmission levels according to ISO WD 11992-1 (point-to-point interface
between trucks and trailers). It is developed for signal levels of 8/16 V and a speed of
up to 250 kbits/s.
This device allows transmission, that is insensitive to electromagnetic interference.
Such interferences may especially occur in truck applications where (due to the length
of the wires) high common-mode voltages (e.g., 50 ) can be coupled into the lines.
This device contains a fault recognition circuit that detects faults on one of the two
wires, which are normally used for transmission. If a fault occurs the operation can be
switched from double-wire to single-wire mode thus, allowing proper operation even if
one wire is broken, has a short-cut or a high series resistance.
Figure 1. Block Diagram
1
Select
control
2
16
Comparators
15
3
4
2.5 V
Error
control
14
+4.3 V
VCC
12
Output
control
5
6
7
8
13
11
10
VDD
GND
9
VSS
B10011S
Rev. 4749B–AUTO–09/04
Pin Configuration
Figure 2. Pinning SO16
ASEL
BSEL
ER
RX1
RX0
TX0
VDD
VSS
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
F1
F0
S+
VCC
H'
L'
GND
S-
Pin Description
16-lead SOIC (SO16), Small Outline Gull - Wing
2
Pin
Symbol
Function
1
ASEL
Select control input
2
BSEL
Select control input
3
ER
Error signal output
4
RX1
Reference voltage 2.5 V
5
RX0
Receiver output
6
TX0
Transmitter input
7
VDD
Controller supply voltage 5 V
8
VSS
Controller supply voltage 0 V
9
S-
10
GND
Collector of internal NPN switch
Vehicle ground 0 V
11
L’
Data out driver
12
H’
Data out driver
13
VCC
14
S+
Control output for external PNP
15
F0
Receiver input
16
F1
Receiver input
Vehicle power supply 24 V
B10011S
4749B–AUTO–09/04
B10011S
Absolute Maximum Ratings
Stresses beyond those listed under “Absolute Maximum Ratings” may cause permanent damage to the device. This is a stress rating
only and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of this
specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
Parameters
Symbol
Value
Unit
Supply voltage
VCC
-0.5 to +36
V
Controller supply voltage
VDD
-0.5 to +5.5
V
Input voltage at any input
Vin
-0.5 to VDD
V
Tj
150
°C
Storage temperature range
Tstg
-55 to +150
°C
Soldering temperature (for 10 s maximum)
Tsld
260
°C
Symbol
Value
Unit
Junction temperature
Operating Conditions
Parameters
Supply voltage car battery
VCC
7 to 32
V
Controller supply voltage
VDD
4.75 to 5.25
V
Asel, Bsel
0 to VDD
V
Input voltage
Tx0
0 to VDD
V
Operating temperature
Tamb
-40 to +105
°C
Control input voltage
Operating Modes
0 = 0 V, 1 = 5 V
Asel
Bsel
Rx0
0
0
3.8 V
1
0
From H
Single-wire H, L driver, L load, S-, S+ disabled
0
1
From L
Single-wire L, H driver disabled
1
1
From L-H
Mode
H, L drivers disabled, L load disabled, S-, S+ disabled station not in operation, but
consuming current
Two-wire operation, normal mode
ER (error signal) is low when normal operation is disturbed by line faults (interruption,
short to ground or to VCC, H to L short disturbance by high voltage transients). After a
waiting period due to transient delays, the controller is asked to test if single-wire operation is possible by changing the Asel and Bsel state.
Asel and Bsel have an internal pull-up resistor. Therefore, the no-connect state is 1, but
connection to VDD is recommended when not in use.
3
4749B–AUTO–09/04
Pulse Diagram
The pulse diagram for two connected, identical stations is shown below. The resistor
levels have to be kept constant when additional stations are connected.
Figure 3. Pulse Diagram
TX0
5V
dominant
recessive
0V
4 ms min(1)
5V
t
RX0
t
0V
27 V
L
18 V
H
9V
t
0V
27 V
L'
18 V
H'
9V
t
0V
(1)
4
Filter has to be changed if short distances are to be allowed
B10011S
4749B–AUTO–09/04
B10011S
Electrical Characteristics
Test condition: Test circuit (see Figure 4 on page 6), 0 = 0 V, 1 = 5 V
VCC = 27 V, VDD = 5 V, VSS = 0 V, Tamb = -40°C to +105°C, unless otherwise specified.
Parameters
Supply current
Input current
Output voltage
Test Conditions
Symbol
Min.
Typ.
Max.
Unit
Tx0 = 0, Asel = 1, Bsel = 1
ICC
15
mA
Tx0 = 0, Asel = 0, Bsel = 0
IDD
22
mA
Tx0 = 1, Asel = 1, Bsel = 1
ICC
26
mA
Tx0 = 1, Asel = 1, Bsel = 1
IDD
16
mA
Tx0 = 1, Asel = 1, Bsel = 1
I(Tx0)
650
µA
Tx0 = 1, Asel = 1, Bsel = 1
I(Asel, Bsel)
150
µA
Tx0 = 0, Asel = 1, Bsel = 0
VIL(F0) = 1.9 V, VIH(F1) = 2.7 V
Rx0
1.0
V
Tx0 = 1, Asel = 1, Bsel = 1
VIL(F1) = 1.9 V, VIH(F0) = 2.7 V
Rx0
3.8
V
Tx0 = 0, Asel = 1, Bsel = 1
U(H’)
24.5
V
Tx0 = 1, Asel = 1, Bsel = 1
U(H’)
Tx0 = 1, Asel = 1, Bsel = 1
U(L’)
Tx0 = 0, Asel = 1, Bsel = 1
U(L’)
No fault
ER
Fault on line
ER
1.0
26
V
V
1.0
4.7
V
V
100
mV
Max.
Unit
VCC = 7 V, VDD = 4.75 V, VSS = 0 V, Tamb = 25°C, unless otherwise specified.
Parameters
Output voltage
Test Conditions
Symbol
Min.
Tx0 = 0, Asel = 1, Bsel = 1
U(H’)
4.5
Tx0 = 1, Asel = 1, Bsel = 1
U(H’)
Tx0 = 1, Asel = 1, Bsel = 0
U(L’)
Tx0 = 0, Asel = 1, Bsel = 1
U(L’)
Tx0 = 1, Asel = 1, Bsel = 0
VIL(F1) = 1.0 V, VIH(F0) = 1.15 V
Rx0
Tx0 = 0, Asel = 1, Bsel = 0
VIL(F0) = 1.0 V, VIH(F1) = 1.15 V
Rx0
Typ.
V
100
6.5
mV
V
1.0
3.3
V
V
1.0
V
Max.
Unit
VCC = 32 V, VDD = 5.25 V, VSS = 0 V, Tamb = 25°C, unless otherwise specified.
Parameters
Output voltage
Test Conditions
Symbol
Min.
Tx0 = 0, Asel = 1, Bsel = 1
U(H’)
29
Tx0 = 1, Asel = 1, Bsel = 1
U(H’)
Tx0 = 1, Asel = 1, Bsel = 0
U(L’)
Tx0 = 0, Asel = 1, Bsel = 1
U(L’)
Tx0 = 1, Asel = 1, Bsel = 0
VIL(F1) = 1.6 V, VIH(F0) = 2.7 V
Rx0
Tx0 = 0, Asel = 1, Bsel = 0
VIL(F0) = 1.6 V, VIH(F1) = 2.7 V
Rx0
Typ.
V
500
31.5
mV
V
1.0
4.0
V
V
1.0
V
5
4749B–AUTO–09/04
Figure 4. Test Circuit
470
1
H/L
470
VDD
H/L
150k
VDD
2
Bsel
3
ER
4
1k8
220
470
H/L
1k8
VDD
Asel
2.5 V
5
Rx0
6
Tx0
7
VDD
8
Select
control
Comparators
+4.3 V
Error
control
F1
16
F0
15
S+
14
VIL
VCC
VCC
13
H'
Output
control
VIH
VCC
580
12
L'
620
11
VCC
GND 10
S-
VSS
2k5
9
VCC
B10011S
Figure 5. Application Circuit
Filter for 125 kbit/s operation
16k
+5 V
to CAN controller
Asel
1
Bsel
2
ER
150k 3
2n2
Rx1
16
Select
control
Comparators
Error
control
24k
5k6
82p
47p
24k
5k6
82p
47p
VDD
15
16k
14
+4.3 V
4
5
Tx0
6
VDD
VCC
VSS
Output
control
7
+
13
1k8
12
1k8
220
10µ +
11 40 V
270
1k8
VCC
10
VDD
10 µF
22k
BCX 17
2.5 V
Rx0
22k
1k8
GND
8
1k8
1k8
9
VSS
0µ1
M
Resistors:
H
MELF 0204, 1%, 0.6 W
02075, 1%, TK50
Chip capacitors NPO 0805, 1206, 10%
Ferrite bead BLM 31A601S (Murata)
Common-mode choke coils (SMD):
B82790 S0513 N201 (Siemens)
F2 2x50 µH (Vogt)
ST2001 (Vogt)
Cable LiYY 4 x 1 mm2
6
L
Battery ground
Filter ground
B10011S
4749B–AUTO–09/04
B10011S
The implementation of a power filter and overvoltage clamp as follows is highly
recommended:
Figure 6. Implementation of a Power Filter and Over Clamps
10
From battery
(cl. 15)
To VCC (pin 13)
+
22 µF
33 V
Ground
To pin 10
Application Hints
As an interface between CAN controllers and a two-wire data bus system for serial data
interchange, this device is adapted to a special high-level, low-speed transmission system, which is useful in harsh environments. High immunity against ground offset and
interference voltages on the bus have been the design goals for this device, rather than
low power consumption or a minimum of external components. An error detection
scheme is implemented in the receiver part to give quick information to the controller in
case of faults occurring on the bus. Thus, the controller is able to start a search cycle in
order to look for the possibility of single-wire operation or to disable the station from the
bus.
An automatic error-signal end is not feasible because parts of the system are disabled
during single-wire operation. Therefore, the controller has to carry out short tests by
switching to the two-wire state and checking, whether the error signal is still present or
not. Errors due to dirty contacts, shorts between high and low line, or interruptions may
not be recognized at all, because this device does not contain a complete fault
computer.
Two control inputs A sel and B sel enable four operation modes (see Table “Operating
Modes” on page 3’). Depending on the nature of the error, the error signal ER is internally generated partly in the recessive or partly in the dominant transmission state. In
order to avoid watching the error bits bitwise, an open-collector output driver (with a
1-kW series resistor) discharges a storage capacitor, which is charged by a time constant, long enough to hold the 0 state for, e.g., 200 µs, thus, giving the controller enough
time to recognize this status during idle times. Only the charging resistor may be
changed and not the 2.2-nF capacitor. In order to perform a faster error-end test, the
charging resistor may be shorted by an NPN emitter follower or by a tristate output high
for approximately 1 to 2 µs.
The pinout of the device shows a controller side (pins 1 to 8) and a bus side (pins 9 to
16). The application circuit utilizes an input filter section which is necessary for every
station and a bias section which is needed in two master stations only. Additional slave
stations only contain the driving resistors at pins 11 and 12 (270 Ω and 220 Ω), the
choke coil, and capacitor between pins 13 and 10.
A power filter and overvoltage clamp is highly recommended in order to avoid transmission errors due to spikes on the 24-V battery voltage.
The input filter is designed as an 2-RC filter for 125 kbit/s and may be changed to
250 kbit/s. Its good pulse response and good suppression of high frequencies should
not be weakened by omitting one of the capacitors.
7
4749B–AUTO–09/04
All the logical and sensing functions in the device are powered by VDD = 5 V. Therefore,
the filter section also acts as a level shifter to the input comparator range (approximately
1 to 3.3 V). The diagram (see Figure 7) shows how the battery voltage, VCC, influences
the comparator input voltages, F0 and F1, in relation to the internal reference voltage,
V ref, in the recessive state. The lower V CC, the lower the bus level. Taking this into
account the comparator input levels are F1 - Vref for single-wire H respectively F1 - F0 for
two-wire operation. The comparator’s offset voltage is ≤10 mV. Matching the filter biasing to the internal reference is essentially for safe operation even at low battery voltages
during motor start.
The level investigations and tests described in the following description have been carried out within the temperature range of -40°C to +105°C with two B10011S on a bus
line, one of them always in the recessive state (see Figure 8 on page 9).
In case of line shorts to VCC or to ground or in case of H to L shorts, all participants on
the bus are intended to switch to single-wire operation and to disable their drivers not in
use.
The dynamic behavior of the circuit depends on the line capacitances to ground.
Approximately 200 pF/m and a maximum of 6 nF have to be taken into account. The
transition from the dominant to the recessive state enables the bias network to recharge
the line through a driving resistor of approximately 300 Ω. The transition from the recessive to the dominant state is approximately twice as fast. This is probably the source of
emitted radiation having no capacitance on the line. The choke coil enables the suppression of this radiation in the frequency range above 5 MHz to 7 MHz. Care should be
taken not to feed noise from VDD or VCC to the line. Therefore, they should be properly
blocked by low-inductance capacitors.
Data loss by externally induced interference is avoided by careful PCB layout and EMC
design for this circuit as well as by providing appropriate overvoltage protection. It is
very essential to separate battery ground and filter ground as indicated in the application
circuit (see Figure 5 on page 6). Especially important is that the filter ground must be
connected to pin 8 by a short connection not subject to disturbing currents from external
sources. The ground wire of the “starquad” cable may introduce such currents and
should be connected to battery ground via a 0.1-µF capacitor in a way as short as possible, perhaps to the metal housing.
In order to avoid thermal problems, the voltage divider and driving resistors should be
kept away from the IC. Otherwise they would heat up the environment of the small IC
and might reduce its life expectancy.
Figure 7. Comparator Thresholds
V
not ER
5
RxN
4
F0
3
Uref
2
F1
1
0
5
8
10
15
20
25
30
35
VCC
B10011S
4749B–AUTO–09/04
B10011S
Figure 8. Test Circuit Equivalents
VCC
300
H'
300
H
2/3 VCC
300
300
L'
Switches are
closed in the
dominant state
1/3 VCC
L
Ideal test circuit equivalent
4k54
38k
F1
0.946 V
VCC
220
H
300
2/3 VCC
270
Switches are
closed in the
dominant state
300
1/3 VCC
L
4k54
38k
F0
0.946 V
Real test circuit equivalent
2CHL
H
CH0
L
CL0
Capacitance H: CHgnd = CH0 + 2 CHL <= 200 pF/m
Capacitance L: CLgnd = CL0 + 2 CHL <= 200 pF/m
9
4749B–AUTO–09/04
Ordering Information
Part Number
Package
B10011S-MFP
SO16 in tubes
B10011S-MFPG1
SO16, tape and reel, 1000 units/reel
Package Information
3.80 ± 0.25
6.0 ± 0.3
Pin 1
1.27
0.42 ± 0.07
0.18 ± 0.08
1.55 ± 0.2
9.9 ± 0.3
0.22 ± 0.03
0.7 ± 0.1
Revision History
Please note that the following page numbers referred to in this section refer to the
specific revision mentioned, not to this document.
Changes from Rev.
4749A - 10/03 to Rev.
4749B - 09/04
1. Figure 2 “Pinning SO16” on page 2 changed.
10
B10011S
4749B–AUTO–09/04
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4749B–AUTO–09/04
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