PRELIMINARY Integrated Circuit Systems, Inc. ICS840002-32 FEMTOCLOCKS™CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER GENERAL DESCRIPTION FEATURES The ICS840002-32 is a 2 output LVCMOS/ LVTTL Synthesizer optimized to generate HiPerClockS™ Fibre Channel or Serial ATA reference clock frequencies and is a member of the HiPerClocks TM family of high perfor mance clock solutions from ICS. Using an 18pF parallel resonant crystal, the following frequencies can be generated based on 1 frequency select pin (SEL): 106.25MHz and 75MHz, or 212.5MHz. The ICS840002-32 uses ICS’ 3 rd generation low phase noise VCO technology and can achieve 1ps or lower typical rms phase jitter, easily meeting Fibre Channel and Serial ATA jitter requirements. The ICS840002-32 is packaged in a small 8-pin TSSOP package. • Two LVCMOS/LVTTL outputs, 15Ω typical output impedance ICS • Crystal oscillator interface • Output frequency range: 75MHz and 106.25MHz, or 212.5MHz • RMS phase jitter at 106.25MHZ (637kHz - 5MHz): 0.86ps (typical) • Full 3.3V or 3.3V core/2.5V output supply mode • 0°C to 70°C ambient operating temperature SELECT FUNCTION TABLE Input Output Frequency Range (MHz) SEL Q0 Q1 0 75 106.25 1 75 212.5 BLOCK DIAGRAM PIN ASSIGNMENT 26.5625MHz Q0 XTAL_IN VDD XTAL_OUT XTAL_IN GND FemtoClock™ Q1 XTAL_OUT 1 2 3 4 8 7 6 5 SEL Q0 VDDO Q1 ICS840002-32 8-Lead TSSOP 4.40mm x 3.0mm x 0.925mm package body G Package Top View SEL The Preliminary Information presented herein represents a product in prototyping or pre-production. The noted characteristics are based on initial product characterization. Integrated Circuit Systems, Incorporated (ICS) reserves the right to change any circuitry or specifications without notice. 840002BG-32 www.icst.com/products/hiperclocks.html 1 REV. A JUNE 27, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS840002-32 FEMTOCLOCKS™CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER TABLE 1. PIN DESCRIPTIONS Number Name Type Description 1 2, 3 4 VDD XTAL_OUT, XTAL_IN GND Power Core supply pin. Input Cr ystal oscillator interface. Power 5, 7 Q1, Q0 Output 1 VDDO Power Power supply ground. Single-ended clock outputs. LVCMOS/LVTTL interface levels. 15Ω typical output impedence. Output supply pin. 8 SEL Input Pulldown Select pin. LVCMOS/LVTTL interface levels. NOTE: Pulldown refers to internal input resistors. See Table 2, Pin Characteristics, for typical values. TABLE 2. PIN CHARACTERISTICS Symbol Parameter CIN Input Capacitance Test Conditions Minimum Typical Maximum Units 4 pF VDD, VDDO = 3.465V TBD pF VDD = 3.465V, VDDO = 2.625V TBD pF CPD Power Dissipation Capacitance RPULLDOWN Input Pulldown Resistor 51 kΩ ROUT Output Impedance 15 Ω 840002BG-32 www.icst.com/products/hiperclocks.html 2 REV. A JUNE 27, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS840002-32 FEMTOCLOCKS™CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER ABSOLUTE MAXIMUM RATINGS Supply Voltage, VDD 4.6V Inputs, VI -0.5V to VDD + 0.5 V Outputs, VO -0.5V to VDDO + 0.5V Package Thermal Impedance, θJA 101.7°C/W (0 mps) Storage Temperature, TSTG -65°C to 150°C NOTE: Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These ratings are stress specifications only. Functional operation of product at these conditions or any conditions beyond those listed in the DC Characteristics or AC Characteristics is not implied. Exposure to absolute maximum rating conditions for extended periods may affect product reliability. TABLE 3A. POWER SUPPLY DC CHARACTERISTICS, VDD = VDDO = 3.3V±5%, TA = 0°C TO 70°C Symbol VDD Parameter Core Supply Voltage Test Conditions VDDO Output Supply Voltage IDD IDDO Power Supply Current Output Supply Current Minimum 3.135 Typical 3.3 Maximum 3.465 Units V 3.135 3.3 3.465 V TBD TBD mA mA TABLE 3B. POWER SUPPLY DC CHARACTERISTICS, VDD = 3.3V±5%, VDDO = 2.5V±5%, TA = 0°C TO 70°C Symbol VDD Parameter Core Supply Voltage Test Conditions VDDO Output Supply Voltage IDD IDDO Power Supply Current Output Supply Current Minimum 3.135 Typical 3.3 Maximum 3.465 Units V 2.375 2.5 2.625 V TBD TBD mA mA TABLE 3C. LVCMOS/LVTTL DC CHARACTERISTICS, VDD = 3.3V±5%, VDDO = 3.3V±5% OR 2.5V±5%, TA = 0°C TO 70°C Symbol Parameter Test Conditions VIH Input High Voltage SEL Minimum Typical Maximum Units 2 VDD + 0.3 V -0.3 0.8 V 5 µA VIL Input Low Voltage SEL IIH Input High Current SEL VDD = VIN = 3.465V IIL Input Low Current SEL VDD = 3.465V, VIN = 0V -150 µA VDDO = 3.3V ± 5% 2.6 V VDDO = 2.5V ± 5% 1.8 V VOH Output High Voltage; NOTE 1 VOL Output Low Voltage; NOTE 1 VDDO = 3.3V or 2.5V ± 5% 0.5 V NOTE 1: Outputs terminated with 50Ω to VDDO/2. See Parameter Measurement Information, Output Load Test Circuit. TABLE 4. CRYSTAL CHARACTERISTICS Parameter Test Conditions Mode of Oscillation Minimum Typical Maximum Units Fundamental Frequency 26.5625 MHz Equivalent Series Resistance (ESR) 50 Ω Shunt Capacitance 7 pF Drive Level 1 mW NOTE: Characterized using an 18pF parallel resonant crystal. 840002BG-32 www.icst.com/products/hiperclocks.html 3 REV. A JUNE 27, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS840002-32 FEMTOCLOCKS™CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER TABLE 5A. AC CHARACTERISTICS, VDD = VDDO = 3.3V±5%, TA = 0°C TO 70°C Symbol Parameter Test Conditions Minimum Typical Maximum 212.5 fOUT Output Frequency Range Units MHz 106.25 75 tsk(o) tjit(Ø) t R / tF Output Skew; NOTE 1, 3 RMS Phase Jitter (Random); NOTE 2 Output Rise/Fall Time 212.5MHz @ Integration Range: 2.55MHz - 20MHz 106.25MHz @ Integration Range: 637kHz - 5MHz 75MHz @ Integration Range: 12kHz - 20MHz 20% to 80% TBD ps 0.50 ps 0.86 ps TBD ps 400 ps odc Output Duty Cycle 50 NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions. Measured at VDDO/2. NOTE 2: Please refer to the Phase Noise Plot. NOTE 3: This parameter is defined in accordance with JEDEC Standard 65. % TABLE 5B. AC CHARACTERISTICS, VDD = 3.3V±5%, VDDO = 2.5V±5%, TA = 0°C TO 70°C Symbol Parameter Test Conditions Minimum Typical fOUT Output Frequency Range 106.25 tsk(o) Output Skew; NOTE 1, 3 TBD ps 0.57 ps 1.1 ps TBD ps 450 ps 212.5 Maximum Units MHz 75 tjit(Ø) tR / tF RMS Phase Jitter (Random); NOTE 2 Output Rise/Fall Time 212.5MHz @ Integration Range: 2.55MHz - 20MHz 106.25MHz @ Integration Range: 637kHz - 5MHz 75MHz @ Integration Range: 12kHz - 20MHz 20% to 80% odc Output Duty Cycle 50 NOTE 1: Defined as skew between outputs at the same supply voltages and with equal load conditions. Measured at VDDO/2. NOTE 2: Please refer to the Phase Noise Plot. NOTE 3: This parameter is defined in accordance with JEDEC Standard 65. 840002BG-32 www.icst.com/products/hiperclocks.html 4 % REV. A JUNE 27, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS840002-32 FEMTOCLOCKS™CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER PARAMETER MEASUREMENT INFORMATION 1.65V±5% 2.05V±5% 1.25V±5% SCOPE VDD, VDDO VDDO Qx LVCMOS SCOPE V DD Qx LVCMOS GND GND -1.65V±5% -1.25V±5% 3.3V CORE/3.3V OUTPUT LOAD AC TEST CIRCUIT 3.3V CORE/2.5V OUTPUT LOAD AC TEST CIRCUIT Phase Noise Plot Noise Power V DDO Qx 2 Phase Noise Mask V DDO Qy Offset Frequency f1 2 tsk(o) f2 RMS Jitter = Area Under the Masked Phase Noise Plot RMS PHASE JITTER OUTPUT SKEW V 80% DDO 80% 2 Q0, Q1 Clock Outputs t PW 20% 20% tR t tF odc = PERIOD t PW x 100% t PERIOD OUTPUT RISE/FALL TIME 840002BG-32 OUTPUT DUTY CYCLE/PULSE WIDTH/PERIOD www.icst.com/products/hiperclocks.html 5 REV. A JUNE 27, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS840002-32 FEMTOCLOCKS™CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER APPLICATION INFORMATION CRYSTAL INPUT INTERFACE below were determined using an 18pF parallel resonant crystal and were chosen to minimize the ppm error. The ICS840002-32 has been characterized with 18pF parallel resonant crystals. The capacitor values shown in Figure 1 XTAL_OUT C1 33p X1 18pF Parallel Crystal XTAL_IN C2 27p ICS840002-32 Figure 1. CRYSTAL INPUt INTERFACE RELIABILITY INFORMATION TABLE 6. θJAVS. AIR FLOW TABLE FOR 8 LEAD TSSOP θJA by Velocity (Meters Per Second) Multi-Layer PCB, JEDEC Standard Test Boards 0 1 2.5 101.7°C/W 90.5°C/W 89.8°C/W TRANSISTOR COUNT The transistor count for ICS840002-32 is: 2322 840002BG-32 www.icst.com/products/hiperclocks.html 6 REV. A JUNE 27, 2005 PRELIMINARY Integrated Circuit Systems, Inc. PACKAGE OUTLINE - G SUFFIX ICS840002-32 FEMTOCLOCKS™CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER FOR 8 LEAD TSSOP TABLE 7. PACKAGE DIMENSIONS Millimeters SYMBOL Minimum N Maximum 8 A -- 1.20 A1 0.05 0.15 A2 0.80 1.05 b 0.19 0.30 c 0.09 0.20 D 2.90 E 3.10 6.40 BASIC E1 4.30 e 4.50 0.65 BASIC L 0.45 0.75 α 0° 8° aaa -- 0.10 Reference Document: JEDEC Publication 95, MO-153 840002BG-32 www.icst.com/products/hiperclocks.html 7 REV. A JUNE 27, 2005 PRELIMINARY Integrated Circuit Systems, Inc. ICS840002-32 FEMTOCLOCKS™CRYSTAL-TOLVCMOS/LVTTL FREQUENCY SYNTHESIZER TABLE 8. ORDERING INFORMATION Part/Order Number Marking Package Shipping Packaging Temperature ICS840002BG-32 02B32 8 lead TSSOP tube 0°C to 70°C ICS840002BG-32T 02B32 8 lead TSSOP 2500 tape & reel 0°C to 70°C The aforementioned trademarks, HiPerClockS and FEMTOCLOCKS are trademarks of Integrated Circuit Systems, Inc. or its subsidiaries in the United States and/or other countries. While the information presented herein has been checked for both accuracy and reliability, Integrated Circuit Systems, Incorporated (ICS) assumes no responsibility for either its use or for infringement of any patents or other rights of third parties, which would result from its use. No other circuits, patents, or licenses are implied. This product is intended for use in normal commercial applications. Any other applications such as those requiring extended temperature range, high reliability, or other extraordinary environmental requirements are not recommended without additional processing by ICS. ICS reserves the right to change any circuitry or specifications without notice. ICS does not authorize or warrant any ICS product for use in life support devices or critical medical instruments. 840002BG-32 www.icst.com/products/hiperclocks.html 8 REV. A JUNE 27, 2005