NSC LP5900TL-2.5 Ultra low noise, 100 ma linear regulator for rf/analog circuits requires no bypass capacitor Datasheet

LP5900
Ultra Low Noise, 100 mA Linear Regulator for RF/Analog
Circuits Requires No Bypass Capacitor
General Description
Key Specifications
The LP5900 is a linear regulator capable of supplying 100
mA output current. Designed to meet the requirements of
RF/Analog circuits, the LP5900 device provides low noise,
high PSRR, low quiescent current, and low line transient
response figures. Using new innovative design techniques
the LP5900 offers class-leading device noise performance
without a noise bypass capacitor.
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n
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n
n
n
n
n
n
n
The device is designed to work with 0.47 µF input and output
ceramic capacitors. (No Bypass Capacitor is required)
This device is available with 1.5V, 1.8V, 2.0V, 2.2V, 2.5V,
2.8V, 3.0V, and 3.3V outputs. Please contact your local sales
office for any other voltage options.
Input voltage range
Output voltage range
Output current
Low output voltage noise
PSRR
Output voltage tolerance
Virtually zero IQ (disabled)
Very low IQ (enabled)
Start-up time
Low dropout
2.5V to 5.5V
1.5V to 3.3V
100 mA
6.5 µVRMS
85 dB at 1 kHz
± 2%
< 1 µA
25 µA
150 µs
80 mV typ.
Package
Features
n Stable with 0.47 µF Ceramic Input and Output
Capacitors
n No Noise Bypass Capacitor Required
n Logic Controlled Enable
n Thermal-overload and short-circuit protection
n −40˚C to +125˚C junction temperature range for
operation
4-Bump micro SMD
(lead free)
1.057 mm x 1.083 mm
Applications
n Cellular phones
n PDA handsets
n Wireless LAN devices
Typical Application Circuit
20144101
© 2005 National Semiconductor Corporation
DS201441
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LP5900 Ultra Low Noise, 100 mA Linear Regulator for RF/Analog Circuits Requires No Bypass
Capacitor
July 2005
LP5900
Connection Diagrams
4-Bump Thin micro SMD Package, Large Bump
NS Package Number TLA04
20144102
The actual physical placement of the package marking will vary from part to part.
Pin Descriptions
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Pin #
Symbol
Name and Function
A1
VEN
Enable input; disables the regulator when ≤ 0.4V. Enables the
regulator when ≥ 1.2V. An internal 1 MΩ pulldown resistor
connects this input to ground.
B1
GND
Common ground
B2
VOUT
Output voltage. A 0.47 µF Low ESR capacitor should be connected
to this Pin. Connect this output to the load circuit.
A2
VIN
Input voltage supply. A 0.47 µF capacitor should be connected at
this input.
2
LP5900
Ordering Information
micro SMD Package (Lead Free)
Output Voltage
(V)
Supplied As
250 Units Tape and Reel
3k Units Tape and Reel
1.5
LP5900TL-1.5/NOPB
LP5900TLX-1.5/NOPB
1.8**
LP5900TL-1.8/NOPB
LP5900TLX-1.8/NOPB
2.0**
LP5900TL-2.0/NOPB
LP5900TLX-2.0/NOPB
2.2**
LP5900TL-2.2/NOPB
LP5900TLX-2.2/NOPB
2.5**
LP5900TL-2.5/NOPB
LP5900TLX-2.5/NOPB
2.8
LP5900TL-2.8/NOPB
LP5900TLX-2.8/NOPB
3.0**
LP5900TL-3.0/NOPB
LP5900TLX-3.0/NOPB
3.3
LP5900TL-3.3/NOPB
LP5900TLX-3.3/NOPB
micro SMD Package
Output Voltage
(V)
Supplied As
250 Units Tape and Reel
3k Units Tape and Reel
1.5
LP5900TL-1.5
LP5900TLX-1.5
1.8**
LP5900TL-1.8
LP5900TLX-1.8
2.0**
LP5900TL-2.0
LP5900TLX-2.0
2.2**
LP5900TL-2.2
LP5900TLX-2.2
2.5**
LP5900TL-2.5
LP5900TLX-2.5
2.8
LP5900TL-2.8
LP5900TLX-2.8
3.0**
LP5900TL-3.0
LP5900TLX-3.0
3.3
LP5900TL-3.3
LP5900TLX-3.3
**For availability please contact National Semiconductor local sales office. Samples available now.
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LP5900
Absolute Maximum Ratings (Notes 1, 2)
ESD Rating (Note 4)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
Human Body Model
2 kV
Machine Model
200V
VIN Pin: Input Voltage
Operating Ratings(Note 1), (Note 2)
VOUT Pin: Output Voltage
VEN Pin: Enable Input Voltage
-0.3 to 6.0V
-0.3 to (VIN + 0.3V) to
6.0V (max)
VIN: Input Voltage Range
2.5V to 5.5V
VEN: Enable Voltage Range
-0.3 to (VIN + 0.3V) to
6.0V (max)
0 to (VIN + 0.3V) to
5.5V (max)
Recommended Load Current
(Note 5)
0 to 100 mA
Continuous Power Dissipation
(Note 3)
Internally Limited
Junction Temperature (TJMAX)
150˚C
Junction Temperature Range (TJ)
-40˚C to +125˚C
Storage Temperature Range
-65 to 150˚C
-40˚C to +85˚C
Maximum Lead Temperature
(Soldering, 10 sec.)
Ambient Temperature Range (TA)
(Note 5)
265˚C
Thermal Properties
Junction to Ambient Thermal Resistance θJA (Note 6)
JEDEC Board (Note 16)
88˚C/W
4L Cellphone Board
157.4˚C/W
Electrical Characteristics
Limits in standard typeface are for TA = 25oC. Limits in boldface type apply over the full operating junction temperature range
(-40oC ≤ TJ ≤ +125oC). Unless otherwise noted, specifications apply to the LP5900 Typical Application Circuit (pg. 1) with: VIN
= VOUT (NOM) + 1.0V, VEN = 1.2V, CIN = COUT = 0.47 µF, IOUT = 1.0 mA. (Note 2), (Note 7)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
2.5
5.5
V
−2
2
VIN
Input Voltage
∆VOUT
Output Voltage Tolerance
VIN = (VOUT(NOM) + 1.0V) to 5.5V, IOUT
= 1 mA to 100mA
Line Regulation
VIN = (VOUT(NOM) + 1.0V) to 5.5V, IOUT
= 1 mA
0.05
%/V
Load Regulation
IOUT = 1 mA to 100 mA
0.001
%/mA
ILOAD
IQ
Load Current
(Note 9)
0
Maximum Output Current
(Note 15)
100
Quiescent Current (Note 11)
VEN = 1.2V, IOUT = 0 mA
VEN = 1.2V, IOUT = 100 mA
VEN = 0.3V (Disabled)
mA
25
50
100
200
0.003
1.0
IG
Ground Current (Note 13)
IOUT = 0 mA (VOUT = 2.5V)
30
VDO
Dropout Voltage
IOUT = 100 mA
80
ISC
Short Circuit Current Limit
(Note 12)
300
PSRR
Power Supply Rejection Ratio
(Note 15)
f = 100 Hz, IOUT = 100 mA
85
f = 1 kHz, IOUT = 100 mA
75
en
Output Noise Voltage
(Note 15)
TSHUTDOWN Thermal Shutdown
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f = 10 kHz, IOUT = 100 mA
65
f = 50 kHz, IOUT = 100 mA
52
f = 100 kHz, IOUT = 100 mA
40
BW = 10 Hz to 100
kHz, VIN = 4.2V
IOUT = 0 mA
7
IOUT = 1 mA
10
IOUT = 100 mA
6.5
Temperature
160
Hysteresis
20
4
%
µA
µA
150
mV
mA
dB
µVRMS
o
C
(Continued)
Limits in standard typeface are for TA = 25oC. Limits in boldface type apply over the full operating junction temperature range
(-40oC ≤ TJ ≤ +125oC). Unless otherwise noted, specifications apply to the LP5900 Typical Application Circuit (pg. 1) with: VIN
= VOUT (NOM) + 1.0V, VEN = 1.2V, CIN = COUT = 0.47 µF, IOUT = 1.0 mA. (Note 2), (Note 7)
Symbol
Parameter
Conditions
Min
Typ
Max
Units
0.4
V
Login Input Thresholds
VIL
Low Input Threshold (VEN)
VIH
High Input Threshold (VEN)
VIN = 2.5V to 5.5V
IEN
Input Current at VEN Pin
(Note 14)
VEN = 5.5V and VIN = 5.5V
5.5
VEN = 0.0V and VIN = 5.5V
0.001
VIN = 2.5V to 5.5V
1.2
V
µA
Transient Characteristics
∆VOUT
Line Transient
(Note 15)
VIN = (VOUT(NOM) + 1.0V) to
(VOUT(NOM) + 1.6V) in 30 µs, IOUT = 1
mA
−2
mV
VIN = (VOUT(NOM) + 1.6V) to
(VOUT(NOM) + 1.0V) in 30 µs, IOUT = 1
mA
Load Transient
(Note 15)
2
IOUT = 1 mA to 100 mA in 10 µs
−70
IOUT = 100 mA to 1 mA in 10 µs
30
Overshoot on Startup
(Note 15)
Turn on Time
To 95% of VOUT(NOM)
150
mV
20
mV
300
µs
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the component may occur. Operating Ratings are conditions under which operation of
the device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the
Electrical Characteristics tables.
Note 2: All voltages are with respect to the potential at the GND pin.
Note 3: Internal thermal shutdown circuitry protects the device from permanent damage.
Note 4: The Human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged
directly into each pin. MIL-STD-883 3015.7
Note 5: In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be
derated. Maximum ambient temperature (TA-MAX) is dependent on the maximum operating junction temperature (TJ-MAX-OP = 125˚C), the maximum power
dissipation of the device in the application (PD-MAX), and the junction-to ambient thermal resistance of the part/package in the application (θJA), as given by the
following equation: TA-MAX = TJ-MAX-OP – (θJA x PD-MAX). See applications section.
Note 6: Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists,
special care must be paid to thermal dissipation issues in board design.
Note 7: Min and Max limits are guaranteed by design, test, or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.
Note 8: CIN, COUT: Low-ESR Surface-Mount Ceramic Capacitors (MLCCs) used in setting electrical characteristics.
Note 9: The device maintains a stable, regulated output voltage without a load current.
Note 10: Dropout voltage is the voltage difference between the input and the output at which the output voltage drops to 100 mV below its nominal value. This
parameter only applies to output voltages above 2.5V.
Note 11: Quiescent current is defined here as the difference in current between the input voltage source and the load at VOUT.
Note 12: Short Circuit Current is measured with VOUT pulled to 0v and VIN worst case = 6.0V.
Note 13: Ground current is defined here as the total current flowing to ground as a result of all input voltages applied to the device.
Note 14: There is a 1 MΩ resistor between VEN and ground on the device.
Note 15: This specification is guaranteed by design.
Note 16: Detailed description of the board can be found in JESD51-7
Output & Input Capacitor, Recommended Specifications
Symbol
Parameter
CIN
Input Capacitance
COUT
Output Capacitance
ESR
Output/Input Capacitance
Conditions
Capacitance for stability
Min
Nom
0.33
0.47
0.33
0.47
5
Max
Units
µF
10
500
mΩ
Note: The minimum capacitance should be greater than 0.33 µF over the full range of operating conditions. The capacitor tolerance should be 30% or better over
the full temperature range. The full range of operating conditions for the capacitor in the application should be considered during device selection to ensure this
minimum capacitance specification is met. X7R capacitors are recommended however capacitor types X5R, Y5V and Z5U may be used with consideration of the
application and conditions.
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LP5900
Electrical Characteristics
LP5900
Typical Performance Characteristics.
(NOM)
+ 1.0V, VEN = 1.2V, IOUT = 1mA , T
A
Unless otherwise specified,CIN = COUT = 0.47µF, VIN = VOUT-
= 25oC.
Output Noise Density
Power Supply Rejection Ratio
20144143
20144157
Output Voltage Change vs Temperature
Ground Current vs VIN, I
LOAD
20144154
Ground Current vs VIN, I
LOAD
20144151
= 1mA
Ground Current vs VIN, I
20144152
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= 0mA
LOAD
= 100mA
20144153
6
A
= 25oC. (Continued)
Ground Current vs Load Current
Short Circuit Current
20144150
20144148
Load Transient
Line Transient
20144149
20144155
Enable Start-up Time, (I L= 1mA, VOUT = 2.8V)
Enable Start-up Time, (I L= 100mA, VOUT = 2.8V)
20144144
20144145
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LP5900
Typical Performance Characteristics. Unless otherwise specified,CIN = COUT = 0.47µF, VIN =
VOUT(NOM) + 1.0V, VEN = 1.2V, IOUT = 1mA , T
LP5900
Typical Performance Characteristics. Unless otherwise specified,CIN = COUT = 0.47µF, VIN =
VOUT(NOM) + 1.0V, VEN = 1.2V, IOUT = 1mA , T
A
= 25oC. (Continued)
Enable Start-up Time, (I L= 1mA, VOUT = 2.8V)
Enable Start-up Time, (I L= 100mA, VOUT = 2.8V)
20144146
20144147
Dropout Over Temperature (100mA)
20144105
This establishes the relationship between the power dissipation allowed due to thermal consideration, the voltage drop
across the device, and the continuous current capability of
the device. These two equations should be used to determine the optimum operating conditions for the device in the
application.
Application Hints
POWER DISSIPATION AND DEVICE OPERATION
The permissible power dissipation for any package is a
measure of the capability of the device to pass heat from the
power source, the junctions of the IC, to the ultimate heat
sink, the ambient environment. Thus the power dissipation is
dependent on the ambient temperature and the thermal
resistance across the various interfaces between the die and
ambient air. As stated in (Note 5) of the electrical characteristics, the allowable power dissipation for the device in a
given package can be calculated using the equation:
EXTERNAL CAPACITORS
Like any low-dropout regulator, the LP5900 requires external
capacitors for regulator stability. The LP5900 is specifically
designed for portable applications requiring minimum board
space and smallest components. These capacitors must be
correctly selected for good performance.
INPUT CAPACITOR
An input capacitor is required for stability. The input capacitor
should be at least equal to or greater than the output capacitor. It is recommended that a 0.47 µF capacitor be connected
between the LP5900 input pin and ground.
The actual power dissipation across the device can be represented by the following equation:
PD = (VIN – VOUT) x IOUT
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A better choice for temperature coefficient in a ceramic
capacitor is X7R. This type of capacitor is the most stable
and holds the capacitance within ± 15% over the temperature range. Tantalum capacitors are less desirable than ceramic for use as output capacitors because they are more
expensive when comparing equivalent capacitance and voltage ratings in the 0.47 µF to 4.7 µF range.
Another important consideration is that tantalum capacitors
have higher ESR values than equivalent size ceramics. This
means that while it may be possible to find a tantalum
capacitor with an ESR value within the stable range, it would
have to be larger in capacitance (which means bigger and
more costly) than a ceramic capacitor with the same ESR
value. It should also be noted that the ESR of a typical
tantalum will increase about 2:1 as the temperature goes
from 25˚C down to −40˚C, so some guard band must be
allowed.
(Continued)
This capacitor must be located a distance of not more than 1
cm from the input pin and returned to a clean analogue
ground. Any good quality ceramic, tantalum, or film capacitor
may be used at the input.
Important: To ensure stable operation it is essential that
good PCB practices are employed to minimize ground impedance and keep input inductance low. If these conditions
cannot be met, or if long leads are to be used to connect the
battery or other power source to the LP5900, then it is
recommended to increase the input capacitor to at least
2.2µF. Also, tantalum capacitors can suffer catastrophic failures due to surge current when connected to a lowimpedance source of power (like a battery or a very large
capacitor). If a tantalum capacitor is used at the input, it must
be guaranteed by the manufacturer to have a surge current
rating sufficient for the application. There are no requirements for the ESR (Equivalent Series Resistance) on the
input capacitor, but tolerance and temperature coefficient
must be considered when selecting the capacitor to ensure
the capacitance will remain 0.47 µF ± 30% over the entire
operating temperature range.
NO-LOAD STABILITY
The LP5900 will remain stable and in regulation with no
external load.
ENABLE CONTROL
The LP5900 may be switched ON or OFF by a logic input at
the ENABLE pin, VEN . A high voltage at this pin will turn the
device on. When the enable pin is low, the regulator output is
off and the device typically consumes 3 nA. If the application
does not require the shutdown feature, the VEN pin should
be tied to VIN to keep the regulator output permanently on.
A 1MΩ pulldown resistor ties the VEN input to ground, this
ensures that the device will remain off when the enable pin is
left open circuit. To ensure proper operation, the signal
source used to drive the VEN input must be able to swing
above and below the specified turn-on/off voltage thresholds
listed in the Electrical Characteristics section under VIL and
VIH.
OUTPUT CAPACITOR
The LP5900 is designed specifically to work with very small
ceramic output capacitors. A ceramic capacitor (dielectric
types X5R or X7R) in the 0.47 µF to 10 µF range, and with
ESR between 5 mΩ to 500 mΩ, is suitable in the LP5900
application circuit. For this device the output capacitor
should be connected between the VOUT pin and a good
ground connection and should be mounted within 1 cm of the
device.
It may also be possible to use tantalum or film capacitors at
the device output, VOUT, but these are not as attractive for
reasons of size and cost (see the section Capacitor Characteristics).
The output capacitor must meet the requirement for the
minimum value of capacitance and have an ESR value that
is within the range 5 mΩ to 500 mΩ for stability.
micro SMD MOUNTING
The micro SMD package requires specific mounting techniques, which are detailed in National Semiconductor Application Note AN-1112.
For best results during assembly, alignment ordinals on the
PC board may be used to facilitate placement of the micro
SMD device.
CAPACITOR CHARACTERISTICS
The LP5900 is designed to work with ceramic capacitors on
the input and output to take advantage of the benefits they
offer. For capacitance values in the range of 0.47 µF to 4.7
µF, ceramic capacitors are the smallest, least expensive and
have the lowest ESR values, thus making them best for
eliminating high frequency noise. The ESR of a typical 0.47
µF ceramic capacitor is in the range of 20 mΩ to 40 mΩ,
which easily meets the ESR requirement for stability for the
LP5900.
The temperature performance of ceramic capacitors varies
by type and manufacturer. Most large value ceramic capacitors (≥2.2 µF) are manufactured with Z5U or Y5V temperature characteristics, which results in the capacitance dropping by more than 50% as the temperature goes from 25˚C
to 85˚C.
micro SMD LIGHT SENSITIVITY
Exposing the micro SMD device to direct light may cause
incorrect operation of the device. Light sources such as
halogen lamps can affect electrical performance if they are
situated in proximity to the device.
Light with wavelengths in the red and infra-red part of the
spectrum have the most detrimental effect thus the fluorescent lighting used inside most buildings has very little effect
on performance.
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LP5900
Application Hints
LP5900 Ultra Low Noise, 100 mA Linear Regulator for RF/Analog Circuits Requires No Bypass
Capacitor
Physical Dimensions
inches (millimeters) unless otherwise noted
4-Bump Thin micro SMD
NS Package Number TLA04CDA
The dimensions for X1, X2 and X3 are given as:
X1 = 1.065 mm ± 0.030 mm
X2 = 1.090 mm ± 0.030 mm
X3 = 0.600 mm ± 0.075 mm
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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provided in the labeling, can be reasonably expected to result
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