FAIRCHILD 74F368SJ

Revised August 1999
74F366•74F368
Hex Inverter Buffer with 3-STATE Outputs
■ High-speed
Features
■ Bus-oriented
■ 3-STATE buffer outputs sink 64 mA
■ High impedance npn base inputs for reduced loading
Ordering Code:
Order Number
74F366SC
Package Number
Package Description
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
74F366PC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
74F368SC
M16A
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
74F368SJ
M16D
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
74F368PC
N16E
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Devices also available in Tape and Reel. Specify by appending the suffix letter “X” to the ordering code.
Connection Diagrams
74F366
© 1999 Fairchild Semiconductor Corporation
74F368
DS009521
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74F366•74F368 Hex Inverter Buffer with 3-STATE Outputs
April 1988
74F366•74F368
Logic Symbols
IEEE/IEC
74F366
IEEE/IEC
74F368
Unit Loading/Fan Out
Pin Names
Description
U.L.
Input IIH/IIL
HIGH/LOW
Output IOH/IOL
OE1, OE2
Output Enable Input (Active LOW)
1.0/0.033
20 µA/−20 µA
In
Input
1.0/0.033
20 µA/−20 µA
On, On
Outputs
600/106.6 (80)
−12 mA/64 mA (48 mA)
Function Tables
74F366
Inputs
74F368
Output
Inputs
Output
OE1
OE2
I
O
OE
I
O
L
L
L
H
L
L
H
L
L
H
L
H
X
Z
L
L
H
X
H
X
Z
H
X
X
Z
L = LOW Voltage Level
H
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X = Immaterial
= HIGH Voltage Level
Z = High Impedance
2
Recommended Operating
Conditions
Storage Temperature
−65°C to +150°C
Ambient Temperature under Bias
−55°C to +125°C
Free Air Ambient Temperature
Junction Temperature under Bias
−55°C to +150°C
Supply Voltage
0°C to +70°C
+4.5V to +5.5V
−0.5V to +7.0V
VCC Pin Potential to Ground Pin
Input Voltage (Note 2)
−0.5V to +7.0V
Input Current (Note 2)
−30 mA to +5.0 mA
Voltage Applied to Output
in HIGH State (with VCC = 0V)
Standard Output
−0.5V to VCC
3-STATE Output
−0.5V to +5.5V
Note 1: Absolute maximum ratings are values beyond which the device
may be damaged or have its useful life impaired. Functional operation
under these conditions is not implied.
Current Applied to Output
twice the rated IOL (mA)
in LOW State (Max)
Note 2: Either voltage limit or current limit is sufficient to protect inputs.
DC Electrical Characteristics
Symbol
Parameter
Min
Typ
Max
Units
VCC
Conditions
VIH
Input HIGH Voltage
VIL
Input LOW Voltage
0.8
V
VCD
Input Clamp Diode Voltage
−1.2
V
Min
IIN = −18 mA
VOH
Output HIGH
V
Min
IOH = −15 mA
0.55
V
Min
IOL = 64 mA
2.0
10% VCC
V
2.0
Recognized as a HIGH Signal
Recognized as a LOW Signal
Voltage
VOL
Output LOW
10% VCC
Voltage
IIH
Input HIGH Current
20
µA
Max
VIN = 2.7V
IBVI
Input HIGH Current
100
µA
Max
VIN = 7.0V
Breakdown Test
IIL
Input LOW Current
−20
µA
Max
VIN = 0.5V
IOZH
Output Leakage Current
50
µA
Max
VOUT = 2.7V
IOZL
Output Leakage Current
−50
µA
Max
VOUT = 0.5V
IOS
Output Short-Circuit Current
−225
mA
Max
VOUT = 0V
ICEX
Output HIGH Leakage Current
250
µA
Max
VOUT = VCC
−100
IZZ
Bus Drainage Test
500
µA
0.0V
VOUT = 5.25V
ICCH
Power Supply Current
20
25
mA
Max
VO = HIGH
ICCL
Power Supply Current
49
62
mA
Max
VO = LOW
ICCZ
Power Supply Current
35
48
mA
Max
VO = HIGH Z
AC Electrical Characteristics
TA = +25°C
Symbol
tPLH
Parameter
Typ
Max
Min
Max
4.0
6.5
2.0
7.5
1.0
1.8
5.0
1.0
5.5
Enable Time (74F366)
2.5
4.2
9.5
2.5
10.0
2.5
4.2
9.0
2.5
9.5
Enable Time (74F368)
2.5
4.2
7.5
2.0
8.5
3.0
5.6
8.5
3.0
9.0
2.0
3.3
6.5
2.0
7.0
2.0
4.1
6.5
2.0
7.0
tPZL
tPHZ
tPLZ
CL = 50 pF
2.5
tPZL
tPZH
CL = 50 pF
CL = 50 pF
Min
Propagation Delay
tPHL
tPZH
TA = 0°C to +70°C
VCC = +5.0V
Disable Time
3
Units
ns
ns
ns
ns
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74F366•74F368
Absolute Maximum Ratings(Note 1)
74F366•74F368
Physical Dimensions inches (millimeters) unless otherwise noted
16-Lead Small Outline Integrated Circuit (SOIC), JEDEC MS-012, 0.150 Narrow
Package Number M16A
16-Lead Small Outline Package (SOP), EIAJ TYPE II, 5.3mm Wide
Package Number M16D
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4
74F366•74F368 Hex Inverter Buffer with 3-STATE Outputs
Physical Dimensions inches (millimeters) unless otherwise noted (Continued)
16-Lead Plastic Dual-In-Line Package (PDIP), JEDEC MS-001, 0.300 Wide
Package Number N16E
Fairchild does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and
Fairchild reserves the right at any time without notice to change said circuitry and specifications.
LIFE SUPPORT POLICY
FAIRCHILD’S PRODUCTS ARE NOT AUTHORIZED FOR USE AS CRITICAL COMPONENTS IN LIFE SUPPORT
DEVICES OR SYSTEMS WITHOUT THE EXPRESS WRITTEN APPROVAL OF THE PRESIDENT OF FAIRCHILD
SEMICONDUCTOR CORPORATION. As used herein:
2. A critical component in any component of a life support
device or system whose failure to perform can be reasonably expected to cause the failure of the life support
device or system, or to affect its safety or effectiveness.
1. Life support devices or systems are devices or systems
which, (a) are intended for surgical implant into the
body, or (b) support or sustain life, and (c) whose failure
to perform when properly used in accordance with
instructions for use provided in the labeling, can be reasonably expected to result in a significant injury to the
user.
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5
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