ATMEL AT49LV020-12TI 2-megabit 256k x 8 single 2.7-volt battery-voltage flash memory Datasheet

Features
•
•
•
•
•
•
•
•
•
•
Single Supply Voltage, Range 2.7V to 3.6V
Single Supply for Read and Write
Fast Read Access Time - 70 ns
Internal Program Control and Timer
8K bytes Boot Block With Lockout
Fast Erase Cycle Time - 10 seconds
Byte By Byte Programming - 30 µs/Byte typical
Hardware Data Protection
DATA Polling For End Of Program Detection
Low Power Dissipation
– 25 mA Active Current
– 50 µA CMOS Standby Current
• Typical 10,000 Write Cycles
Description
The AT49BV020 and the AT49LV020 are 3-volt-only, 2 megabit Flash memories
organized as 262,144 words of 8 bits each. Manufactured with Atmel's advanced nonvolatile CMOS technology, the devices offer access times to 70 ns with power dissipation of just 90 mW over the commercial temperature range. When the device is deselected, the CMOS standby current is less than 50 µA.
To allow for simple in-system reprogrammability, the AT49BV/LV020 does not require
high input voltages for programming. Three-volt-only commands determine the read
and programming operation of the device. Reading data out of the device is similar to
reading from an EPROM. Reprogramming the AT49BV/LV020 is performed by erasing the entire 2 megabits of memory and then programming on a byte by byte basis.
The typical byte programming time is a fast 30 µs. The end of a program cycle can be
optionally detected by the DATA polling feature. Once the end of a byte program cycle
has been detected, a new access for a read or program can begin. The typical number of program and erase cycles is in excess of 10,000 cycles.
(continued)
2-Megabit
(256K x 8)
Single 2.7-volt
Battery-Voltage™
Flash Memory
AT49BV020
AT49LV020
Pin Configuration
Pin Name
Function
A0 - A17
Addresses
CE
Chip Enable
OE
Output Enable
WE
Write Enable
I/O0 - I/O7
Data Inputs/Outputs
NC
No Connect
PLCC Top View
VSOP Top View (8 x 14mm) or
TSOP Top View (8 x 20mm)
Type 1
Rev. 0678C–03/98
1
The optional 8K bytes boot block section includes a reprogramming write lock out feature to provide data integrity.
The boot sector is designed to contain user secure code,
and when the feature is enabled, the boot sector is permanently protected from being reprogrammed.
Block Diagram
Device Operation
READ: The AT49BV/LV020 is accessed like an EPROM.
When CE and OE are low and WE is high, the data stored
at the memory location determined by the address pins is
asserted on the outputs. The outputs are put in the high
impedance state whenever CE or OE is high. This dual-line
control gives designers flexibility in preventing bus contention.
ERASURE: Before a byte can be reprogrammed, the 256K
bytes memory array (or 248K bytes if the boot block featured is used) must be erased. The erased state of the
memory bits is a logical “1”. The entire device can be
erased at one time by using a 6-byte software code. The
software chip erase code consists of 6-byte load commands to specific address locations with a specific data
pattern (please refer to the Chip Erase Cycle Waveforms).
After the software chip erase has been initiated, the device
will internally time the erase operation so that no external
clocks are required. The maximum time needed to erase
the whole chip is tEC. If the boot block lockout feature has
been enabled, the data in the boot sector will not be
erased.
BYTE PROGRAMMING: Once the memory array is
erased, the device is programmed (to a logical “0”) on a
byte-by-byte basis. Please note that a data “0” cannot be
programmed back to a “1”; only erase operations can convert “0”s to “1”s. Programming is accomplished via the
internal device command register and is a 4 bus cycle operation (please refer to the Command Definitions table). The
device will automatically generate the required internal program pulses.
The program cycle has addresses latched on the falling
edge of WE or CE, whichever occurs last, and the data
latched on the rising edge of WE or CE, whichever occurs
first. Programming is completed after the specified tBP cycle
2
AT49BV020
time. The DATA polling feature may also be used to indicate
the end of a program cycle.
BOOT BLOCK PROGRAMMING LOCKOUT: The device
has one designated block that has a programming lockout
feature. This feature prevents programming of data in the
designated block once the feature has been enabled. The
size of the block is 8K bytes. This block, referred to as the
boot block, can contain secure code that is used to bring up
the system. Enabling the lockout feature will allow the boot
code to stay in the device while data in the rest of the
device is updated. This feature does not have to be activated; the boot block's usage as a write protected region is
optional to the user. The address range of the boot block is
00000H to 01FFFH.
Once the feature is enabled, the data in the boot block can
no longer be erased or programmed. Data in the main
memory block can still be changed through the regular programming method. To activate the lockout feature, a series
of six program commands to specific addresses with specific data must be performed. Please refer to the Command
Definitions table.
BOOT BLOCK LOCKOUT DETECTION: A software
method is available to determine if programming of the boot
block section is locked out. When the device is in the software product identification mode (see Software Product
Identification Entry and Exit sections) a read from address
location 00002H will show if programming the boot block is
locked out. If the data on I/O0 is low, the boot block can be
programmed; if the data on I/O0 is high, the program lockout feature has been activated and the block cannot be
programmed. The software product identification code
should be used to return to standard operation.
PRODUCT IDENTIFICATION: The product identification
mode identifies the device and manufacturer as Atmel. It
AT49BV020
may be accessed by hardware or software operation. The
hardware operation mode can be used by an external programmer to identify the correct programming algorithm for
the Atmel product.
For details, see Operating Modes (for hardware operation)
or Software Product Identification. The manufacturer and
device code is the same for both modes.
DATA POLLING: The AT49BV/LV020 features DATA polling to indicate the end of a program cycle. During a program cycle an attempted read of the last byte loaded will
result in the complement of the loaded data on I/O7. Once
the program cycle has been completed, true data is valid
on all outputs and the next cycle may begin. DATA polling
may begin at any time during the program cycle.
T O G G L E B I T : I n a d d i t i o n t o DATA p o l l i n g t h e
AT49BV/LV020 provides another method for determining
the end of a program or erase cycle. During a program or
erase operation, successive attempts to read data from the
device will result in I/O6 toggling between one and zero.
Once the program cycle has completed, I/O6 will stop toggling and valid data will be read. Examining the toggle bit
may begin at any time during a program cycle.
HARDWARE DATA PROTECTION: Hardware features
protect against inadvertent programs to the AT49BV/LV020
in the following ways: (a) VCC sense: if VCC is below 1.8V
(typical), the program function is inhibited. (b) Program
inhibit: holding any one of OE low, CE high or WE high
inhibits program cycles. (c) Noise filter: pulses of less than
15 ns (typical) on the WE or CE inputs will not initiate a program cycle.
INPUT LEVELS: While operating with a 2.7V to 3.6V
power supply, the address inputs and control inputs (OE,
CE and WE) may be driven from 0 to 5.5V without
adversely affecting the operation of the device. The I/O
lines can only be driven from 0 to VCC + 0.6V.
Command Definition (In Hex)
Command
Sequence
1st Bus
Cycle
Bus
Cycles
Addr
Data
Read
1
Addr
DOUT
Chip Erase
6
5555
Byte Program
4
Boot Block
Lockout(1)
2nd Bus
Cycle
3rd Bus
Cycle
4th Bus
Cycle
5th Bus
Cycle
6th Bus
Cycle
Addr
Data
Addr
Data
Addr
Data
Addr
Data
Addr
Data
AA
2AAA
55
5555
80
5555
AA
2AAA
55
5555
10
5555
AA
2AAA
55
5555
A0
Addr
DIN
6
5555
AA
2AAA
55
5555
80
5555
AA
2AAA
55
5555
40
Product ID Entry
3
5555
AA
2AAA
55
5555
90
(2)
3
5555
AA
2AAA
55
5555
F0
(2)
1
XXXX
F0
Product ID Exit
Product ID Exit
Notes:
1. The 8K byte boot sector has the address range of 00000H to 01FFFH.
2. Either one of the Product ID exit commands can be used.
Absolute Maximum Ratings*
Temperature Under Bias ................................ -55°C to +125°C
Storage Temperature ..................................... -65°C to +150°C
All Input Voltages
(including NC Pins)
with Respect to Ground ...................................-0.6V to +6.25V
All Output Voltages
with Respect to Ground .............................-0.6V to VCC + 0.6V
*NOTICE:
Stresses beyond those listed under “Absolute
Maximum Ratings” may cause permanent damage to the device. This is a stress rating only and
functional operation of the device at these or any
other conditions beyond those indicated in the
operational sections of this specification is not
implied. Exposure to absolute maximum rating
conditions for extended periods may affect device
reliability.
Voltage on OE
with Respect to Ground ...................................-0.6V to +13.5V
3
DC and AC Operating Range
AT49BV/LV020-70
AT49BV/LV020-90
AT49BV/LV020-12
0°C - 70°C
0°C - 70°C
0°C - 70°C
Ind.
-40°C - 85°C
-40°C - 85°C
-40°C - 85°C
AT49LV020
3.0V to 3.6V
3.0V to 3.6V
3.0V to 3.6V
AT49BV020
2.7V to 3.6V
2.7V to 3.6V
2.7V to 3.6V
Com.
Operating
Temperature (Case)
VCC Power Supply
Operating Modes
Mode
CE
OE
WE
Ai
I/O
Read
VIL
VIL
VIH
Ai
DOUT
Program(2)
VIL
VIH
VIL
Ai
DIN
Standby/Write Inhibit
VIH
X(1)
X
X
High Z
Program Inhibit
X
X
VIH
Program Inhibit
X
VIL
X
Output Disable
X
VIH
X
High Z
Product Identification
Hardware
VIL
VIL
VIH
Software(5)
Notes:
A1 - A17 = VIL, A9 = VH(3)
A0 = VIL
Manufacturer Code(4)
A1 - A17 = VIL, A9 = VH,(3)
A0 = VIH
Device Code (4)
A0 = VIL, A1 - A17=VIL
Manufacturer Code(4)
A0 = VIH, A1 - A17=VIL
Device Code(4)
1. X can be VIL or VIH.
2. Refer to AC Programming Waveforms.
3. VH = 12.0V ± 0.5V.
4. Manufacturer Code: 1FH, Device Code: OBH
5. See details under Software Product Identification Entry/Exit.
DC Characteristics
Symbol
Parameter
Condition
ILI
Input Load Current
ILO
Max
Units
VIN = 0V to VCC
10
µA
Output Leakage Current
VI/O = 0V to VCC
10
µA
ISB1
VCC Standby Current CMOS
CE = VCC - 0.3V to VCC
50
µA
ISB2
VCC Standby Current TTL
CE = 2.0V to VCC
1
mA
ICC(1)
VCC Active Current
f = 5 MHz; IOUT = 0 mA
25
mA
VIL
Input Low Voltage
0.6
V
VIH
Input High Voltage
VOL
Output Low Voltage
IOL = 2.1 mA
Output High Voltage
IOH = -100 µA; VCC = 3.0V
VOH
Note:
4
1. In the erase mode, ICC is 50 mA.
AT49BV020
Min
2.0
V
0.45
2.4
V
V
AT49BV020
AC Read Characteristics
AT49BV/LV020
-70
Parameter
tACC
Address to Output Delay
70
tCE(1)
CE to Output Delay
70
tOE(2)
OE to Output Delay
0
35
0
40
CE or OE to Output Float
0
25
0
25
Output Hold from OE, CE or Address,
whichever occurred first
0
tDF
tOH
Max
Min
-12
Symbol
(3)(4)
Min
-90
Max
Max
Units
90
120
ns
90
120
ns
0
50
ns
0
30
ns
0
Min
0
ns
AC Read Waveforms(1)(2)(3)(4)
ADDRESS
ADDRESS VALID
CE
tCE
tOE
OE
tACC
HIGH Z
OUTPUT
Notes:
tDF
tOH
OUTPUT VALID
1.
CE may be delayed up to tACC - tCE after the address transition without impact on tACC.
2.
OE may be delayed up to tCE - tOE after the falling edge of CE without impact on tCE or by tACC - tOE after an address change
without impact on tACC.
3.
tDF is specified from OE or CE whichever occurs first (CL = 5pF).
4.
This parameter is characterized and is not 100% tested.
Output Test Load
Input Test Waveforms and Measurement Level
AC
DRIVING
LEVELS
2.4V
1.5V
0.4V
3.0V
1.8K
AC
MEASUREMENT
LEVEL
OUTPUT
PIN
1.3K
tR, tF < 5 ns
100 pF
Pin Capacitance (f = 1 MHz, T = 25°C)(1)
CIN
COUT
Note:
Typ
Max
Units
Conditions
4
6
pF
VIN = 0V
8
12
1. This parameter is characterized and is not 100% tested.
pF
VOUT = 0V
5
AC Byte Load Characteristics
Symbol
Parameter
Min
tAS, tOES
Address, OE Set-up Time
tAH
Address Hold Time
tCS
Units
0
ns
100
ns
Chip Select Set-up Time
0
ns
tCH
Chip Select Hold Time
0
ns
tWP
Write Pulse Width (WE or CE)
200
ns
tDS
Data Set-up Time
100
ns
tDH, tOEH
Data, OE Hold Time
0
ns
tWPH
Write Pulse Width High
200
ns
AC Byte Load Waveforms
WE Controlled
OE
tOES
tOEH
ADDRESS
tAS
tAH
tCH
CE
tCS
WE
tWP
tDS
tWPH
tDH
DATA IN
CE Controlled
OE
tOES
tOEH
ADDRESS
tAS
tAH
tCH
WE
tCS
CE
tWP
tDS
DATA IN
6
Max
AT49BV020
tWPH
tDH
AT49BV020
Data Polling Characteristics(1)
Symbol
Parameter
Min
tDH
Data Hold Time
tOEH
OE Hold Time
Max
OE to Output Delay
tWR
Write Recovery Time
Units
0
ns
10
ns
(2)
tOE
Notes:
Typ
ns
0
ns
1. These parameters are characterized and not 100% tested.
2. See tOE spec in AC Read Characteristics.
Data Polling Waveforms
WE
CE
tOEH
OE
tDH
tOE
tWR
HIGH Z
I/O7
A0-A17
An
An
An
An
An
Toggle Bit Characteristics(1)
Symbol
Parameter
Min
tDH
Data Hold Time
tOEH
OE Hold Time
tOE
OE to Output Delay
tOEHP
OE High Pulse
tWR
Notes:
Typ
Max
Units
0
ns
10
ns
(2)
ns
Write Recovery Time
150
ns
0
ns
1. These parameters are characterized and not 100% tested.
2. See tOE spec in AC Read Characteristics.
Toggle Bit Waveforms(1)(2)(3)
WE
CE
tOEH
tOEHP
OE
tDH
I/O6
Notes:
tOE
tWR
HIGH Z
1. Toggling either OE or CE or both OE and CE will operate toggle bit. The tOEHP specification must be met by the toggling
input(s).
2. Beginning and ending state of I/O6 will vary.
3. Any address location may be used but the address should not vary.
7
Software Product Identification Entry(1)
LOAD DATA AA
TO
ADDRESS 5555
Boot Block Lockout
Feature Enable Algorithm(1)
LOAD DATA AA
TO
ADDRESS 5555
LOAD DATA 55
TO
ADDRESS 2AAA
LOAD DATA 55
TO
ADDRESS 2AAA
LOAD DATA 90
TO
ADDRESS 5555
LOAD DATA 80
TO
ADDRESS 5555
ENTER PRODUCT
IDENTIFICATION
(2)(3)(5)
MODE
LOAD DATA AA
TO
ADDRESS 5555
Software Product Identification Exit(1)
LOAD DATA AA
TO
ADDRESS 5555
OR
LOAD DATA 55
TO
ADDRESS 2AAA
LOAD DATA F0
TO
ANY ADDRESS
LOAD DATA 55
TO
ADDRESS 2AAA
EXIT PRODUCT
IDENTIFICATION
MODE (4)
LOAD DATA 40
TO
ADDRESS 5555
LOAD DATA F0
TO
ADDRESS 5555
PAUSE 1 second
Notes:
EXIT PRODUCT
IDENTIFICATION
MODE (4)
Notes:
8
1.
Data Format: I/O7 - I/O0 (Hex);
Address Format: A14 - A0 (Hex).
2.
A1 - A17 = VIL.
Manufacture Code is read for A0 = VIL;
Device Code is read for A0 = VIH.
3.
The device does not remain in identification mode if
powered down.
4.
The device returns to standard operation mode.
5.
Manufacturer Code: 1FH
Device Code: 0BH
AT49BV020
(2)
1.
Data Format: I/O7 - I/O0 (Hex);
Address Format: A14 - A0 (Hex).
2.
Boot block lockout feature enabled.
AT49BV020
Ordering Information(1)
ICC (mA)
tACC
(ns)
Active
Standby
70
25
90
120
70
90
120
Note:
Ordering Code
Package
Operation Range
0.05
AT49LV020-70JC
AT49LV020-70TC
AT49LV020-70VC
32J
32T
32V
Commercial
(0°C - 70°C)
25
0.05
AT49LV020-70JI
AT49LV020-70TI
AT49LV020-70VI
32J
32T
32V
Industrial
(-40°C - 85°C)
25
0.05
AT49LV020-90JC
AT49LV020-90TC
AT49LV020-90VC
32J
32T
32V
Commercial
(0°C - 70°C)
25
0.05
AT49LV020-90JI
AT49LV020-90TI
AT49LV020-90VI
32J
32T
32V
Industrial
(-40°C - 85°C)
25
0.05
AT49LV020-12JC
AT49LV020-12TC
AT49LV020-12VC
32J
32T
32V
Commercial
(0°C - 70°C)
25
0.05
AT49LV020-12JI
AT49LV020-12TI
AT49LV020-12VI
32J
32T
32V
Industrial
(-40°C - 85°C)
25
0.05
AT49BV020-70JC
AT49BV020-70TC
AT49BV020-70VC
32J
32T
32V
Commercial
(0°C - 70°C)
25
0.05
AT49BV020-70JI
AT49BV020-70TI
AT49BV020-70VI
32J
32T
32V
Industrial
(-40°C - 85°C)
25
0.05
AT49BV020-90JC
AT49BV020-90TC
AT49BV020-90VC
32J
32T
32V
Commercial
(0°C - 70°C)
25
0.05
AT49BV020-90JI
AT49BV020-90TI
AT49BV020-90VI
32J
32T
32V
Industrial
(-40°C - 85°C)
25
0.05
AT49BV020-12JC
AT49BV020-12TC
AT49BV020-12VC
32J
32T
32V
Commercial
(0°C - 70°C)
25
0.05
AT49BV020-12JI
AT49BV020-12TI
AT49BV020-12VI
32J
32T
32V
Industrial
(-40°C - 85°C)
1. The AT49BV/LV020 has an optional boot block feature. The part number shown in the Ordering information table is for
devices with the boot block in the lower address range (i.e., 00000H to 01FFFH). Users requiring the boot block to be in the
higher address range should contact Atmel.
Package Type
32J
32-Lead, Plastic, J-Leaded Chip Carrier Package (PLCC)
32T
32-Lead, Thin Small Outline Package (TSOP)
32V
32-Lead, Thin Small Outline Package (VSOP) 8 x 14 mm
9
Packaging Information
32J, 32-Lead, Plastic J-Leaded Chip Carrier
(PLCC) Dimensions in Inches and (Millimeters)
32T, 32-Lead Plastic Thin Small Outline Package
(TSOP) Dimensions in Millimeters and (Inches) *
JEDEC STANDARD MS-016 AE
JEDEC OUTLINE MO-142 BD
.045(1.14) X 45°
PIN NO. 1
IDENTIFY
.025(.635) X 30° - 45°
.012(.305)
.008(.203)
.553(14.0)
.547(13.9)
.595(15.1)
.585(14.9)
.032(.813)
.026(.660)
.050(1.27) TYP
.300(7.62) REF
.430(10.9)
.390(9.90)
AT CONTACT
POINTS
INDEX
MARK
.530(13.5)
.490(12.4)
18.5(.728)
18.3(.720)
.021(.533)
.013(.330)
.030(.762)
.015(3.81)
.095(2.41)
.060(1.52)
.140(3.56)
.120(3.05)
0.50(.020)
BSC
7.50(.295)
REF
20.2(.795)
19.8(.780)
0.25(.010)
0.15(.006)
8.20(.323)
7.80(.307)
1.20(.047) MAX
.022(.559) X 45° MAX (3X)
0.15(.006)
0.05(.002)
.453(11.5)
.447(11.4)
.495(12.6)
.485(12.3)
0
5 REF
0.20(.008)
0.10(.004)
0.70(.028)
0.50(.020)
* Controlling dimension: millimeters
32V, 32-Lead, Plastic Thin Small Outline Package
(VSOP) Dimensions in Inches and (Millimeters)
JEDEC OUTLINE MO-142 BA
INDEX
MARK
12.5(.492)
12.3(.484)
0.50(.020)
BSC
7.50(.295)
REF
14.2(.559)
13.8(.543)
0.25(.010)
0.15(.006)
8.10(.319)
7.90(.311)
1.20(.047) MAX
0.15(.006)
0.05(.002)
0
5 REF
0.20(.008)
0.10(.004)
0.70(.028)
0.50(.020)
10
AT49BV020
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