IRF IRF7904UPBF Hexfet power mosfet Datasheet

PD - 96084A
IRF7904UPbF
HEXFET® Power MOSFET
Applications
l Dual SO-8 MOSFET for POL
Converters in Notebook Computers, Servers,
Graphics Cards, Game Consoles
and Set-Top Box
Benefits
l Very Low RDS(on) at 4.5V VGS
l Low Gate Charge
l Fully Characterized Avalanche Voltage
and Current
l 20V VGS Max. Gate Rating
l Improved Body Diode Reverse Recovery
l 100% Tested for RG
l Lead-Free
VDSS
30V
ID
RDS(on) max
Q1 16.2m:@VGS = 10V
Q2 10.8m:@VGS = 10V
G1 1
8
D1
S2
2
7
S1 / D2
S2
3
6
S1 / D2
G2 4
5
S1 / D2
7.6A
11A
SO-8
Absolute Maximum Ratings
Parameter
Q1 Max.
Q2 Max.
Units
VDS
Drain-to-Source Voltage
VGS
Gate-to-Source Voltage
ID @ TA = 25°C
Continuous Drain Current, VGS @ 10V
7.6
11
ID @ TA = 70°C
Continuous Drain Current, VGS @ 10V
6.1
8.9
IDM
Pulsed Drain Current
61
89
PD @TA = 25°C
Power Dissipation
1.4
2.0
PD @TA = 70°C
Power Dissipation
0.9
1.3
Linear Derating Factor
Operating Junction and
0.011
0.016
TJ
W/°C
°C
TSTG
Storage Temperature Range
Q1 Max.
Q2 Max.
Units
20
20
°C/W
90
62.5
c
V
30
± 20
-55 to + 150
A
W
Thermal Resistance
RθJL
RθJA
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Parameter
Junction-to-Drain Lead
g
Junction-to-Ambient fg
1
09/19/06
IRF7904UPbF
Static @ TJ = 25°C (unless otherwise specified)
BVDSS
∆ΒVDSS/∆TJ
Parameter
Drain-to-Source Breakdown Voltage
Breakdown Voltage Temp. Coefficient
RDS(on)
Static Drain-to-Source On-Resistance
Q1&Q2
Q1
Q2
Q1
Q2
VGS(th)
∆VGS(th)/∆TJ
Gate Threshold Voltage
Gate Threshold Voltage Coefficient
IDSS
Drain-to-Source Leakage Current
IGSS
gfs
Gate-to-Source Forward Leakage
Gate-to-Source Reverse Leakage
Forward Transconductance
Qg
Total Gate Charge
Qgs1
Pre-Vth Gate-to-Source Charge
Qgs2
Post-Vth Gate-to-Source Charge
Qgd
Gate-to-Drain Charge
Qgodr
Gate Charge Overdrive
Qsw
Switch Charge (Qgs2 + Qgd)
Qoss
Output Charge
RG
Gate Resistance
td(on)
Turn-On Delay Time
tr
Rise Time
td(off)
Turn-Off Delay Time
tf
Fall Time
Ciss
Input Capacitance
Coss
Output Capacitance
Crss
Reverse Transfer Capacitance
Q1&Q2
Q1
Q2
Q1&Q2
Q1&Q2
Q1&Q2
Q1&Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Min.
30
–––
–––
–––
–––
–––
–––
1.35
–––
–––
–––
–––
–––
–––
17
23
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
0.024
0.024
11.4
14.5
8.6
10
–––
-5.0
-5.0
–––
–––
–––
–––
–––
–––
7.5
14
2.2
3.7
0.6
1.1
2.5
4.8
2.2
4.4
3.1
5.9
4.5
9.1
3.2
2.9
6.9
7.8
7.3
10
10
15
3.2
4.6
910
1780
190
390
94
180
Max.
–––
–––
–––
16.2
20.5
10.8
13
2.25
–––
–––
1.0
150
100
-100
–––
–––
11
21
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
4.8
4.4
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Conditions
Units
VGS = 0V, ID = 250µA
V
V/°C Reference to 25°C, ID = 1mA
e
e
e
e
VGS = 10V, ID = 7.6A
VGS = 4.5V, ID = 6.1A
VGS = 10V, ID = 11A
VGS = 4.5V, ID = 8.8A
Q1: VDS = VGS, ID = 25µA
V
mV/°C Q2: VDS = VGS, ID = 50µA
mΩ
µA
nA
S
nC
VDS = 24V, VGS = 0V
VDS = 24V, VGS = 0V, TJ = 125°C
VGS = 20V
VGS = -20V
VDS = 15V, ID = 6.1A
VDS = 15V, ID = 8.8A
Q1
VDS = 15V
VGS = 4.5V, ID = 6.1A
Q2
VDS = 15V
VGS = 4.5V, ID = 8.8A
nC
VDS = 16V, VGS = 0V
Ω
Q1
VDD = 15V, VGS = 4.5V
ID = 6.1A
ns
Q2
VDD = 15V, VGS = 4.5V
ID = 8.8A
Clamped Inductive Load
pF
VGS = 0V
VDS = 15V
ƒ = 1.0MHz
Avalanche Characteristics
EAS
IAR
Parameter
Single Pulse Avalanche Energy
Avalanche Current
c
Typ.
–––
–––
d
Q1 Max.
140
6.1
Q2 Max.
250
8.8
Units
mJ
A
Diode Characteristics
VSD
Parameter
Continuous Source Current
(Body Diode)
Pulsed Source Current
(Body Diode)
Diode Forward Voltage
trr
Reverse Recovery Time
Qrr
Reverse Recovery Charge
IS
ISM
2
c
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Q1
Q2
Min.
–––
–––
–––
–––
–––
–––
–––
–––
–––
–––
Typ.
–––
–––
–––
–––
–––
–––
11
16
2.6
6.9
Max.
1.8
2.5
61
88
1.0
1.0
17
24
3.9
10
Units
Conditions
A
MOSFET symbol
showing the
integral reverse
A
p-n junction diode.
TJ = 25°C, IS = 6.1A, VGS = 0V
V
TJ = 25°C, IS = 8.8A, VGS = 0V
Q1 TJ = 25°C, IF = 6.1A,
ns
VDD = 15V, di/dt = 100A/µs
nC Q2 TJ = 25°C, IF = 8.8A,
VDD = 15V, di/dt = 100A/µs
e
e
e
e
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IRF7904UPbF
Typical Characteristics
Q1 - Control FET
Q2 - Synchronous FET
100
100
10
BOTTOM
VGS
10V
8.0V
5.0V
4.5V
4.0V
3.5V
3.0V
2.5V
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
TOP
1
2.5V
≤ 60µs PULSE WIDTH
Tj = 25°C
10
TOP
2.5V
1
≤ 60µs PULSE WIDTH
Tj = 25°C
0.1
0.1
0.1
1
10
100
0.1
VDS, Drain-to-Source Voltage (V)
10
100
Fig 2. Typical Output Characteristics
100
100
BOTTOM
VGS
10V
8.0V
5.0V
4.5V
4.0V
3.5V
3.0V
2.5V
ID, Drain-to-Source Current (A)
TOP
ID, Drain-to-Source Current (A)
1
VDS, Drain-to-Source Voltage (V)
Fig 1. Typical Output Characteristics
10
2.5V
≤ 60µs PULSE WIDTH
Tj = 150°C
1
TOP
10
2.5V
BOTTOM
VGS
10V
8.0V
5.0V
4.5V
4.0V
3.5V
3.0V
2.5V
≤ 60µs PULSE WIDTH
Tj = 150°C
1
0.1
1
10
100
0.1
1
10
100
VDS, Drain-to-Source Voltage (V)
VDS, Drain-to-Source Voltage (V)
Fig 3. Typical Output Characteristics
Fig 4. Typical Output Characteristics
100.0
100.0
10.0
ID, Drain-to-Source Current(Α)
ID, Drain-to-Source Current(Α)
BOTTOM
VGS
10V
8.0V
5.0V
4.5V
4.0V
3.5V
3.0V
2.5V
TJ = 150°C
TJ = 25°C
1.0
VDS = 15V
≤ 60µs PULSE WIDTH
0.1
10.0
TJ = 150°C
TJ = 25°C
1.0
VDS = 15V
≤ 60µs PULSE WIDTH
0.1
1.0
2.0
3.0
4.0
5.0
1.0
2.0
3.0
4.0
5.0
VGS, Gate-to-Source Voltage (V)
VGS, Gate-to-Source Voltage (V)
Fig 5. Typical Transfer Characteristics
Fig 6. Typical Transfer Characteristics
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3
IRF7904UPbF
Typical Characteristics
Q1 - Control FET
10000
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
1000
C, Capacitance (pF)
C, Capacitance (pF)
10000
Q2 - Synchronous FET
Ciss
Coss
Crss
100
VGS = 0V,
f = 1 MHZ
Ciss = Cgs + Cgd, Cds SHORTED
Crss = Cgd
Coss = Cds + Cgd
Ciss
1000
Coss
Crss
10
100
1
10
100
1
10
VDS, Drain-to-Source Voltage (V)
100
VDS , Drain-to-Source Voltage (V)
Fig 7. Typical Capacitance vs. Drain-to-Source Voltage Fig 8. Typical Capacitance vs. Drain-to-Source Voltage
12
ID= 6.1A
VDS = 24V
VDS= 15V
10
VGS, Gate-to-Source Voltage (V)
VGS, Gate-to-Source Voltage (V)
12
8
6
4
2
0
ID= 8.8A
VDS= 15V
10
8
6
4
2
0
0
5
10
15
20
0
5
QG Total Gate Charge (nC)
100
100µsec
10
10msec
1
100msec
TA = 25°C
Tj = 150°C
Single Pulse
0.01
0.01
0.10
1.00
10.00
100.00
VDS , Drain-toSource Voltage (V)
Fig 11. Maximum Safe Operating Area
ID, Drain-to-Source Current (A)
ID, Drain-to-Source Current (A)
OPERATION IN THIS AREA
LIMITED BY R DS (on)
1msec
15
20
25
30
35
Fig 10. Typical Gate Charge vs. Gate-to-Source
Voltage
1000
1000
4
10
QG Total Gate Charge (nC)
Fig 9. Typical Gate Charge vs. Gate-to-Source Voltage
0.1
VDS= 24V
OPERATION IN THIS AREA
LIMITED BY R DS(on)
100
1msec
100µsec
10
10msec
1
100msec
0.1
TA = 25°C
Tj = 150°C
Single Pulse
0.01
0.01
0.10
1.00
10.00
100.00
VDS , Drain-toSource Voltage (V)
Fig 12. Maximum Safe Operating Area
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IRF7904UPbF
Typical Characteristics
Q1 - Control FET
Q2 - Synchronous FET
1.5
ID = 7.6A
VGS = 10V
RDS(on) , Drain-to-Source On Resistance
(Normalized)
RDS(on) , Drain-to-Source On Resistance
(Normalized)
1.5
1.0
0.5
ID = 11A
VGS = 10V
1.0
0.5
-60 -40 -20
0
20
40
60
80 100 120 140 160
-60 -40 -20
TJ , Junction Temperature (°C)
Fig 13. Normalized On-Resistance vs. Temperature
20
40
60
80 100 120 140 160
TJ , Junction Temperature (°C)
Fig 14. Normalized On-Resistance vs. Temperature
100.0
100.0
ISD, Reverse Drain Current (A)
ISD, Reverse Drain Current (A)
0
TJ = 150°C
10.0
1.0
TJ = 25°C
TJ = 150°C
10.0
TJ = 25°C
1.0
VGS = 0V
VGS = 0V
0.1
0.1
0.2
0.4
0.6
0.8
1.0
1.2
1.4
0.0
VSD, Source-to-Drain Voltage (V)
40
ID = 7.6A
35
30
25
TJ = 125°C
20
15
TJ = 25°C
10
2.0
4.0
6.0
8.0
10.0
VGS, Gate-to-Source Voltage (V)
Fig 17. Typical On-Resistance vs.Gate Voltage
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0.8
1.2
1.6
2.0
2.4
2.8
3.2
VSD, Source-to-Drain Voltage (V)
Fig 16. Typical Source-Drain Diode Forward Voltage
( Ω)
RDS (on), Drain-to -Source On Resistance m
( Ω)
RDS (on), Drain-to -Source On Resistance m
Fig 15. Typical Source-Drain Diode Forward Voltage
0.4
25
ID = 11A
20
TJ = 125°C
15
10
TJ = 25°C
5
2.0
4.0
6.0
8.0
10.0
VGS, Gate-to-Source Voltage (V)
Fig 18. Typical On-Resistance vs.Gate Voltage
5
IRF7904UPbF
Typical Characteristics
Q1 - Control FET
Q2 - Synchronous FET
8
12
ID , Drain Current (A)
ID , Drain Current (A)
10
6
4
2
8
6
4
2
0
0
25
50
75
100
125
150
25
50
TJ , Ambient Temperature (°C)
150
2.2
VGS(th) Gate threshold Voltage (V)
VGS(th) Gate threshold Voltage (V)
125
Fig 20. Maximum Drain Current vs. Ambient Temp.
2.6
2.2
1.8
ID = 250µA
1.4
1.8
ID = 250µA
1.4
1.0
1.0
-75
-50
-25
0
25
50
75
100
125
-75
150
-50
-25
Fig 21. Threshold Voltage vs. Temperature
25
50
75
100
125
150
Fig 22. Threshold Voltage vs. Temperature
EAS, Single Pulse Avalanche Energy (mJ)
600
I D
TOP
0.34A
0.48A
BOTTOM 6.1A
500
0
TJ , Temperature ( °C )
TJ , Temperature ( °C )
EAS, Single Pulse Avalanche Energy (mJ)
100
TJ , Ambient Temperature (°C)
Fig 19. Maximum Drain Current vs. Ambient Temp.
400
300
200
100
0
1200
I D
0.57A
0.77A
BOTTOM 8.8A
TOP
1000
800
600
400
200
0
25
50
75
100
125
150
Starting TJ, Junction Temperature (°C)
Fig 23. Maximum Avalanche Energy vs. Drain Current
6
75
25
50
75
100
125
150
Starting TJ , Junction Temperature (°C)
Fig 24. Maximum Avalanche Energy vs. Drain Current
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IRF7904UPbF
Thermal Response ( ZthJA )
100
10
D = 0.50
0.20
0.10
1
0.05
0.02
0.01
τJ
0.1
R1
R1
τJ
τ1
R2
R2
τ2
τ1
τ2
R3
R3
τ3
τC
τ
τ3
Ri (°C/W) τi (sec)
17.122 0.018925
53.325 0.74555
19.551
Ci= τi/Ri
Ci i/Ri
0.01
39.2
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
t1 , Rectangular Pulse Duration (sec)
Fig 25. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient (Q1)
100
Thermal Response ( ZthJA )
D = 0.50
10
0.20
0.10
1
0.05
0.02
0.01
τJ
0.1
R1
R1
τJ
τ1
τ1
R2
R2
τ2
τ2
Ci= τi/Ri
Ci i/Ri
0.01
R3
R3
τ3
τC
τ
τ3
Ri (°C/W) τi (sec)
10.908 0.02108
34.35
1.1482
17.15
39.7
Notes:
1. Duty Factor D = t1/t2
2. Peak Tj = P dm x Zthja + Tc
SINGLE PULSE
( THERMAL RESPONSE )
0.001
1E-006
1E-005
0.0001
0.001
0.01
0.1
1
10
100
t1 , Rectangular Pulse Duration (sec)
Fig 26. Maximum Effective Transient Thermal Impedance, Junction-to-Ambient (Q2)
Fig 27. Layout Diagram
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IRF7904UPbF
Driver Gate Drive
D.U.T
ƒ
-
‚
„
-
-
*
D.U.T. ISD Waveform
Reverse
Recovery
Current
+

RG
•
•
•
•
dv/dt controlled by RG
Driver same type as D.U.T.
I SD controlled by Duty Factor "D"
D.U.T. - Device Under Test
VDD
P.W.
Period
VGS=10V
Circuit Layout Considerations
• Low Stray Inductance
• Ground Plane
• Low Leakage Inductance
Current Transformer
+
D=
Period
P.W.
+
+
-
Body Diode Forward
Current
di/dt
D.U.T. VDS Waveform
Diode Recovery
dv/dt
Re-Applied
Voltage
Body Diode
VDD
Forward Drop
Inductor
Current
Inductor Curent
ISD
Ripple ≤ 5%
* VGS = 5V for Logic Level Devices
Fig 28. Peak Diode Recovery dv/dt Test Circuit for N-Channel
HEXFET® Power MOSFETs
V(BR)DSS
15V
DRIVER
L
VDS
tp
D.U.T
RG
+
V
- DD
IAS
VGS
20V
A
0.01Ω
tp
I AS
Fig 29a. Unclamped Inductive Test Circuit
LD
Fig 29b. Unclamped Inductive Waveforms
VDS
VDS
+
90%
VDD D.U.T
VGS
10%
VGS
Pulse Width < 1µs
Duty Factor < 0.1%
td(on)
Fig 30a. Switching Time Test Circuit
Current Regulator
Same Type as D.U.T.
tr
td(off)
Fig 30b. Switching Time Waveforms
Id
Vds
Vgs
50KΩ
12V
tf
.2µF
.3µF
D.U.T.
+VDS
Vgs(th)
VGS
-3mA
IG
ID
Current Sampling Resistors
Fig 31a. Gate Charge Test Circuit
8
Qgs1 Qgs2
Qgd
Qgodr
Fig 31b. Gate Charge Waveform
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IRF7904UPbF
SO-8 Package Outline
Dimensions are shown in millimeters (inches)
D
5
A
8
6
7
6
6X
2
3
4
e1
1.35
1.75
A1 .0040
0.25
0.10
0.33
0.51
c
.0075
.0098
0.19
0.25
D
.189
.1968
4.80
5.00
E
.1497
.1574
3.80
4.00
e
.050 BAS IC
1.27 BASIC
e1
.025 BAS IC
0.635 BAS IC
H
.2284
.2440
5.80
6.20
K
.0099
.0196
0.25
0.50
L
.016
.050
0.40
1.27
y
0°
8°
0°
8°
K x 45°
A
A1
MAX
.020
A
C
0.25 [.010]
.0688
.0098
e
8X b
MIN
.0532
.013
H
1
MAX
b
5
0.25 [.010]
MILLIMET ERS
MIN
A
E
INCHES
DIM
B
y
0.10 [.004]
C A B
8X L
8X c
7
F OOT PRINT
NOT ES:
1. DIMENSIONING & T OLERANCING PER AS ME Y14.5M-1994.
8X 0.72 [.028]
2. CONT ROLLING DIMENS ION: MILLIMET ER
3. DIMENSIONS ARE S HOWN IN MILLIMET ERS [INCHES ].
4. OUT LINE CONF ORMS T O JEDEC OUT LINE MS -012AA.
5 DIMENSION DOES NOT INCLUDE MOLD PROT RUS IONS .
MOLD PROT RUS IONS NOT T O EXCEED 0.15 [.006].
6 DIMENSION DOES NOT INCLUDE MOLD PROT RUS IONS .
MOLD PROT RUS IONS NOT T O EXCEED 0.25 [.010].
6.46 [.255]
7 DIMENSION IS T HE LENGT H OF LEAD F OR SOLDERING T O
A SUBS T RAT E.
3X 1.27 [.050]
8X 1.78 [.070]
SO-8 Part Marking
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9
IRF7904UPbF
SO-8 Tape and Reel
Dimensions are shown in millimeters (inches)
TERMINAL NUMBER 1
12.3 ( .484 )
11.7 ( .461 )
8.1 ( .318 )
7.9 ( .312 )
FEED DIRECTION
NOTES:
1. CONTROLLING DIMENSION : MILLIMETER.
2. ALL DIMENSIONS ARE SHOWN IN MILLIMETERS(INCHES).
3. OUTLINE CONFORMS TO EIA-481 & EIA-541.
330.00
(12.992)
MAX.
14.40 ( .566 )
12.40 ( .488 )
NOTES :
1. CONTROLLING DIMENSION : MILLIMETER.
2. OUTLINE CONFORMS TO EIA-481 & EIA-541.
Notes:
 Repetitive rating; pulse width limited by
max. junction temperature.
‚ Starting TJ = 25°C, Q1: L = 7.7mH
RG = 25Ω, IAS = 6.1A; Q2: L = 6.5mH
RG = 25Ω, IAS = 8.8A.
ƒ Pulse width ≤ 400µs; duty cycle ≤ 2%.
„ When mounted on 1 inch square copper board.
Rθ is measured at TJ approximately 90°C.
Data and specifications subject to change without notice.
This product has been designed and qualified for the Consumer market.
Qualification Standards can be found on IR’s Web site.
IR WORLD HEADQUARTERS: 233 Kansas St., El Segundo, California 90245, USA Tel: (310) 252-7105
TAC Fax: (310) 252-7903
Visit us at www.irf.com for sales contact information. 09/2006
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www.irf.com