NSC LM3674MF-1.8 2mhz, 600ma step-down dc-dc converter in sot 23-5 Datasheet

LM3674
2MHz, 600mA Step-Down DC-DC Converter in SOT 23-5
General Description
Features
The LM3674 step-down DC-DC converter is optimized for
powering low voltage circuits from a single Li-Ion cell battery
and input voltage rails from 2.7V to 5.5V. It provides up to
600mA load current, over the entire input voltage range.
There are several fixed output voltages and adjustable output voltage versions.
n 600mA max load current
n Input voltage range from 2.7V to 5.5V
n Available in fixed and adjustable output voltages ranging
from 1.0V to 3.3V
n Operates from a single Li-Ion cell Battery
n Internal synchronous rectification for high efficiency
n Internal soft start
n 0.01 µA typical shutdown current
n 2 MHz PWM fixed switching frequency (typ)
n SOT23-5 package
n Current overload protection and Thermal shutdown
protection
The device offers superior features and performance for
mobile phones and similar portable systems. During PWM
mode, the device operates at a fixed-frequency of 2 MHz
(typ). Internal synchronous rectification provides high efficiency during PWM mode operation. In shutdown mode, the
device turns off and reduces battery consumption to 0.01 µA
(typ).
The LM3674 is available in SOT23-5 in leaded (PB) and
lead-free (NO PB) versions. A high switching frequency of 2
MHz (typ) allows use of only three tiny external surfacemount components, an inductor and two ceramic capacitors.
Applications
n
n
n
n
n
n
n
Mobile phones
PDAs
MP3 players
Portable instruments
W-LAN
Digital still cameras
Portable Hard disk drives
Typical Application
20167201
FIGURE 1. Typical Application Circuit
© 2006 National Semiconductor Corporation
DS201672
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LM3674 2MHz, 600mA Step-Down DC-DC Converter in SOT 23-5
September 2006
LM3674
Typical Application
(Continued)
20167230
FIGURE 2. Typical Application Circuit
Connection Diagram and Package Mark Information
SOT23-5 Package
NS Package Number MF05A
20167202
Note: The actual physical placement of the package marking will vary from part to part.
FIGURE 3. Top View
Pin Descriptions
Pin #
Name
1
VIN
2
GND
3
EN
Enable input. The device is in shutdown mode when voltage to this pin is < 0.4V and
enable when > 1.0V. Do not leave this pin floating.
4
FB
Feedback analog input. Connect to the output filter capacitor for fixed voltage
versions. For adjustable version external resistor dividers are required ( Figure 2).
The internal resistor dividers are disabled for the adjustable version.
5
SW
Switching node connection to the internal PFET switch and NFET synchronous
rectifier.
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Description
Power supply input. Connect to the input filter capacitor ( Figure 1).
Ground pin.
2
Voltage Option
(V)
1.2
Order Number
(Level 95)
SPEC
LM3674MF-1.2
NO PB
LM3674MFX-1.2
NO PB
Package Marking
Supplied As
(#/reel)
SLRB
1000
3000
LM3674MF-1.2
1000
LM3674MFX-1.2
1.5
3000
LM3674MF-1.5
NO PB
LM3674MFX-1.5
NO PB
SLSB
3000
LM3674MF-1.5
1000
LM3674MFX-1.5
1.8
3000
LM3674MF-1.8
NO PB
LM3674MFX-1.8
NO PB
SLHB
LM3674MF-1.8
1000
3000
LM3674MF-1.875
NO PB
LM3674MF-1.875
NO PB
SNNB
1000
LM3674MF-1.875
ADJ
1000
3000
LM3674MF-1.875
2.8
1000
3000
LM3674MFX-1.8
1.875
1000
3000
LM3674MF-2.8
NO PB
LM3674MFX-2.8
NO PB
SLZB
1000
3000
LM3674MF-2.8
1000
LM3674MFX-2.8
3000
LM3674MF-ADJ
NO PB
LM3674MFX-ADJ
NO PB
SLTB
1000
3000
LM3674MF-ADJ
1000
LM3674MFX-ADJ
3000
3
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LM3674
Ordering Information
LM3674
Absolute Maximum Ratings (Note 1)
Operating Ratings (Notes 1, 2)
If Military/Aerospace specified devices are required,
please contact the National Semiconductor Sales Office/
Distributors for availability and specifications.
VIN Pin: Voltage to GND
Input Voltage Range (Note 11)
Recommended Load Current
−0.2V to 6.0V
EN, FB, SW Pin:
(GND−0.2V) to
(VIN + 0.2V)
Continuous Power Dissipation
Junction Temperature (TJ-MAX)
+125˚C
−65˚C to +150˚C
Maximum Lead Temperature
(Soldering, 10 sec.)
260˚C
ESD Rating (Note 3)
Human Body model: All Pins
2 kV
Machine Model: All Pins
200V
Junction Temperature (TJ) Range
−30˚C to +125˚C
Ambient Temperature (TA) Range
−30˚C to +85˚C
Thermal Properties
Internally Limited
Storage Temperature Range
2.7V to 5.5V
0A to 600 mA
Junction-to-Ambient
Thermal Resistance (θJA)
(SOT23-5) for a 2 layer
board (Note 6)
Junction-to-Ambient
Thermal Resistance (θJA)
(SOT23-5) for a 4 layer
board (Note 6)
250˚C/W
130˚C/W
Electrical Characteristics (Notes 2, 9, 10) Limits in standard typeface are for TJ = 25˚C. Limits in boldface
type apply over the full operating junction temperature range (−30˚C ≤ TJ ≤ 125˚C). Unless otherwise noted, specifications
apply to the LM3674 with VIN = EN = 3.6V
Symbol
Parameter
Condition
Min
Typ
Units
+4
%
IO = 10mA
Line Regulation
2.7V ≤ VIN ≤ 5.5V
IO = 100 mA
0.083
%/V
Load Regulation
100 mA ≤ IO ≤ 600 mA
VIN = 3.6V
0.0010
%/mA
VREF
Internal Reference Voltage
(Note 7)
0.5
V
VFB
-4
Max
Feedback Voltage (Note 12, 13)
ISHDN
Shutdown Supply Current
EN = 0V
0.01
1
µA
IQ
DC Bias Current into VIN
No load, device is not
switching (FB=0V)
300
600
µA
RDSON (P)
Pin-Pin Resistance for PFET
ISW = 200mA
380
500
mΩ
RDSON (N)
Pin-Pin Resistance for NFET
ISW = 200mA
250
400
mΩ
ILIM
Switch Peak Current Limit
Open Loop (Note 8)
1020
1200
mA
VIH
Logic High Input
VIL
Logic Low Input
0.4
V
IEN
Enable (EN) Input Current
FOSC
Internal Oscillator Frequency
830
1.0
PWM Mode
1.6
V
0.01
1
µA
2
2.6
MHz
Note 1: Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the
device is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test conditions, see the
Electrical Characteristics tables.
Note 2: All voltages are with respect to the potential at the GND pin.
Note 3: The Human body model is a 100 pF capacitor discharged through a 1.5 kΩ resistor into each pin. The machine model is a 200 pF capacitor discharged
directly into each pin (MIL-STD-883 3015.7). National Semiconductor recommends that all intergrated circuits be handled with appropriate precautions. Failure to
observe proper ESD handling techniques can result in damage.
Note 4: Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at TJ = 150˚C (typ.) and disengages at TJ =
130˚C
Note 5: In Applications where high power dissipation and /or poor package resistance is present, the maximum ambient temperature may have to be derated.
Maximum ambient temperature (TA-MAX ) is dependent on the maximum operating junction temperature (TJ-MAX ), the maximum power dissipation of the device in
the application (PD-MAX ) and the junction to ambient thermal resistance of the package (θJA) in the application, as given by the following equation: TA-MAX = TJ-MAX(θJA x PD-MAX). Refer to Dissipation ration table for PD-MAX values at different ambient temperatures.
Note 6: Junction to ambient thermal resistance is highly application and board layout dependent. In applications where high power dissipation exists, special care
must be given to thermal dissipation issues in board design. Value specified here 250˚C/W is based on measurement results using a 2 layer, 4" X 3", 2 oz. Cu board
as per JEDEC standards. The (θJA) is 130˚C/W if a 4 layer, 4" X 3", 2/1/1/2 oz. Cu board as per JEDEC standards is used.
Note 7: For the ADJ version the resistor dividers should be selected such that at the desired output voltage, the voltage at the FB pin is 0.5V.
Note 8: Refer to datasheet curves for closed loop data and its variation with regards to supply voltage and temperature. Electrical Characteristic table reflects open
loop data (FB=0V and current drawn from SW pin ramped up until cycle by cycle current limit is activated). Closed loop current limit is the peak inductor current
measured in the application circuit by increasing output current until output voltage drops by 10%.
Note 9: Min and Max limits are guaranteed by design, test or statistical analysis. Typical numbers are not guaranteed, but do represent the most likely norm.
Note 10: The parameters in the electrical characteristic table are tested at VIN = 3.6V unless otherwise specified. For performance over the input voltage range refer
to datasheet curves.
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Note 11: Input voltage range recommended for ideal applications performance for the specified output voltages are given below
VIN = 2.7V to 5.5V for 1.0V ≤ VOUT < 1.8V
VIN = ( VOUT + VDROP OUT) to 5.5V for 1.8 ≤ VOUT≤ 3.3V
Where VDROP OUT = ILOAD * (RDSON (P) + RINDUCTOR)
Note 12: ADJ configured to 1.5V output.
Note 13: For VOUT less than 2.5V, VIN = 3.6V, for VOUT greater than or equal to 2.5V, VIN = VOUT +1.
Dissipation Rating Table
θJA
TA ≤ 25˚C (Power Rating) TA = 60˚C (Power Rating) TA = 85˚C (Power Rating)
250˚C/W (2 layer board)
400mW
260mW
160mW
130˚C/W (4 layer board)
770mW
500mW
310mW
5
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LM3674
Electrical Characteristics (Notes 2, 9, 10) Limits in standard typeface are for TJ = 25˚C. Limits in boldface
type apply over the full operating junction temperature range (−30˚C ≤ TJ ≤ 125˚C). Unless otherwise noted, specifications
apply to the LM3674 with VIN = EN = 3.6V (Continued)
LM3674
Block Diagram
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FIGURE 4. Simplified Functional Diagram
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(unless otherwise stated: VIN = 3.6V, VOUT = 1.5V, TA = 25˚C)
Quiescent Current vs. Supply Voltage
(FB = 0V, No Switching)
IQ Shutdown vs. Temp
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20167205
Feedback Bias Current vs. Temp
Output Voltage vs. Supply Voltage
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Output Voltage vs. Temperature
Output Voltage vs. Output Current
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20167266
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LM3674
Typical Performance Characteristics
LM3674
Typical Performance Characteristics (unless otherwise stated: VIN = 3.6V, VOUT = 1.5V, TA =
25˚C) (Continued)
Efficiency vs. Output Current
(VOUT = 1.2V, L = 2.2uH, DCR = 200mΩ)
RDSON vs. Temperature
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Efficiency vs. Output Current
(VOUT = 1.8V, L = 2.2uH, DCR = 200mΩ)
Efficiency vs. Output Current
(VOUT = 1.5V, L = 2.2uH, DCR = 200mΩ)
20167268
20167269
Efficiency vs. Output Current
(VOUT = 3.3V, L = 2.2uH, DCR = 200mΩ)
Switching Frequency vs. Temperature
20167216
20167299
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Open/Closed Loop Current Limit vs. Temperature
Line Transient Response
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20167297
Start Up
(Output Current = 300mA)
Load Transient
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20167247
Start Up
(Output Current = 10mA)
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LM3674
Typical Performance Characteristics (unless otherwise stated: VIN = 3.6V, VOUT = 1.5V, TA =
25˚C) (Continued)
LM3674
stage is proportional to the input voltage. To eliminate this
dependence, feed forward inversely proportional to the input
voltage is introduced.
While in PWM mode, the output voltage is regulated by
switching at a constant frequency and then modulating the
energy per cycle to control power to the load. At the beginning of each clock cycle the PFET switch is turned on and
the inductor current ramps up until the comparator trips and
the control logic turns off the switch.
The current limit comparator can also turn off the switch in
case the current limit of the PFET is exceeded. Then the
NFET switch is turned on and the inductor current ramps
down. The next cycle is initiated by the clock turning off the
NFET and turning on the PFET.
Operation Description
DEVICE INFORMATION
The LM3674, a high efficiency step down DC-DC switching
buck converter, delivers a constant voltage from a single
Li-Ion battery and input voltage rails from 2.7V to 5.5V to
portable devices such as cell phones and PDAs. Using a
voltage mode architecture with synchronous rectification, the
LM3674 has the ability to deliver up to 600 mA depending on
the input voltage, output voltage, ambient temperature and
the inductor chosen.
There are two modes of operation depending on the current
required - PWM (Pulse Width Modulation), and shutdown.
The device operates in PWM throughout the IOUT range.
Shutdown mode turns off the device, offering the lowest
current consumption (ISHUTDOWN = 0.01 µA typ).
Additional features include soft-start, under voltage protection, current overload protection, and thermal overload protection. As shown in Figure 1, only three external power
components are required for implementation.
The part uses an internal reference voltage of 0.5V. It is
recommended to keep the part in shutdown until the input
voltage is 2.7V or higher.
CIRCUIT OPERATION
During the first portion of each switching cycle, the control
block in the LM3674 turns on the internal PFET switch. This
allows current to flow from the input through the inductor to
the output filter capacitor and load. The inductor limits the
current to a ramp with a slope of
20167275
Internal Synchronous Rectification
While in PWM mode, the LM3674 uses an internal NFET as
a synchronous rectifier to reduce rectifier forward voltage
drop and associated power loss. Synchronous rectification
provides a significant improvement in efficiency whenever
the output voltage is relatively low compared to the voltage
drop across an ordinary rectifier diode.
by storing energy in a magnetic field. During the second
portion of each cycle, the controller turns the PFET switch
off, blocking current flow from the input, and then turns the
NFET synchronous rectifier on. The inductor draws current
from ground through the NFET to the output filter capacitor
and load, which ramps the inductor current down with a
slope of
Current Limiting
A current limit feature allows the LM3674 to protect itself and
external components during overload conditions. PWM
mode implements current limiting using an internal comparator that trips at 1020 mA (typ). If the output is shorted to
ground the device enters a timed current limit mode where
the NFET is turned on for a longer duration until the inductor
current falls below a low threshold, ensuring inductor current
has more time to decay, thereby preventing runaway.
The output filter stores charge when the inductor current is
high, and releases it when the inductor current is low,
smoothing the voltage across the load.
The output voltage is regulated by modulating the PFET
switch on time to control the average current sent to the load.
The effect is identical to sending a duty-cycle modulated
rectangular wave formed by the switch and synchronous
rectifier at the SW pin to a low-pass filter formed by the
inductor and output filter capacitor. The output voltage is
equal to the average voltage at the SW pin.
SOFT-START
The LM3674 has a soft-start circuit that limits in-rush current
during start-up. During start-up the switch current limit is
increased in steps. Soft start is activated only if EN goes
from logic low to logic high after Vin reaches 2.7V. Soft start
is implemented by increasing switch current limit in steps of
70mA, 140mA, 280mA, and 1020mA (typ. switch current
limit). The start-up time thereby depends on the output capacitor and load current demanded at start-up. Typical
start-up times with 10µF output capacitor and 300mA load
current is 350µs and with 10mA load current is 240µs.
PWM OPERATION
During PWM ( Pulse Width Modulation) operation the converter operates as a voltage-mode controller with input voltage feed forward. This allows the converter to achieve excellent load and line regulation. The DC gain of the power
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LDO - LOW DROP OUT OPERATION
The LM3674-ADJ can operate at 100% duty cycle (no
switching, PMOS switch completely on) for low drop out
support of the output voltage. In this way the output voltage
10
• VFB = Feedback Voltage (0.5V typ)
• R1 = Resistor from VOUT to FB (Ω)
• R2 = Resistor from FB to GND (Ω)
For any output voltage greater than or equal to 1.0V a
frequency zero must be added at 45KHz for stability. The
formula is:
(Continued)
will be controlled down to the lowest possible input voltage.
When the device operates near 100% duty cycle, the output
voltage supply ripple is slightly higher, approximately 25mV.
The minimum input voltage needed to support the output
voltage is
Load current
• ILOAD
• RDSON,PFET Drain to source resistance of PFET
switch in the triode region
• RINDUCTOR Inductor resistance
For output voltages greater than or equal to 2.5V, a pole
must also be placed at 45KHz as well. If the pole and zero
are at the same frequency the formula for calculation of C2
is:
Application Information
OUTPUT VOLTAGE SELECTION FOR ADJUSTABLE
(LM3674-ADJ)
The formula for location of zero and pole frequency created
by adding C1,C2 are given below. It can be seen that by
adding C1, a zero as well as a higher frequency pole is
introduced.
The output voltage of the adjustable parts can be programmed through the resistor network connected from VOUT
to FB the to GND. VOUT will be adjusted to make FB equal to
0.5V. The resistor from FB to GND (R2) should be 200 kΩ to
keep the current drawn through this network small but large
enough that it is not susceptible to noise. If R2 is 200KΩ, and
given the VFB is 0.5V, then the current through the resistor
feedback network will be 2.5µA. The output voltage formula
is:
See the " LM3674-ADJ Configurations for " Various VOUT"
table.
• VOUT = Output Voltage (V)
TABLE 1. Adjustable LM3674 Configurations for Various VOUT
VOUT (V)
R1 (KΩ)
R2 (KΩ)
C1 (pF)
C2 (pF)
L (µH)
CIN (µF)
COUT (µF)
1.0
200
200
18
None
2.2
4.7
10
1.1
191
158
18
None
2.2
4.7
10
1.2
280
200
12
None
2.2
4.7
10
1.5
357
178
10
None
2.2
4.7
10
1.6
442
200
8.2
None
2.2
4.7
10
1.7
432
178
8.2
None
2.2
4.7
10
1.8
464
178
8.2
None
2.2
4.7
10
1.875
523
191
6.8
None
2.2
4.7
10
2.5
402
100
8.2
None
2.2
4.7
10
2.8
464
100
8.2
33
2.2
4.7
10
3.3
562
100
6.8
33
2.2
4.7
10
INDUCTOR SELECTION
There are two main considerations when choosing an inductor; the inductor should not saturate, and the inductor current
ripple should be small enough to achieve the desired output
voltage ripple. Different saturation current rating specifications are followed by different manufacturers so attention
must be given to details. Saturation current ratings are typically specified at 25˚C. However, ratings at the maximum
ambient temperature of application should be requested
from the manufacturer. The minimum value of inductance
to guarantee good performance is 1.76µH at ILIM (typ) dc
current over the ambient temperature range. Shielded
inductors radiate less noise and should be preferred.
There are two methods to choose the inductor saturation
current rating.
Method 1:
The saturation current is greater than the sum of the maximum load current and the worst case average to peak
inductor current. This can be written as:
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LM3674
Operation Description
LM3674
Application Information
for design flexibility. This allows substitution of a low-noise
toroidal inductor, in the event that noise from low-cost bobbin
models is unacceptable.
(Continued)
INPUT CAPACITOR SELECTION
•
•
•
•
A ceramic input capacitor of 4.7 µF, 6.3V is sufficient for most
applications. Place the input capacitor as close as possible
to the VIN pin of the device. A larger value may be used for
improved input voltage filtering. Use X7R or X5R types; do
not use Y5V. DC bias characteristics of ceramic capacitors
must be considered when selecting case sizes like 0805 and
0603. The minimum input capacitance to guarantee
good performance is 2.2µF at 3V dc bias; 1.5µF at 5V dc
bias including tolerances and over ambient temperature
range. The input filter capacitor supplies current to the PFET
switch of the LM3674 in the first half of each cycle and
reduces voltage ripple imposed on the input power source. A
ceramic capacitor’s low ESR provides the best noise filtering
of the input voltage spikes due to this rapidly changing
current. Select a capacitor with sufficient ripple current rating. The input current ripple can be calculated as:
IRipple : average to peak inductor current
Ioutmax: maximum load current (600mA)
VIN: maximum input voltage in application
L: min inductor value including worst case tolerances
(30% drop can be considered for method 1)
f: minimum switching frequency (1.6 MHz)
VOUT: output voltage
•
•
Method 2:
A more conservative and recommended approach is to
choose an inductor that has saturation current rating greater
than the max current limit of 1200 mA.
A 2.2 µH inductor with a saturation current rating of at least
1200 mA is recommended for most applications. The inductor’s resistance should be less than around 0.3Ω for good
efficiency. Table 2 lists suggested inductors and suppliers.
For low-cost applications, an unshielded bobbin inductor is
suggested. For noise critical applications, a toroidal or
shielded-bobbin inductor should be used. A good practice is
to lay out the board with overlapping footprints of both types
TABLE 2. Suggested Inductors and Their Suppliers
Model
Vendor
Dimensions LxWxH(mm)
D.C.R (max)
DO3314-222MX
Coilcraft
3.3 x 3.3 x 1.4
200 mΩ
LPO3310-222MX
Coilcraft
3.3 x 3.3 x 1.0
150 mΩ
ELL5GM2R2N
Panasonic
5.2 x 5.2 x 1.5
53 mΩ
CDRH2D14NP-2R2NC
Sumida
3.2 x 3.2 x 1.55
94 mΩ
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LM3674
Application Information
(Continued)
OUTPUT CAPACITOR SELECTION
A ceramic output capacitor of 10 µF, 6.3V is sufficient for
most applications. Use X7R or X5R types; do not use Y5V.
DC bias characteristics of ceramic capacitors must be considered when selecting case sizes like 0805 and 0603. DC
bias characteristics vary from manufacturer to manufacturer
and dc bias curves should be requested from them as part of
the capacitor selection process.
Because these two components are out of phase the rms
value can be used to get an approximate value of peak-topeak ripple.
Voltage peak-to-peak ripple, root mean squared =
The minimum output capacitance to guarantee good
performance is 5.75µF at 1.8V dc bias including tolerances and over ambient temperature range. The output
filter capacitor smoothes out current flow from the inductor to
the load, helps maintain a steady output voltage during
transient load changes and reduces output voltage ripple.
These capacitors must be selected with sufficient capacitance and sufficiently low ESR to perform these functions.
The output voltage ripple is caused by the charging and
discharging of the output capacitor and by the RESR and can
be calculated as:
Note that the output ripple is dependent on the current ripple
and the equivalent series resistance of the output capacitor
(RESR).
The RESR is frequency dependent (as well as temperature
dependent); make sure the value used for calculations is at
the switching frequency of the part.
Voltage peak-to-peak ripple due to capacitance can be expressed as follow:
Voltage peak-to-peak ripple due to ESR =
TABLE 3. Suggested Capacitors and Their Suppliers
Model
Type
Vendor
Voltage Rating
Case size inch (mm)
GRM21BR60J106K
Ceramic, X5R
Murata
6.3V
0805 (2012)
C2012X5R0J106K
Ceramic, X5R
TDK
6.3V
0805 (2012)
JMK212BJ106K
Ceramic, X5R
Taiyo-Yuden
6.3V
0805 (2012)
10 µF for COUT
4.7 µF for CIN
GRM21BR60J475K
Ceramic, X5R
Murata
6.3V
0805 (2012)
JMK212BJ475K
Ceramic, X5R
Taiyo-Yuden
6.3V
0805 (2012)
C2012X5R0J475K
Ceramic, X5R
TDK
6.3V
0805 (2012)
BOARD LAYOUT CONSIDERATIONS
PC board layout is an important part of DC-DC converter
design. Poor board layout can disrupt the performance of a
DC-DC converter and surrounding circuitry by contributing to
EMI, ground bounce, and resistive voltage loss in the traces.
These can send erroneous signals to the DC-DC converter
IC, resulting in poor regulation or instability.
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LM3674
Application Information
(Continued)
20167231
FIGURE 5. Board Layout Design Rules for the LM3674
Good layout for the LM3674 can be implemented by following a few simple design rules, as illustrated in .
1. Place the LM3674, inductor and filter capacitors close
together and make the traces short. The traces between
these components carry relatively high switching currents and act as antennas. Following this rule reduces
radiated noise. Special care must by given to place the
input filter capacitor very close to the VIN and GND pin.
2. Arrange the components so that the switching current
loops curl in the same direction. During the first half of
each cycle, current flows from the input filter capacitor,
through the LM3674 and inductor to the output filter
capacitor and back through ground, forming a current
loop. In the second half of each cycle, current is pulled
up from ground, through the LM3674 by the inductor, to
the output filter capacitor and then back through ground,
forming a second current loop. Routing these loops so
the current curls in the same direction prevents magnetic field reversal between the two half-cycles and reduces radiated noise.
3. Connect the ground pins of the LM3674, and filter capacitors together using generous component-side copper fill as a pseudo-ground plane. Then, connect this to
the ground-plane (if one is used) with several vias. This
reduces ground-plane noise by preventing the switching
currents from circulating through the ground plane. It
also reduces ground bounce at the LM3674 by giving it
a low-impedance ground connection.
4. Use wide traces between the power components and for
power connections to the DC-DC converter circuit. This
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reduces voltage errors caused by resistive losses across
the traces.
5. Route noise sensitive traces, such as the voltage feedback path, away from noisy traces between the power
components. The voltage feedback trace must remain
close to the LM3674 circuit and should be direct but
should be routed opposite to noisy components. This
reduces EMI radiated onto the DC-DC converter’s own
voltage feedback trace. A good approach is to route the
feedback trace on another layer and to have a ground
plane between the top layer and layer on which the
feedback trace is routed. In the same manner for the
adjustable part it is desired to have the feedback dividers on the bottom layer.
6. Place noise sensitive circuitry, such as radio IF blocks,
away from the DC-DC converter, CMOS digital blocks
and other noisy circuitry. Interference with noisesensitive circuitry in the system can be reduced through
distance.
In mobile phones, for example, a common practice is to
place the DC-DC converter on one corner of the board,
arrange the CMOS digital circuitry around it (since this also
generates noise), and then place sensitive preamplifiers and
IF stages on the diagonally opposing corner. Often, the
sensitive circuitry is shielded with a metal pan and power to
it is post-regulated to reduce conducted noise, using lowdropout linear regulators.
14
inches (millimeters) unless otherwise noted
5-Lead SOT23-5 Package
NS Package Number MF05A
National does not assume any responsibility for use of any circuitry described, no circuit patent licenses are implied and National reserves
the right at any time without notice to change said circuitry and specifications.
For the most current product information visit us at www.national.com.
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LM3674 2MHz, 600mA Step-Down DC-DC Converter in SOT 23-5
Physical Dimensions
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