LM48861, LM48861TMBD www.ti.com SNAS450B – JUNE 2008 – REVISED MAY 2013 LM48861 Ground-Referenced, Ultra Low Noise, Stereo Headphone Amplifier Check for Samples: LM48861, LM48861TMBD FEATURES DESCRIPTION • The LM48861 is a single supply, ground-referenced stereo headphone amplifier. Part of TI's PowerWise™ product family, the LM48861 consumes only 3mW of power, yet still provides great audio performance. The ground-referenced architecture eliminates the larger DC blocking capacitors required by traditional headphone amplifier's saving board space and reducing cost. 1 23 • • • • • • • Ground Referenced Outputs – Eliminates Output Coupling Capacitors Common-Mode Sensing Advanced Click-and-Pop Suppression Low Supply Current Minimum External Components Micro-Power Shutdown ESD Protection of 8kV HBM Contact Available in Space-Saving 12-Bump DSBGA Package APPLICATIONS • • • Mobile Phones Portable Electronic Devices MP3 Players KEY SPECIFICATIONS • • • • • Output Power/Channel at VDD = 1.5V,THD+N = 1% – RL = 16Ω 12mW (typ) – RL = 32Ω 13mW (typ) Output Power/Channel at VDD = 1.8V, THD+N = 1% – RL = 16Ω 24mW (typ) – RL = 32Ω 22mW (typ) Quiescent Power Supply Current at 1.5V 2mA (typ) PSRR at 217Hz 83dB (typ) Shutdown Current 0.01μA (typ) The LM48861 features common-mode sensing that corrects for any differences between the amplifier ground and the potential at the headphone return terminal, minimizing noise created by any ground mismatches. The LM48861 delivers 22mW/channel into a 32Ω load with <1% THD+N with a 1.8V supply. Power supply requirements allow operation from 1.2V to 2.8V. High power supply rejection ratio (PSRR), 83dB at 217Hz, allows the device to operate in noisy environments without additional power supply conditioning. A low power shutdown mode reduces supply current consumption to 0.01µA. Superior click and pop suppression eliminates audible transients on power-up/down and during shutdown. The LM48861 is available in an ultra-small 12-bump, 0.4mm pitch, DSBGA package (1.215mm x 1.615mm). 1 2 3 Please be aware that an important notice concerning availability, standard warranty, and use in critical applications of Texas Instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. PowerWise is a trademark of Texas Instruments. All other trademarks are the property of their respective owners. PRODUCTION DATA information is current as of publication date. Products conform to specifications per the terms of the Texas Instruments standard warranty. Production processing does not necessarily include testing of all parameters. Copyright © 2008–2013, Texas Instruments Incorporated LM48861, LM48861TMBD SNAS450B – JUNE 2008 – REVISED MAY 2013 www.ti.com Typical Application R3 20 k: VDD C3 C4 2.2 PF 0.39 PF + C1 20 k: 0.1 PF ceramic VDD INL - OUTL R1 + VIN1 Headphone Jack Shutdown SHDN Shutdown Control Click/Pop Suppression CPP C5 2.2 PF Charge Pump + CPN 0.39 PF + 20 k: C2 R2 INR CPVSS OUTR VSS PGND COM VIN2 C6 2.2 PF 20 k: R4 Figure 1. Typical Audio Amplifier Application Circuit 2 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM48861 LM48861TMBD LM48861, LM48861TMBD www.ti.com SNAS450B – JUNE 2008 – REVISED MAY 2013 Connection Diagrams 1 2 3 A CPP PGND CPN B VDD SHDN CPVSS C OUTL VSS INL 0.4 mm TYP D OUTR COM INR 0.4 mm TYP Figure 2. YFQ Package 1.215mm x 1.615mm x 0.6mm Top View See Package Number YFQ0012AAA BUMP DESCRIPTION Bump Name A1 CPP Description A2 PGND A3 CPN Charge Pump Flying Capacitor Negative Terminal B1 VDD Positive Power Supply B2 SHDN Active Low Shutdown Charge Pump Flying Capacitor Positive Terminal Power Ground B3 CPVSS Charge Pump Output C1 OUTL Left Channel Output C2 VSS Negative Power Supply C3 INL Left Channel Input D1 OUTR Right Channel Output D2 COM Ground reference for inputs and HP D3 INR Right Channel Input These devices have limited built-in ESD protection. The leads should be shorted together or the device placed in conductive foam during storage or handling to prevent electrostatic damage to the MOS gates. Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM48861 LM48861TMBD Submit Documentation Feedback 3 LM48861, LM48861TMBD SNAS450B – JUNE 2008 – REVISED MAY 2013 www.ti.com Absolute Maximum Ratings (1) (2) (3) Supply Voltage (1) 3V −65°C to +150°C Storage Temperature Input Voltage -0.3V to VDD + 0.3V Power Dissipation (4) ESD Ratings (HBM) Internally Limited (5) 2000V ESD Ratings(OUTL, OUTR) (5) 8000V ESD Susceptibility (Machine Model) (6) 200V Junction Temperature Thermal Resistance (1) (2) (3) (4) (5) (6) 150°C θJA (YFQ) 70°C/W (typ) “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum RatingsRatings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not ensured. If Military/Aerospace specified devices are required, please contact the TI Sales Office/ Distributors for availability and specifications. Maximum allowable power dissipation is PDMAX = (TJMAX - TA) / θJA or the number given in Absolute Maximum Ratings, whichever is lower. Human body model, applicable std. JESD22-A114C. Machine model, applicable std. JESD22-A115-A. Operating Ratings Temperature Range TMIN ≤ TA ≤ TMAX −40°C ≤ TA ≤ +85°C 1.2V ≤ VDD ≤ 2.8V Supply Voltage (VDD) 4 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM48861 LM48861TMBD LM48861, LM48861TMBD www.ti.com SNAS450B – JUNE 2008 – REVISED MAY 2013 Electrical Characteristics VDD = 1.5V (1) (2) The following specifications apply for VDD = 1.5V, AV = –1V/V, RL = 32kΩ, f = 1kHz, unless otherwise specified. Limits apply for TA = 25°C. Symbol IDD Parameter Conditions LM48861 Typical (3) Limit (4) Units (Limits) Quiescent Power Supply Current VIN = 0V, Both channels enabled 2 2.8 mA (max) ISD Shutdown Current Shutdown Enabled VSHDN = GND 0.01 1.5 µA (max) VOS Output Offset Voltage VIN = 0V, RL = 32Ω Both channels enabled 0.5 1.5 mV (max) VIH Shutdown Input Voltage High 1.4 V(min) VIL Shutdown Input Voltage Low 0.4 V(max) TWU Wake Up Time PO Output Power 500 700 μs (max) THD+N = 1% RL = 32Ω, f = 1kHz, Both channels in phase and active VDD = 1.5V VDD = 1.8V 13 22 12 20 mW (min) mW (min) THD+N = 1% RL = 16Ω, f = 1kHz, Both channels in phase and active VDD = 1.5V VDD = 1.8V 12 24 mW mW RL = 10kΩ, f = 1kHz VLINE-OUT THD+N Output Voltage to Line Out VDD = 1.5V, THD+N = 1%, RL = 10kΩ Total Harmonic Distortion + Noise 1.1 1 VRMS (min) VDD = 1.8V, THD+N = 1%, RL = 10kΩ 1.3 1.2 VRMS (min) PO = 8mW, f = 1kHz, RL = 32Ω 0.04 % PO = 8mW, f = 1kHz, RL = 16Ω 0.07 % VOLIF = 900mVRMS, f = 1kHz, RL = 10kΩ 0.001 % VRIPPLE = 200mVP-P Sine, Inputs AC GND, C1 = C2 = 0.39μF 83 77 57 dB dB dB RL = 32Ω, POUT = 8mW (A-weighted), f = 1kHz BW = 20Hz to 22kHz 102 dB Crosstalk RL = 32Ω, POUT = 5mW, f = 1kHz 93 dB NOUT Output Noise A-weighted, AV = 5.1dB R1 = R2 = 10kΩ, R3 = R4 = 18kΩ 5 μV C-P Click-Pop Inputs Grounded BW = <10Hz to >500kHz 79 dB PSRR Power Supply Rejection Ratio SNR Signal-to-Noise Ratio XTALK (1) (2) (3) (4) fRIPPLE = 217Hz fRIPPLE = 1kHz fRIPPLE = 15kHz “Absolute Maximum Ratings” indicate limits beyond which damage to the device may occur, including inoperability and degradation of device reliability and/or performance. Functional operation of the device and/or non-degradation at the Absolute Maximum RatingsRatings or other conditions beyond those indicated in the Recommended Operating Conditions is not implied. The Recommended Operating Conditions indicate conditions at which the device is functional and the device should not be operated beyond such conditions. All voltages are measured with respect to the ground pin, unless otherwise specified The Electrical Characteristics tables list ensured specifications under the listed Recommended Operating Conditions except as otherwise modified or specified by the Electrical Characteristics Conditions and/or Notes. Typical specifications are estimations only and are not ensured. Typical values represent most likely parametric norms at TA = +25ºC, and at the Recommended Operation Conditions at the time of product characterization and are not ensured. Datasheet min/max specification limits are ensured by test or statistical analysis. Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM48861 LM48861TMBD Submit Documentation Feedback 5 LM48861, LM48861TMBD SNAS450B – JUNE 2008 – REVISED MAY 2013 www.ti.com Typical Performance Characteristics THD+N vs Frequency VDD = 1.5V, RL = 16Ω, PO = 8mW THD+N vs Frequency VDD = 1.5V, RL = 32Ω, PO = 8mW Figure 3. Figure 4. THD+N vs Frequency VDD = 1.8V, RL = 16Ω, PO = 18mW THD+N vs Frequency VDD = 1.8V, RL = 32Ω, PO = 20mW Figure 5. Figure 6. THD+N vs Output Power VDD = 1.5V & 1.8V, RL = 16Ω, f = 1kHz THD+N vs Output Power VDD = 1.5V & 1.8V, RL = 32Ω, f = 1kHz 100 100 VDD = 1.8V VDD = 1.8V 10 VDD = 1.5V VDD = 1.5V THD +N (%) THD + N (%) 10 1 0.1 0.1 0.01 1m 6 1 2m 5m 10m 20m 50m 100m 0.01 1m 2m 5m 10m 20m OUTPUT POWER (W) OUTPUT POWER (W) Figure 7. Figure 8. Submit Documentation Feedback 50m 100m Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM48861 LM48861TMBD LM48861, LM48861TMBD www.ti.com SNAS450B – JUNE 2008 – REVISED MAY 2013 Typical Performance Characteristics (continued) Power Dissipation vs Output Power RL = 16Ω, f = 1kHz Power Dissipation vs Output Power RL = 32Ω, f = 1kHz 50 75 POWER DISSIPATION (mW) POWER DISSIPATION (mW) 90 VDD = 1.8V 60 45 VDD = 1.5V 30 15 0 40 VDD = 1.8V 30 10 0 0 10 20 30 VDD = 1.5V 20 40 0 10 20 30 40 OUTPUT POWER/CHANNEL (mW) OUTPUT POWER/CHANNEL (mW) Figure 9. Figure 10. PSRR vs Frequency VDD = 1.5V, VRIPPLE = 200mVP-P, RL = 32Ω Output Power vs Supply Voltage RL = 16Ω, f = 1kHz 0 140 OUTPUT POWER/CHANNEL (mW) -10 -20 PSRR (dB) -30 -40 -50 -60 -70 -80 -90 10 100 1000 10000 120 100 THD+N = 10% 80 60 40 20 THD+N = 1% 0 100000 1 1.25 1.5 1.75 FREQUENCY (Hz) 2.25 2.5 2.75 3 SUPPLY VOLTAGE (V) Figure 11. Figure 12. Output Power vs Supply Voltage RL = 32Ω, f = 1kHz Supply Current vs Supply Voltage No Load 3.5 100 3 80 SUPPLY CURRENT (mA) OUTPUT POWER/CHANNEL (mW) 2 THD+N = 10% 60 40 THD+N = 1% 20 2.5 2 1.5 1 0.5 0 0 1 1.25 1.5 1.75 2 2.25 2.5 2.75 3 1 SUPPLY VOLTAGE (V) Figure 13. 1.5 2 2.5 3 SUPPLY VOLTAGE (V) Figure 14. Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM48861 LM48861TMBD Submit Documentation Feedback 7 LM48861, LM48861TMBD SNAS450B – JUNE 2008 – REVISED MAY 2013 www.ti.com Typical Performance Characteristics (continued) Shutdown Current vs Supply Voltage No Load 0 0.08 Crosstalk vs Frequency VDD = 1.5V, POUT = 5mW, RL = 32Ω CROSSTALK (dB) SUPPLY CURRENT (uA) -20 0.06 0.04 -40 -60 -80 0.02 -100 0 -120 1 1.5 2 2.5 3 10 100 Figure 15. Submit Documentation Feedback 10000 100000 FREQUENCY (Hz) SUPPLY VOLTAGE (V) 8 1000 Figure 16. Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM48861 LM48861TMBD LM48861, LM48861TMBD www.ti.com SNAS450B – JUNE 2008 – REVISED MAY 2013 APPLICATION INFORMATION GENERAL AMPLIFIER FUNCTION The LM48861 headphone amplifier features TI’s ground referenced architecture that eliminates the large DCblocking capacitors required at the outputs of traditional headphone amplifiers. A low-noise inverting charge pump creates a negative supply (CPVSS) from the positive supply voltage (VDD). The headphone amplifiers operate from these bipolar supplies, with the amplifier outputs biased about GND, instead of a nominal DC voltage (typically VDD/2), like traditional amplifiers. Because there is no DC component to the headphone output signals, the large DC-blocking capacitors (typically 220μF) are not necessary, conserving board space and system cost, while improving frequency response. COMMON MODE SENSE The LM48861 features a ground (common mode) sensing feature. In noisy applications, or where the headphone jack is used as a line out to other devices, noise pick up and ground imbalance can degrade audio quality. The LM48861 COM input senses and corrects any noise at the headphone return, or any ground imbalance between the headphone return and device ground, improving audio reproduction. Connect COM directly to the headphone return terminal of the headphone jack Figure 17. No additional external components are required. Connect COM to GND if the common-mode sense feature is not in use. AUDIO INPUT COM COMMON MODE SENSE EQUIVALENT CIRCUIT Figure 17. MICRO POWER SHUTDOWN The voltage applied to the shutdown (SHDN) pin controls the LM48861’s shutdown function. Activate micropower shutdown by applying a logic-low voltage to the SHDN pin. When active, the LM48861’s micro-power shutdown feature turns off the amplifier’s bias circuitry, reducing the supply current. The trigger point is 0.4V (max) for a logic-low level, and 1.4V (min) for a logic-high level. The low 0.1μA (typ) shutdown current is achieved by applying a voltage that is as near as ground as possible to the SHDN pin. A voltage that is higher than ground may increase the shutdown current. There are a few ways to control the micro-power shutdown. These include using a single-pole, single-throw switch, a microprocessor, or a microcontroller. When using a switch, connect an external 100kΩ pull-up resistor between the SHDN pin and GND. Connect the switch between the SHDN pin and VDD. Select normal amplifier operation by closing the switch. Opening the switch connects the SHDN pin to ground, activating micro-power shutdown. The switch and resistor ensure that the SHDN pin will not float. This prevents unwanted state changes. In a system with a microprocessor or microcontroller, use a digital output to apply the control voltage to the SHDN pin. Driving the SHDN pin with active circuitry eliminates the pull-up resistor. POWER DISSIPATION Power dissipation is a major concern when using any power amplifier, especially one in mobile devices. In the LM48861, the power dissipation comes from the charge pump and two operational amplifiers. Refer to the Figure 10 Power Dissipation vs Output Power curve in the Typical Performance Characteristics section of the datasheet to find the power dissipation associated the output power level of the LM48861. The power dissipation should not exceed the maximum power dissipation point of the DSBGA package given in Equation 1. PDMAX = (TJMAX - TA) / (θJA) (1) Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM48861 LM48861TMBD Submit Documentation Feedback 9 LM48861, LM48861TMBD SNAS450B – JUNE 2008 – REVISED MAY 2013 www.ti.com For the LM48861TM DSBGA package, θJA = 70°C/W. TJMAX = 150°C, and TA is the ambient temperature of the system surroundings. PROPER SELECTION OF EXTERNAL COMPONENTS Power Supply Bypassing/Filtering Proper power supply bypassing is critical for low noise performance and high PSRR. Place the supply bypass capacitors as close to the supply pins as possible. Place a 1μF ceramic capacitor from VDD to GND. Additional bulk capacitance may be added as required. Charge Pump Capacitor Selection Use low ESR ceramic capacitors (less than 100mΩ) for optimum performance. Charge Pump Flying Capacitor (C5) The flying capacitor (C5) affects the load regulation and output impedance of the charge pump. A C5 value that is too low results in a loss of current drive, leading to a loss of amplifier headroom. A higher valued C5 improves load regulation and lowers charge pump output impedance to an extent. Above 2.2μF, the RDS(ON) of the charge pump switches and the ESR of C5 and C6 dominate the output impedance. A lower value capacitor can be used in systems with low maximum output power requirements. Charge Pump Hold Capacitor (C6) The value and ESR of the hold capacitor (C6) directly affects the ripple on CPVSS. Increasing the value of C6 reduces output ripple. Decreasing the ESR of C6 reduces both output ripple and charge pump output impedance. A lower value capacitor can be used in systems with low maximum output power requirements. Power Supply Bypassing /Filtering Proper power supply bypassing is critical for low noise performance and high PSRR. Place the supply bypass capacitors as close to the device as possible. Typical applications employ a voltage regulator with 10µF and 0.1µF bypass capacitors that increase supply stability. These capacitors do not eliminate the need for bypassing of the LM48861 supply pins. A 1µF capacitor is recommended. Input Capacitor Selection The LM48861 requires input coupling capacitors. Input capacitors block the DC component of the audio signal, eliminating any conflict between the DC component of the audio source and the bias voltage of the LM48861. The input capacitors create a high-pass filter with the input resistors RIN. The -3dB point of the high-pass filter is found using Equation 2 below. f = 1 / 2πRINCIN Where • the value of RIN is selected based on the gain-setting resistor selection. (2) In relation to Figure 1, RIN = R1 = R2, CIN = C1 = C2. The input capacitors can also be used to remove low frequency content from the audio signal. Small speakers can not reproduce, and may even be damaged by low frequencies. High-pass filtering the audio signal helps protect the speakers. When the LM48861 is using a single-ended source, power supply noise on the ground is seen as an input signal. Setting the high-pass filter point above the power supply noise frequencies, 217Hz in a GSM phone, for example, filters out the noise such that it is not amplified and heard on the output. Capacitors with a tolerance of 10% or better are recommended for impedance matching and improved CMRR and PSRR. 10 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM48861 LM48861TMBD LM48861, LM48861TMBD www.ti.com SNAS450B – JUNE 2008 – REVISED MAY 2013 PCB Layout Guidelines Minimize trace impedance of the power, ground and all output traces for optimum performance. Voltage loss due to trace resistance between the LM48861 and the load results in decreased output power and efficiency. Trace resistance between the power supply and ground has the same effect as a poorly regulated supply, increased ripple and reduced peak output power. Use wide traces for power supply inputs and amplifier outputs to minimize losses due to trace resistance, as well as route heat away from the device. Proper grounding improves audio performance, minimizes crosstalk between channels and prevents switching noise from interfering with the audio signal. Use of power and ground planes is recommended. As described in the Common Mode Sense section, the LM48861 features a ground sensing feature. On the PCB layout, connect the COM pin (pin D2) directly to the headphone jack ground and also to the left and right input grounds. This will help correct any noise or any ground imbalance between the headphone return, input, and the device ground, therefore improving audio reproduction. The charge pump capacitors and traces connecting the capacitor to the device should be kept away from the input and output traces to avoid any switching noise injected into the input or output. Demo Board Schematic and Layout Figure 18. Top Silkscreen Layer Figure 19. Top Solder Mask Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM48861 LM48861TMBD Submit Documentation Feedback 11 LM48861, LM48861TMBD SNAS450B – JUNE 2008 – REVISED MAY 2013 12 www.ti.com Figure 20. Bottom Solder Mask Figure 21. Top Layer Figure 22. Layer 2 Figure 23. Layer 3 Submit Documentation Feedback Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM48861 LM48861TMBD LM48861, LM48861TMBD www.ti.com SNAS450B – JUNE 2008 – REVISED MAY 2013 Figure 24. Bottom Layer Figure 25. Bottom Silkscreen Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM48861 LM48861TMBD Submit Documentation Feedback 13 LM48861, LM48861TMBD SNAS450B – JUNE 2008 – REVISED MAY 2013 www.ti.com REVISION HISTORY 14 Rev Date 1.0 06/11/08 Initial release. 1.01 02/08/10 Input text edits. B 05/02/2013 Submit Documentation Feedback Description Changed layout of National Data Sheet to TI format. Copyright © 2008–2013, Texas Instruments Incorporated Product Folder Links: LM48861 LM48861TMBD PACKAGE OPTION ADDENDUM www.ti.com 24-Sep-2015 PACKAGING INFORMATION Orderable Device Status (1) LM48861TM/NOPB ACTIVE Package Type Package Pins Package Drawing Qty DSBGA YFQ 12 250 Eco Plan Lead/Ball Finish MSL Peak Temp (2) (6) (3) Green (RoHS & no Sb/Br) SNAGCU Level-1-260C-UNLIM Op Temp (°C) Device Marking (4/5) -40 to 85 G K3 (1) The marketing status values are defined as follows: ACTIVE: Product device recommended for new designs. LIFEBUY: TI has announced that the device will be discontinued, and a lifetime-buy period is in effect. NRND: Not recommended for new designs. Device is in production to support existing customers, but TI does not recommend using this part in a new design. PREVIEW: Device has been announced but is not in production. Samples may or may not be available. OBSOLETE: TI has discontinued the production of the device. (2) Eco Plan - The planned eco-friendly classification: Pb-Free (RoHS), Pb-Free (RoHS Exempt), or Green (RoHS & no Sb/Br) - please check http://www.ti.com/productcontent for the latest availability information and additional product content details. TBD: The Pb-Free/Green conversion plan has not been defined. Pb-Free (RoHS): TI's terms "Lead-Free" or "Pb-Free" mean semiconductor products that are compatible with the current RoHS requirements for all 6 substances, including the requirement that lead not exceed 0.1% by weight in homogeneous materials. Where designed to be soldered at high temperatures, TI Pb-Free products are suitable for use in specified lead-free processes. Pb-Free (RoHS Exempt): This component has a RoHS exemption for either 1) lead-based flip-chip solder bumps used between the die and package, or 2) lead-based die adhesive used between the die and leadframe. The component is otherwise considered Pb-Free (RoHS compatible) as defined above. Green (RoHS & no Sb/Br): TI defines "Green" to mean Pb-Free (RoHS compatible), and free of Bromine (Br) and Antimony (Sb) based flame retardants (Br or Sb do not exceed 0.1% by weight in homogeneous material) (3) MSL, Peak Temp. - The Moisture Sensitivity Level rating according to the JEDEC industry standard classifications, and peak solder temperature. (4) There may be additional marking, which relates to the logo, the lot trace code information, or the environmental category on the device. (5) Multiple Device Markings will be inside parentheses. Only one Device Marking contained in parentheses and separated by a "~" will appear on a device. If a line is indented then it is a continuation of the previous line and the two combined represent the entire Device Marking for that device. (6) Lead/Ball Finish - Orderable Devices may have multiple material finish options. Finish options are separated by a vertical ruled line. Lead/Ball Finish values may wrap to two lines if the finish value exceeds the maximum column width. Important Information and Disclaimer:The information provided on this page represents TI's knowledge and belief as of the date that it is provided. TI bases its knowledge and belief on information provided by third parties, and makes no representation or warranty as to the accuracy of such information. Efforts are underway to better integrate information from third parties. TI has taken and continues to take reasonable steps to provide representative and accurate information but may not have conducted destructive testing or chemical analysis on incoming materials and chemicals. TI and TI suppliers consider certain information to be proprietary, and thus CAS numbers and other limited information may not be available for release. In no event shall TI's liability arising out of such information exceed the total purchase price of the TI part(s) at issue in this document sold by TI to Customer on an annual basis. Addendum-Page 1 Samples PACKAGE OPTION ADDENDUM www.ti.com 24-Sep-2015 Addendum-Page 2 PACKAGE MATERIALS INFORMATION www.ti.com 2-Sep-2015 TAPE AND REEL INFORMATION *All dimensions are nominal Device LM48861TM/NOPB Package Package Pins Type Drawing SPQ DSBGA 250 YFQ 12 Reel Reel A0 Diameter Width (mm) (mm) W1 (mm) 178.0 8.4 Pack Materials-Page 1 1.35 B0 (mm) K0 (mm) P1 (mm) 1.75 0.76 4.0 W Pin1 (mm) Quadrant 8.0 Q1 PACKAGE MATERIALS INFORMATION www.ti.com 2-Sep-2015 *All dimensions are nominal Device Package Type Package Drawing Pins SPQ Length (mm) Width (mm) Height (mm) LM48861TM/NOPB DSBGA YFQ 12 250 210.0 185.0 35.0 Pack Materials-Page 2 MECHANICAL DATA YFQ0012xxx D 0.600 ±0.075 E TMD12XXX (Rev B) D: Max = 1.64 mm, Min = 1.58 mm E: Max = 1.24 mm, Min = 1.18 mm 4215079/A NOTES: A. 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