Microchip MCP1801T-1202I/OT 150 ma, high psrr, low quiescent current ldo Datasheet

MCP1801
150 mA, High PSRR, Low Quiescent Current LDO
Features
Description
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The MCP1801 is a family of CMOS low dropout (LDO)
voltage regulators that can deliver up to 150 mA of
current while consuming only 25 µA of quiescent
current (typical). The input operating range is specified
from 2.0V to 10.0V, making it an ideal choice for two to
six primary cell battery-powered applications, 9V alkaline and one or two cell Li-Ion-powered applications.
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150 mA Maximum Output Current
Low Drop Out Voltage, 200 mV typical @ 100 mA
25 µA Typical Quiescent Current
0.01 µA Typical Shutdown Current
Input Operating Voltage Range: 2.0V to10.0V
Standard Output Voltage Options:
- 0.9V, 1.2V, 1.8V, 2.5V, 3.0V, 3.3V, 5.0V, 6.0V
Output voltage accuracy:
- ±2% (VR > 1.5V), ±30 mV (VR ≤ 1.5V)
Stable with Ceramic output capacitors
Current Limit Protection
Shutdown pin
High PSRR: 70 dB typical @ 10 kHz
Applications
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Battery-powered Devices
Battery-powered Alarm Circuits
Smoke Detectors
CO2 Detectors
Pagers and Cellular Phones
Wireless Communications Equipment
Smart Battery Packs
Low Quiescent Current Voltage Reference
PDAs
Digital Cameras
Microcontroller Power
Solar-Powered Instruments
Consumer Products
Battery Powered Data Loggers
Related Literature
The MCP1801 is capable of delivering 100 mA with
only 200 mV (typical) of input to output voltage differential (VOUT = 3.3V). The output voltage tolerance of the
MCP1801 at +25°C is typically ±0.4% with a maximum
of ±2%. Line regulation is ±0.01% typical at +25°C.
The LDO output is stable with a minimum of 1 µF of
output capacitance. Ceramic, tantalum or aluminum
electrolytic capacitors can all be used for input and
output. Overcurrent limit with current foldback provides
short-circuit protection. A shutdown (SHDN) function
allows the output to be enabled or disabled. When
disabled, the MCP1801 draws only 0.01 µA of current
(typical).
The MCP1801 is available in a SOT-23-5 package.
Package Types
SOT-23-5
VOUT
NC
5
4
1
2
3
VIN
VSS
SHDN
• AN765, “Using Microchip’s Micropower LDOs”,
DS00765, Microchip Technology Inc., 2002
• AN766, “Pin-Compatible CMOS Upgrades to
BiPolar LDOs”, DS00766,
Microchip Technology Inc., 2002
• AN792, “A Method to Determine How Much
Power a SOT23 Can Dissipate in an Application”,
DS00792, Microchip Technology Inc., 2001
© 2007 Microchip Technology Inc.
DS22051A-page 1
MCP1801
Functional Block Diagram
MCP1801
+VIN
VOUT
VIN
SHDN
+VIN
Shutdown
Control
Voltage
Reference
+
Current Limiter
Error Amplifier
GND
Typical Application Circuit
MCP1801
VIN
1
9V
Battery
VIN
2
GND
3
SHDN
VOUT
5
VOUT
3.3V @ 40 mA
COUT
1 µF Ceramic
+
CIN
1 µF
Ceramic
DS22051A-page 2
NC
4
© 2007 Microchip Technology Inc.
MCP1801
1.0
ELECTRICAL
CHARACTERISTICS
† Notice: Stresses above those listed under “Maximum
Ratings” may cause permanent damage to the device.
This is a stress rating only and functional operation of
the device at those or any other conditions above those
indicated in the operational listings of this specification
is not implied. Exposure to maximum rating conditions
for extended periods may affect device reliability.
Absolute Maximum Ratings †
Input Voltage ................................................................. +12V
Output Current (Continuous) ..................... PD/(VIN-VOUT)mA
Output Current (Peak) ............................................... 500 mA
Output Voltage ............................... (VSS-0.3V) to (VIN+0.3V)
SHDN Voltage ..................................(VSS-0.3V) to (VIN+0.3V)
Continuous Power Dissipation:
SOT-23-5 .............................................................. 250 mW
ELECTRICAL CHARACTERISTICS
Electrical Specifications: Unless otherwise specified, all limits are established for VIN = VR + 1.0V, Note 1, COUT = 1 µF (X7R),
CIN = 1 µF (X7R), VSHDN = VIN, TA = +25°C.
Parameters
Sym
Min
Typ
Max
Input Operating Voltage
VIN
Input Quiescent Current
Iq
Units
Conditions
2.0
—
10.0
V
Note 1
—
25
50
µA
IL = 0 mA
ISHDN
—
0.01
0.10
µA
SHDN = 0V
IOUT_mA
150
—
—
mA
ILIMIT
—
300
—
mA
if VR ≤ 1.75V, then VIN = VR + 2.0V
IOUT_SC
—
50
—
mA
if VR ≤ 1.75V, then VIN = VR + 2.0V
Output Voltage Regulation
VOUT
VR-2.0%
VR
VR+2.0%
V
VR ≥ 1.45V, IOUT = 30 mA, Note 2
VR-30 mV
VR
VR+30 mV
VOUT Temperature Coefficient
TCVOUT
—
100
—
ppm/°C
IOUT = 30 mA, -40°C ≤ TA ≤ +85°C,
Note 3
Line Regulation
ΔVOUT/
(VOUTXΔVIN)
-0.2
±0.01
+0.2
%/V
(VR + 1V) ≤ VIN ≤ 10V, Note 1
VR > 1.75V, IOUT = 30 mA
VR ≤ 1.75V, IOUT = 10 mA
Load Regulation
ΔVOUT/VOUT
—
15
50
mV
IL = 1.0 mA to 100 mA, Note 4
Dropout Voltage
Note 1, Note 5
VDROPOUT
—
60
90
mV
—
200
250
Input / Output Characteristics
Shutdown Current
Maximum Output Current
Current Limiter
Output Short Circuit Current
Power Supply Ripple
Rejection Ratio
Note 1:
2:
3:
4:
5:
PSRR
VR < 1.45V, IOUT = 30 mA
IL = 30 mA, 3.1V ≤ VR ≤ 6.0V
IL = 100 mA, 3.1V ≤ VR ≤ 6.0V
—
80
120
IL = 30 mA, 2.0V ≤ VR < 3.1V
—
240
350
IL = 100 mA, 2.0V ≤ VR < 3.1V
—
2.07 - VR
2.10 - VR
—
2.23 - VR
2.33 - VR
—
70
—
V
IL = 30 mA, VR < 2.0V
IL = 100 mA, VR < 2.0V
dB
f = 10 kHz, IL = 50 mA,
VINAC = 1V pk-pk, CIN = 0 µF,
if VR < 1.5V, then VIN = 2.5V
The minimum VIN must meet two conditions: VIN ≥ 2.0V and VIN ≥ (VR + 1.0V).
VR is the nominal regulator output voltage. For example: VR = 1.8V, 2.5V, 3.0V, 3.3V, or 5.0V.
The input voltage VIN = VR + 1.0V or ViIN = 2.0V (whichever is greater); IOUT = 100 µA.
TCVOUT = (VOUT-HIGH - VOUT-LOW) *106 / (VR * ΔTemperature), VOUT-HIGH = highest voltage measured over the
temperature range. VOUT-LOW = lowest voltage measured over the temperature range.
Load regulation is measured at a constant junction temperature using low duty cycle pulse testing. Changes in output
voltage due to heating effects are determined using thermal regulation specification TCVOUT.
Dropout voltage is defined as the input to output differential at which the output voltage drops 2% below its measured
value with an applied input voltage of VR + 1.0V or 2.0V, whichever is greater.
© 2007 Microchip Technology Inc.
DS22051A-page 3
MCP1801
TEMPERATURE SPECIFICATIONS
Parameters
Sym
Min
TA
Typ
Max
Units
-40
+85
°C
Tstg
-55
+125
°C
θJA
θJC
—
—
Conditions
Temperature Ranges
Operating Temperature Range
Storage Temperature Range
Thermal Package Resistance
Thermal Resistance, 5LD-SOT-23
DS22051A-page 4
256
81
—
—
°C/W EIA/JEDEC JESD51-7
FR-4 0.063 4-Layer Board
© 2007 Microchip Technology Inc.
MCP1801
2.0
TYPICAL PERFORMANCE CURVES
Note:
The graphs and tables provided following this note are a statistical summary based on a limited number of
samples and are provided for informational purposes only. The performance characteristics listed herein
are not tested or guaranteed. In some graphs or tables, the data presented may be outside the specified
operating range (e.g., outside specified power supply range) and therefore outside the warranted range.
Note: Unless otherwise indicated: VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 100 µA,
TA = +25°C, VIN = VR + 1.0V, SOT-23-5.
Note: Junction Temperature (TJ) is approximated by soaking the device under test to an ambient temperature equal to the desired junction temperature.
The test time is small enough such that the rise in Junction temperature over the Ambient temperature is not significant.
80
VOUT = 0.9V
IOUT = 0 µA
26.00
25.00
+25°C
+90°C
24.00
23.00
22.00
-45°C
0°C
21.00
VOUT = 0.9V
VIN = 2.0V
70
GND Current (µA)
Quiescent Current (µA)
27.00
60
50
40
30
20
10
20.00
0
2
4
6
8
10
0
30
60
FIGURE 2-1:
Voltage.
Quiescent Current vs. Input
FIGURE 2-4:
Current.
29.00
27.00
26.00
-45°C
25.00
+25°C
0°C
24.00
Ground Current vs. Load
60
VOUT = 6.0V
VIN = 7.0V
50
40
VOUT = 3.3V
VIN = 4.3V
30
20
10
4
5
6
7
8
9
10
0
25
50
FIGURE 2-2:
Voltage.
Quiescent Current vs. Input
30.00
Quiescent Current (µA)
+25°C
28.00
+90°C
27.00
0°C
26.00
FIGURE 2-5:
Current.
100
125
150
Ground Current vs. Load
30.00
VOUT = 6.0V
IOUT = 0 µA
29.00
75
Load Current (mA)
Input Voltage (V)
Quiescent Current (µA)
150
70
+90°C
28.00
120
80
VOUT = 3.3V
IOUT = 0 µA
GND Current (µA)
Quiescent Current (µA)
30.00
90
Load Current (mA)
Input Voltage (V)
-45°C
25.00
28.00
VOUT = 3.3V
VIN = 4.3V
VOUT = 6.0V
VIN = 7.0V
IOUT = 0 mA
26.00
24.00
VOUT = 0.9V
VIN = 2.0V
22.00
20.00
7
7.5
8
8.5
9
9.5
10
Input Voltage (V)
FIGURE 2-3:
Voltage.
Quiescent Current vs. Input
© 2007 Microchip Technology Inc.
-45
-22.5
0
22.5
45
67.5
90
Junction Temperature (°C)
FIGURE 2-6:
Quiescent Current vs.
Junction Temperature.
DS22051A-page 5
MCP1801
Note: Unless otherwise indicated: VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 100 µA,
TA = +25°C, VIN = VR + 1.0V, SOT-23-5.
VOUT = 0.9V
ILOAD = 1 mA
0.915
0°C
0.910
0.905
-45°C
+25°C
0.900
0.895
0.920
VIN = 2.0V
VOUT = 0.9V
0.915
Output Voltage (V)
Output Voltage (V)
0.920
+90°C
0.890
0.910
0.905
+25°C, -45°C
0.900
0.895
0°C
0.890
+90°C
0.885
0.880
2
3
4
5
6
7
8
9
10
0
25
50
Input Voltage (V)
FIGURE 2-7:
Voltage.
Output Voltage (V)
FIGURE 2-10:
Current.
3.32
3.31
-45°C
3.30
3.29
+90°C
3.28
+25°C
3.33
3.27
150
VIN = 4.3V
VOUT = 3.3V
0°C
3.32
3.31
-45°C
3.30
3.29
+90°C
3.28
3.27
3.26
4
5
6
7
8
9
10
0
25
50
Input Voltage (V)
FIGURE 2-8:
Voltage.
6.04
6.02
-45°C
5.98
5.96
100
125
150
+90°C
5.94
Output Voltage vs. Load
6.06
VOUT = 6.0V
ILOAD = 1 mA
0°C
6.00
FIGURE 2-11:
Current.
Output Voltage (V)
+25°C
75
Load Current (mA)
Output Voltage vs. Input
6.06
Output Voltage (V)
125
Output Voltage vs. Load
3.34
VOUT = 3.3V
ILOAD = 1 mA
+25°C
Output Voltage (V)
0°C
3.33
100
Load Current (mA)
Output Voltage vs. Input
3.34
75
0°C
6.04
VIN = 7.0V
VOUT = 6.0V
+25°C
6.02
6.00
-45°C
5.98
5.96
+90°C
5.94
5.92
7
7.5
8
8.5
9
9.5
10
0
DS22051A-page 6
Output Voltage vs. Input
50
75
100
125
150
Load Current (mA)
Input Voltage (V)
FIGURE 2-9:
Voltage.
25
FIGURE 2-12:
Current.
Output Voltage vs. Load
© 2007 Microchip Technology Inc.
MCP1801
Note: Unless otherwise indicated: VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 100 µA,
TA = +25°C, VIN = VR + 1.0V, SOT-23-5.
Dropout Voltage (V)
0.30
VOUT = 3.3V
0.25
0.20
+90°C
0.15
+25°C
0.10
-45°C
0.05
+0°C
0.00
0
25
50
75
100
125
150
Load Current (mA)
FIGURE 2-13:
Current.
0.20
+90°C
0.15
+25°C
0.10
0.05
-45°C
+0°C
0.00
25
Dynamic Line Response.
140
VOUT = 6.0V
0
FIGURE 2-16:
Short Circuit Current (mA)
Dropout Voltage (V)
0.25
Dropout Voltage vs. Load
50
75
100
125
VOUT = 3.3V
ROUT < 0.1Ω
120
100
80
60
40
20
0
0
150
1
2
3
Load Current (mA)
FIGURE 2-14:
Current.
Dropout Voltage vs. Load
4
5
6
7
8
9
10
Input Voltage (V)
FIGURE 2-17:
Input Voltage.
Load Regulation (%)
-1.00
Short Circuit Current vs.
VIN = 10V
-1.10
VOUT = 0.9V
IOUT = 0.1 mA to 150 mA
VIN = 8V
VIN = 6V
-1.20
VIN = 4V
-1.30
-1.40
VIN = 2V
-1.50
-1.60
-45
-22.5
0
22.5
45
67.5
90
Temperature (°C)
FIGURE 2-15:
Dynamic Line Response.
© 2007 Microchip Technology Inc.
FIGURE 2-18:
Temperature.
Load Regulation vs.
DS22051A-page 7
MCP1801
Note: Unless otherwise indicated: VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 100 µA,
TA = +25°C, VIN = VR + 1.0V, SOT-23-5.
VOUT = 3.3V
IOUT = 0.1 mA to 150 mA
-0.10
-0.20
VIN = 8V
VIN = 6V
VIN = 10V
-0.30
-0.40
VIN = 4.3V
-0.50
0.020
Line Regulation (%/V)
Load Regulation (%)
0.00
-0.60
0.015
150 mA
VOUT = 3.3V
VIN = 4.3V to 10V
100 mA
0.010
50 mA
0.000
-0.005
1 mA
-0.010
-45
-22.5
0
22.5
45
67.5
90
-45
-22.5
Temperature (°C)
FIGURE 2-19:
Temperature.
0.020
Line Regulation (%/V)
Load Regulation (%)
FIGURE 2-22:
Temperature.
VOUT = 6.0V
IOUT = 0.1 mA to 150 mA
0.00
VIN = 8V
-0.10
0
22.5
45
67.5
90
Temperature (°C)
Load Regulation vs.
0.10
VIN = 9V
VIN = 10V
-0.20
VIN = 7V
-0.30
-0.40
Line Regulation vs.
VOUT = 6.0V
VIN = 7.0V to 10.0V
150 mA
0.015
100 mA
50 mA
0.010
0.005
0.000
-0.005
1 mA
10 mA
-0.010
-45
-22.5
0
22.5
45
67.5
90
-45
-22.5
Temperature (°C)
FIGURE 2-20:
Temperature.
FIGURE 2-23:
Temperature.
VIN = 2.0 to 10.0V
VOUT = 0.9V
150 mA
0.015
100 mA
50 mA
10 mA
PSRR (dB)
0.010
0.005
0.000
-0.005
1 mA
-0.010
-45
-22.5
0
22.5
45
67.5
90
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
0.01
DS22051A-page 8
22.5
45
67.5
90
Line Regulation vs.
Line Regulation vs.
VR = 3.3V
VIN = 4.3V
VINAC = 100 mV p-p
CIN = 0 μF
IOUT = 100 µA
0.1
Temperature (°C)
FIGURE 2-21:
Temperature.
0
Temperature (°C)
Load Regulation vs.
0.020
Line Regulation (%/V)
10 mA
0.005
FIGURE 2-24:
1
10
Frequency (kHz)
100
1000
PSRR vs. Frequency.
© 2007 Microchip Technology Inc.
MCP1801
PSRR (dB)
Note: Unless otherwise indicated: VR = 3.3V, COUT = 1 µF Ceramic (X7R), CIN = 1 µF Ceramic (X7R), IL = 100 µA,
TA = +25°C, VIN = VR + 1.0V, SOT-23-5.
0
-10
-20
-30
-40
-50
-60
-70
-80
-90
0.01
VR = 6.0V
VIN = 7.0V
VINAC = 100 mV p-p
CIN = 0 μF
IOUT = 100 µA
0.1
1
10
Frequency (kHz)
100
1000
FIGURE 2-25:
PSRR vs. Frequency.
FIGURE 2-28:
Dynamic Load Response.
FIGURE 2-26:
Power-Up Timing.
FIGURE 2-29:
SHDN.
Power-Up Timing From
FIGURE 2-27:
Dynamic Load Response.
© 2007 Microchip Technology Inc.
DS22051A-page 9
MCP1801
3.0
PIN DESCRIPTIONS
The descriptions of the pins are listed in Table 3-1.
TABLE 3-1:
MCP1801 PIN FUNCTION TABLE
Pin No.
SOT-23-5
Name
2
GND
Ground Terminal
5
VOUT
Regulated Voltage Output
3.1
Function
Unregulated Supply Voltage
1
VIN
3
SHDN
Shutdown Input
4
NC
No Connection
Ground Terminal (GND)
Regulator ground. Tie GND to the negative side of the
output and the negative side of the input capacitor.
Only the LDO bias current (25 µA typical) flows out of
this pin; there is no high current. The LDO output
regulation is referenced to this pin. Minimize voltage
drops between this pin and the negative side of the
load.
3.2
Regulated Output Voltage (VOUT)
Connect VOUT to the positive side of the load and the
positive terminal of the output capacitor. The positive
side of the output capacitor should be physically
located as close to the LDO VOUT pin as is practical.
The current flowing out of this pin is equal to the DC
load current.
DS22051A-page 10
3.3
Unregulated Input Voltage (VIN)
Connect VIN to the input unregulated source voltage.
Like all low dropout linear regulators, low source
impedance is necessary for the stable operation of the
LDO. The amount of capacitance required to ensure
low source impedance will depend on the proximity of
the input source capacitors or battery type. For most
applications, 0.1 µF of capacitance will ensure stable
operation of the LDO circuit. The type of capacitor used
can be ceramic, tantalum or aluminum electrolytic. The
low ESR characteristics of the ceramic will yield better
noise and PSRR performance at high-frequency.
3.4
Shutdown Input (SHDN)
The SHDN input is used to turn the LDO output voltage
on and off. When the SHDN input is at a logic-high
level, the LDO output voltage is enabled. When the
SHDN input is pulled to a logic-low level, the LDO
output voltage is disabled and the LDO enters a low
quiescent current shutdown state where the typical
quiescent current is 0.01 µA. The SHDN pin does not
have an internal pull-up or pull-down resistor. The the
SHDN pin must be connected to either VIN or GND to
prevent the device from becoming unstable.
© 2007 Microchip Technology Inc.
MCP1801
4.0
DETAILED DESCRIPTION
4.1
Output Regulation
A portion of the LDO output voltage is fed back to the
internal error amplifier and compared with the precision
internal bandgap reference. The error amplifier output
will adjust the amount of current that flows through the
P-Channel pass transistor, thus regulating the output
voltage to the desired value. Any changes in input
voltage or output current will cause the error amplifier
to respond and adjust the output voltage to the target
voltage (refer to Figure 4-1).
4.2
Overcurrent
The MCP1801 internal circuitry monitors the amount of
current flowing through the P-Channel pass transistor.
In the event that the load current reaches the current
limiter level of 300 mA (typical), the current limiter
circuit will operate and the output voltage will drop. As
the output voltage drops, the internal current foldback
circuit will further reduce the output voltage causing the
output current to decrease. When the output is shorted,
a typical output current of 50 mA flows.
4.3
Shutdown
The SHDN input is used to turn the LDO output voltage
on and off. When the SHDN input is at a logic-high
level, the LDO output voltage is enabled. When the
SHDN input is pulled to a logic-low level, the LDO
output voltage is disabled and the LDO enters a low
quiescent current shutdown state where the typical
quiescent current is 0.01 µA. The SHDN pin does not
have an internal pull-up or pull-down resistor.
Therefore, the SHDN pin must be pulled either high or
low to prevent the device from becoming unstable. The
internal device current will increase when the device is
operational and current flows through the pull-up or
pull-down resistor to the SHDN pin internal logic. The
SHDN pin internal logic is equivalent to an inverter
input.
4.4
Larger LDO output capacitors can be used with the
MCP1801 to improve dynamic performance and power
supply ripple rejection performance. Aluminum-electrolytic capacitors are not recommended for low
temperature applications of ≤ 25°C.
4.5
Input Capacitor
Low input source impedance is necessary for the LDO
output to operate properly. When operating from
batteries, or in applications with long lead length
(> 10 inches) between the input source and the LDO,
some input capacitance is recommended. A minimum
of 0.1 µF to 4.7 µF is recommended for most
applications.
For applications that have output step load
requirements, the input capacitance of the LDO is very
important. The input capacitance provides the LDO
with a good local low-impedance source to pull the
transient currents from in order to respond quickly to
the output load step. For good step response
performance, the input capacitor should be of
equivalent (or higher) value than the output capacitor.
The capacitor should be placed as close to the input of
the LDO as is practical. Larger input capacitors will also
help reduce any high-frequency noise on the input and
output of the LDO and reduce the effects of any
inductance that exists between the input source
voltage and the input capacitance of the LDO.
Output Capacitor
The MCP1801 requires a minimum output capacitance
of 1 µF for output voltage stability. Ceramic capacitors
are recommended because of their size, cost and
environmental robustness qualities.
Aluminum-electrolytic and tantalum capacitors can be
used on the LDO output as well. The output capacitor
should be located as close to the LDO output as is
practical. Ceramic materials X7R and X5R have low
temperature coefficients and are well within the
acceptable ESR range required. A typical 1 µF X7R
0805 capacitor has an ESR of 50 milli-ohms.
© 2007 Microchip Technology Inc.
DS22051A-page 11
MCP1801
MCP1801
+VIN
VOUT
VIN
SHDN
Shutdown
Control
+VIN
Voltage
Reference
+
Current Limiter
Error Amplifier
GND
FIGURE 4-1:
DS22051A-page 12
Block Diagram.
© 2007 Microchip Technology Inc.
MCP1801
5.0
FUNCTIONAL DESCRIPTION
The MCP1801 CMOS low dropout linear regulator is
intended for applications that need the low current
consumption while maintaining output voltage
regulation. The operating continuous load range of the
MCP1801 is from 0 mA to 150 mA. The input operating
voltage range is from 2.0V to 10.0V, making it capable
of operating from three or more alkaline cells or single
and multiple Li-Ion cell batteries.
5.1
5.2
Output
The maximum rated continuous output current for the
MCP1801 is 150 mA.
A minimum output capacitance of 1.0 µF is required for
small signal stability in applications that have up to
150 mA output current capability. The capacitor type
can be ceramic, tantalum or aluminum electrolytic.
Input
The input of the MCP1801 is connected to the source
of the P-Channel PMOS pass transistor. As with all
LDO circuits, a relatively low source impedance (10Ω)
is needed to prevent the input impedance from causing
the LDO to become unstable. The size and type of the
capacitor needed depends heavily on the input source
type (battery, power supply) and the output current
range of the application. For most applications a 0.1 µF
ceramic capacitor will be sufficient to ensure circuit
stability. Larger values can be used to improve circuit
AC performance.
© 2007 Microchip Technology Inc.
DS22051A-page 13
MCP1801
6.0
APPLICATION CIRCUITS &
ISSUES
6.1
The MCP1801 is most commonly used as a voltage
regulator. Its low quiescent current and low dropout
voltage make it ideal for many battery-powered
applications.
MCP1801
SHDN
GND
VOUT
1.8V
VIN
VOUT
IOUT
50 mA
COUT
1 µF Ceramic
FIGURE 6-1:
6.1.1
VIN
2.4V to 5.0V
CIN
1 µF
Ceramic
Package Type =
Input Voltage Range =
SOT-23-5
2.4V to 5.0V
VIN maximum =
5.0V
VOUT typical =
1.8V
IOUT =
50 mA maximum
Power Calculations
6.2.1
TJ(MAX)
=
Maximum continuous junction
temperature
PTOTAL
=
Total device power dissipation
RθJA
=
Thermal resistance from
junction to ambient
TAMAX
=
Maximum ambient temperature
The maximum power dissipation capability for a
package can be calculated given the junction-toambient thermal resistance and the maximum ambient
temperature for the application. The following equation
can be used to determine the package maximum
internal power dissipation.
EQUATION 6-3:
( T J ( MAX ) – T A ( MAX ) )
P D ( MAX ) = --------------------------------------------------Rθ JA
Typical Application Circuit.
APPLICATION INPUT CONDITIONS
6.2
T J ( MAX ) = P TOTAL × Rθ JA + T AMAX
Where:
Typical Application
NC
EQUATION 6-2:
POWER DISSIPATION
The internal power dissipation of the MCP1801 is a
function of input voltage, output voltage and output
current. The power dissipation, as a result of the
quiescent current draw, is so low, it is insignificant
(25.0 µA x VIN). The following equation can be used to
calculate the internal power dissipation of the LDO.
EQUATION 6-1:
P LDO = ( V IN ( MAX ) ) – V OUT ( MIN ) ) × I OUT ( MAX ) )
Where:
PD(MAX)
=
Maximum device power
dissipation
TJ(MAX)
=
Maximum continuous junction
temperature
TA(MAX)
=
Maximum ambient temperature
RθJA
=
Thermal resistance from
junction to ambient
EQUATION 6-4:
T J ( RISE ) = P D ( MAX ) × Rθ JA
Where:
TJ(RISE)
=
Rise in device junction
temperature over the ambient
temperature
PTOTAL
=
Maximum device power
dissipation
RθJA
=
Thermal resistance from
junction to ambient
Where:
PLDO
=
LDO Pass device internal power
dissipation
VIN(MAX)
=
Maximum input voltage
VOUT(MIN)
=
LDO minimum output voltage
The maximum continuous operating temperature specified for the MCP1801 is +85°C. To estimate the internal junction temperature of the MCP1801, the total
internal power dissipation is multiplied by the thermal
resistance from junction to ambient (RθJA). The thermal
resistance from junction to ambient for the SOT-23-5
pin package is estimated at 256°C/W.
DS22051A-page 14
EQUATION 6-5:
T J = T J ( RISE ) + T A
Where:
TJ
=
Junction Temperature
TJ(RISE)
=
Rise in device junction
temperature over the ambient
temperature
TA
=
Ambient temperature
© 2007 Microchip Technology Inc.
MCP1801
6.3
Voltage Regulator
Internal power dissipation, junction temperature rise,
junction temperature and maximum power dissipation
are calculated in the following example. The power
dissipation, as a result of ground current, is small
enough to be neglected.
6.3.1
Junction Temperature Estimate
To estimate the internal junction temperature, the
calculated temperature rise is added to the ambient or
offset temperature. For this example, the worst-case
junction temperature is estimated in the following table.
TJ = TJRISE + TA(MAX)
TJ = 81.42°C
POWER DISSIPATION EXAMPLE
Package
Package Type
=
SOT-23-5
Input Voltage
Maximum Package Power Dissipation at +25°C
Ambient Temperature
SOT-23-5 (256°C/Watt = RθJA)
PD(MAX) = (85°C - 25°C) / 256°C/W
VIN = 2.4V to 5.0V
PD(MAX) = 234 milli-Watts
LDO Output Voltages and Currents
VOUT = 1.8V
IOUT = 50 mA
Maximum Ambient Temperature
TA(MAX) = +40°C
Internal Power Dissipation
Internal Power dissipation is the product of the LDO
output current times the voltage across the LDO
(VIN to VOUT).
PLDO(MAX) = (VIN(MAX) - VOUT(MIN)) x IOUT(MAX)
PLDO = (5.0V - (0.98 x 1.8V)) x 50 mA
PLDO = 161.8 milli-Watts
6.4
Voltage Reference
The MCP1801 can be used not only as a regulator, but
also as a low quiescent current voltage reference. In
many microcontroller applications, the initial accuracy
of the reference can be calibrated using production test
equipment or by using a ratio measurement. When the
initial accuracy is calibrated, the thermal stability and
line regulation tolerance are the only errors introduced
by the MCP1801 LDO. The low cost, low quiescent
current and small ceramic output capacitor are all
advantages when using the MCP1801 as a voltage
reference.
Ratio Metric Reference
Device Junction Temperature Rise
The internal junction temperature rise is a function of
internal power dissipation and the thermal resistance
from junction to ambient for the application. The
thermal resistance from junction to ambient (RθJA) is
derived from an EIA/JEDEC standard for measuring
thermal resistance for small surface mount packages.
The EIA/JEDEC specification is JESD51-7, “High
Effective Thermal Conductivity Test Board for Leaded
Surface Mount Packages”. The standard describes the
test method and board specifications for measuring the
thermal resistance from junction to ambient. The actual
thermal resistance for a particular application can vary
depending on many factors, such as copper area and
thickness. Refer to AN792, “A Method to Determine
How Much Power a SOT23 Can Dissipate in an
Application”, (DS00792), for more information
regarding this subject.
TJ(RISE) = PTOTAL x RqJA
TJRISE = 161.8 milli-Watts x 256.0°C/Watt
TJRISE = 41.42°C
© 2007 Microchip Technology Inc.
PIC®
Microcontroller
MCP1801
25 µA Bias
CIN
1 µF
VIN
VOUT
GND
COUT
1 µF
VREF
ADO
AD1
Bridge Sensor
FIGURE 6-2:
Using the MCP1801 as a
Voltage Reference.
6.5
Pulsed Load Applications
For some applications, there are pulsed load current
events that may exceed the specified 150 mA
maximum specification of the MCP1801. The internal
current limit of the MCP1801 will prevent high peak
load demands from causing non-recoverable damage.
The 150 mA rating is a maximum average continuous
rating. As long as the average current does not exceed
150 mA nor the max power dissipation of the packaged
device, pulsed higher load currents can be applied to
the MCP1801. The typical current limit for the
MCP1801 is 300 mA (TA +25°C).
DS22051A-page 15
MCP1801
7.0
PACKAGING INFORMATION
7.1
Package Marking Information
Example:
5-Lead SOT-23
Standard Options for SOT-23
Extended Temp
XXNN
Symbol
Voltage *
Symbol
9X8#
0.9
9XZ#
3.0
9XB#
1.2
9B2#
3.3
9XK#
1.8
9BM#
5.0
9XT#
2.5
9BZ#
6.0
* Custom output voltages available upon request.
Contact your local Microchip sales office for more
information.
1
Legend: XX...X
Y
YY
WW
NNN
e3
*
Note:
DS22051A-page 16
9XNN
Voltage *
1
Customer-specific information
Year code (last digit of calendar year)
Year code (last 2 digits of calendar year)
Week code (week of January 1 is week ‘01’)
Alphanumeric traceability code
Pb-free JEDEC designator for Matte Tin (Sn)
This package is Pb-free. The Pb-free JEDEC designator ( e3 )
can be found on the outer packaging for this package.
In the event the full Microchip part number cannot be marked on one line, it will
be carried over to the next line, thus limiting the number of available
characters for customer-specific information.
© 2007 Microchip Technology Inc.
MCP1801
5-Lead Plastic Small Outline Transistor (OT) [SOT-23]
Note:
For the most current package drawings, please see the Microchip Packaging Specification located at
http://www.microchip.com/packaging
b
N
E
E1
3
2
1
e
e1
D
A2
A
c
φ
A1
L
L1
Units
Dimension Limits
Number of Pins
MILLIMETERS
MIN
NOM
MAX
N
5
Lead Pitch
e
0.95 BSC
Outside Lead Pitch
e1
Overall Height
A
0.90
–
Molded Package Thickness
A2
0.89
–
1.30
Standoff
A1
0.00
–
0.15
Overall Width
E
2.20
–
3.20
Molded Package Width
E1
1.30
–
1.80
Overall Length
D
2.70
–
3.10
Foot Length
L
0.10
–
0.60
Footprint
L1
0.35
–
0.80
Foot Angle
φ
0°
–
30°
Lead Thickness
c
0.08
–
0.26
1.90 BSC
1.45
Lead Width
b
0.20
–
0.51
Notes:
1. Dimensions D and E1 do not include mold flash or protrusions. Mold flash or protrusions shall not exceed 0.127 mm per side.
2. Dimensioning and tolerancing per ASME Y14.5M.
BSC: Basic Dimension. Theoretically exact value shown without tolerances.
Microchip Technology Drawing C04-091B
© 2007 Microchip Technology Inc.
DS22051A-page 17
MCP1801
NOTES:
DS22051A-page 18
© 2007 Microchip Technology Inc.
MCP1801
APPENDIX A:
REVISION HISTORY
Revision A (June 2007)
• Original Release of this Document.
© 2007 Microchip Technology Inc.
DS22051A-page 19
MCP1801
NOTES:
DS22051A-page 20
© 2007 Microchip Technology Inc.
MCP1801
PRODUCT IDENTIFICATION SYSTEM
To order or obtain information, e.g., on pricing or delivery, refer to the factory or the listed sales office.
PART NO.
Device
X-
XX
X
X
X/
XX
Tape
Output Feature Tolerance Temp. Package
and Reel Voltage Code
Device:
MCP1801: 150 mA, Low Quiescent Current LDO
Tape and Reel:
T
Output Voltage *:
09 = 0.9V “Standard”
12 = 1.2V “Standard”
18 = 1.8V “Standard”
25 = 2.5V “Standard”
30 = 3.0V “Standard”
33 = 3.3V “Standard”
50 = 5.0V “Standard”
60 = 6.0V “Standard”
*Contact factory for other output voltage options.
= Tape and Reel
Extra Feature Code:
0
= Fixed
Tolerance:
2
= 2.0% (Standard)
Temperature:
I
= -40°C to +85°C
Package Type:
OT = Plastic Small Outline Transistor (SOT-23) 5-lead,
© 2007 Microchip Technology Inc.
Examples:
a)
MCP1801T-0902I/OT: Tape and Reel, 0.9V
b)
MCP1801T-1202I/OT: Tape and Reel, 1.2V
c)
MCP1801T-1802I/OT: Tape and Reel, 1.8V
d)
MCP1801T-2502I/OT: Tape and Reel, 2.5V
e)
MCP1801T-3002I/OT: Tape and Reel, 3.0V
f)
MCP1801T-3302I/OT: Tape and Reel, 3.3V
g)
MCP1801T-5002I/OT: Tape and Reel, 5.0V
h)
MCP1801T-6002I/OT: Tape and Reel, 6.0V
DS22051A-page 21
MCP1801
NOTES:
DS22051A-page 22
© 2007 Microchip Technology Inc.
Note the following details of the code protection feature on Microchip devices:
•
Microchip products meet the specification contained in their particular Microchip Data Sheet.
•
Microchip believes that its family of products is one of the most secure families of its kind on the market today, when used in the
intended manner and under normal conditions.
•
There are dishonest and possibly illegal methods used to breach the code protection feature. All of these methods, to our
knowledge, require using the Microchip products in a manner outside the operating specifications contained in Microchip’s Data
Sheets. Most likely, the person doing so is engaged in theft of intellectual property.
•
Microchip is willing to work with the customer who is concerned about the integrity of their code.
•
Neither Microchip nor any other semiconductor manufacturer can guarantee the security of their code. Code protection does not
mean that we are guaranteeing the product as “unbreakable.”
Code protection is constantly evolving. We at Microchip are committed to continuously improving the code protection features of our
products. Attempts to break Microchip’s code protection feature may be a violation of the Digital Millennium Copyright Act. If such acts
allow unauthorized access to your software or other copyrighted work, you may have a right to sue for relief under that Act.
Information contained in this publication regarding device
applications and the like is provided only for your convenience
and may be superseded by updates. It is your responsibility to
ensure that your application meets with your specifications.
MICROCHIP MAKES NO REPRESENTATIONS OR
WARRANTIES OF ANY KIND WHETHER EXPRESS OR
IMPLIED, WRITTEN OR ORAL, STATUTORY OR
OTHERWISE, RELATED TO THE INFORMATION,
INCLUDING BUT NOT LIMITED TO ITS CONDITION,
QUALITY, PERFORMANCE, MERCHANTABILITY OR
FITNESS FOR PURPOSE. Microchip disclaims all liability
arising from this information and its use. Use of Microchip
devices in life support and/or safety applications is entirely at
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hold harmless Microchip from any and all damages, claims,
suits, or expenses resulting from such use. No licenses are
conveyed, implicitly or otherwise, under any Microchip
intellectual property rights.
Trademarks
The Microchip name and logo, the Microchip logo, Accuron,
dsPIC, KEELOQ, KEELOQ logo, microID, MPLAB, PIC,
PICmicro, PICSTART, PRO MATE, rfPIC and SmartShunt
are registered trademarks of Microchip Technology
Incorporated in the U.S.A. and other countries.
AmpLab, FilterLab, Linear Active Thermistor, Migratable
Memory, MXDEV, MXLAB, SEEVAL, SmartSensor and The
Embedded Control Solutions Company are registered
trademarks of Microchip Technology Incorporated in the
U.S.A.
Analog-for-the-Digital Age, Application Maestro, CodeGuard,
dsPICDEM, dsPICDEM.net, dsPICworks, ECAN,
ECONOMONITOR, FanSense, FlexROM, fuzzyLAB,
In-Circuit Serial Programming, ICSP, ICEPIC, Mindi, MiWi,
MPASM, MPLAB Certified logo, MPLIB, MPLINK, PICkit,
PICDEM, PICDEM.net, PICLAB, PICtail, PowerCal,
PowerInfo, PowerMate, PowerTool, REAL ICE, rfLAB, Select
Mode, Smart Serial, SmartTel, Total Endurance, UNI/O,
WiperLock and ZENA are trademarks of Microchip
Technology Incorporated in the U.S.A. and other countries.
SQTP is a service mark of Microchip Technology Incorporated
in the U.S.A.
All other trademarks mentioned herein are property of their
respective companies.
© 2007, Microchip Technology Incorporated, Printed in the
U.S.A., All Rights Reserved.
Printed on recycled paper.
Microchip received ISO/TS-16949:2002 certification for its worldwide
headquarters, design and wafer fabrication facilities in Chandler and
Tempe, Arizona; Gresham, Oregon and design centers in California
and India. The Company’s quality system processes and procedures
are for its PIC® MCUs and dsPIC® DSCs, KEELOQ® code hopping
devices, Serial EEPROMs, microperipherals, nonvolatile memory and
analog products. In addition, Microchip’s quality system for the design
and manufacture of development systems is ISO 9001:2000 certified.
© 2007 Microchip Technology Inc.
DS22051A-page 23
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12/08/06
DS22051A-page 24
© 2007 Microchip Technology Inc.