LINER LTC1757A-2 Single/dual band rf power controller Datasheet

LTC1757A-1/LTC1757A-2
Single/Dual Band
RF Power Controllers
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FEATURES
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DESCRIPTIO
Dual Band RF Power Amplifier Control (LTC1757A-2)
Improved Internal Schottky Diode Detector
Wide Input Frequency Range: 850MHz to 2GHz
Autozero Cancels Initial Offsets and Temperature
Dependent Offset Errors
Wide VIN Range of 2.7V to 6V Allows
Direct Connection to Battery
RF Output Power Set by External DAC
Fast Acquire After Transmit Enable
Internal Frequency Compensation
Rail-to-Rail Power Control Outputs
RF PA Supply Current Limiting
Battery Overvoltage Protection
Power Control Signal Overvoltage Protection
Low Operating Current: 1mA
Very Low Shutdown Current: < 1µA
Available in a 8-Pin MSOP Package (LTC1757A-1)
and 10-Pin MSOP (LTC1757A-2)
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APPLICATIO S
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Single/Dual Band GSM Cellular Telephones
PCS Devices
Wireless Data Modems
TDMA Cellular Telephones
The LTC®1757A-2 is a dual band RF power controller for
RF power amplifiers operating in the 850MHz to 2GHz
range. The LTC1757A is pin compatible with the LTC1757
but has improved RF detection range. The input voltage
range is optimized for operation from a single lithium-ion
cell or 3× NiMH. Several functions required for RF power
control and protection are integrated in one small 10-pin
MSOP package, thereby minimizing PCB area.
The LTC1757A-1 is a single output RF power controller
that is identical in performance to the LTC1757A-2 except
that one output (VPCA) is provided. The LTC1757A-1 can
be used to drive a single RF channel or dual channel
module with integral multiplexer. This part is available in
an 8-pin MSOP package.
RF power is controlled by driving the RF amplifier power
control pins and sensing the resultant RF output power
via a directional coupler. The RF sense voltage is peak
detected using an on-chip Schottky diode. This detected
voltage is compared to the DAC voltage at the PCTL pin
to control the output power. The RF power amplifier is
protected against high supply voltage and current and
high power control pin voltages.
Internal and external offsets are cancelled over temperature by an autozero control loop, allowing accurate low
power programming. The shutdown feature disables the
part and reduces the supply current to < 1µA.
, LTC and LT are registered trademarks of Linear Technology Corporation.
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TYPICAL APPLICATIO
LTC1757A-2 Dual Band Cellular Telephone Transmitter
68Ω
VIN
33pF
Li-Ion
SHDN
BSEL
LTC1757A-2
1
2
3
4
5
VIN
VCC
RF
VPCA
SHDN
VPCB
BSEL
TXEN
GND
PCTL
10
DIRECTIONAL
COUPLER
9
8
7
900MHz
DIPLEXER
RF PA
TXEN
6
50Ω
DAC
1.8GHz /1.9GHz
RF PA
1757A TA01
1
LTC1757A-1/LTC1757A-2
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ABSOLUTE
RATI GS
(Note 1)
VIN to GND ............................................... – 0.3V to 6.5V
VPCA, VPCB Voltage ..................................... – 0.3V to 3V
PCTL Voltage ............................... – 0.3V to (VIN + 0.3V)
RF Voltage ........................................ (VIN – 2.2V) to 7V
IVCC, Continuous ....................................................... 1A
IVCC, 12.5% Duty Cycle .......................................... 2.5A
SHDN, TXEN, BSEL
Voltage to GND ............................ – 0.3V to (VIN + 0.3V)
IVPCA/B, 25% Duty Cycle ...................................... 20mA
Operating Temperature Range
(Note 2) ................................................. – 30°C to 85°C
Storage Temperature Range ................ – 65°C to 150°C
Maximum Junction Temperature ........................ 125°C
Lead Temperature (Soldering, 10 sec)................ 300°C
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PACKAGE/ORDER I FOR ATIO
ORDER PART
NUMBER
TOP VIEW
VIN
RF
SHDN
GND
1
2
3
4
8
7
6
5
VCC
VPCA
TXEN
PCTL
LTC1757A-1EMS8
ORDER PART
NUMBER
TOP VIEW
VIN
RF
SHDN
BSEL
GND
1
2
3
4
5
10
9
8
7
6
VCC
VPCA
VPCB
TXEN
PCTL
LTC1757A-2EMS
MS8 PACKAGE
8-LEAD PLASTIC MSOP
MS8 PART MARKING
MS10 PACKAGE
10-LEAD PLASTIC MSOP
MS10 PART MARKING
TJMAX = 150°C, θJA = 250°C/W
LTPL
TJMAX = 125°C, θJA = 250°C/W
LTPM
Consult factory for Industrial and Military grade parts.
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V, SHDN = TXEN = HI, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
VIN Operating Voltage
(Note 7)
●
IVIN Shutdown Current
SHDN = LO, TXEN = LO, BSEL = LO
●
IVIN Autozero Current
SHDN = HI, TXEN = LO
●
IVIN Operating Current
SHDN = HI, TXEN = HI, IVPCA = IVPCB = 0mA, VPCA/B = HI
●
TYP
2.7
IVCC Current Limit
MAX
UNITS
6
V
1
µA
0.9
1.5
mA
1
1.6
mA
150
mΩ
0.1
V
VIN – 0.28
V
2.2
90
A
VIN to VCC Resistance
SHDN = LO, TXEN = LO
VPCA/B VOL
TXEN = HI, Open Loop, PCTL = – 100mV
●
VPCA/B Dropout Voltage
ILOAD = 5.5mA, VIN = 2.7V
●
VPCA/B Voltage Clamp
RLOAD = 400Ω
●
2.7
2.85
VPCA/B Output Current
VPCA/B = 2.4V, VIN = 2.7V
●
5.5
9
mA
VPCA/B Enable Time
VPCTL = 2V Step, CLOAD = 100pF (Note 5)
200
ns
VPCA/B Bandwidth
CLOAD = 100pF, RLOAD = 400Ω (Note 9)
VPCA/B Load Capacitance
(Note 6)
VPCA/B Slew Rate
VPCTL = 2V Step, CLOAD = 100pF (Note 3)
VPCA/B Droop
VIN = 2.7V, VPCTL = 2V Step
●
0
250
1.5
400
3.0
550
kHz
100
pF
3
V/µs
±10
550
µV/ms
VPCA/B TXEN Start Voltage
Open Loop, TXEN Low to High, CLOAD = 100pF (Note 10)
700
mV
SHDN Input Threshold
VIN = 2.7V to 6V, TXEN = LO
●
0.35
1.4
V
TXEN, BSEL Input Threshold
VIN = 2.7V to 4.7V
●
0.35
1.4
V
2
400
V
LTC1757A-1/LTC1757A-2
ELECTRICAL CHARACTERISTICS
The ● denotes specifications which apply over the full operating
temperature range, otherwise specifications are at TA = 25°C. VIN = 3.6V, SHDN = TXEN = HI, unless otherwise noted.
PARAMETER
CONDITIONS
MIN
TYP
MAX
SHDN, TXEN, BSEL Input Current
SHDN, TXEN or BSEL = 3.6V
●
10
30
50
µA
PCTL Input Voltage Control Range
VIN = 2.7V to 4.7V, RLOAD = 400Ω
●
0
2
V
PCTL Input Voltage Range
VIN = 3V, RLOAD = 400Ω (Note 8)
●
PCTL Input Resistance
SHDN = LO, TXEN = LO
●
VIN = 2.7V, RLOAD = 400Ω (Note 4)
●
Autozero Settling Time (tS)
Shutdown to Enable (Autozero), VIN = 2.7V (Note 11)
●
RF Input Frequency Range
(Note 6)
●
RF Input Power Range
900MHz (Note 6)
1800MHz (Note 6)
50
PCTL Input Filter
Autozero Range
100
UNITS
2.4
V
150
kΩ
1.25
MHz
400
50
mV
µs
850
2000
MHz
– 24
–22
16
16
dBm
dBm
RF DC Input Resistance
Referenced to VIN, SHDN = LO, TXEN = LO
●
100
185
300
Ω
VIN Overvoltage Range
VPCA/B < 0.5V, RLOAD = 400Ω
●
4.8
5.0
5.4
V
BSEL Timing
t1, Setup Time Prior to TXEN Asserted High
t2, Hold Time After TXEN is Asserted Low
Note 1: Absolute Maximum Ratings are those values beyond which the life of
a device may be impaired.
Note 2: The LTC1757A-1 and LTC1757A-2 are guaranteed to meet performance
specifications from 0°C to 70°C. Specifications over the – 30°C to 85°C
operating temperature range are assured by design, characterization and
correlation with statistical process controls.
Note 3: Slew rate is measured open loop. The slew time at VPCA or VPCB is
measured between 1V and 2V.
Note 4: Maximum DAC zero-scale offset voltage that can be applied to PCTL.
Note 5: This is the time from TXEN rising edge 50% switch point to
VPCA/B = 1V.
200
200
ns
ns
Note 6: Guaranteed by design. This parameter is not production tested.
Note 7: For VIN voltages greater than 4.7V, VPCA/VPCB are set low by the
overvoltage shutdown.
Note 8: Includes maximum DAC offset voltage and maximum control voltage.
Note 9: Bandwidth is calculated using the 10% to 90% rise time equation:
BW = 0.35/rise time
Note 10: Measured 1µs after TXEN = HI.
Note 11: 50% switch point, SHDN HI = VIN, TXEN HI = VIN.
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LTC1757A-1/LTC1757A-2
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RF Detector Characteristics
at 900MHz
10000
VIN = 3V TO 4.4V
1000
100
10
–30°C
75°C
25°C
1
–24 –20 –16 –12 –8 –4 0 4 8
RF INPUT POWER (dBm)
12 16
1757A G01
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PI FU CTIO S
PCTL REFERENCED DETECTOR OUTPUT VOLTAGE (mV)
PCTL REFERENCED DETECTOR OUTPUT VOLTAGE (mV)
TYPICAL PERFOR A CE CHARACTERISTICS
RF Detector Characteristics
at 1800MHz
10000
VIN = 3V TO 4.4V
1000
100
10
–30°C
75°C
25°C
1
–22 –18 –14 –10 –6 –2 2 6
RF INPUT POWER (dBm)
10 14
1757A G02
(LTC1757A-2/LTC1757A-1)
VIN (Pin 1): Input Supply Voltage, 2.7V to 6V. VIN should
be bypassed with 0.1µF and 100pF ceramic capacitors.
Used as return for RF 185Ω termination.
TXEN (Pin 7/Pin 6): Transmit Enable Input. A logic high
enables the control amplifier. When TXEN is low and
SHDN is high the part is in the autozero mode. This input
has an internal 150k resistor to ground.
RF (Pin 2): RF Feedback Voltage from the Directional
Coupler. Referenced to VIN. A coupling capacitor of 33pF
must be used to connect to the ground referenced directional coupler. The frequency range is 850MHz to 2000MHz.
This pin has an internal 185Ω termination, an internal
Schottky diode detector and peak detector capacitor.
VPCB (Pin 8): (LTC1757A-2 Only) Power Control Voltage
Output. This pin drives an external RF power amplifier
power control pin. The maximum load capacitance is
100pF. The output is capable of rail-to-rail swings at low
load currents. Selected when BSEL is high.
SHDN (Pin 3): Shutdown Input. A logic low on the SHDN
pin places the part in shutdown mode. A logic high places
the part in autozero when TXEN is low. SHDN has an internal 150k pull-down resistor to ensure that the part is in shutdown when the drivers are in a three-state condition.
VPCA (Pin 9/Pin 7): Power Control Voltage Output. This pin
drives an external RF power amplifier power control pin.
The maximum load capacitance is 100pF. The output is
capable of rail-to-rail swings at low load currents. Selected
when BSEL is low (LTC1757A-2 only).
BSEL (Pin 4): (LTC1757A-2 Only) Selects VPCA when low
and VPCB when high. This input has an internal 150k
resistor to ground.
VCC (Pin 10/Pin 8): RF Power Amplifier Supply. This pin
has an internal 0.050Ω sense resistor between VIN and
VCC that senses the RF power amplifier supply current to
detect overcurrent conditions.
GND (Pin 5/Pin 4): System Ground.
PCTL (Pin 6/Pin 5): Analog Input. The external power
control DAC drives this input. The amplifier servos the RF
power until the RF detected signal equals the DAC signal.
The input resistance is typically 100k.
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LTC1757A-1/LTC1757A-2
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BLOCK DIAGRA
(LTC1757A-2)
DIPLEXER
900MHz
RF PA
RF PA
1.8GHz
50Ω
Li-Ion
10
1
VCC
VIN
RSENSE
0.05Ω
METAL
0.02Ω
0.02Ω
TXENB
100Ω
METAL
68Ω
AUTOZERO
–
PA
AZ
OVERCURRENT
–
VPCA
+
+
–
CS
9
ADJ
+
33pF
OFFSET
TRIM
2
RF
185Ω
+
gm
GAIN
TRIM
VIN
–+
600mV
PB
CAMP
50mV
VPCB
–
CC
ICL
42k
22pF
42k
60µA
5
8
6pF
400µA
140k
+
VPC
33k
RFDET
gm
–
16.7k
60µA
110k
33k
1.2V
GND
OVP
gm
173k
VIN
1.2V
BG1
1.2V BANDGAP
33k
600mV
54.5k
12Ω
BG1
THERMAL
SHUTDOWN
TSDB
PB
TSDB
OPERATE SHDN
TXENI
XMT AUTOZERO
150k
150k
3
SHDN
7
TXEN
MUX
CONTROL
150k
6
PCTL
12Ω
PA
4
100Ω
100Ω
BSEL
1757A BD
5
LTC1757A-1/LTC1757A-2
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APPLICATIO S I FOR ATIO
Operation
The LTC1757A-2 dual band RF power control amplifier
integrates several functions to provide RF power control
over two frequencies ranging from 850MHz to 2GHz. The
device also prevents damage to the RF power amplifier
due to overvoltage or overcurrent conditions. These functions include an internally compensated power control
amplifier to control the RF output power, an autozero
section to cancel internal and external voltage offsets, a
sense amplifier with an internal sense resistor to limit the
maximum RF power amplifier current, an RF Schottky
diode peak detector and amplifier to convert the RF feedback signal to DC, a VPCA/B overvoltage clamp, a VIN
overvoltage detector, a bandgap reference, a thermal
shutdown circuit and a multiplexer to switch the control
amplifier output to either VPCA or VPCB.
Band Selection
The LTC1757A-2 is designed for dual band operation. The
BSEL pin will select output VPCA when low and output VPCB
when high. For example, VPCA could be used to drive a
900MHz channel and VPCB a 1.8GHz/1.9GHz channel.
BSEL must be established before the part is enabled. The
LTC1757A-1 can be used to drive a single RF channel or
dual channel module with integral multiplexer.
Control Amplifier
The control amplifier supplies the power control voltage to
the RF power amplifier. A portion (typically – 19dB for low
frequencies and –14dB for high frequencies) of the RF
output signal is sampled, via a directional coupler, to close
the gain control loop. When a DAC signal is applied to
PCTL, the amplifier quickly servos VPCA or VPCB positive
until the detected feedback voltage applied to the RF pin
matches the voltage at PCTL. This feedback loop provides
accurate RF power control. VPCA or VPCB are capable of
driving a 5.5mA load current and 100pF load capacitor.
RF Detector
The internal RF Schottky diode peak detector and amplifier converts the RF feedback voltage from the directional
coupler to a low frequency voltage. This voltage is compared to the DAC voltage at the PCTL pin by the control
6
amplifier to close the RF power control loop. The RF pin
input resistance is typically 185Ω and the frequency
range of this pin is 850MHz to 2000MHz. The detector
demonstrates excellent efficiency and linearity over a
wide range of input power. The Schottky detector is biased
at about 60µA and drives an on-chip peak detector capacitor of 22pF.
Autozero
An autozero system is included to improve power programming accuracy over temperature. This section cancels internal offsets associated with the Schottky diode
detector and control amplifier. External offsets associated
with the DAC driving the PCTL pin are also cancelled.
Offset drift due to temperature is cancelled between each
burst by the autozero system. The maximum offset allowed at the DAC output is limited to 400mV. Autozeroing
is performed when the part is in autozero mode (SHDN =
high, TXEN = low). When the part is enabled (TXEN = high,
SHDN = high) the autozero capacitors are held and the
VPCA or VPCB pin is connected to the control amplifier
output. The hold droop voltage of typically 10µV/ms
provides for accurate offset cancellation over the 1/8 duty
cycle associated with the GSM protocol as well as multislot
protocals. The part must be in the autozero mode for at
least 50µs for autozero to settle to the correct value.
Protection Features
The RF power amplifier is overcurrent protected by an
internal sense amplifier. The sense amplifier measures the
voltage across an internal 0.050Ω resistor to determine
the RF power amplifier current. VPCA or VPCB is lowered as
this supply current exceeds 2.2A, thereby regulating the
current to about 2.25A. The regulated current limit is
temperature compensated. The 0.050Ω resistor and the
current limit feature can be removed by connecting the PA
directly to VIN.
The RF power amplifier control voltage pins are overvoltage protected. The VPC overvoltage clamp regulates VPCA
or VPCB to 2.85V when the gain and PCTL input combination attempts to exceed this voltage.
The RF power amplifier is protected against excessive
input supply voltages. The VIN overvoltage detector starts
LTC1757A-1/LTC1757A-2
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APPLICATIO S I FOR ATIO
to reduce VPCA or VPCB when VIN exceeds 5V. VPCA or VPCB
will be reduced to 0V as VIN continues to increase by about
200mV. This gain control voltage reduction lowers the RF
output power eventually reducing it to zero.
The internal thermal shutdown circuit will disable the
LTC1757A-2 if the junction temperature exceeds approximately 150°C. The part will be enabled when the temperature falls below 140°C.
Modes of Operation
The LTC1757A-2 supports three operating modes: shutdown, autozero and enable.
In shutdown mode (SHDN = Low) the part is disabled and
supply currents will be reduced to <1µA. VPCA and VPCB
will be connected to ground via 100Ω switches.
In autozero mode (SHDN = High, TXEN = Low) VPCA and
VPCB will remain connected to ground and the part will be
in the autozero mode. The part must remain in autozero for
at least 50µs to allow for the autozero circuit to settle.
In enable mode (SHDN = High, TXEN = High) the control
loop and protection functions will be operational. When
TXEN is switched high, acquisition will begin. The control
amplifier will start to ramp the control voltage to the RF
power amplifier. The RF amplifier will then start to turn on.
The feedback voltage from the directional coupler and the
output power will be detected by the LTC1757A-2 at the RF
pin. The loop closes and the amplifier output tracks the DAC
voltage ramping at PCTL. The RF power output will then
follow the programmed power profile from the DAC.
MODE
Shutdown
SHDN
TXEN
OPERATION
Low
Low
Disabled
Autozero
High
Low
Autozero
Enable
High
High
Power Control
LTC1757A-1 Description
The LTC1757A-1 is identical in performance to the
LTC1757A-2 except that only one control output (VPCA)
is available. The LTC1757A-1 can drive a single RF
channel in the 850MHz to 2GHz range or a dual RF
channel module with an internal multiplexer. Several
manufacturers offer dual RF channel modules with an
internal multiplexer.
General Layout Considerations
The LTC1757A-1/LTC1757A-2 should be placed near the
directional coupler. The feedback signal line to the RF pin
should be a 50Ω transmission line with a 68Ω termination.
If short-circuit protection is used, bypass capacitors are
required at VCC.
LTC1757A-2 Timing Diagram
SHUTDOWN
AUTOZERO
ENABLE
SHDN
t1
t2
BSEL
TXEN
tS
NOTE 1
PCTL
START
VOLTAGE
VPCA
VPCB
START
VOLTAGE
tS: AUTOZERO SETTLING TIME, 50µs MINIMUM
t1: BSEL CHANGE PRIOR TO TXEN, 200ns TYPICAL
t2: BSEL CHANGE AFTER TXEN, 200ns TYPICAL
1757A TD
NOTE 1: THE EXTERNAL DAC DRIVING THE PCTL PIN CAN BE ENABLED DURING AUTOZERO.
THE AUTOZERO SYSTEM WILL CANCEL THE DAC TRANSIENT. THE DAC MUST BE
SETTLED TO AN OFFSET ≤400mV BEFORE TXEN IS ASSERTED HIGH.
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LTC1757A-1/LTC1757A-2
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External Termination
closes and the output power follows the DAC profile. The
RF power amplifier will require a certain control voltage
level (threshold) before an RF output signal is produced.
The LTC1757A VPCA/B outputs must quickly rise to this
threshold voltage in order to meet the power/time profile.
To reduce this time, the LTC1757A starts at 550mV.
However, at very low power levels the PCTL input signal is
small, and the VPCA/B outputs may take several microseconds to reach the RF power amplifier threshold voltage. To
reduce this time, it may be necessary to apply a positive
pulse at the start of the ramp to quickly bring the VPCA/B
outputs to the threshold voltage. This can generally be
achieved with DAC programming. The magnitude of the
pulse is dependent on the RF amplifier characteristics.
The LTC1757A has an internal 185Ω termination resistor
at the RF pin. If a directional coupler is used, it is
recommended that an external 68Ω termination resistor
be connected between the RF coupling capacitor (33pF),
and ground at the side connected to the directional
coupler. If the termination is placed at the LTC1757A RF
pin, then the 68Ω resistor must be connected to VIN since
the detector is referenced to VIN. Termination components should be placed adjacent to the LTC1757A.
Power Ramp Profiles
The external voltage gain associated with the RF channel
can vary significantly between RF power amplifier types.
The LTC1757A frequency compensation has been optimized to be stable with several different power amplifiers
and manufacturers. This frequency compensation generally defines the loop dynamics that impact the power/time
response and possibly (slow loops) the power ramp
sidebands. The LTC1757A operates open loop until an RF
voltage appears at the RF pin, at which time the loop
Power ramp sidebands and power/time are also a factor
when ramping to zero power. For RF amplifiers requiring
high control voltages, it may be necessary to further adjust
the DAC ramp profile. When the power is ramped down the
loop will eventually open at power levels below the
LTC1757A detector threshold. The LTC1757A will then go
open loop and the output voltage at VPCA or VPCB will stop
10
0
RFOUT (dBc)
–10
–20
–30
–40
–50
–60
–70
–80
–28
–18
–10
0
543
553
561
571
DAC VOLTAGE
TIME (µs)
START
PULSE
START
CODE
ZERO
CODE
100mV
TXEN
SHDN
50µs MINIMUM, ALLOWS TIME FOR DAC
AND AUTOZERO TO SETTLE
Figure 1. LTC1757A Ramp Timing
8
1757A F01
LTC1757A-1/LTC1757A-2
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falling. If this voltage is high enough to produce RF output
power, the power/time or power ramp sidebands may not
meet specification. This problem can be avoided by starting the DAC ramp from 100mV (Figure 1). At the end of the
cycle, the DAC can be ramped down to 0mV. This applies
a negative signal to the LTC1757A thereby ensuring that
the VPCA/B outputs will ramp to 0V. The 100mV ramp step
must be applied at least 4µs before TXEN is asserted high
to allow for the auto zero to cancel the step. Slow DAC rise
times due to filtering will extend this time by the additional
RC time constants.
Another factor that affects power ramp sidebands is the
DAC signal to PCTL. The bandwidth of the LTC1757A is not
low enough to adequately filter out steps associated with
the DAC. If the baseband chip does not have an internal
filter, it is recommended that a 2-stage external filter be
placed between the DAC output and the PCTL pin. Resistor
values should be kept below 2k since the PCTL input
resistance is 100k. A typical filter scheme is shown in
Figure 2.
increased due to losses after the coupler, the increased
power levels must not result in excessive RF voltages at
the RF pin. If 2dB is lost after the directional coupler, then
the directional coupler loss should be increased by 2dB.
For example, if the maximum output requirement is
30dBm, but 32dBm is required at the directional coupler,
then the coupler loss should be at least 16dB. Excessive
coupler loss will degrade low power performance due to
lower Schottky detector efficiencies. If the directional
coupler loss cannot be easily adjusted a resistor network
can be used as shown in Figure 3.
3dB
ATTENUATOR
LTC1757A
RF
33pF
R2
30Ω
R1
180Ω
DIRECTIONAL
COUPLER
BAND 1
R3
180Ω
BAND 2
50Ω
PLACE NEAR LTC1757A
1757A F03
Figure 3
Demo Board
1k
LTC1757A
1k
PTCL
DAC
330pF
330pF
1757A F02
Figure 2
RF Input Voltage Levels
The LTC1757A detects peak RF voltage levels. The maximum peak RF voltage level is 2V corresponding to 16dBm
in a 50Ω system. The RF signal is normally supplied via a
directional coupler. The directional coupler loss for the
low band is typically 19dB and for the high band 14dB. The
high band generally requires a 5dB lower minimum power
level and to keep the minimum RF detector voltage levels
similar between both bands, the directional coupler loss is
adjusted accordingly.
The maximum RF input voltage or power restriction must
be considered when determining coupler loss requirements. If the RF power at the directional coupler is
The LTC1757A has a demo board available upon request.
The demo board has a 900MHz and an 1800MHz RF
channel controlled by the LTC1757A. Timing signals for
TXEN are generated on the board using a 13MHz crystal
reference. The PCTL power control pin is driven by a
10-bit DAC and the DAC profile can be loaded via a serial
port. The serial port data is stored in a flash memory,
which is capable of storing eight ramp profiles. The board
is supplied preloaded with four GSM power profiles and
four DCS power profiles covering the entire power range.
External timing signals can be used in place of the internal
crystal controlled timing. A variety of RF power amplifier
channels are available.
LTC1757A Control Loop Stability
The LTC1757A provides a stable control loop for several
RF power amplifier models from different manufacturers
over a wide range of frequencies, output power levels and
VSWR conditions. However, there are several factors that
can improve or degrade loop frequency stability.
9
LTC1757A-1/LTC1757A-2
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APPLICATIO S I FOR ATIO
1) The additional voltage gain supplied by the RF power
amplifier increases the loop gain raising poles normally
below the 0dB axis. The extra voltage gain can vary
significantly over input/output power ranges, frequency,
power supply, temperature and manufacturer. RF power
amplifier gain control transfer functions are often not
available and must be generated by the user. Loop oscillations are most likely to occur in the midpower range
where the external voltage gain associated with the RF
power amplifier typically peaks. It is useful to measure the
oscillation or ringing frequency to determine whether it
corresponds to the expected loop bandwidth and thus is
due to high gain bandwidth.
2) Loop voltage losses supplied by the directional coupler
will improve phase margin. The larger the directional
coupler loss the more stable the loop will become. However, larger losses reduce the RF signal to the LTC1757A
and detector performance may be degraded at low power
levels. (See RF Detector Characteristics.)
3) Additional poles within the loop due to filtering or the
turn-on response of the RF power amplifier can degrade
the phase margin if these pole frequencies are near the
effective loop bandwidth frequency. Generally loops using
RF power amplifiers with fast turn-on times have more
phase margin. Extra filtering below 16MHz should never
be placed within the control loop, as this will only degrade
phase margin.
4) Control loop instability can also be due to open loop
issues. RF power amplifiers should first be characterized
in an open loop configuration to ensure self oscillation is
not present. Self-oscillation is often related to poor power
supply decoupling, ground loops, coupling due to poor
layout and extreme VSWR conditions. The oscillation frequency is generally in the 100kHz to 10MHz range. Power
supply related oscillation suppression requires large value
ceramic decoupling capacitors placed close to the RF
power amp supply pins. The range of decoupling capacitor
values is typically 1nF to 3.3µF.
5) Poor layout techniques associated with the directional
coupler area may result in high frequency signals bypassing the coupler. This could result in stability problems due
to the reduction in the coupler loss.
10
Determining External Loop Voltage Gain
and Bandwidth
The external loop voltage gain contributed by the RF channel and directional coupler network should be measured in
a closed loop configuration. A voltage step is applied to
PCTL and the change in VPCA (or VPCB) is measured. The
detected voltage is 0.85 • PCTL and the external voltage
gain contributed by the RF power amplifier and directional
coupler network is 0.85 • ∆VPCTL/∆VVPCA. Measuring voltage gain in the closed loop configuration accounts for the
nonlinear detector gain that is dependent on RF input
voltage and frequency as well as RF channel gain peaking.
The LTC1757A unity gain bandwidth specified in the data
sheet assumes that the net voltage gain contributed by the
RF power amplifier and directional coupler is unity. The
bandwidth is calculated by measuring the rise time between 10% and 90% of the voltage change at VPCA or VPCB
for a small step in voltage applied to PCTL.
BW1 = 0.35/rise time
The LTC1757A control amplifier unity gain bandwidth
(BW1) is typically 400kHz. The phase margin of the control
amplifier is typically 86°.
For example to determine the external RF channel loop
voltage gain with the loop closed, apply a 100mV step to
PCTL from 300mV to 400mV. VPCA (or VPCB) will increase
to supply enough feedback voltage to the RF pin to cancel
this 100mV step which would be the required detected
voltage of 85mV. VPCA changed from 1.498V to 1.540V to
create the RF output power change required. The net
external voltage gain contributed by the RF power amplifier and directional coupler network can be calculated by
dividing the 85mV change at the RF pin by the 42mV
change at the VPCA pin. The net external voltage gain would
then be approximately 2. The loop bandwidth extends to
2 • BW1. If BW1 is 400kHz, the loop bandwidth increases
to approximately 800kHz. The phase margin can be determined from Figure 4. Repeat the above voltage gain
measurement over the full power and frequency range.
LTC1757A-1/LTC1757A-2
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APPLICATIO S I FOR ATIO
80
70
60
50
40
30
20
10
0
–10
–20
–30
–40
–50
–60
100
180
160
140
120
100
80
60
40
20
0
–20
–40
–60
–80
–100
10M
controller is included to better determine pole and zero
interactions. The user can apply external gains and poles
to determine bandwidth and phase margin. DC, transient
and RF information cannot be extracted from the present
model. The model is suitable for external gain evaluations
up to 6×. The 1.25MHz PCTL input filter limits the bandwidth, therefore, the RF input is used in the model.
RLOAD = 2k
CLOAD = 33pF
PHASE
GAIN
1k
10k
100k
FREQUENCY (Hz)
1M
PHASE (DEG)
VOLTAGE GAIN (dB)
External pole frequencies within the loop may further
reduce phase margin. The phase margin degradation, due
to external and internal pole combinations, is difficult to
determine since complex poles are present. Gain peaking
may occur, resulting in higher bandwidth and lower phase
margin than predicted from the open loop Bode plot. A low
frequency AC SPICE model of the LTC1757A power
+
PCTL
1757A F05
50
20
GAIN
0
0
–50
–20
–40
100
1k
10k
100k
FREQUENCY (Hz)
1M
DIRECTIONAL
COUPLER
14dB to 20dB LOSS
Figure 5. Closed Loop Block Diagram
–100
10M
1757A F06
Figure 6. SPICE Model Open Loop Gain and Phase
Characteristics from RF to VPCA
VPCA CLOSED LOOP VOLTAGE GAIN (dB)
100
H2
5
PHASE (DEG)
VOLTAGE GAIN (dB)
PHASE
40
RF
RF DETECTOR
200
150
60
LTC1757A
H1
Figure 4. Measured Open Loop Gain and Phase
CLOAD = 33pF
RLOAD = 2k
CONTROLLED
RF OUTPUT
POWER
–
IFB
1757A F04
80
CONTROL
AMPLIFER
BW1 ≅ 400kHz
RF POWER AMP
VPCA/B
G1
G2
0
BANDWIDTH = 1.35MHz
–5
–10
–15
–20 EXTERNAL GAIN = 3
CLOAD = 33pF
RLOAD = 2k
–25
100
1k
10k
100k
FREQUENCY (Hz)
1M
10M
1757A F07
Figure 7. SPICE Model Closed Loop Voltage Gain
11
LTC1757A-1/LTC1757A-2
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APPLICATIO S I FOR ATIO
*LTC1757A Low Frequency AC Spice Model*
GIN1 ND2 0 ND1 IFB 59E-6
GX3 ND6 0 0 ND4 1E-6
GX4 ND7 0 0 ND6 1E-6
GX1 ND3 0 0 ND2 1E-6
GX2 ND4 0 0 ND3 1E-6
GX5 ND10 0 0 ND9 1E-6
GX8 ND14 0 0 ND12 1E-6
GX7 ND12 0 0 ND11 1E-6
GX6 ND11 0 0 ND10 1E-6
GXFB IFB 0 0 ND14 23.53E-6
EX1 ND8 0 0 ND7 1
RPCTL2 ND1 0 33.75E3
RO1 ND2 0 85E6
RX3 ND6 0 1E6
RX4 ND7 0 1E6
RPCTL1 PCTL ND1 67.5E3
RX1 ND3 0 1E6
RX2 ND4 ND5 1E6
RSD RF ND9 500
RX5 ND10 0 1E6
RT RF 0 200
RX8 ND14 0 1E6
RX7 ND12 ND13 1E6
RX6 ND11 0 1E6
R9 ND8 ND8A 100
R9A ND8A VPCA 20
RLOAD VPCA 0 2E3
RFB1 IFB 0 16.75E3
CPCTL1 ND1 0 5.8E-12
CX3 ND6 0 1.2E-15
CX4 ND7 0 3.6E-15
CC1 ND2 0 10E-12
CX1 ND3 0 1.4E-15
CX5 ND10 0 10E-15
CX6 ND11 0 1.2E-15
CLOAD VPCA 0 33E-12
CLINT ND8A 0 37E-12
CLINTA VPCA 0 18E-12
CFB1 IFB 0 1E-12
CP ND9 0 22E-12
LX2 ND5 0 17E-3
LX7 ND13 0 7E-3
**Closed loop connections, comment-out VPCTLO, VRF, Adjust EFB gain to reflect external gain, currently set at 3X**
*EFB RF 0 VPCA VIN 3
*VIN VIN 0 DC 0 AC 1
*VPCTLO PCTL 0 DC 0
**Open loop connections, comment-out EFB, VIN and VPCTLO**
VPCTLO PCTL 0 DC 0
VRF RF 0 DC 0 AC 1
**Add AC statement and print statement as required**
.AC DEC 50 100 1E7
.END
Figure 8. LTC1757A Low Frequency AC SPICE Model
12
LTC1757A-1/LTC1757A-2
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APPLICATIO S I FOR ATIO
This model (Figure 8) is being supplied to LTC users as an
aid to circuit designs. While the model reflects reasonably
close similarity to corresponding devices in low frequency
AC performance terms, its use is not suggested as a
replacement for breadboarding. Simulation should be
used as a forerunner or a supplement to traditional lab
testing.
Users should note very carefully the following factors
regarding this model: Model performance in general will
reflect typical baseline specs for a given device, and
certain aspects of performance may not be modeled fully.
While reasonable care has been taken in the preparation,
we cannot be responsible for correct application on any
and all computer systems. Model users are hereby notified
that these models are supplied “as is”, with no direct or
implied responsibility on the part of LTC for their operation
within a customer circuit or system. Further, Linear Technology Corporation reserves the right to change these
models without prior notice.
In all cases, the current data sheet information is your final
design guideline, and is the only performance guarantee.
For further technical information, refer to individual device
data sheets. Your feedback and suggestions on this model
is appreciated.
Linear Technology Corporation hereby grants the users of
this model a nonexclusive, nontransferable license to use
this model under the following conditions:
The user agrees that this model is licensed from Linear
Technology and agrees that the model may be used,
loaned, given away or included in other model libraries as
long as this notice and the model in its entirety and
unchanged is included. No right to make derivative works
or modifications to the model is granted hereby. All such
rights are reserved.
This model is provided as is. Linear Technology makes no
warranty, either expressed or implied about the suitability
or fitness of this model for any particular purpose. In no
event will Linear Technology be liable for special, collateral, incidental or consequential damages in connection
with or arising out of the use of this model. It should be
remembered that models are a simplification of the actual
circuit.
13
CPCTL1
5.8E-12
RF
–
+
RSD
500
CP
22E-12
RT
200
59E-6
GIN1
ND9
IFB
GM
14.5MHz POLE
RPCTL2
33.75E3
ND1
–
+
GM
–
+
1E-6
GX5
CX5
10E-15
RX5
1E6
–
–
+
GM
RFB1
16.75E3
–
1E-6
1E-6
CFB1
1E-12
ND11
GM
CX6
1.2E-15
RX6
1E6
130MHz POLE
GX6
23.53E-6
GXFB
9.5MHz POLE
CX1
1.4E-15
+
GX2
–
+
ND4
GM
–
+
VAMP
–
+
1E-6
GX7
GM
LX7
7E-3
RX7
1E6
ND13
–
+
GM
1E-6
GX8
CLINT
37E-12
ND8A
CX3
1.2E-15
RX3
1E6
R9
ND8 100Ω
1E-6
GX3
ND6
130MHz POLE
EX1
ND12
23MHz ZERO
LX2
17E-3
RX2
1E6
ND5
9MHz ZERO
Figure 9. LTC1757A Low Frequency AC Model
GM
1E-6
RX1
1E6
ND3
114MHz POLE
GX1
+
GM
ND10
16MHz POLE
CC1
10E-12
RO1
85E6
ND2
355Hz POLE
1757A F09
RX8
1E6
1E-6
CLINTA
18E-12
GM
ND14
RLOAD
2E3
R9A
20Ω
–
+
GX4
CX4
3.6E-15
RX4
1E6
44MHz POLE
CLOAD
33E-12
VPCA
ND7
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RPCTL1
67.5E3
APPLICATIO S I FOR ATIO
U
PCTL
LTC1757A-1/LTC1757A-2
LTC1757A-1/LTC1757A-2
U
PACKAGE DESCRIPTIO
Dimensions in inches (millimeters) unless otherwise noted.
MS8 Package
8-Lead Plastic MSOP
(LTC DWG # 05-08-1660)
0.118 ± 0.004*
(3.00 ± 0.102)
8
7 6
5
0.118 ± 0.004**
(3.00 ± 0.102)
0.193 ± 0.006
(4.90 ± 0.15)
1
2 3
4
0.040 ± 0.006
(1.02 ± 0.15)
0.007
(0.18)
0.034 ± 0.004
(0.86 ± 0.102)
0° – 6° TYP
SEATING
PLANE 0.012
(0.30)
0.0256
REF
(0.65)
BSC
0.021 ± 0.006
(0.53 ± 0.015)
0.006 ± 0.004
(0.15 ± 0.102)
MSOP (MS8) 1098
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
MS10 Package
10-Lead Plastic MSOP
(LTC DWG # 05-08-1661)
0.118 ± 0.004*
(3.00 ± 0.102)
10 9 8 7 6
0.118 ± 0.004**
(3.00 ± 0.102)
0.193 ± 0.006
(4.90 ± 0.15)
1 2 3 4 5
0.040 ± 0.006
(1.02 ± 0.15)
0.007
(0.18)
0.034 ± 0.004
(0.86 ± 0.102)
0° – 6° TYP
0.021 ± 0.006
(0.53 ± 0.015)
SEATING
PLANE 0.009
(0.228)
REF
0.0197
(0.50)
BSC
0.006 ± 0.004
(0.15 ± 0.102)
MSOP (MS10) 1098
* DIMENSION DOES NOT INCLUDE MOLD FLASH, PROTRUSIONS OR GATE BURRS. MOLD FLASH,
PROTRUSIONS OR GATE BURRS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
** DIMENSION DOES NOT INCLUDE INTERLEAD FLASH OR PROTRUSIONS.
INTERLEAD FLASH OR PROTRUSIONS SHALL NOT EXCEED 0.006" (0.152mm) PER SIDE
Information furnished by Linear Technology Corporation is believed to be accurate and reliable.
However, no responsibility is assumed for its use. Linear Technology Corporation makes no representation that the interconnection of its circuits as described herein will not infringe on existing patent rights.
15
LTC1757A-1/LTC1757A-2
U
TYPICAL APPLICATIO
Single Band Cellular Telephone Transmitter
68Ω
LTC1757A-1
VIN 33pF
1
Li-Ion
2
SHDN
3
4
VIN
VCC
RF
VPCA
SHDN
TXEN
GND
PCTL
8
DIRECTIONAL
COUPLER
7
6
5
TXEN
RFIN
RF PA
50Ω
DAC
1757A TA02
Using the LTC1757A-1 in a Dual Band Cellular Telephone Transmitter Without Current Limiting
68Ω
33pF
LTC1757A-1
VIN
1
2
Li-Ion
SHDN
3
4
VIN
VCC
RF
VPCA
SHDN
TXEN
GND
PCTL
RF POWER MODULE WITH MUX
8
VCC
7
6
PWRCTRL
TXEN
5
DIRECTIONAL
COUPLER
DIPLEXER
RFOUT1
900MHz
BANDSELECT RFOUT2
1800MHz
RF1 IN
RF2 IN
50Ω
1757A TA03
900MHz
1800MHz
DAC
RELATED PARTS
PART NUMBER
DESCRIPTION
COMMENTS
LTC1261
Regulated Inductorless Voltage Inverter
Regulated –5V from 3V, REG Pin Indicates Regulation, Up to 15mA, Micropower
LTC1550/LTC1551
Low Noise Inductorless Voltage Inverter
Regulated Output, <1mVP-P Ripple, 900kHz
LTC1555L-1.8
SIM Card Power Supply and
Level Translator
Buck/Boost Charge Pump Generates 1.8V, 3V or 5V; 30µA Quiescent Current;
2.6V ≤ VIN ≤ 6V
LTC1682
Doubler Charge Pump with Low Noise
Linear Regulator
1.8V ≤ VIN ≤ 4.4V; Low Noise 60µVRMS (100kHz BW);
Ideal for backlighting
LTC1731
Li-Ion Linear Battery Charger
Small, Thin 8-Pin MSOP, Trickle Charge, EOC Indicator, 1% Accuracy
LTC3200/LTC3200-5
Low Noise, Regulated Charge Pump
2MHz Constant Frequency, IOUT = 100mA, 2.7V ≤ VIN ≤ 4.5V,
SOT-23 and MSOP Packages
16
Linear Technology Corporation
1757af LT/TP 1000 4K • PRINTED IN THE USA
1630 McCarthy Blvd., Milpitas, CA 95035-7417
(408)432-1900 ● FAX: (408) 434-0507 ● www.linear-tech.com
 LINEAR TECHNOLOGY CORPORATION 2000